Add new functions drm_edid_read(), drm_edid_read_ddc(), and
drm_edid_read_custom() to replace drm_get_edid() and drm_do_get_edid()
for reading the EDID. The transition is expected to happen over a fairly
long time.
Note that the new drm_edid_read*() functions do not do any of the
connector
Add a new function drm_edid_connector_update() to replace the
combination of calls drm_connector_update_edid_property() and
drm_add_edid_modes(). Usually they are called in the drivers in this
order, however the former needs information from the latter.
Since the new drm_edid_read*() functions no
We'll want to return the allocated buffer size in the future. Keep track
of it.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 27 +++
1 file changed, 19 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
Add a function to get the cea data block collection size.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 24 +---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index
The CTA Data Block Collection is valid only for CTA extension version
3. In versions 1 and 2, it is a reserved block, which we ignore.
The DTD start offset (byte 2, or d in CTA-861 spec), which determines
the CTA Data Block Collection size, is specified slightly differently
for different
Add drm_edid based block count and data access helper functions that
take the EDID allocated size into account.
At the moment, the allocated size should always match the EDID size
indicated by the extension count, but this will change in the future.
Signed-off-by: Jani Nikula
Reviewed-by:
Add a helper function to be used as the "default" .get_modes()
hook. This also works as an example of what the driver .get_modes()
hooks are supposed to do regarding the new drm_edid_read*() and
drm_edid_connector_update() calls.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_probe_helper.c
v2 of [1], addressing review comments.
BR,
Jani.
[1] https://patchwork.freedesktop.org/series/104309/
Jani Nikula (15):
drm/edid: fix CTA data block collection size for CTA version 3
drm/edid: abstract cea data block collection size
drm/edid: add block count and data helper functions for
== Series Details ==
Series: tests/kms_async_flips: first async flip discarded on i915 (rev2)
URL : https://patchwork.freedesktop.org/series/104876/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/104876/revisions/2/mbox/ not
applied
Applying:
Hi Dave and Daniel,
here's the first PR for drm-misc-next that will go into v5.20.
Best regards
Thomas
drm-misc-next-2022-06-08:
drm-misc-next for 5.20:
UAPI Changes:
* connector: export bpc limits in debugfs
* dma-buf: Print buffer name in debugfs
Cross-subsystem Changes:
* dma-buf:
On 03/06/2022 09:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 11:27:17AM +0200, Daniel Vetter wrote:
On Wed, 1 Jun 2022 at 11:03, Dave Airlie wrote:
On Tue, 24 May 2022 at 05:20, Niranjana
On 07/06/2022 22:32, Niranjana Vishwanathapura wrote:
On Tue, Jun 07, 2022 at 11:18:11AM -0700, Niranjana Vishwanathapura wrote:
On Tue, Jun 07, 2022 at 12:12:03PM -0500, Jason Ekstrand wrote:
On Fri, Jun 3, 2022 at 6:52 PM Niranjana Vishwanathapura
wrote:
On Fri, Jun 03, 2022 at
Take the HF-EEODB extension count override into account.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 5cac357e50b0..b7b1f0639115 100644
---
HDMI 2.1 section 10.3.6 defines an HDMI Forum EDID Extension Override
Data Block, which may contain a different extension count than the base
block claims. Add support for reading more EDID data if available. The
extra blocks aren't parsed yet, though.
Hard-coding the EEODB parsing instead of
We need to stop duplicating EDID validation and parsing all over the
subsystem in various broken ways.
v2: Update to reflect drm_connector_helper_get_modes()
Cc: David Airlie
Cc: Daniel Vetter
Signed-off-by: Jani Nikula
---
Documentation/gpu/todo.rst | 25 +
1 file
Try to use struct drm_edid where possible, even if having to fall back
to looking into struct edid down low via drm_edid_raw().
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bios.c | 23 ---
drivers/gpu/drm/i915/display/intel_bios.h | 4 ++--
Convert all the connectors that use cached connector edid and
detect_edid to drm_edid.
Signed-off-by: Jani Nikula
---
.../gpu/drm/i915/display/intel_connector.c| 4 +-
.../drm/i915/display/intel_display_types.h| 4 +-
drivers/gpu/drm/i915/display/intel_dp.c | 74
Rewrite edid_filter_invalid_blocks() to filter invalid blocks
in-place. The main motivation is to not rely on passed in information on
invalid block count or the allocation size, which will be helpful in
follow-up work on HF-EEODB.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 43
Unfortunately, there are still plenty of interfaces around that require
a struct edid pointer, and it's impossible to change them all at
once. Add an accessor to the raw EDID data to help the transition.
While there are no such cases now, be defensive against raw EDID
extension count indicating
Abstract the .get_modes() connector helper call, including the
override/firmware EDID fallback, for clarity.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_probe_helper.c | 29 +++--
1 file changed, 19 insertions(+), 10 deletions(-)
diff --git
On Wed, 08 Jun 2022, Tvrtko Ursulin wrote:
> On 11/05/2022 10:46, Jani Nikula wrote:
>> The arrays are static const, but the pointer shouldn't be static.
>>
>> Fixes: 3d832f370d16 ("drm/i915/uc: Allow platforms to have GuC but not HuC")
>> Cc: John Harrison
>> Cc: Lucas De Marchi
>> Cc:
On 07/06/2022 22:25, Niranjana Vishwanathapura wrote:
On Tue, Jun 07, 2022 at 11:42:08AM +0100, Tvrtko Ursulin wrote:
On 03/06/2022 07:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 11:27:17AM +0200,
On 08/06/2022 07:40, Lionel Landwerlin wrote:
On 03/06/2022 09:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 11:27:17AM +0200, Daniel Vetter wrote:
On Wed, 1 Jun 2022 at 11:03, Dave Airlie wrote:
On
On Wed, 08 Jun 2022, Tvrtko Ursulin wrote:
> On 16/05/2022 09:10, Jani Nikula wrote:
>> There's an early return for !engine->kernel_context.
>>
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/i915/display/intel_overlay.c | 2 --
>> 1 file changed, 2 deletions(-)
>>
>> diff --git
On Wed, 08 Jun 2022, Tvrtko Ursulin wrote:
> On 06/05/2022 13:04, Jani Nikula wrote:
>> Fix:
>>
>> drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c:61:6: warning: symbol
>> 'intel_pxp_debugfs_register' was not declared. Should it be static?
>>
>> Sort and remove the redundant pxp prefixes from the
> -Original Message-
> From: Roper, Matthew D
> Sent: Wednesday, June 8, 2022 6:21 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Roper, Matthew D
> ; Gupta, Anshuman
> ; Nilawar, Badal ;
> Kumar Valsan, Prathap
> Subject: [PATCH] drm/i915: More
On 08/06/2022 08:17, Tvrtko Ursulin wrote:
On 07/06/2022 20:37, Niranjana Vishwanathapura wrote:
On Tue, Jun 07, 2022 at 11:27:14AM +0100, Tvrtko Ursulin wrote:
On 17/05/2022 19:32, Niranjana Vishwanathapura wrote:
VM_BIND and related uapi definitions
v2: Ensure proper kernel-doc
== Series Details ==
Series: drm/edid: expand on struct drm_edid usage (rev3)
URL : https://patchwork.freedesktop.org/series/104309/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11733 -> Patchwork_104309v3
Summary
---
On 06/05/2022 13:04, Jani Nikula wrote:
Fix:
drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c:61:6: warning: symbol
'intel_pxp_debugfs_register' was not declared. Should it be static?
Sort and remove the redundant pxp prefixes from the includes while at
it.
Signed-off-by: Jani Nikula
---
The i915 KMD will use the first async flip to update the watermarks as
per the watermark optimization in DISPLAY13. Hence the actual async flip
will happen from the subsequent flips.
For alternate sync async test, a dummy async flip has to be done to
allow the KMD to perform the watermark related
On Tue, 17 May 2022 at 19:32, Niranjana Vishwanathapura
wrote:
>
> Add some missing i915 upai documentation which the new
> i915 VM_BIND feature documentation will be refer to.
>
> Signed-off-by: Niranjana Vishwanathapura
> ---
> include/uapi/drm/i915_drm.h | 153
== Series Details ==
Series: drm/i915/xehp: Correct steering initialization
URL : https://patchwork.freedesktop.org/series/104842/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11732_full -> Patchwork_104842v1_full
Summary
On 08/06/2022 11:36, Tvrtko Ursulin wrote:
On 08/06/2022 07:40, Lionel Landwerlin wrote:
On 03/06/2022 09:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 11:27:17AM +0200, Daniel Vetter wrote:
On Wed, 1
On 07.06.2022 10:57, Matt Roper wrote:
> Another mistake during the conversion to DSS bitmaps: after retrieving
> the DSS ID intel_sseu_find_first_xehp_dss() we forgot to modulo it down
> to obtain which ID within the current gslice it is.
>
> Fixes: b87d39019651 ("drm/i915/sseu: Disassociate
On 16/05/2022 09:10, Jani Nikula wrote:
There's an early return for !engine->kernel_context.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_overlay.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c
== Series Details ==
Series: drm/edid: expand on struct drm_edid usage (rev3)
URL : https://patchwork.freedesktop.org/series/104309/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
== Series Details ==
Series: drm/edid: expand on struct drm_edid usage (rev3)
URL : https://patchwork.freedesktop.org/series/104309/
State : warning
== Summary ==
Error: dim checkpatch failed
cbd046eb3347 drm/edid: fix CTA data block collection size for CTA version 3
57c0da5db445 drm/edid:
On 08/06/2022 09:45, Lionel Landwerlin wrote:
On 08/06/2022 11:36, Tvrtko Ursulin wrote:
On 08/06/2022 07:40, Lionel Landwerlin wrote:
On 03/06/2022 09:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at
== Series Details ==
Series: drm/i915: More PVC+DG2 workarounds
URL : https://patchwork.freedesktop.org/series/104866/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11733_full -> Patchwork_104866v1_full
Summary
---
On 07/06/2022 20:37, Niranjana Vishwanathapura wrote:
On Tue, Jun 07, 2022 at 11:27:14AM +0100, Tvrtko Ursulin wrote:
On 17/05/2022 19:32, Niranjana Vishwanathapura wrote:
VM_BIND and related uapi definitions
v2: Ensure proper kernel-doc formatting with cross references.
Also add new
On Tue, 07 Jun 2022, John Harrison wrote:
> Oops. Just saw your follow up message. No worries!
Again, sorry for the noise, and for wasting your time!
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
On 11/05/2022 10:46, Jani Nikula wrote:
The arrays are static const, but the pointer shouldn't be static.
Fixes: 3d832f370d16 ("drm/i915/uc: Allow platforms to have GuC but not HuC")
Cc: John Harrison
Cc: Lucas De Marchi
Cc: Daniele Ceraolo Spurio
Signed-off-by: Jani Nikula
---
On Mon, 2022-06-06 at 13:15 +, Souza, Jose wrote:
> On Mon, 2022-06-06 at 11:16 +0300, Jani Nikula wrote:
> > On Mon, 06 Jun 2022, "Hogander, Jouni"
> > wrote:
> > > On Fri, 2022-06-03 at 16:32 +, Souza, Jose wrote:
> > > > On Fri, 2022-06-03 at 13:14 +, Hogander, Jouni wrote:
> > > >
On Tue, 07 Jun 2022 16:15:19 -0700, John Harrison wrote:
>
> On 6/7/2022 15:29, Dixit, Ashutosh wrote:
> > On Sat, 14 May 2022 23:05:06 -0700, Vinay Belgaumkar wrote:
> >> SLPC min/max frequency updates require H2G calls. We are seeing
> >> timeouts when GuC channel is backed up and it is unable
Patch 6 is missing commit message, with that and the GitLab.Pipeline
warning fix the series LGTM
Reviewed-by: Nirmoy Das
On 5/25/2022 8:37 PM, Matthew Auld wrote:
kms_frontbuffer_tracking@basic falls over if the fb needs to be migrated
from non-mappable device memory, to the mappable part,
On Wed, Jun 08, 2022 at 12:24:04PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: More PVC+DG2 workarounds
> URL : https://patchwork.freedesktop.org/series/104866/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_11733_full ->
On Wed, Jun 08, 2022 at 08:23:34AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/xehp: Correct steering initialization
> URL : https://patchwork.freedesktop.org/series/104842/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_11732_full ->
On Mon, Jun 06, 2022 at 08:59:36AM -0600, jim.cro...@gmail.com wrote:
> On Wed, May 25, 2022 at 9:02 AM Daniel Vetter wrote:
>
> > On Mon, May 16, 2022 at 04:56:13PM -0600, Jim Cromie wrote:
> > > DRM.debug API is 23 macros, issuing 10 exclusive categories of debug
> > > messages. By rough
Ponte Vecchio no longer has MSLICE or LNCF steering, but the bspec does
document several new types of multicast register ranges. Fortunately,
most of the different MCR types all provide valid values at instance
(0,0) so there's no need to read fuse registers and calculate a
non-terminated
On Wed, Jun 08, 2022 at 08:33:25AM +0100, Tvrtko Ursulin wrote:
On 07/06/2022 22:32, Niranjana Vishwanathapura wrote:
On Tue, Jun 07, 2022 at 11:18:11AM -0700, Niranjana Vishwanathapura wrote:
On Tue, Jun 07, 2022 at 12:12:03PM -0500, Jason Ekstrand wrote:
On Fri, Jun 3, 2022 at 6:52 PM
== Series Details ==
Series: drm/i915/xehp: Correct steering initialization
URL : https://patchwork.freedesktop.org/series/104842/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11732_full -> Patchwork_104842v1_full
Summary
On Wed, Jun 08, 2022 at 09:54:24AM +0100, Tvrtko Ursulin wrote:
On 08/06/2022 09:45, Lionel Landwerlin wrote:
On 08/06/2022 11:36, Tvrtko Ursulin wrote:
On 08/06/2022 07:40, Lionel Landwerlin wrote:
On 03/06/2022 09:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM
On Wed, Jun 8, 2022 at 4:44 PM Niranjana Vishwanathapura <
niranjana.vishwanathap...@intel.com> wrote:
> On Wed, Jun 08, 2022 at 08:33:25AM +0100, Tvrtko Ursulin wrote:
> >
> >
> >On 07/06/2022 22:32, Niranjana Vishwanathapura wrote:
> >>On Tue, Jun 07, 2022 at 11:18:11AM -0700, Niranjana
== Series Details ==
Series: drm/i915/pvc: Add register steering (rev2)
URL : https://patchwork.freedesktop.org/series/104691/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/edid: expand on struct drm_edid usage (rev3)
URL : https://patchwork.freedesktop.org/series/104309/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11733_full -> Patchwork_104309v3_full
> From: Jason Gunthorpe
> Sent: Wednesday, June 8, 2022 7:27 PM
>
> On Wed, Jun 08, 2022 at 03:47:12AM +, Tian, Kevin wrote:
> > > From: Jason Gunthorpe
> > > Sent: Wednesday, June 8, 2022 7:02 AM
> > >
> > > Instead of bouncing the function call to the driver op through a blocking
> > >
i965G[M] cannot relocate objects above 4GiB.
Ensure ttm uses dma32 on these systems.
Signed-off-by: Robert Beckett
---
drivers/gpu/drm/i915/intel_region_ttm.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_region_ttm.c
Create a kernel only internal memory region that uses ttm pool allocator to
allocate volatile system pages.
Refactor internal buffer backend to simply allocate from this new
region.
Signed-off-by: Robert Beckett
---
drivers/gpu/drm/i915/gem/i915_gem_internal.c | 187 +-
Internal gem objects will soon just be volatile system memory region
objects.
To enable this, create a separate dummy object creation function
for gen6 ppgtt. The object only exists as a fake object pointing to ggtt
and gains no benefit in going via the internal backend.
Instead, create a dummy
Reorder scratch page allocation so that memory regions are available
to allocate the buffers
Signed-off-by: Robert Beckett
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gt/intel_gt_gmch.c | 20 ++--
drivers/gpu/drm/i915/gt/intel_gt_gmch.h | 6 ++
Internal/volatile buffers should not be shmem backed.
If a volatile buffer is requested, allow ttm to use the pool allocator
to provide volatile pages as backing.
Fix i915_ttm_shrink to handle !is_shmem volatile buffers by purging.
Signed-off-by: Robert Beckett
---
This series refactors i915's internal buffer backend to use ttm.
It uses ttm's pool allocator to allocate volatile pages in place of the
old code which rolled its own via alloc_pages.
This is continuing progress to align all backends on using ttm.
v2: - commit message improvements to add
By default i915_ttm_cache_level() decides I915_CACHE_LLC if HAS_SNOOP.
this is divergent from existing backends code which only considers
HAS_LLC.
Testing shows that trusting snooping on gen5- is unreliable, so limit to
gen6+
Signed-off-by: Robert Beckett
---
In commit 450cede7f380 ("drm/i915/gem: Fix the mman selftest") we fixed up
the mman selftest to allocate user buffers via smem only if we have lmem,
otherwise it uses internal buffers.
As the commit message asserts, we should only be using buffers that
userland should be able to create.
Internal
Various places within the driver override the default chosen cache_level.
Before ttm, these overrides were permanent until explicitly changed again
or for the lifetime of the buffer.
TTM movement code came along and decided that it could make that
decision at that time, which is usually well
== Series Details ==
Series: drm/i915/pvc: Add register steering (rev2)
URL : https://patchwork.freedesktop.org/series/104691/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11740 -> Patchwork_104691v2
Summary
---
On Wed, Jun 08, 2022 at 08:34:36AM +0100, Tvrtko Ursulin wrote:
On 07/06/2022 22:25, Niranjana Vishwanathapura wrote:
On Tue, Jun 07, 2022 at 11:42:08AM +0100, Tvrtko Ursulin wrote:
On 03/06/2022 07:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana
== Series Details ==
Series: drm/i915/xehp: Correct steering initialization
URL : https://patchwork.freedesktop.org/series/104842/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11732_full -> Patchwork_104842v1_full
Summary
On Wed, Jun 08, 2022 at 10:12:05AM +0100, Matthew Auld wrote:
On 08/06/2022 08:17, Tvrtko Ursulin wrote:
On 07/06/2022 20:37, Niranjana Vishwanathapura wrote:
On Tue, Jun 07, 2022 at 11:27:14AM +0100, Tvrtko Ursulin wrote:
On 17/05/2022 19:32, Niranjana Vishwanathapura wrote:
VM_BIND and
Hi,
Using the i7-11850H's iGPU, when I wake my Thinkpad X1 Extreme Gen 4
from suspend on 5.19-rc1, the display shows wild flickering with
strobing colors and more artifacts than real pixels in an utter
disaster explosion of pantone, as though bombs were dropped on the
leprechauns at the base of
== Series Details ==
Series: drm/i915: ttm for internal
URL : https://patchwork.freedesktop.org/series/104909/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11741 -> Patchwork_104909v1
Summary
---
**FAILURE**
== Series Details ==
Series: drm/i915/display: Fix handling of enable_psr parameter
URL : https://patchwork.freedesktop.org/series/104907/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11740 -> Patchwork_104907v1
Summary
On Wed, 2022-06-08 at 13:33 -0700, José Roberto de Souza wrote:
> Commit 3cf050762534 ("drm/i915/bios: Split VBT data into per-panel
> vs.
> global parts") cause PSR to be disabled when enable_psr has the
> default value and there is at least one DP port that do not supports
> PSR.
>
> That was
== Series Details ==
Series: drm/i915: More PVC+DG2 workarounds
URL : https://patchwork.freedesktop.org/series/104866/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11733 -> Patchwork_104866v1
Summary
---
The i915 KMD will use the first async flip to update the watermarks as
per the watermark optimization in DISPLAY13. Hence the actual async flip
will happen from the subsequent flips.
For alternate sync async test, a dummy async flip has to be done to
allow the KMD to perform the watermark related
On Thu, Jun 02, 2022 at 05:53:35PM -0700, Matt Roper wrote:
> Ponte Vecchio no longer has MSLICE or LNCF steering, but the bspec does
> document several new types of multicast register ranges. Fortunately,
> most of the different MCR types all provide valid values at instance
> (0,0) so there's
On 03/06/2022 09:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 11:27:17AM +0200, Daniel Vetter wrote:
On Wed, 1 Jun 2022 at 11:03, Dave Airlie wrote:
On Tue, 24 May 2022 at 05:20, Niranjana
On 08/06/2022 09:40, Lionel Landwerlin wrote:
On 03/06/2022 09:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 11:27:17AM +0200, Daniel Vetter wrote:
On Wed, 1 Jun 2022 at 11:03, Dave Airlie wrote:
On
== Series Details ==
Series: tests/kms_async_flips: first async flip discarded on i915
URL : https://patchwork.freedesktop.org/series/104876/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/104876/revisions/1/mbox/ not
applied
Applying:
The i915 KMD will use the first async flip to update the watermarks as
per the watermark optimization in DISPLAY13. Hence the actual async flip
will happen from the subsequent flips.
For alternate sync async test, a dummy async flip has to be done to
allow the KMD to perform the watermark related
Commit 3cf050762534 ("drm/i915/bios: Split VBT data into per-panel vs.
global parts") cause PSR to be disabled when enable_psr has the
default value and there is at least one DP port that do not supports
PSR.
That was happening because intel_psr_init() is called for every DP
port and then
On Wed, Jun 08, 2022 at 10:12:45AM +0300, Lionel Landwerlin wrote:
> On 03/06/2022 09:53, Niranjana Vishwanathapura wrote:
> > On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana Vishwanathapura
> > wrote:
> > > On Wed, Jun 01, 2022 at 11:27:17AM +0200, Daniel Vetter wrote:
> > > > On Wed, 1 Jun
== Series Details ==
Series: drm/i915: ttm for internal
URL : https://patchwork.freedesktop.org/series/104909/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Wed, Jun 08, 2022 at 04:55:38PM -0500, Jason Ekstrand wrote:
On Wed, Jun 8, 2022 at 4:44 PM Niranjana Vishwanathapura
wrote:
On Wed, Jun 08, 2022 at 08:33:25AM +0100, Tvrtko Ursulin wrote:
>
>
>On 07/06/2022 22:32, Niranjana Vishwanathapura wrote:
>>On Tue, Jun 07,
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