[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v3,1/1] drm/i915/pxp: Add missing tag for Wa_14019159160
== Series Details ==
Series: series starting with [v3,1/1] drm/i915/pxp: Add missing tag for
Wa_14019159160
URL : https://patchwork.freedesktop.org/series/126946/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13930_full -> Patchwork_126946v1_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (10 -> 10)
--
No changes in participating hosts
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_126946v1_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_psr@psr_dpms}:
- shard-dg2: [SKIP][1] ([i915#9732]) -> [SKIP][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13930/shard-dg2-1/igt@kms_psr@psr_dpms.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/shard-dg2-11/igt@kms_psr@psr_dpms.html
Known issues
Here are the changes found in Patchwork_126946v1_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@api_intel_bb@object-noreloc-keep-cache-simple:
- shard-snb: NOTRUN -> [SKIP][3] ([fdo#109271]) +55 other tests
skip
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/shard-snb1/igt@api_intel...@object-noreloc-keep-cache-simple.html
* igt@device_reset@unbind-cold-reset-rebind:
- shard-mtlp: NOTRUN -> [SKIP][4] ([i915#7701])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/shard-mtlp-8/igt@device_re...@unbind-cold-reset-rebind.html
* igt@gem_caching@read-writes:
- shard-mtlp: NOTRUN -> [SKIP][5] ([i915#4873])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/shard-mtlp-8/igt@gem_cach...@read-writes.html
* igt@gem_close_race@multigpu-basic-threads:
- shard-dg2: NOTRUN -> [SKIP][6] ([i915#7697])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/shard-dg2-11/igt@gem_close_r...@multigpu-basic-threads.html
* igt@gem_create@create-ext-cpu-access-big:
- shard-mtlp: NOTRUN -> [SKIP][7] ([i915#6335])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/shard-mtlp-4/igt@gem_cre...@create-ext-cpu-access-big.html
- shard-dg2: NOTRUN -> [INCOMPLETE][8] ([i915#9364])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/shard-dg2-11/igt@gem_cre...@create-ext-cpu-access-big.html
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglu: [PASS][9] -> [FAIL][10] ([i915#6268])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13930/shard-tglu-3/igt@gem_ctx_e...@basic-nohangcheck.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/shard-tglu-8/igt@gem_ctx_e...@basic-nohangcheck.html
* igt@gem_ctx_persistence@heartbeat-hang:
- shard-mtlp: NOTRUN -> [SKIP][11] ([i915#8555]) +1 other test skip
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/shard-mtlp-8/igt@gem_ctx_persiste...@heartbeat-hang.html
* igt@gem_ctx_persistence@legacy-engines-cleanup:
- shard-snb: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#1099]) +1
other test skip
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/shard-snb1/igt@gem_ctx_persiste...@legacy-engines-cleanup.html
* igt@gem_eio@reset-stress:
- shard-mtlp: [PASS][13] -> [ABORT][14] ([i915#9262])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13930/shard-mtlp-6/igt@gem_...@reset-stress.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/shard-mtlp-4/igt@gem_...@reset-stress.html
* igt@gem_eio@unwedge-stress:
- shard-dg1: [PASS][15] -> [FAIL][16] ([i915#5784])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13930/shard-dg1-16/igt@gem_...@unwedge-stress.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/shard-dg1-17/igt@gem_...@unwedge-stress.html
* igt@gem_eio@wait-immediate:
- shard-mtlp: [PASS][17] -> [ABORT][18] ([i915#9414]) +1 other test
abort
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13930/shard-mtlp-8/igt@gem_...@wait-immediate.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/shard-mtlp-2/igt@gem_...@wait-immediate.html
* igt@gem_exec_balancer@sliced:
- shard-mtlp: NOTRUN -> [SKIP][19] ([i915#4812])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/shard-mtlp-8/igt@gem_exec_balan...@sliced.html
* igt@gem_exec_endless@dispatch@rcs0:
- shard-dg1: [PASS][20] -> [TIMEOUT][21] ([i915#3778] /
[i915#7392])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13930/shard-dg1-18/igt@gem_exec_endless@dispa...@rcs0.html
[21]:
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dg2: Drop Wa_22014600077
== Series Details == Series: drm/i915/dg2: Drop Wa_22014600077 URL : https://patchwork.freedesktop.org/series/126942/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13929_full -> Patchwork_126942v1_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126942v1_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126942v1_full, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (9 -> 9) -- No changes in participating hosts Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126942v1_full: ### IGT changes ### Possible regressions * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-vga1: - shard-snb: [PASS][1] -> [ABORT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-snb4/igt@kms_flip@plain-flip-fb-recreate-interrupti...@b-vga1.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126942v1/shard-snb7/igt@kms_flip@plain-flip-fb-recreate-interrupti...@b-vga1.html Known issues Here are the changes found in Patchwork_126942v1_full that come from known issues: ### CI changes ### Possible fixes * boot: - shard-glk: ([PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [FAIL][11], [PASS][12], [PASS][13], [PASS][14], [FAIL][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27]) ([i915#8293]) -> ([PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk9/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk9/boot.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk9/boot.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk8/boot.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk8/boot.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk8/boot.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk8/boot.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk7/boot.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk7/boot.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk7/boot.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk6/boot.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk6/boot.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk5/boot.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk4/boot.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk4/boot.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk4/boot.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk3/boot.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk3/boot.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk3/boot.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk2/boot.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk2/boot.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk2/boot.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk1/boot.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk1/boot.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/shard-glk1/boot.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126942v1/shard-glk9/boot.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126942v1/shard-glk9/boot.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126942v1/shard-glk9/boot.html [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126942v1/shard-glk8/boot.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126942v1/shard-glk8/boot.html [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126942v1/shard-glk8/boot.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126942v1/shard-glk7/boot.html [35]:
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/ttm: replace busy placement with flags v3
== Series Details ==
Series: series starting with [1/2] drm/ttm: replace busy placement with flags v3
URL : https://patchwork.freedesktop.org/series/126927/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13928_full -> Patchwork_126927v1_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (9 -> 10)
--
Additional (1): shard-mtlp0
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_126927v1_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_psr@pr_cursor_render}:
- shard-dg2: NOTRUN -> [SKIP][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/shard-dg2-11/igt@kms_psr@pr_cursor_render.html
* {igt@kms_psr@pr_primary_mmap_cpu}:
- shard-dg2: [SKIP][2] ([i915#9732]) -> [SKIP][3]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/shard-dg2-5/igt@kms_psr@pr_primary_mmap_cpu.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/shard-dg2-11/igt@kms_psr@pr_primary_mmap_cpu.html
Known issues
Here are the changes found in Patchwork_126927v1_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@api_intel_bb@blit-reloc-purge-cache:
- shard-dg2: NOTRUN -> [SKIP][4] ([i915#8411]) +2 other tests skip
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/shard-dg2-7/igt@api_intel...@blit-reloc-purge-cache.html
* igt@api_intel_bb@crc32:
- shard-tglu: NOTRUN -> [SKIP][5] ([i915#6230])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/shard-tglu-3/igt@api_intel...@crc32.html
* igt@device_reset@cold-reset-bound:
- shard-dg2: NOTRUN -> [SKIP][6] ([i915#7701])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/shard-dg2-6/igt@device_re...@cold-reset-bound.html
* igt@device_reset@unbind-cold-reset-rebind:
- shard-mtlp: NOTRUN -> [SKIP][7] ([i915#7701])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/shard-mtlp-5/igt@device_re...@unbind-cold-reset-rebind.html
* igt@drm_fdinfo@busy-idle-check-all@vcs0:
- shard-dg2: NOTRUN -> [SKIP][8] ([i915#8414]) +11 other tests skip
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/shard-dg2-7/igt@drm_fdinfo@busy-idle-check-...@vcs0.html
* igt@drm_fdinfo@virtual-busy-idle:
- shard-mtlp: NOTRUN -> [SKIP][9] ([i915#8414])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/shard-mtlp-5/igt@drm_fdi...@virtual-busy-idle.html
* igt@gem_caching@reads:
- shard-mtlp: NOTRUN -> [SKIP][10] ([i915#4873])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/shard-mtlp-5/igt@gem_cach...@reads.html
* igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0:
- shard-dg2: [PASS][11] -> [INCOMPLETE][12] ([i915#7297])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/shard-dg2-10/igt@gem_ccs@suspend-res...@linear-compressed-compfmt0-lmem0-lmem0.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/shard-dg2-5/igt@gem_ccs@suspend-res...@linear-compressed-compfmt0-lmem0-lmem0.html
* igt@gem_create@create-ext-cpu-access-sanity-check:
- shard-mtlp: NOTRUN -> [SKIP][13] ([i915#6335])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/shard-mtlp-5/igt@gem_cre...@create-ext-cpu-access-sanity-check.html
* igt@gem_ctx_param@set-priority-not-supported:
- shard-dg2: NOTRUN -> [SKIP][14] ([fdo#109314])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/shard-dg2-5/igt@gem_ctx_pa...@set-priority-not-supported.html
* igt@gem_ctx_persistence@heartbeat-stop:
- shard-dg2: NOTRUN -> [SKIP][15] ([i915#8555])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/shard-dg2-11/igt@gem_ctx_persiste...@heartbeat-stop.html
* igt@gem_ctx_sseu@engines:
- shard-mtlp: NOTRUN -> [SKIP][16] ([i915#280])
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/shard-mtlp-5/igt@gem_ctx_s...@engines.html
* igt@gem_ctx_sseu@invalid-sseu:
- shard-dg2: NOTRUN -> [SKIP][17] ([i915#280]) +1 other test skip
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/shard-dg2-7/igt@gem_ctx_s...@invalid-sseu.html
* igt@gem_eio@kms:
- shard-dg2: NOTRUN -> [FAIL][18] ([i915#5784])
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/shard-dg2-6/igt@gem_...@kms.html
* igt@gem_exec_balancer@invalid-bonds:
- shard-dg2: NOTRUN -> [SKIP][19] ([i915#4036])
[19]:
Re: [Intel-gfx] [PATCH] drm/i915/display: Fix phys_base to be relative not absolute
On Mon, Nov 27, 2023 at 8:20 PM Paz Zcharya wrote: > > On 21.11.2023 13:06, Andrzej Hajda wrote: > > On 18.11.2023 00:01, Paz Zcharya wrote: > > > On Tue, Nov 14, 2023 at 10:13:59PM -0500, Rodrigo Vivi wrote: > > > > On Sun, Nov 05, 2023 at 05:27:03PM +, Paz Zcharya wrote: > > > > > > Hi Rodrigo, thanks for the great comments. > > > > > > Apologies for using a wrong/confusing terminology. I think 'phys_base' > > > is supposed to be the offset in the GEM BO, where base (or > > > "Surface Base Address") is supposed to be the GTT offset. > > > > Since base is taken from PLANE_SURF register it should be resolvable via > > GGTT to physical address pointing to actual framebuffer. > > I couldn't find anything in the specs. > > It was quite cryptic. I meant I have not found anything about assumption > from commit history that for iGPU there should be 1:1 mapping, this is why > there was an assignment "phys_base = base". Possibly the assumption is not > valid anymore for MTL(?). > Without the assumption we need to check GGTT to determine phys address. > > > The simplest approach would be then do the same as in case of DGFX: > > gen8_pte_t __iomem *gte = to_gt(i915)->ggtt->gsm; > > gen8_pte_t pte; > > > > gte += base / I915_GTT_PAGE_SIZE; > > > > pte = ioread64(gte); > > phys_base = pte & I915_GTT_PAGE_MASK; > > > > Regards > > Andrzej Hey Andrzej, On a second thought, what do you think about something like + gen8_pte_t __iomem *gte = to_gt(i915)->ggtt->gsm; + gen8_pte_t pte; + gte += base / I915_GTT_PAGE_SIZE; + pte = ioread64(gte); + pte = pte & I915_GTT_PAGE_MASK; + phys_base = pte - i915->mm.stolen_region->region.start; The only difference is the last line. Based on what I wrote before, I think `phys_base` is named incorrectly and that it does not reflect the physical address, but the start offset of i915->mm.stolen_region. So if we offset the start value of the stolen region, this code looks correct to me (and it also works on my MeteorLake device). What do you think? Many thanks, Paz
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: Fix null pointer dereference in intel_dp_aux_wait_done and intel_dp_aux_xfer
== Series Details == Series: drm/i915/display: Fix null pointer dereference in intel_dp_aux_wait_done and intel_dp_aux_xfer URL : https://patchwork.freedesktop.org/series/126922/ State : success == Summary == CI Bug Log - changes from CI_DRM_13927_full -> Patchwork_126922v1_full Summary --- **SUCCESS** No regressions found. Participating hosts (11 -> 9) -- Missing(2): shard-mtlp0 shard-tglu0 Known issues Here are the changes found in Patchwork_126922v1_full that come from known issues: ### IGT changes ### Issues hit * igt@api_intel_bb@object-reloc-purge-cache: - shard-mtlp: NOTRUN -> [SKIP][1] ([i915#8411]) +1 other test skip [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-mtlp-8/igt@api_intel...@object-reloc-purge-cache.html * igt@drm_fdinfo@busy-idle-check-all@ccs0: - shard-mtlp: NOTRUN -> [SKIP][2] ([i915#8414]) +11 other tests skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-mtlp-8/igt@drm_fdinfo@busy-idle-check-...@ccs0.html * igt@drm_fdinfo@most-busy-check-all@bcs0: - shard-dg2: NOTRUN -> [SKIP][3] ([i915#8414]) +19 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-dg2-6/igt@drm_fdinfo@most-busy-check-...@bcs0.html * igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-smem-lmem0: - shard-dg2: NOTRUN -> [INCOMPLETE][4] ([i915#7297]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-dg2-1/igt@gem_ccs@suspend-res...@tile4-compressed-compfmt0-smem-lmem0.html * igt@gem_close_race@multigpu-basic-process: - shard-tglu: NOTRUN -> [SKIP][5] ([i915#7697]) +1 other test skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-tglu-9/igt@gem_close_r...@multigpu-basic-process.html * igt@gem_ctx_param@set-priority-not-supported: - shard-mtlp: NOTRUN -> [SKIP][6] ([fdo#109314]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-mtlp-6/igt@gem_ctx_pa...@set-priority-not-supported.html * igt@gem_ctx_persistence@heartbeat-hang: - shard-mtlp: NOTRUN -> [SKIP][7] ([i915#8555]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-mtlp-7/igt@gem_ctx_persiste...@heartbeat-hang.html * igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs1: - shard-mtlp: NOTRUN -> [SKIP][8] ([i915#5882]) +5 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-mtlp-7/igt@gem_ctx_persistence@saturated-hostile-nopree...@vcs1.html * igt@gem_ctx_sseu@invalid-sseu: - shard-mtlp: NOTRUN -> [SKIP][9] ([i915#280]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-mtlp-8/igt@gem_ctx_s...@invalid-sseu.html * igt@gem_exec_balancer@bonded-pair: - shard-mtlp: NOTRUN -> [SKIP][10] ([i915#4771]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-mtlp-7/igt@gem_exec_balan...@bonded-pair.html * igt@gem_exec_balancer@bonded-semaphore: - shard-dg2: NOTRUN -> [SKIP][11] ([i915#4812]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-dg2-11/igt@gem_exec_balan...@bonded-semaphore.html * igt@gem_exec_balancer@invalid-bonds: - shard-mtlp: NOTRUN -> [SKIP][12] ([i915#4036]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-mtlp-8/igt@gem_exec_balan...@invalid-bonds.html * igt@gem_exec_balancer@sliced: - shard-mtlp: NOTRUN -> [SKIP][13] ([i915#4812]) +2 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-mtlp-7/igt@gem_exec_balan...@sliced.html * igt@gem_exec_capture@many-4k-incremental: - shard-mtlp: NOTRUN -> [FAIL][14] ([i915#9606]) +1 other test fail [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-mtlp-8/igt@gem_exec_capt...@many-4k-incremental.html * igt@gem_exec_fair@basic-none-solo@rcs0: - shard-tglu: NOTRUN -> [FAIL][15] ([i915#2842]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-tglu-9/igt@gem_exec_fair@basic-none-s...@rcs0.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-tglu: [PASS][16] -> [FAIL][17] ([i915#2842]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13927/shard-tglu-2/igt@gem_exec_fair@basic-p...@rcs0.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-tglu-8/igt@gem_exec_fair@basic-p...@rcs0.html * igt@gem_exec_fair@basic-sync: - shard-mtlp: NOTRUN -> [SKIP][18] ([i915#4473] / [i915#4771]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/shard-mtlp-7/igt@gem_exec_f...@basic-sync.html * igt@gem_exec_flush@basic-wb-rw-before-default: - shard-dg2:
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/irq: Improve error logging for unexpected DE Misc interrupts (rev2)
== Series Details == Series: drm/i915/irq: Improve error logging for unexpected DE Misc interrupts (rev2) URL : https://patchwork.freedesktop.org/series/126843/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13926_full -> Patchwork_126843v2_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126843v2_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126843v2_full, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/index.html Participating hosts (10 -> 10) -- Additional (1): shard-tglu0 Missing(1): shard-mtlp0 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126843v2_full: ### IGT changes ### Possible regressions * igt@kms_cursor_legacy@cursor-vs-flip-toggle: - shard-dg1: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13926/shard-dg1-13/igt@kms_cursor_leg...@cursor-vs-flip-toggle.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/shard-dg1-14/igt@kms_cursor_leg...@cursor-vs-flip-toggle.html Known issues Here are the changes found in Patchwork_126843v2_full that come from known issues: ### IGT changes ### Issues hit * igt@api_intel_bb@blit-reloc-purge-cache: - shard-dg2: NOTRUN -> [SKIP][3] ([i915#8411]) +1 other test skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/shard-dg2-11/igt@api_intel...@blit-reloc-purge-cache.html * igt@device_reset@cold-reset-bound: - shard-dg2: NOTRUN -> [SKIP][4] ([i915#7701]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/shard-dg2-5/igt@device_re...@cold-reset-bound.html * igt@device_reset@unbind-reset-rebind: - shard-dg1: NOTRUN -> [INCOMPLETE][5] ([i915#9408]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/shard-dg1-19/igt@device_re...@unbind-reset-rebind.html * igt@drm_fdinfo@most-busy-check-all@bcs0: - shard-dg2: NOTRUN -> [SKIP][6] ([i915#8414]) +29 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/shard-dg2-5/igt@drm_fdinfo@most-busy-check-...@bcs0.html * igt@drm_fdinfo@most-busy-idle-check-all@ccs0: - shard-mtlp: NOTRUN -> [SKIP][7] ([i915#8414]) +5 other tests skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/shard-mtlp-7/igt@drm_fdinfo@most-busy-idle-check-...@ccs0.html * igt@gem_ccs@block-multicopy-compressed: - shard-dg1: NOTRUN -> [SKIP][8] ([i915#9323]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/shard-dg1-19/igt@gem_...@block-multicopy-compressed.html * igt@gem_ccs@suspend-resume: - shard-mtlp: NOTRUN -> [SKIP][9] ([i915#9323]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/shard-mtlp-7/igt@gem_...@suspend-resume.html * igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0: - shard-dg2: [PASS][10] -> [INCOMPLETE][11] ([i915#7297]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13926/shard-dg2-6/igt@gem_ccs@suspend-res...@xmajor-compressed-compfmt0-lmem0-lmem0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/shard-dg2-7/igt@gem_ccs@suspend-res...@xmajor-compressed-compfmt0-lmem0-lmem0.html * igt@gem_create@create-ext-cpu-access-big: - shard-dg2: NOTRUN -> [INCOMPLETE][12] ([i915#9364]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/shard-dg2-6/igt@gem_cre...@create-ext-cpu-access-big.html * igt@gem_ctx_persistence@heartbeat-hang: - shard-dg2: NOTRUN -> [SKIP][13] ([i915#8555]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/shard-dg2-6/igt@gem_ctx_persiste...@heartbeat-hang.html * igt@gem_ctx_persistence@heartbeat-hostile: - shard-mtlp: NOTRUN -> [SKIP][14] ([i915#8555]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/shard-mtlp-2/igt@gem_ctx_persiste...@heartbeat-hostile.html * igt@gem_ctx_persistence@saturated-hostile-nopreempt@ccs0: - shard-dg2: NOTRUN -> [SKIP][15] ([i915#5882]) +9 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/shard-dg2-6/igt@gem_ctx_persistence@saturated-hostile-nopree...@ccs0.html * igt@gem_ctx_sseu@invalid-sseu: - shard-dg2: NOTRUN -> [SKIP][16] ([i915#280]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/shard-dg2-11/igt@gem_ctx_s...@invalid-sseu.html *
Re: [Intel-gfx] [PATCH] drm/i915/display: Fix phys_base to be relative not absolute
On Wed, Nov 22, 2023 at 02:26:55PM +0100, Andrzej Hajda wrote: > > > On 21.11.2023 13:06, Andrzej Hajda wrote: > > On 18.11.2023 00:01, Paz Zcharya wrote: > > > On Tue, Nov 14, 2023 at 10:13:59PM -0500, Rodrigo Vivi wrote: > > > > On Sun, Nov 05, 2023 at 05:27:03PM +, Paz Zcharya wrote: > > > > > > Hi Rodrigo, thanks for the great comments. > > > > > > Apologies for using a wrong/confusing terminology. I think 'phys_base' > > > is supposed to be the offset in the GEM BO, where base (or > > > "Surface Base Address") is supposed to be the GTT offset. > > > > Since base is taken from PLANE_SURF register it should be resolvable via > > GGTT to physical address pointing to actual framebuffer. > > I couldn't find anything in the specs. > > It was quite cryptic. I meant I have not found anything about assumption > from commit history that for iGPU there should be 1:1 mapping, this is why > there was an assignment "phys_base = base". Possibly the assumption is not > valid anymore for MTL(?). > Without the assumption we need to check GGTT to determine phys address. > > > The simplest approach would be then do the same as in case of DGFX: > > gen8_pte_t __iomem *gte = to_gt(i915)->ggtt->gsm; > > gen8_pte_t pte; > > > > gte += base / I915_GTT_PAGE_SIZE; > > > > pte = ioread64(gte); > > phys_base = pte & I915_GTT_PAGE_MASK; > > > > Regards > > Andrzej Hey Andrzej, Sorry for the late response. I was OOO :) I tried using the code you mentioned. It translates (in the very specific case of MTL + GOP driver) to phys_base == 0080_h. Unfortunately, it results in a corrupted screen -- the framebuffer is filled with zeros. It seems like `i915_vma_pin_ww` already reserves and binds the GEM BO to the correct address space independently of the value of `phys_base`. The only thing `phys_base` affects is the value of `stolen->start` https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/i915/gem/i915_gem_stolen.c#L747 So it seems to me that the maybe `phys_base` is named incorrectly and that it does not reflect the physical address, but the start offset of i915->mm.stolen_region. I'm happy to run more tests / debug further. Do you have more ideas of things to try? Many thanks, Paz
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/1] drm/i915/pxp: Add missing tag for Wa_14019159160
== Series Details == Series: series starting with [v3,1/1] drm/i915/pxp: Add missing tag for Wa_14019159160 URL : https://patchwork.freedesktop.org/series/126946/ State : success == Summary == CI Bug Log - changes from CI_DRM_13930 -> Patchwork_126946v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/index.html Participating hosts (36 -> 34) -- Additional (1): bat-dg2-9 Missing(3): bat-kbl-2 fi-snb-2520m fi-pnv-d510 Known issues Here are the changes found in Patchwork_126946v1 that come from known issues: ### IGT changes ### Issues hit * igt@gem_mmap@basic: - bat-dg2-9: NOTRUN -> [SKIP][1] ([i915#4083]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/bat-dg2-9/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-dg2-9: NOTRUN -> [SKIP][2] ([i915#4077]) +2 other tests skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/bat-dg2-9/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-dg2-9: NOTRUN -> [SKIP][3] ([i915#4079]) +1 other test skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/bat-dg2-9/igt@gem_render_tiled_bl...@basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-9: NOTRUN -> [SKIP][4] ([i915#6621]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/bat-dg2-9/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@hangcheck: - bat-rpls-1: [PASS][5] -> [INCOMPLETE][6] ([i915#9667]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13930/bat-rpls-1/igt@i915_selftest@l...@hangcheck.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/bat-rpls-1/igt@i915_selftest@l...@hangcheck.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-9: NOTRUN -> [SKIP][7] ([i915#5190]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/bat-dg2-9/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-9: NOTRUN -> [SKIP][8] ([i915#4215] / [i915#5190]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/bat-dg2-9/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_addfb_basic@framebuffer-vs-set-tiling: - bat-dg2-9: NOTRUN -> [SKIP][9] ([i915#4212]) +6 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/bat-dg2-9/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html * igt@kms_addfb_basic@tile-pitch-mismatch: - bat-dg2-9: NOTRUN -> [SKIP][10] ([i915#4212] / [i915#5608]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/bat-dg2-9/igt@kms_addfb_ba...@tile-pitch-mismatch.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg2-9: NOTRUN -> [SKIP][11] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/bat-dg2-9/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg2-9: NOTRUN -> [SKIP][12] ([fdo#109285]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/bat-dg2-9/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-dg2-9: NOTRUN -> [SKIP][13] ([i915#5274]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/bat-dg2-9/igt@kms_force_connector_ba...@prune-stale-modes.html * igt@kms_hdmi_inject@inject-audio: - fi-kbl-guc: [PASS][14] -> [FAIL][15] ([IGT#3]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13930/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1: - bat-rplp-1: [PASS][16] -> [ABORT][17] ([i915#8668]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13930/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html * igt@kms_setmode@basic-clone-single-crtc: - bat-dg2-9: NOTRUN -> [SKIP][18] ([i915#3555] / [i915#4098]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/bat-dg2-9/igt@kms_setm...@basic-clone-single-crtc.html * igt@prime_vgem@basic-fence-flip: - bat-dg2-9: NOTRUN -> [SKIP][19] ([i915#3708]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126946v1/bat-dg2-9/igt@prime_v...@basic-fence-flip.html *
Re: [Intel-gfx] [PATCH v6 2/2] drm/i915/guc: Close deregister-context race against CT-loss
On Tue, Nov 14, 2023 at 07:52:29AM -0800, Alan Previn wrote:
> If we are at the end of suspend or very early in resume
> its possible an async fence signal (via rcu_call) is triggered
> to free_engines which could lead us to the execution of
> the context destruction worker (after a prior worker flush).
>
> Thus, when suspending, insert rcu_barriers at the start
> of i915_gem_suspend (part of driver's suspend prepare) and
> again in i915_gem_suspend_late so that all such cases have
> completed and context destruction list isn't missing anything.
>
> In destroyed_worker_func, close the race against CT-loss
> by checking that CT is enabled before calling into
> deregister_destroyed_contexts.
>
> Based on testing, guc_lrc_desc_unpin may still race and fail
> as we traverse the GuC's context-destroy list because the
> CT could be disabled right before calling GuC's CT send function.
>
> We've witnessed this race condition once every ~6000-8000
> suspend-resume cycles while ensuring workloads that render
> something onscreen is continuously started just before
> we suspend (and the workload is small enough to complete
> and trigger the queued engine/context free-up either very
> late in suspend or very early in resume).
>
> In such a case, we need to unroll the entire process because
> guc-lrc-unpin takes a gt wakeref which only gets released in
> the G2H IRQ reply that never comes through in this corner
> case. Without the unroll, the taken wakeref is leaked and will
> cascade into a kernel hang later at the tail end of suspend in
> this function:
>
>intel_wakeref_wait_for_idle(>wakeref)
>(called by) - intel_gt_pm_wait_for_idle
>(called by) - wait_for_suspend
>
> Thus, do an unroll in guc_lrc_desc_unpin and deregister_destroyed_-
> contexts if guc_lrc_desc_unpin fails due to CT send falure.
> When unrolling, keep the context in the GuC's destroy-list so
> it can get picked up on the next destroy worker invocation
> (if suspend aborted) or get fully purged as part of a GuC
> sanitization (end of suspend) or a reset flow.
>
> Signed-off-by: Alan Previn
> Signed-off-by: Anshuman Gupta
> Tested-by: Mousumi Jana
> ---
> drivers/gpu/drm/i915/gem/i915_gem_pm.c| 10 +++
> .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 81 ---
> 2 files changed, 80 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> index 0d812f4d787d..3b27218aabe2 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> @@ -28,6 +28,13 @@ void i915_gem_suspend(struct drm_i915_private *i915)
> GEM_TRACE("%s\n", dev_name(i915->drm.dev));
>
> intel_wakeref_auto(>runtime_pm.userfault_wakeref, 0);
> + /*
> + * On rare occasions, we've observed the fence completion triggers
> + * free_engines asynchronously via rcu_call. Ensure those are done.
> + * This path is only called on suspend, so it's an acceptable cost.
> + */
> + rcu_barrier();
> +
> flush_workqueue(i915->wq);
>
> /*
> @@ -160,6 +167,9 @@ void i915_gem_suspend_late(struct drm_i915_private *i915)
>* machine in an unusable condition.
>*/
>
> + /* Like i915_gem_suspend, flush tasks staged from fence triggers */
> + rcu_barrier();
> +
> for_each_gt(gt, i915, i)
> intel_gt_suspend_late(gt);
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> index 9d1915482898..225747115f78 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> @@ -236,6 +236,13 @@ set_context_destroyed(struct intel_context *ce)
> ce->guc_state.sched_state |= SCHED_STATE_DESTROYED;
> }
>
> +static inline void
> +clr_context_destroyed(struct intel_context *ce)
> +{
> + lockdep_assert_held(>guc_state.lock);
> + ce->guc_state.sched_state &= ~SCHED_STATE_DESTROYED;
> +}
> +
> static inline bool context_pending_disable(struct intel_context *ce)
> {
> return ce->guc_state.sched_state & SCHED_STATE_PENDING_DISABLE;
> @@ -613,6 +620,8 @@ static int guc_submission_send_busy_loop(struct intel_guc
> *guc,
>u32 g2h_len_dw,
>bool loop)
> {
> + int ret;
> +
> /*
>* We always loop when a send requires a reply (i.e. g2h_len_dw > 0),
>* so we don't handle the case where we don't get a reply because we
> @@ -623,7 +632,11 @@ static int guc_submission_send_busy_loop(struct
> intel_guc *guc,
> if (g2h_len_dw)
> atomic_inc(>outstanding_submission_g2h);
>
> - return intel_guc_send_busy_loop(guc, action, len, g2h_len_dw, loop);
> + ret = intel_guc_send_busy_loop(guc, action, len, g2h_len_dw, loop);
> + if (ret)
> + atomic_dec(>outstanding_submission_g2h);
> +
> +
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dg2: Drop Wa_22014600077
== Series Details ==
Series: drm/i915/dg2: Drop Wa_22014600077
URL : https://patchwork.freedesktop.org/series/126942/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13929 -> Patchwork_126942v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126942v1/index.html
Participating hosts (36 -> 34)
--
Additional (1): bat-kbl-2
Missing(3): bat-dg2-9 fi-snb-2520m fi-pnv-d510
Known issues
Here are the changes found in Patchwork_126942v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@fbdev@info:
- bat-kbl-2: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#1849])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126942v1/bat-kbl-2/igt@fb...@info.html
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-kbl-2: NOTRUN -> [SKIP][2] ([fdo#109271]) +20 other tests
skip
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126942v1/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence:
- bat-kbl-2: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1845]) +14
other tests skip
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126942v1/bat-kbl-2/igt@kms_pipe_crc_ba...@read-crc-frame-sequence.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- bat-rpls-1: NOTRUN -> [SKIP][4] ([i915#1845])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126942v1/bat-rpls-1/igt@kms_pipe_crc_ba...@suspend-read-crc.html
Possible fixes
* igt@i915_selftest@live@gt_contexts:
- bat-rpls-1: [INCOMPLETE][5] -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13929/bat-rpls-1/igt@i915_selftest@live@gt_contexts.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126942v1/bat-rpls-1/igt@i915_selftest@live@gt_contexts.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
Build changes
-
* Linux: CI_DRM_13929 -> Patchwork_126942v1
CI-20190529: 20190529
CI_DRM_13929: 1b1063eb3fa1689c7da7e5c7c4ff8a8d36d421aa @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7605: 7605
Patchwork_126942v1: 1b1063eb3fa1689c7da7e5c7c4ff8a8d36d421aa @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
7e1f1a0d28f4 drm/i915/dg2: Drop Wa_22014600077
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126942v1/index.html
Re: [Intel-gfx] [PATCH] drm/i915/dg2: Drop Wa_22014600077
Quoting Matt Roper (2023-11-27 16:00:44-03:00)
>This workaround has been dropped from all DG2 variants in the latest
>workaround database update.
>
>Signed-off-by: Matt Roper
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 8
> 1 file changed, 8 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>index 9bc0654efdc0..4cbf9e512645 100644
>--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>@@ -2357,14 +2357,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine,
>struct i915_wa_list *wal)
>0, true);
> }
>
>-if (IS_DG2_G11(i915) || IS_DG2_G10(i915)) {
>-/* Wa_22014600077:dg2 */
>-wa_mcr_add(wal, GEN10_CACHE_MODE_SS, 0,
>- _MASKED_BIT_ENABLE(ENABLE_EU_COUNT_FOR_TDL_FLUSH),
>- 0 /* Wa_14012342262 write-only reg, so skip
>verification */,
>- true);
>-}
>-
> if (IS_DG2(i915) || IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) ||
> IS_DG1(i915) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) {
> /*
>--
>2.41.0
>
Re: [Intel-gfx] [PATCH v1 1/1] drm/i915/gt: Dont wait forever when idling in suspend
On Tue, Nov 14, 2023 at 08:22:27AM -0800, Alan Previn wrote:
> When suspending, add a timeout when calling
> intel_gt_pm_wait_for_idle else if we have a leaked
> wakeref (which would be indicative of a bug elsewhere
> in the driver), driver will at exit the suspend-resume
> cycle, after the kernel detects the held reference and
> prints a message to abort suspending instead of hanging
> in the kernel forever which then requires serial connection
> or ramoops dump to debug further.
>
> Signed-off-by: Alan Previn
> Reviewed-by: Rodrigo Vivi
> Tested-by: Mousumi Jana
could you please rebase this on top of recent drm-tip and resend?
I got a conflict while trying to apply on drm-intel-gt-next.
As I had stated in another thread, I believe we should go further
and block the suspend and have a clean return to normal operation.
But anyway, I agree this is already a good and necessary improvement
because being in the dark if some bad case like this happens is
the worst thing. So this patch is already an improvement anyway.
again:
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_gt_pm.c | 7 ++-
> drivers/gpu/drm/i915/gt/intel_gt_pm.h | 7 ++-
> drivers/gpu/drm/i915/intel_wakeref.c | 14 ++
> drivers/gpu/drm/i915/intel_wakeref.h | 6 --
> 5 files changed, 27 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index 40687806d22a..ffef963037f2 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -686,7 +686,7 @@ void intel_engines_release(struct intel_gt *gt)
> if (!engine->release)
> continue;
>
> - intel_wakeref_wait_for_idle(>wakeref);
> + intel_wakeref_wait_for_idle(>wakeref, 0);
> GEM_BUG_ON(intel_engine_pm_is_awake(engine));
>
> engine->release(engine);
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> index f5899d503e23..25cb39ba9fdf 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> @@ -306,6 +306,8 @@ int intel_gt_resume(struct intel_gt *gt)
>
> static void wait_for_suspend(struct intel_gt *gt)
> {
> + int final_timeout_ms = (I915_GT_SUSPEND_IDLE_TIMEOUT * 10);
> +
> if (!intel_gt_pm_is_awake(gt))
> return;
>
> @@ -318,7 +320,10 @@ static void wait_for_suspend(struct intel_gt *gt)
> intel_gt_retire_requests(gt);
> }
>
> - intel_gt_pm_wait_for_idle(gt);
> + /* we are suspending, so we shouldn't be waiting forever */
> + if (intel_gt_pm_wait_timeout_for_idle(gt, final_timeout_ms) ==
> -ETIMEDOUT)
> + gt_warn(gt, "bailing from %s after %d milisec timeout\n",
> + __func__, final_timeout_ms);
> }
>
> void intel_gt_suspend_prepare(struct intel_gt *gt)
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
> b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
> index b1eeb5b33918..1757ca4c3077 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
> @@ -68,7 +68,12 @@ static inline void intel_gt_pm_might_put(struct intel_gt
> *gt)
>
> static inline int intel_gt_pm_wait_for_idle(struct intel_gt *gt)
> {
> - return intel_wakeref_wait_for_idle(>wakeref);
> + return intel_wakeref_wait_for_idle(>wakeref, 0);
> +}
> +
> +static inline int intel_gt_pm_wait_timeout_for_idle(struct intel_gt *gt, int
> timeout_ms)
> +{
> + return intel_wakeref_wait_for_idle(>wakeref, timeout_ms);
> }
>
> void intel_gt_pm_init_early(struct intel_gt *gt);
> diff --git a/drivers/gpu/drm/i915/intel_wakeref.c
> b/drivers/gpu/drm/i915/intel_wakeref.c
> index 623a69089386..f2611c65246b 100644
> --- a/drivers/gpu/drm/i915/intel_wakeref.c
> +++ b/drivers/gpu/drm/i915/intel_wakeref.c
> @@ -113,14 +113,20 @@ void __intel_wakeref_init(struct intel_wakeref *wf,
>"wakeref.work", >work, 0);
> }
>
> -int intel_wakeref_wait_for_idle(struct intel_wakeref *wf)
> +int intel_wakeref_wait_for_idle(struct intel_wakeref *wf, int timeout_ms)
> {
> - int err;
> + int err = 0;
>
> might_sleep();
>
> - err = wait_var_event_killable(>wakeref,
> - !intel_wakeref_is_active(wf));
> + if (!timeout_ms)
> + err = wait_var_event_killable(>wakeref,
> + !intel_wakeref_is_active(wf));
> + else if (wait_var_event_timeout(>wakeref,
> + !intel_wakeref_is_active(wf),
> + msecs_to_jiffies(timeout_ms)) < 1)
> + err = -ETIMEDOUT;
> +
> if (err)
> return err;
>
> diff --git a/drivers/gpu/drm/i915/intel_wakeref.h
>
Re: [Intel-gfx] [PATCH v2 1/1] drm/i915/pxp: Add missing tag for Wa_14019159160
On Wed, Nov 22, 2023 at 12:30:03PM -0800, Alan Previn wrote:
> Add missing tag for "Wa_14019159160 - Case 2" (for existing
> PXP code that ensures run alone mode bit is set to allow
> PxP-decryption.
>
> v2: - Fix WA id number (John Harrison).
> - Improve comments and code to be specific
>for the targetted platforms (John Harrison)
>
> Signed-off-by: Alan Previn
> ---
> drivers/gpu/drm/i915/gt/intel_lrc.c | 10 ++
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
> b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 7c367ba8d9dc..2959dfed2aa0 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -863,11 +863,13 @@ static bool ctx_needs_runalone(const struct
> intel_context *ce)
> bool ctx_is_protected = false;
>
> /*
> - * On MTL and newer platforms, protected contexts require setting
> - * the LRC run-alone bit or else the encryption will not happen.
> + * Wa_14019159160 - Case 2: mtl
> + * On some platforms, protected contexts require setting
> + * the LRC run-alone bit or else the encryption/decryption will not
> happen.
> + * NOTE: Case 2 only applies to PXP use-case of said workaround.
>*/
hmm, interesting enough, on the wa description I read that it is incomplete for
MTL/ARL
and something about a fuse bit. We should probably chase for some clarification
in the
HSD?!
> - if (GRAPHICS_VER_FULL(ce->engine->i915) >= IP_VER(12, 70) &&
> - (ce->engine->class == COMPUTE_CLASS || ce->engine->class ==
> RENDER_CLASS)) {
> + if (IS_METEORLAKE(ce->engine->i915) && (ce->engine->class ==
> COMPUTE_CLASS ||
> + ce->engine->class ==
> RENDER_CLASS)) {
This check now excludes the ARL with the same IP, no?!
> rcu_read_lock();
> gem_ctx = rcu_dereference(ce->gem_context);
> if (gem_ctx)
>
> base-commit: 5429d55de723544dfc0630cf39d96392052b27a1
> --
> 2.39.0
>
[Intel-gfx] [PATCH v3 1/1] drm/i915/pxp: Add missing tag for Wa_14019159160
Add missing tag for "Wa_14019159160 - Case 2" (for existing
PXP code that ensures run alone mode bit is set to allow
PxP-decryption.
v3: - Check targeted platforms using IP_VAL. (John Harrison)
v2: - Fix WA id number (John Harrison).
- Improve comments and code to be specific
for the targeted platforms (John Harrison)
Signed-off-by: Alan Previn
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 7c367ba8d9dc..1152cf25d578 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -863,10 +863,12 @@ static bool ctx_needs_runalone(const struct intel_context
*ce)
bool ctx_is_protected = false;
/*
-* On MTL and newer platforms, protected contexts require setting
-* the LRC run-alone bit or else the encryption will not happen.
+* Wa_14019159160 - Case 2: mtl
+* On some platforms, protected contexts require setting
+* the LRC run-alone bit or else the encryption/decryption will not
happen.
+* NOTE: Case 2 only applies to PXP use-case of said workaround.
*/
- if (GRAPHICS_VER_FULL(ce->engine->i915) >= IP_VER(12, 70) &&
+ if (GRAPHICS_VER_FULL(ce->engine->i915) == IP_VER(12, 70) &&
(ce->engine->class == COMPUTE_CLASS || ce->engine->class ==
RENDER_CLASS)) {
rcu_read_lock();
gem_ctx = rcu_dereference(ce->gem_context);
base-commit: 5429d55de723544dfc0630cf39d96392052b27a1
--
2.39.0
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm: Add drm_vblank_work_flush_all().
== Series Details == Series: series starting with [1/3] drm: Add drm_vblank_work_flush_all(). URL : https://patchwork.freedesktop.org/series/126934/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13928 -> Patchwork_126934v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126934v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126934v1, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v1/index.html Participating hosts (36 -> 36) -- Additional (1): bat-kbl-2 Missing(1): fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126934v1: ### IGT changes ### Possible regressions * igt@i915_selftest@live@sanitycheck: - bat-dg2-11: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-dg2-11/igt@i915_selftest@l...@sanitycheck.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v1/bat-dg2-11/igt@i915_selftest@l...@sanitycheck.html Known issues Here are the changes found in Patchwork_126934v1 that come from known issues: ### IGT changes ### Issues hit * igt@fbdev@info: - bat-kbl-2: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1849]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v1/bat-kbl-2/igt@fb...@info.html * igt@gem_exec_suspend@basic-s3@smem: - bat-mtlp-8: [PASS][4] -> [FAIL][5] ([fdo#103375]) +6 other tests fail [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-mtlp-8/igt@gem_exec_suspend@basic...@smem.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v1/bat-mtlp-8/igt@gem_exec_suspend@basic...@smem.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-kbl-2: NOTRUN -> [SKIP][6] ([fdo#109271]) +20 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v1/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@i915_selftest@live@gt_heartbeat: - fi-apl-guc: [PASS][7] -> [DMESG-FAIL][8] ([i915#5334]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html * igt@i915_suspend@basic-s3-without-i915: - bat-rpls-1: [PASS][9] -> [ABORT][10] ([i915#7978] / [i915#9631]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-rpls-1/igt@i915_susp...@basic-s3-without-i915.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v1/bat-rpls-1/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence: - bat-kbl-2: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#1845]) +14 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v1/bat-kbl-2/igt@kms_pipe_crc_ba...@read-crc-frame-sequence.html Possible fixes * igt@kms_flip@basic-flip-vs-modeset@b-dp6: - bat-adlp-11:[FAIL][12] ([i915#6121]) -> [PASS][13] +3 other tests pass [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@b-dp6.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v1/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@b-dp6.html * igt@kms_flip@basic-flip-vs-modeset@d-dp5: - bat-adlp-11:[DMESG-FAIL][14] ([i915#6868]) -> [PASS][15] [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@d-dp5.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v1/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@d-dp5.html * igt@kms_frontbuffer_tracking@basic: - bat-adlp-11:[SKIP][16] ([i915#4342] / [i915#5354]) -> [PASS][17] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-adlp-11/igt@kms_frontbuffer_track...@basic.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v1/bat-adlp-11/igt@kms_frontbuffer_track...@basic.html * igt@kms_hdmi_inject@inject-audio: - fi-kbl-guc: [FAIL][18] ([IGT#3]) -> [PASS][19] [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v1/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html Warnings * igt@kms_hdmi_inject@inject-audio: - bat-adlp-11:[FAIL][20] -> [SKIP][21] ([i915#4369])
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm: Add drm_vblank_work_flush_all().
== Series Details == Series: series starting with [1/3] drm: Add drm_vblank_work_flush_all(). URL : https://patchwork.freedesktop.org/series/126934/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm: Add drm_vblank_work_flush_all().
== Series Details == Series: series starting with [1/3] drm: Add drm_vblank_work_flush_all(). URL : https://patchwork.freedesktop.org/series/126934/ State : warning == Summary == Error: dim checkpatch failed 4f88f49d660f drm: Add drm_vblank_work_flush_all(). -:33: WARNING:WAITQUEUE_ACTIVE: waitqueue_active without comment #33: FILE: drivers/gpu/drm/drm_vblank_work.c:249: + waitqueue_active(>work_wait_queue), total: 0 errors, 1 warnings, 0 checks, 41 lines checked adf4d292bab1 drm/i915: Use vblank worker to unpin old legacy cursor fb safely ec05d5c6f5c9 drm/i915: Use the same vblank worker for atomic unpin -:37: WARNING:TYPO_SPELLING: 'succesful' may be misspelled - perhaps 'successful'? #37: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:1168: +* This branch can only ever be called after plane update is succesful, ^ -:118: WARNING:LONG_LINE: line length of 105 exceeds 100 columns #118: FILE: drivers/gpu/drm/i915/display/intel_crtc.c:746: + drm_crtc_accurate_vblank_count(>base) + 1, total: 0 errors, 2 warnings, 0 checks, 110 lines checked
[Intel-gfx] [PATCH] drm/i915/dg2: Drop Wa_22014600077
This workaround has been dropped from all DG2 variants in the latest
workaround database update.
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 9bc0654efdc0..4cbf9e512645 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2357,14 +2357,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine,
struct i915_wa_list *wal)
0, true);
}
- if (IS_DG2_G11(i915) || IS_DG2_G10(i915)) {
- /* Wa_22014600077:dg2 */
- wa_mcr_add(wal, GEN10_CACHE_MODE_SS, 0,
- _MASKED_BIT_ENABLE(ENABLE_EU_COUNT_FOR_TDL_FLUSH),
- 0 /* Wa_14012342262 write-only reg, so skip
verification */,
- true);
- }
-
if (IS_DG2(i915) || IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) ||
IS_DG1(i915) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) {
/*
--
2.41.0
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: Skip state verification with TBT-ALT mode
== Series Details ==
Series: drm/i915/display: Skip state verification with TBT-ALT mode
URL : https://patchwork.freedesktop.org/series/126933/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13928 -> Patchwork_126933v1
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_126933v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_126933v1, please notify your bug team
(i915-ci-in...@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126933v1/index.html
Participating hosts (36 -> 35)
--
Additional (1): bat-kbl-2
Missing(2): fi-snb-2520m fi-pnv-d510
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_126933v1:
### IGT changes ###
Possible regressions
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-c-dp-5:
- bat-adlp-11:[PASS][1] -> [FAIL][2] +2 other tests fail
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-c-dp-5.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126933v1/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-c-dp-5.html
Known issues
Here are the changes found in Patchwork_126933v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@fbdev@info:
- bat-kbl-2: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1849])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126933v1/bat-kbl-2/igt@fb...@info.html
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-kbl-2: NOTRUN -> [SKIP][4] ([fdo#109271]) +20 other tests
skip
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126933v1/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence:
- bat-kbl-2: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#1845]) +14
other tests skip
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126933v1/bat-kbl-2/igt@kms_pipe_crc_ba...@read-crc-frame-sequence.html
Possible fixes
* igt@kms_flip@basic-flip-vs-modeset@d-dp5:
- bat-adlp-11:[DMESG-FAIL][6] ([i915#6868]) -> [PASS][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@d-dp5.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126933v1/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@d-dp5.html
* igt@kms_frontbuffer_tracking@basic:
- bat-adlp-11:[SKIP][8] ([i915#4342] / [i915#5354]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-adlp-11/igt@kms_frontbuffer_track...@basic.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126933v1/bat-adlp-11/igt@kms_frontbuffer_track...@basic.html
Warnings
* igt@kms_flip@basic-flip-vs-modeset@a-dp6:
- bat-adlp-11:[FAIL][10] ([i915#6121]) -> [DMESG-FAIL][11]
([i915#6868])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@a-dp6.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126933v1/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@a-dp6.html
* igt@kms_hdmi_inject@inject-audio:
- bat-adlp-11:[FAIL][12] -> [SKIP][13] ([i915#4369])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-adlp-11/igt@kms_hdmi_inj...@inject-audio.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126933v1/bat-adlp-11/igt@kms_hdmi_inj...@inject-audio.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-a-dp-5:
- bat-adlp-11:[ABORT][14] ([i915#8668]) -> [ABORT][15] ([i915#6868]
/ [i915#8668])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-a-dp-5.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126933v1/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-a-dp-5.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#4342]: https://gitlab.freedesktop.org/drm/intel/issues/4342
[i915#4369]: https://gitlab.freedesktop.org/drm/intel/issues/4369
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#6121]: https://gitlab.freedesktop.org/drm/intel/issues/6121
[i915#6868]:
Re: [Intel-gfx] [PATCH 2/2] drm/amdgpu: use GTT only as fallback for VRAM|GTT
Am 27.11.23 um 17:47 schrieb Bhardwaj, Rajneesh: [AMD Official Use Only - General] -Original Message- From: amd-gfx On Behalf Of Hamza Mahfooz Sent: Monday, November 27, 2023 10:53 AM To: Christian König ; jani.nik...@linux.intel.com; kher...@redhat.com; d...@redhat.com; za...@vmware.com; Olsak, Marek ; linux-graphics-maintai...@vmware.com; amd-...@lists.freedesktop.org; nouv...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; virtualizat...@lists.linux.dev; spice-de...@lists.freedesktop.org; dri-de...@lists.freedesktop.org Subject: Re: [PATCH 2/2] drm/amdgpu: use GTT only as fallback for VRAM|GTT On 11/27/23 09:54, Christian König wrote: Try to fill up VRAM as well by setting the busy flag on GTT allocations. This fixes the issue that when VRAM was evacuated for suspend it's never filled up again unless the application is restarted. I found the subject description a bit misleading. Maybe use a Fixes tag describing it is a fix for suspend resume regression other than that, looks good to me. Well exactly that's the problem, this isn't really a fix and we also don't want to backport it. Basically the previous behavior was working as design, it's just that it was never intended to be used like this. Acked-by: Rajneesh Bhardwaj Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2893 Thanks, Christian. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index aa0dd6dad068..ddc8fb4db678 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -173,6 +173,12 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain) abo->flags & AMDGPU_GEM_CREATE_PREEMPTIBLE ? AMDGPU_PL_PREEMPT : TTM_PL_TT; places[c].flags = 0; + /* + * When GTT is just an alternative to VRAM make sure that we + * only use it as fallback and still try to fill up VRAM first. + */ + if (domain & AMDGPU_GEM_DOMAIN_VRAM) + places[c].flags |= TTM_PL_FLAG_BUSY; c++; } -- Hamza
Re: [Intel-gfx] [PATCH] drm/i915/display: Skip state verification with TBT-ALT mode
Quoting Jani Nikula (2023-11-27 13:47:22-03:00) >On Mon, 27 Nov 2023, Mika Kahola wrote: >> With TBT-ALT mode we are not programming C20 chip PLL's and >> hence we don't need to check state verification. We don't >> need to program DP link signal levels i.e.pre-emphasis and >> voltage swing either. >> >> This patch fixes dmesg errors like this one >> >> "[drm] ERROR PHY F Write 0c06 failed after 3 retries." >> >> Signed-off-by: Mika Kahola >> --- >> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 7 +++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c >> b/drivers/gpu/drm/i915/display/intel_cx0_phy.c >> index a8fa76580802..3a30cffd450c 100644 >> --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c >> +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c >> @@ -418,6 +418,10 @@ void intel_cx0_phy_set_signal_levels(struct >> intel_encoder *encoder, >> u8 owned_lane_mask = intel_cx0_get_owned_lane_mask(i915, encoder); >> intel_wakeref_t wakeref; >> int n_entries, ln; >> +struct intel_digital_port *dig_port = enc_to_dig_port(encoder); >> + >> +if (intel_tc_port_in_tbt_alt_mode(dig_port)) >> +return; >> >> wakeref = intel_cx0_phy_transaction_begin(encoder); >> >> @@ -3136,6 +3140,9 @@ void intel_cx0pll_state_verify(struct >> intel_atomic_state *state, >> encoder = intel_get_crtc_new_encoder(state, new_crtc_state); >> phy = intel_port_to_phy(i915, encoder->port); >> >> +if (intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder))) >> +return; >> + > >Shouldn't we read and ensure it's disabled? In TBT-alt mode, the PHY is owned by the Thunderbold controller, and it could be in use. I guess what we could do is verify that PORT_CLOCK_CTL has the expected bits depending on the mode. That could done here or in a followup series. -- Gustavo Sousa > >> intel_cx0pll_readout_hw_state(encoder, _hw_state); >> >> if (intel_is_c10phy(i915, phy)) > >-- >Jani Nikula, Intel
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/ttm: replace busy placement with flags v3
== Series Details ==
Series: series starting with [1/2] drm/ttm: replace busy placement with flags v3
URL : https://patchwork.freedesktop.org/series/126927/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13928 -> Patchwork_126927v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/index.html
Participating hosts (36 -> 35)
--
Additional (1): bat-kbl-2
Missing(2): bat-mtlp-8 fi-snb-2520m
Known issues
Here are the changes found in Patchwork_126927v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@fbdev@info:
- bat-kbl-2: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#1849])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/bat-kbl-2/igt@fb...@info.html
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-kbl-2: NOTRUN -> [SKIP][2] ([fdo#109271]) +20 other tests
skip
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence:
- bat-kbl-2: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1845]) +14
other tests skip
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/bat-kbl-2/igt@kms_pipe_crc_ba...@read-crc-frame-sequence.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [PASS][4] -> [ABORT][5] ([i915#8668])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
Possible fixes
* igt@kms_flip@basic-flip-vs-modeset@b-dp6:
- bat-adlp-11:[FAIL][6] ([i915#6121]) -> [PASS][7] +3 other tests
pass
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@b-dp6.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@b-dp6.html
* igt@kms_flip@basic-flip-vs-modeset@d-dp5:
- bat-adlp-11:[DMESG-FAIL][8] ([i915#6868]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@d-dp5.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@d-dp5.html
* igt@kms_frontbuffer_tracking@basic:
- bat-adlp-11:[SKIP][10] ([i915#4342] / [i915#5354]) -> [PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-adlp-11/igt@kms_frontbuffer_track...@basic.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/bat-adlp-11/igt@kms_frontbuffer_track...@basic.html
* igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [FAIL][12] ([IGT#3]) -> [PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
Warnings
* igt@kms_hdmi_inject@inject-audio:
- bat-adlp-11:[FAIL][14] -> [SKIP][15] ([i915#4369])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13928/bat-adlp-11/igt@kms_hdmi_inj...@inject-audio.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126927v1/bat-adlp-11/igt@kms_hdmi_inj...@inject-audio.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#4342]: https://gitlab.freedesktop.org/drm/intel/issues/4342
[i915#4369]: https://gitlab.freedesktop.org/drm/intel/issues/4369
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#6121]: https://gitlab.freedesktop.org/drm/intel/issues/6121
[i915#6868]: https://gitlab.freedesktop.org/drm/intel/issues/6868
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
Build changes
-
* Linux: CI_DRM_13928 -> Patchwork_126927v1
CI-20190529: 20190529
CI_DRM_13928: 347e889a869b969afb7118cd8d7068d7a1c66571 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7604: d2af13d9f5be5ce23d996e4afd3e45990f5ab977 @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_126927v1: 347e889a869b969afb7118cd8d7068d7a1c66571 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
Re: [Intel-gfx] [PATCH] drm/i915/display: Skip state verification with TBT-ALT mode
Quoting Mika Kahola (2023-11-27 12:47:02-03:00) >With TBT-ALT mode we are not programming C20 chip PLL's and >hence we don't need to check state verification. We don't >need to program DP link signal levels i.e.pre-emphasis and >voltage swing either. > >This patch fixes dmesg errors like this one > >"[drm] ERROR PHY F Write 0c06 failed after 3 retries." > >Signed-off-by: Mika Kahola >--- > drivers/gpu/drm/i915/display/intel_cx0_phy.c | 7 +++ > 1 file changed, 7 insertions(+) > >diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c >b/drivers/gpu/drm/i915/display/intel_cx0_phy.c >index a8fa76580802..3a30cffd450c 100644 >--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c >+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c >@@ -418,6 +418,10 @@ void intel_cx0_phy_set_signal_levels(struct intel_encoder >*encoder, > u8 owned_lane_mask = intel_cx0_get_owned_lane_mask(i915, encoder); > intel_wakeref_t wakeref; > int n_entries, ln; >+struct intel_digital_port *dig_port = enc_to_dig_port(encoder); >+ >+if (intel_tc_port_in_tbt_alt_mode(dig_port)) >+return; I think we could make the call to intel_cx0_get_owned_lane_mask() here, to make sure we do not waste time doing useless MMIO. With that in place, Reviewed-by: Gustavo Sousa -- Gustavo Sousa > > wakeref = intel_cx0_phy_transaction_begin(encoder); > >@@ -3136,6 +3140,9 @@ void intel_cx0pll_state_verify(struct intel_atomic_state >*state, > encoder = intel_get_crtc_new_encoder(state, new_crtc_state); > phy = intel_port_to_phy(i915, encoder->port); > >+if (intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder))) >+return; >+ > intel_cx0pll_readout_hw_state(encoder, _hw_state); > > if (intel_is_c10phy(i915, phy)) >-- >2.34.1 >
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/ttm: replace busy placement with flags v3
== Series Details == Series: series starting with [1/2] drm/ttm: replace busy placement with flags v3 URL : https://patchwork.freedesktop.org/series/126927/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/ttm: replace busy placement with flags v3
== Series Details == Series: series starting with [1/2] drm/ttm: replace busy placement with flags v3 URL : https://patchwork.freedesktop.org/series/126927/ State : warning == Summary == Error: dim checkpatch failed 85c35bbb3061 drm/ttm: replace busy placement with flags v3 -:297: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int *' to bare use of 'unsigned *' #297: FILE: drivers/gpu/drm/nouveau/nouveau_bo.c:441: + unsigned *n = >placement.num_placement; -:629: CHECK:LINE_SPACING: Please don't use multiple blank lines #629: FILE: drivers/gpu/drm/vmwgfx/vmwgfx_bo.c:182: + total: 0 errors, 1 warnings, 1 checks, 698 lines checked 46284afefa39 drm/amdgpu: use GTT only as fallback for VRAM|GTT -:32: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address mismatch: 'From: "Christian König" ' != 'Signed-off-by: Christian König ' total: 0 errors, 1 warnings, 0 checks, 12 lines checked
Re: [Intel-gfx] [linus:master] [file] 0ede61d858: will-it-scale.per_thread_ops -2.9% regression
On Mon, 27 Nov 2023 at 02:27, Christian Brauner wrote: > > So I've picked up your patch (vfs.misc). It's clever alright so thanks > for the comments in there otherwise I would've stared at this for far > too long. Note that I should probably have commented on one other thing: that whole "just load from fd[0] is always safe, because the fd[] array always exists". IOW, that whole "load and mask" thing only works when you know the array exists at all. Doing that "just mask the index" wouldn't be valid if "size = 0" is an option and might mean that we don't have an array at all (ie if "->fd" itself could be NULL. But we never have a completely empty file descriptor array, and fdp->fd is never NULL. At a minimum 'max_fds' is NR_OPEN_DEFAULT. (The whole 'tsk->files' could be NULL, but only for kernel threads or when exiting, so fget_task() will check for *that*, but it's a separate thing) So that's why it's safe to *entirely* remove the whole if (unlikely(fd >= fdt->max_fds)) test, and do it *all* with just "mask the index, and mask the resulting load". Because we can *always* do that load at "fdt->fd[0]", and we want to check the result for NULL anyway, so the "mask at the end and check for NULL" is both natural and generates very good code. Anyway, not a big deal, bit it might be worth noting before somebody tries the same trick on some other array that *could* be zero-sized and with a NULL base pointer, and where that 'array[0]' access isn't necessarily guaranteed to be ok. > It's a little unpleasant because of the cast-orama going on before we > check the file pointer but I don't see that it's in any way wrong. In my cleanup phase - which was a bit messy - I did wonder if I should have some helper for it, since it shows up in both __fget_files_rcu() and in files_lookup_fd_raw(). So I *could* have tried to add something like a "masked_rcu_dereference()" that took the base pointer, the index, and the mask, and did that whole dance. Or I could have had just a "mask_pointer()" function, which we do occasionally do in other places too (ie we hide data in low bits, and then we mask them away when the pointer is used as a pointer). But with only two users, it seemed to add more conceptual complexity than it's worth, and I was not convinced that we'd want to expose that pattern and have others use it. So having a helper might clarify things, but it might also encourage wrong users. I dunno. I suspect the only real use for this ends up being this very special "access the fdt->fd[] array using a file descriptor". Anyway, that's why I largely just did it with comments, and commented both places - and just kept the cast there in the open. Linus
Re: [Intel-gfx] [PATCH] drm/i915/display: Skip state verification with TBT-ALT mode
On Mon, 27 Nov 2023, Mika Kahola wrote: > With TBT-ALT mode we are not programming C20 chip PLL's and > hence we don't need to check state verification. We don't > need to program DP link signal levels i.e.pre-emphasis and > voltage swing either. > > This patch fixes dmesg errors like this one > > "[drm] ERROR PHY F Write 0c06 failed after 3 retries." > > Signed-off-by: Mika Kahola > --- > drivers/gpu/drm/i915/display/intel_cx0_phy.c | 7 +++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c > b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > index a8fa76580802..3a30cffd450c 100644 > --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > @@ -418,6 +418,10 @@ void intel_cx0_phy_set_signal_levels(struct > intel_encoder *encoder, > u8 owned_lane_mask = intel_cx0_get_owned_lane_mask(i915, encoder); > intel_wakeref_t wakeref; > int n_entries, ln; > + struct intel_digital_port *dig_port = enc_to_dig_port(encoder); > + > + if (intel_tc_port_in_tbt_alt_mode(dig_port)) > + return; > > wakeref = intel_cx0_phy_transaction_begin(encoder); > > @@ -3136,6 +3140,9 @@ void intel_cx0pll_state_verify(struct > intel_atomic_state *state, > encoder = intel_get_crtc_new_encoder(state, new_crtc_state); > phy = intel_port_to_phy(i915, encoder->port); > > + if (intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder))) > + return; > + Shouldn't we read and ensure it's disabled? > intel_cx0pll_readout_hw_state(encoder, _hw_state); > > if (intel_is_c10phy(i915, phy)) -- Jani Nikula, Intel
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Skip some timing checks on BXT/GLK DSI transcoders
== Series Details == Series: series starting with [1/4] drm/i915: Skip some timing checks on BXT/GLK DSI transcoders URL : https://patchwork.freedesktop.org/series/126923/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13927 -> Patchwork_126923v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126923v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126923v1, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126923v1/index.html Participating hosts (35 -> 35) -- Additional (2): bat-dg2-8 fi-pnv-d510 Missing(2): bat-kbl-2 fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126923v1: ### IGT changes ### Possible regressions * igt@i915_suspend@basic-s3-without-i915: - fi-kbl-7567u: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13927/fi-kbl-7567u/igt@i915_susp...@basic-s3-without-i915.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126923v1/fi-kbl-7567u/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_force_connector_basic@force-connector-state: - bat-dg1-7: [PASS][3] -> [ABORT][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13927/bat-dg1-7/igt@kms_force_connector_ba...@force-connector-state.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126923v1/bat-dg1-7/igt@kms_force_connector_ba...@force-connector-state.html Known issues Here are the changes found in Patchwork_126923v1 that come from known issues: ### IGT changes ### Issues hit * igt@gem_lmem_swapping@basic: - fi-pnv-d510:NOTRUN -> [SKIP][5] ([fdo#109271]) +25 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126923v1/fi-pnv-d510/igt@gem_lmem_swapp...@basic.html * igt@gem_mmap@basic: - bat-dg2-8: NOTRUN -> [SKIP][6] ([i915#4083]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126923v1/bat-dg2-8/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-dg2-8: NOTRUN -> [SKIP][7] ([i915#4077]) +2 other tests skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126923v1/bat-dg2-8/igt@gem_mmap_...@basic.html * igt@gem_tiled_pread_basic: - bat-dg2-8: NOTRUN -> [SKIP][8] ([i915#4079]) +1 other test skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126923v1/bat-dg2-8/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-8: NOTRUN -> [SKIP][9] ([i915#6621]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126923v1/bat-dg2-8/igt@i915_pm_...@basic-api.html * igt@i915_suspend@basic-s3-without-i915: - bat-dg2-8: NOTRUN -> [SKIP][10] ([i915#6645]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126923v1/bat-dg2-8/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-8: NOTRUN -> [SKIP][11] ([i915#5190]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126923v1/bat-dg2-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-8: NOTRUN -> [SKIP][12] ([i915#4215] / [i915#5190]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126923v1/bat-dg2-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_addfb_basic@framebuffer-vs-set-tiling: - bat-dg2-8: NOTRUN -> [SKIP][13] ([i915#4212]) +6 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126923v1/bat-dg2-8/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html * igt@kms_addfb_basic@tile-pitch-mismatch: - bat-dg2-8: NOTRUN -> [SKIP][14] ([i915#4212] / [i915#5608]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126923v1/bat-dg2-8/igt@kms_addfb_ba...@tile-pitch-mismatch.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg2-8: NOTRUN -> [SKIP][15] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126923v1/bat-dg2-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg2-8: NOTRUN -> [SKIP][16] ([fdo#109285]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126923v1/bat-dg2-8/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-dg2-8: NOTRUN -> [SKIP][17] ([i915#5274])
Re: [Intel-gfx] [PATCH] drm/i915/cdclk: Remove divider field from tables
On Fri, Nov 24, 2023 at 05:55:23PM -0300, Gustavo Sousa wrote:
> The cdclk tables were introduced with commit 736da8112fee ("drm/i915:
> Use literal representation of cdclk tables"). It has been almost 4 years
> and the divider field was not really used yet. Let's remove it.
I think we need to go the other way and actually start using it instead
of (incorrectly) trying to re-derive it from cdclk->vco. The logic the
driver is using today doesn't account for the potential use of
squashing, which means we program the wrong divider value into CDCLK_CTL
in some cases. I pointed that out during the LNL code reviews a couple
months ago, and I believe Stan is working on fixing that.
I wonder if the misprogramming we're doing today is what requires the
"HACK" at the bottom of intel_crtc_compute_min_cdclk for DG2?
Matt
>
> Cc: Matt Roper
> Cc: Ville Syrjälä
> Signed-off-by: Gustavo Sousa
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 269 ++---
> 1 file changed, 134 insertions(+), 135 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
> b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index b93d1ad7936d..7f85a216ff5c 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1227,183 +1227,182 @@ struct intel_cdclk_vals {
> u32 cdclk;
> u16 refclk;
> u16 waveform;
> - u8 divider; /* CD2X divider * 2 */
> u8 ratio;
> };
>
> static const struct intel_cdclk_vals bxt_cdclk_table[] = {
> - { .refclk = 19200, .cdclk = 144000, .divider = 8, .ratio = 60 },
> - { .refclk = 19200, .cdclk = 288000, .divider = 4, .ratio = 60 },
> - { .refclk = 19200, .cdclk = 384000, .divider = 3, .ratio = 60 },
> - { .refclk = 19200, .cdclk = 576000, .divider = 2, .ratio = 60 },
> - { .refclk = 19200, .cdclk = 624000, .divider = 2, .ratio = 65 },
> + { .refclk = 19200, .cdclk = 144000, .ratio = 60 },
> + { .refclk = 19200, .cdclk = 288000, .ratio = 60 },
> + { .refclk = 19200, .cdclk = 384000, .ratio = 60 },
> + { .refclk = 19200, .cdclk = 576000, .ratio = 60 },
> + { .refclk = 19200, .cdclk = 624000, .ratio = 65 },
> {}
> };
>
> static const struct intel_cdclk_vals glk_cdclk_table[] = {
> - { .refclk = 19200, .cdclk = 79200, .divider = 8, .ratio = 33 },
> - { .refclk = 19200, .cdclk = 158400, .divider = 4, .ratio = 33 },
> - { .refclk = 19200, .cdclk = 316800, .divider = 2, .ratio = 33 },
> + { .refclk = 19200, .cdclk = 79200, .ratio = 33 },
> + { .refclk = 19200, .cdclk = 158400, .ratio = 33 },
> + { .refclk = 19200, .cdclk = 316800, .ratio = 33 },
> {}
> };
>
> static const struct intel_cdclk_vals icl_cdclk_table[] = {
> - { .refclk = 19200, .cdclk = 172800, .divider = 2, .ratio = 18 },
> - { .refclk = 19200, .cdclk = 192000, .divider = 2, .ratio = 20 },
> - { .refclk = 19200, .cdclk = 307200, .divider = 2, .ratio = 32 },
> - { .refclk = 19200, .cdclk = 326400, .divider = 4, .ratio = 68 },
> - { .refclk = 19200, .cdclk = 556800, .divider = 2, .ratio = 58 },
> - { .refclk = 19200, .cdclk = 652800, .divider = 2, .ratio = 68 },
> -
> - { .refclk = 24000, .cdclk = 18, .divider = 2, .ratio = 15 },
> - { .refclk = 24000, .cdclk = 192000, .divider = 2, .ratio = 16 },
> - { .refclk = 24000, .cdclk = 312000, .divider = 2, .ratio = 26 },
> - { .refclk = 24000, .cdclk = 324000, .divider = 4, .ratio = 54 },
> - { .refclk = 24000, .cdclk = 552000, .divider = 2, .ratio = 46 },
> - { .refclk = 24000, .cdclk = 648000, .divider = 2, .ratio = 54 },
> -
> - { .refclk = 38400, .cdclk = 172800, .divider = 2, .ratio = 9 },
> - { .refclk = 38400, .cdclk = 192000, .divider = 2, .ratio = 10 },
> - { .refclk = 38400, .cdclk = 307200, .divider = 2, .ratio = 16 },
> - { .refclk = 38400, .cdclk = 326400, .divider = 4, .ratio = 34 },
> - { .refclk = 38400, .cdclk = 556800, .divider = 2, .ratio = 29 },
> - { .refclk = 38400, .cdclk = 652800, .divider = 2, .ratio = 34 },
> + { .refclk = 19200, .cdclk = 172800, .ratio = 18 },
> + { .refclk = 19200, .cdclk = 192000, .ratio = 20 },
> + { .refclk = 19200, .cdclk = 307200, .ratio = 32 },
> + { .refclk = 19200, .cdclk = 326400, .ratio = 68 },
> + { .refclk = 19200, .cdclk = 556800, .ratio = 58 },
> + { .refclk = 19200, .cdclk = 652800, .ratio = 68 },
> +
> + { .refclk = 24000, .cdclk = 18, .ratio = 15 },
> + { .refclk = 24000, .cdclk = 192000, .ratio = 16 },
> + { .refclk = 24000, .cdclk = 312000, .ratio = 26 },
> + { .refclk = 24000, .cdclk = 324000, .ratio = 54 },
> + { .refclk = 24000, .cdclk = 552000, .ratio = 46 },
> + { .refclk = 24000, .cdclk = 648000, .ratio = 54 },
> +
> + { .refclk = 38400, .cdclk = 172800, .ratio = 9 },
> + { .refclk = 38400, .cdclk = 192000, .ratio = 10 },
> + { .refclk = 38400, .cdclk = 307200, .ratio = 16 },
> + { .refclk =
Re: [Intel-gfx] [PATCH v2 2/4] eventfd: simplify eventfd_signal()
On Wed, 2023-11-22 at 13:48 +0100, Christian Brauner wrote:
> Ever since the evenfd type was introduced back in 2007 in commit
s/evenfd/eventfd/
> e1ad7468c77d ("signal/timer/event: eventfd core") the
> eventfd_signal()
> function only ever passed 1 as a value for @n. There's no point in
> keeping that additional argument.
>
> Signed-off-by: Christian Brauner
> ---
> arch/x86/kvm/hyperv.c | 2 +-
> arch/x86/kvm/xen.c | 2 +-
> drivers/accel/habanalabs/common/device.c | 2 +-
> drivers/fpga/dfl.c | 2 +-
> drivers/gpu/drm/drm_syncobj.c | 6 +++---
> drivers/gpu/drm/i915/gvt/interrupt.c | 2 +-
> drivers/infiniband/hw/mlx5/devx.c | 2 +-
> drivers/misc/ocxl/file.c | 2 +-
> drivers/s390/cio/vfio_ccw_chp.c | 2 +-
> drivers/s390/cio/vfio_ccw_drv.c | 4 ++--
> drivers/s390/cio/vfio_ccw_ops.c | 6 +++---
> drivers/s390/crypto/vfio_ap_ops.c | 2 +-
Acked-by: Eric Farman # s390
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915: Skip some timing checks on BXT/GLK DSI transcoders
== Series Details == Series: series starting with [1/4] drm/i915: Skip some timing checks on BXT/GLK DSI transcoders URL : https://patchwork.freedesktop.org/series/126923/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] [PATCH 1/3] drm: Add drm_vblank_work_flush_all().
In some cases we want to flush all vblank work, right before vblank_off
for example. Add a simple function to make this possible.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_vblank_work.c | 22 ++
include/drm/drm_vblank_work.h | 2 ++
2 files changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/drm_vblank_work.c
b/drivers/gpu/drm/drm_vblank_work.c
index 43cd5c0f4f6f..ff86f2b2e052 100644
--- a/drivers/gpu/drm/drm_vblank_work.c
+++ b/drivers/gpu/drm/drm_vblank_work.c
@@ -232,6 +232,28 @@ void drm_vblank_work_flush(struct drm_vblank_work *work)
}
EXPORT_SYMBOL(drm_vblank_work_flush);
+/**
+ * drm_vblank_work_flush_all - flush all currently pending vblank work on crtc.
+ * @crtc: crtc for which vblank work to flush
+ *
+ * Wait until all currently queued vblank work on @crtc
+ * has finished executing once.
+ */
+void drm_vblank_work_flush_all(struct drm_crtc *crtc)
+{
+ struct drm_device *dev = crtc->dev;
+ struct drm_vblank_crtc *vblank = >vblank[drm_crtc_index(crtc)];
+
+ spin_lock_irq(>event_lock);
+ wait_event_lock_irq(vblank->work_wait_queue,
+ waitqueue_active(>work_wait_queue),
+ dev->event_lock);
+ spin_unlock_irq(>event_lock);
+
+ kthread_flush_worker(vblank->worker);
+}
+EXPORT_SYMBOL(drm_vblank_work_flush_all);
+
/**
* drm_vblank_work_init - initialize a vblank work item
* @work: vblank work item
diff --git a/include/drm/drm_vblank_work.h b/include/drm/drm_vblank_work.h
index eb41d0810c4f..e04d436b7297 100644
--- a/include/drm/drm_vblank_work.h
+++ b/include/drm/drm_vblank_work.h
@@ -17,6 +17,7 @@ struct drm_crtc;
* drm_vblank_work_init()
* drm_vblank_work_cancel_sync()
* drm_vblank_work_flush()
+ * drm_vblank_work_flush_all()
*/
struct drm_vblank_work {
/**
@@ -67,5 +68,6 @@ void drm_vblank_work_init(struct drm_vblank_work *work,
struct drm_crtc *crtc,
void (*func)(struct kthread_work *work));
bool drm_vblank_work_cancel_sync(struct drm_vblank_work *work);
void drm_vblank_work_flush(struct drm_vblank_work *work);
+void drm_vblank_work_flush_all(struct drm_crtc *crtc);
#endif /* !_DRM_VBLANK_WORK_H_ */
--
2.40.1
[Intel-gfx] [PATCH 2/3] drm/i915: Use vblank worker to unpin old legacy cursor fb safely
From: Ville Syrjälä
The cursor hardware only does sync updates, and thus the hardware
will be scanning out from the old fb until the next start of vblank.
So in order to make the legacy cursor fastpath actually safe we
should not unpin the old fb until we're sure the hardware has
ceased accessing it. The simplest approach is to just use a vblank
work here to do the delayed unpin.
Not 100% sure it's a good idea to put this onto the same high
priority vblank worker as eg. our timing critical gamma updates.
But let's keep it simple for now, and it we later discover that
this is causing problems we can think about adding a lower
priority worker for such things.
This patch is slightly reworked by Maarten
Cc: Maarten Lankhorst
Signed-off-by: Ville Syrjälä
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_cursor.c | 26 +--
drivers/gpu/drm/i915/display/intel_display.c | 3 +++
.../drm/i915/display/intel_display_types.h| 3 +++
3 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c
b/drivers/gpu/drm/i915/display/intel_cursor.c
index a515ae2831f8..e38ea7311047 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -633,6 +633,17 @@ static bool intel_cursor_format_mod_supported(struct
drm_plane *_plane,
return format == DRM_FORMAT_ARGB;
}
+static void intel_cursor_unpin_work(struct kthread_work *base)
+{
+ struct drm_vblank_work *work = to_drm_vblank_work(base);
+ struct intel_plane_state *plane_state =
+ container_of(work, typeof(*plane_state), unpin_work);
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+
+ intel_plane_unpin_fb(plane_state);
+ intel_plane_destroy_state(>base, _state->uapi);
+}
+
static int
intel_legacy_cursor_update(struct drm_plane *_plane,
struct drm_crtc *_crtc,
@@ -760,14 +771,25 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
local_irq_enable();
- intel_plane_unpin_fb(old_plane_state);
+ if (old_plane_state->ggtt_vma != new_plane_state->ggtt_vma) {
+ drm_vblank_work_init(_plane_state->unpin_work, >base,
+intel_cursor_unpin_work);
+
+ drm_vblank_work_schedule(_plane_state->unpin_work,
+
drm_crtc_accurate_vblank_count(>base) + 1,
+false);
+
+ old_plane_state = NULL;
+ } else {
+ intel_plane_unpin_fb(old_plane_state);
+ }
out_free:
if (new_crtc_state)
intel_crtc_destroy_state(>base, _crtc_state->uapi);
if (ret)
intel_plane_destroy_state(>base, _plane_state->uapi);
- else
+ else if (old_plane_state)
intel_plane_destroy_state(>base, _plane_state->uapi);
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 5cf162628b95..930fb471a870 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -64,6 +64,7 @@
#include "intel_crt.h"
#include "intel_crtc.h"
#include "intel_crtc_state_dump.h"
+#include "intel_cursor.h"
#include "intel_ddi.h"
#include "intel_de.h"
#include "intel_display_driver.h"
@@ -6752,6 +6753,8 @@ static void intel_commit_modeset_disables(struct
intel_atomic_state *state)
continue;
intel_crtc_disable_planes(state, crtc);
+
+ drm_vblank_work_flush_all(>base);
}
/* Only disable port sync and MST slaves */
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index b3e942f2eeb0..22ec3b42ceca 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -715,6 +715,9 @@ struct intel_plane_state {
struct intel_fb_view view;
+ /* for legacy cursor fb unpin */
+ struct drm_vblank_work unpin_work;
+
/* Plane pxp decryption state */
bool decrypt;
--
2.40.1
[Intel-gfx] [PATCH 3/3] drm/i915: Use the same vblank worker for atomic unpin
In case of legacy cursor update, the cursor VMA needs to be unpinned
only after vblank. This exceeds the lifetime of the whole atomic commit.
Any trick I attempted to keep the atomic commit alive didn't work, as
drm_atomic_helper_setup_commit() force throttles on any old commit that
wasn't cleaned up.
The only option remaining is to remove the plane from the atomic commit,
and use the same path as the legacy cursor update to clean the state
after vblank.
Signed-off-by: Maarten Lankhorst
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 28 ++-
.../gpu/drm/i915/display/intel_atomic_plane.h | 2 ++
drivers/gpu/drm/i915/display/intel_crtc.c | 28 +++
drivers/gpu/drm/i915/display/intel_cursor.c | 2 +-
drivers/gpu/drm/i915/display/intel_cursor.h | 3 ++
5 files changed, 61 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 06c2455bdd78..cb4153ca1867 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -42,6 +42,7 @@
#include "i915_reg.h"
#include "intel_atomic_plane.h"
#include "intel_cdclk.h"
+#include "intel_cursor.h"
#include "intel_display_rps.h"
#include "intel_display_trace.h"
#include "intel_display_types.h"
@@ -1163,7 +1164,21 @@ intel_cleanup_plane_fb(struct drm_plane *plane,
intel_display_rps_mark_interactive(dev_priv, state, false);
- /* Should only be called after a successful intel_prepare_plane_fb()! */
+ /*
+* This branch can only ever be called after plane update is succesful,
+* the error path will not cause unpin_work to be set.
+*/
+ if (old_plane_state->unpin_work.vblank) {
+ int i = drm_plane_index(old_plane_state->uapi.plane);
+
+ /*
+* Remove plane from atomic commit,
+* free is done from vblank worker
+*/
+ memset(>base.planes[i], 0, sizeof(*state->base.planes));
+ return;
+ }
+
intel_plane_unpin_fb(old_plane_state);
}
@@ -1176,3 +1191,14 @@ void intel_plane_helper_add(struct intel_plane *plane)
{
drm_plane_helper_add(>base, _plane_helper_funcs);
}
+
+void intel_plane_init_cursor_vblank_work(struct intel_plane_state
*old_plane_state,
+struct intel_plane_state
*new_plane_state)
+{
+ if (!old_plane_state->ggtt_vma ||
+ old_plane_state->ggtt_vma == new_plane_state->ggtt_vma)
+ return;
+
+ drm_vblank_work_init(_plane_state->unpin_work,
old_plane_state->uapi.crtc,
+intel_cursor_unpin_work);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
index 191dad0efc8e..5a897cf6fa02 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
@@ -66,5 +66,7 @@ int intel_plane_check_src_coordinates(struct
intel_plane_state *plane_state);
void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state);
void intel_plane_helper_add(struct intel_plane *plane);
+void intel_plane_init_cursor_vblank_work(struct intel_plane_state
*old_plane_state,
+struct intel_plane_state
*new_plane_state);
#endif /* __INTEL_ATOMIC_PLANE_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c
b/drivers/gpu/drm/i915/display/intel_crtc.c
index 1fd068e6e26c..755c40fd0ac1 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -559,6 +559,19 @@ void intel_pipe_update_start(struct intel_atomic_state
*state,
if (intel_crtc_needs_vblank_work(new_crtc_state))
intel_crtc_vblank_work_init(new_crtc_state);
+ if (state->base.legacy_cursor_update) {
+ struct intel_plane *plane;
+ struct intel_plane_state *old_plane_state, *new_plane_state;
+ int i;
+
+ for_each_oldnew_intel_plane_in_state(state, plane,
old_plane_state,
+new_plane_state, i) {
+ if (old_plane_state->uapi.crtc == >base)
+
intel_plane_init_cursor_vblank_work(old_plane_state,
+
new_plane_state);
+ }
+ }
+
intel_crtc_vblank_evade_scanlines(state, crtc, , ,
_start);
if (min <= 0 || max <= 0)
goto irq_disable;
@@ -721,6 +734,21 @@ void intel_pipe_update_end(struct intel_atomic_state
*state,
new_crtc_state->uapi.event = NULL;
}
+ if (state->base.legacy_cursor_update) {
+ struct intel_plane *plane;
+
Re: [Intel-gfx] [PATCH 2/2] drm/amdgpu: use GTT only as fallback for VRAM|GTT
On 11/27/23 09:54, Christian König wrote: Try to fill up VRAM as well by setting the busy flag on GTT allocations. This fixes the issue that when VRAM was evacuated for suspend it's never filled up again unless the application is restarted. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2893 Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index aa0dd6dad068..ddc8fb4db678 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -173,6 +173,12 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain) abo->flags & AMDGPU_GEM_CREATE_PREEMPTIBLE ? AMDGPU_PL_PREEMPT : TTM_PL_TT; places[c].flags = 0; + /* +* When GTT is just an alternative to VRAM make sure that we +* only use it as fallback and still try to fill up VRAM first. +*/ + if (domain & AMDGPU_GEM_DOMAIN_VRAM) + places[c].flags |= TTM_PL_FLAG_BUSY; c++; } -- Hamza
[Intel-gfx] [PATCH] drm/i915/display: Skip state verification with TBT-ALT mode
With TBT-ALT mode we are not programming C20 chip PLL's and hence we don't need to check state verification. We don't need to program DP link signal levels i.e.pre-emphasis and voltage swing either. This patch fixes dmesg errors like this one "[drm] ERROR PHY F Write 0c06 failed after 3 retries." Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/display/intel_cx0_phy.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c index a8fa76580802..3a30cffd450c 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c @@ -418,6 +418,10 @@ void intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder, u8 owned_lane_mask = intel_cx0_get_owned_lane_mask(i915, encoder); intel_wakeref_t wakeref; int n_entries, ln; + struct intel_digital_port *dig_port = enc_to_dig_port(encoder); + + if (intel_tc_port_in_tbt_alt_mode(dig_port)) + return; wakeref = intel_cx0_phy_transaction_begin(encoder); @@ -3136,6 +3140,9 @@ void intel_cx0pll_state_verify(struct intel_atomic_state *state, encoder = intel_get_crtc_new_encoder(state, new_crtc_state); phy = intel_port_to_phy(i915, encoder->port); + if (intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder))) + return; + intel_cx0pll_readout_hw_state(encoder, _hw_state); if (intel_is_c10phy(i915, phy)) -- 2.34.1
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Fix null pointer dereference in intel_dp_aux_wait_done and intel_dp_aux_xfer
== Series Details == Series: drm/i915/display: Fix null pointer dereference in intel_dp_aux_wait_done and intel_dp_aux_xfer URL : https://patchwork.freedesktop.org/series/126922/ State : success == Summary == CI Bug Log - changes from CI_DRM_13927 -> Patchwork_126922v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/index.html Participating hosts (35 -> 36) -- Additional (2): bat-mtlp-8 fi-pnv-d510 Missing(1): fi-snb-2520m Known issues Here are the changes found in Patchwork_126922v1 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-mtlp-8: NOTRUN -> [SKIP][1] ([i915#9318]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html * igt@gem_lmem_swapping@basic: - fi-pnv-d510:NOTRUN -> [SKIP][2] ([fdo#109271]) +25 other tests skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/fi-pnv-d510/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@verify-random: - bat-mtlp-8: NOTRUN -> [SKIP][3] ([i915#4613]) +3 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-mtlp-8: NOTRUN -> [SKIP][4] ([i915#4083]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/bat-mtlp-8/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-mtlp-8: NOTRUN -> [SKIP][5] ([i915#4077]) +2 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/bat-mtlp-8/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-mtlp-8: NOTRUN -> [SKIP][6] ([i915#4079]) +1 other test skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html * igt@i915_pm_rps@basic-api: - bat-mtlp-8: NOTRUN -> [SKIP][7] ([i915#6621]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/bat-mtlp-8/igt@i915_pm_...@basic-api.html * igt@i915_suspend@basic-s3-without-i915: - bat-mtlp-8: NOTRUN -> [SKIP][8] ([i915#6645]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/bat-mtlp-8/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-mtlp-8: NOTRUN -> [SKIP][9] ([i915#5190]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/bat-mtlp-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-mtlp-8: NOTRUN -> [SKIP][10] ([i915#4212]) +8 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/bat-mtlp-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-mtlp-8: NOTRUN -> [SKIP][11] ([i915#4213]) +1 other test skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/bat-mtlp-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-mtlp-8: NOTRUN -> [SKIP][12] ([i915#3555] / [i915#3840] / [i915#4098] / [i915#9159]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/bat-mtlp-8/igt@kms_...@dsc-basic.html * igt@kms_force_connector_basic@force-load-detect: - bat-mtlp-8: NOTRUN -> [SKIP][13] ([fdo#109285]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/bat-mtlp-8/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-mtlp-8: NOTRUN -> [SKIP][14] ([i915#5274]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/bat-mtlp-8/igt@kms_force_connector_ba...@prune-stale-modes.html * igt@kms_setmode@basic-clone-single-crtc: - bat-mtlp-8: NOTRUN -> [SKIP][15] ([i915#3555] / [i915#8809]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/bat-mtlp-8/igt@kms_setm...@basic-clone-single-crtc.html * igt@prime_vgem@basic-fence-mmap: - bat-mtlp-8: NOTRUN -> [SKIP][16] ([i915#3708] / [i915#4077]) +1 other test skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/bat-mtlp-8/igt@prime_v...@basic-fence-mmap.html * igt@prime_vgem@basic-fence-read: - bat-mtlp-8: NOTRUN -> [SKIP][17] ([i915#3708]) +2 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126922v1/bat-mtlp-8/igt@prime_v...@basic-fence-read.html Possible fixes * igt@i915_selftest@live@hangcheck: - bat-adls-5: [DMESG-WARN][18] ([i915#5591]) -> [PASS][19] [18]:
[Intel-gfx] [PATCH 2/2] drm/amdgpu: use GTT only as fallback for VRAM|GTT
Try to fill up VRAM as well by setting the busy flag on GTT allocations. This fixes the issue that when VRAM was evacuated for suspend it's never filled up again unless the application is restarted. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index aa0dd6dad068..ddc8fb4db678 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -173,6 +173,12 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain) abo->flags & AMDGPU_GEM_CREATE_PREEMPTIBLE ? AMDGPU_PL_PREEMPT : TTM_PL_TT; places[c].flags = 0; + /* +* When GTT is just an alternative to VRAM make sure that we +* only use it as fallback and still try to fill up VRAM first. +*/ + if (domain & AMDGPU_GEM_DOMAIN_VRAM) + places[c].flags |= TTM_PL_FLAG_BUSY; c++; } -- 2.34.1
[Intel-gfx] [PATCH 1/2] drm/ttm: replace busy placement with flags v3
From: Somalapuram Amaranath
Instead of a list of separate busy placement add flags which indicate
that a placement should only be used when there is room or if we need to
evict.
v2: add missing TTM_PL_FLAG_IDLE for i915
v3: fix auto build test ERROR on drm-tip/drm-tip
Signed-off-by: Christian König
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 6 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 11 +--
drivers/gpu/drm/drm_gem_vram_helper.c | 2 -
drivers/gpu/drm/i915/gem/i915_gem_ttm.c| 37
drivers/gpu/drm/loongson/lsdc_ttm.c| 2 -
drivers/gpu/drm/nouveau/nouveau_bo.c | 59 +
drivers/gpu/drm/nouveau/nouveau_bo.h | 1 -
drivers/gpu/drm/qxl/qxl_object.c | 2 -
drivers/gpu/drm/qxl/qxl_ttm.c | 2 -
drivers/gpu/drm/radeon/radeon_object.c | 2 -
drivers/gpu/drm/radeon/radeon_ttm.c| 8 +-
drivers/gpu/drm/radeon/radeon_uvd.c| 1 -
drivers/gpu/drm/ttm/ttm_bo.c | 21 +++--
drivers/gpu/drm/ttm/ttm_resource.c | 73
drivers/gpu/drm/vmwgfx/vmwgfx_bo.c | 3 +-
drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c | 99 +-
include/drm/ttm/ttm_placement.h| 10 ++-
include/drm/ttm/ttm_resource.h | 8 +-
18 files changed, 160 insertions(+), 187 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index cef920a93924..aa0dd6dad068 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -220,9 +220,6 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo,
u32 domain)
placement->num_placement = c;
placement->placement = places;
-
- placement->num_busy_placement = c;
- placement->busy_placement = places;
}
/**
@@ -1406,8 +1403,7 @@ vm_fault_t amdgpu_bo_fault_reserve_notify(struct
ttm_buffer_object *bo)
AMDGPU_GEM_DOMAIN_GTT);
/* Avoid costly evictions; only set GTT as a busy placement */
- abo->placement.num_busy_placement = 1;
- abo->placement.busy_placement = >placements[1];
+ abo->placements[0].flags |= TTM_PL_FLAG_IDLE;
r = ttm_bo_validate(bo, >placement, );
if (unlikely(r == -EBUSY || r == -ERESTARTSYS))
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 05991c5c8ddb..9a6a00b1af40 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -102,23 +102,19 @@ static void amdgpu_evict_flags(struct ttm_buffer_object
*bo,
/* Don't handle scatter gather BOs */
if (bo->type == ttm_bo_type_sg) {
placement->num_placement = 0;
- placement->num_busy_placement = 0;
return;
}
/* Object isn't an AMDGPU object so ignore */
if (!amdgpu_bo_is_amdgpu_bo(bo)) {
placement->placement =
- placement->busy_placement =
placement->num_placement = 1;
- placement->num_busy_placement = 1;
return;
}
abo = ttm_to_amdgpu_bo(bo);
if (abo->flags & AMDGPU_GEM_CREATE_DISCARDABLE) {
placement->num_placement = 0;
- placement->num_busy_placement = 0;
return;
}
@@ -128,13 +124,13 @@ static void amdgpu_evict_flags(struct ttm_buffer_object
*bo,
case AMDGPU_PL_OA:
case AMDGPU_PL_DOORBELL:
placement->num_placement = 0;
- placement->num_busy_placement = 0;
return;
case TTM_PL_VRAM:
if (!adev->mman.buffer_funcs_enabled) {
/* Move to system memory */
amdgpu_bo_placement_from_domain(abo,
AMDGPU_GEM_DOMAIN_CPU);
+
} else if (!amdgpu_gmc_vram_full_visible(>gmc) &&
!(abo->flags &
AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED) &&
amdgpu_bo_in_cpu_visible_vram(abo)) {
@@ -149,8 +145,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
AMDGPU_GEM_DOMAIN_CPU);
abo->placements[0].fpfn = adev->gmc.visible_vram_size
>> PAGE_SHIFT;
abo->placements[0].lpfn = 0;
- abo->placement.busy_placement = >placements[1];
- abo->placement.num_busy_placement = 1;
+ abo->placements[0].flags |= TTM_PL_FLAG_IDLE;
} else {
/* Move to GTT memory */
amdgpu_bo_placement_from_domain(abo,
AMDGPU_GEM_DOMAIN_GTT |
@@ -967,8 +962,6 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo)
/* allocate GART space */
placement.num_placement = 1;
[Intel-gfx] TTM improvement and amdgpu fix
Hi guys, TTM has a feature which allows to specify placements for normal operation as well as when all domains are "busy" and don't have free space. Not very widely used since it was a bit inflexible and required making multiple placement lists. Replace the multiple lists with flags and start to use this in amdgpu as well. As future improvement we should probably re-work was "busy" means for a domain as well. Please comment and/or test. Thanks, Christian.
[Intel-gfx] [PATCH 4/4] drm/i915: Clean up some DISPLAY_VER checks
From: Ville Syrjälä
Use the >= and < operators for the DISPLAY_VER checks everywhere.
This is what most of the code does, but especially recently random
pieces of code have started doing this differently for no good reason.
Conversion done with the following cocci:
@find@
expression i915;
constant ver;
@@
(
DISPLAY_VER(i915) <= ver
|
DISPLAY_VER(i915) > ver
)
@script:python inc@
old_ver << find.ver;
new_ver;
@@
coccinelle.new_ver = str(int(old_ver) + 1)
@@
expression find.i915;
constant find.ver;
identifier inc.new_ver;
@@
(
- DISPLAY_VER(i915) <= ver
+ DISPLAY_VER(i915) < new_ver
|
- DISPLAY_VER(i915) > ver
+ DISPLAY_VER(i915) >= new_ver
)
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 8
drivers/gpu/drm/i915/display/intel_bw.c | 7 ---
drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c| 8
drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
drivers/gpu/drm/i915/display/intel_display_irq.c| 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
drivers/gpu/drm/i915/display/intel_lvds.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c| 8
10 files changed, 22 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c
b/drivers/gpu/drm/i915/display/i9xx_wm.c
index b37c0d02d500..03e8fb6caa83 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -2477,7 +2477,7 @@ static unsigned int ilk_plane_wm_max(const struct
drm_i915_private *dev_priv,
* FIFO size is only half of the self
* refresh FIFO size on ILK/SNB.
*/
- if (DISPLAY_VER(dev_priv) <= 6)
+ if (DISPLAY_VER(dev_priv) < 7)
fifo_size /= 2;
}
@@ -2818,7 +2818,7 @@ static int ilk_compute_pipe_wm(struct intel_atomic_state
*state,
usable_level = dev_priv->display.wm.num_levels - 1;
/* ILK/SNB: LP2+ watermarks only w/o sprites */
- if (DISPLAY_VER(dev_priv) <= 6 && pipe_wm->sprites_enabled)
+ if (DISPLAY_VER(dev_priv) < 7 && pipe_wm->sprites_enabled)
usable_level = 1;
/* ILK/SNB/IVB: LP1+ watermarks only w/o scaling */
@@ -2961,7 +2961,7 @@ static void ilk_wm_merge(struct drm_i915_private
*dev_priv,
int last_enabled_level = num_levels - 1;
/* ILK/SNB/IVB: LP1+ watermarks only w/ single pipe */
- if ((DISPLAY_VER(dev_priv) <= 6 || IS_IVYBRIDGE(dev_priv)) &&
+ if ((DISPLAY_VER(dev_priv) < 7 || IS_IVYBRIDGE(dev_priv)) &&
config->num_pipes_active > 1)
last_enabled_level = 0;
@@ -3060,7 +3060,7 @@ static void ilk_compute_wm_results(struct
drm_i915_private *dev_priv,
* Always set WM_LP_SPRITE_EN when spr_val != 0, even if the
* level is disabled. Doing otherwise could cause underruns.
*/
- if (DISPLAY_VER(dev_priv) <= 6 && r->spr_val) {
+ if (DISPLAY_VER(dev_priv) < 7 && r->spr_val) {
drm_WARN_ON(_priv->drm, wm_lp != 1);
results->wm_lp_spr[wm_lp - 1] |= WM_LP_SPRITE_ENABLE;
}
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
b/drivers/gpu/drm/i915/display/intel_bw.c
index bef96db62c80..7f2a50b4f494 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -87,7 +87,8 @@ static int icl_pcode_read_qgv_point_info(struct
drm_i915_private *dev_priv,
return ret;
dclk = val & 0x;
- sp->dclk = DIV_ROUND_UP((16667 * dclk) + (DISPLAY_VER(dev_priv) > 11 ?
500 : 0), 1000);
+ sp->dclk = DIV_ROUND_UP((16667 * dclk) + (DISPLAY_VER(dev_priv) >= 12 ?
500 : 0),
+ 1000);
sp->t_rp = (val & 0xff) >> 16;
sp->t_rcd = (val & 0xff00) >> 24;
@@ -480,7 +481,7 @@ static int tgl_get_bw_info(struct drm_i915_private
*dev_priv, const struct intel
if (num_channels < qi.max_numchannels && DISPLAY_VER(dev_priv) >= 12)
qi.deinterleave = max(DIV_ROUND_UP(qi.deinterleave, 2), 1);
- if (DISPLAY_VER(dev_priv) > 11 && num_channels > qi.max_numchannels)
+ if (DISPLAY_VER(dev_priv) >= 12 && num_channels > qi.max_numchannels)
drm_warn(_priv->drm, "Number of channels exceeds max number
of channels.");
if (qi.max_numchannels != 0)
num_channels = min_t(u8, num_channels, qi.max_numchannels);
@@ -897,7 +898,7 @@ static int icl_find_qgv_points(struct drm_i915_private
*i915,
unsigned int idx;
unsigned int max_data_rate;
- if (DISPLAY_VER(i915) > 11)
+ if (DISPLAY_VER(i915) >= 12)
idx = tgl_max_bw_index(i915,
[Intel-gfx] [PATCH 3/4] drm/i915/mst: Reject modes that require the bigjoiner
From: Ville Syrjälä
We have no bigjoiner support in the MST code, so .mode_valid()
pretending otherwise is just going to result black screens for
users. Reject any mode that needs the joiner.
Cc: Stanislav Lisovskiy
Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path")
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 0680a42f7d2a..b665fe6ef871 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1332,6 +1332,10 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector
*connector,
if (intel_dp_need_bigjoiner(intel_dp, mode->hdisplay, target_clock)) {
bigjoiner = true;
max_dotclk *= 2;
+
+ /* TODO: add support for bigjoiner */
+ *status = MODE_CLOCK_HIGH;
+ return 0;
}
if (DISPLAY_VER(dev_priv) >= 10 &&
--
2.41.0
[Intel-gfx] [PATCH 2/4] drm/i915/mst: Fix .mode_valid_ctx() return values
From: Ville Syrjälä
.mode_valid_ctx() returns an errno, not the mode status. Fix
the code to do the right thing.
Cc: Stanislav Lisovskiy
Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path")
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 0514f825baf5..0680a42f7d2a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1366,11 +1366,15 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector
*connector,
* Big joiner configuration needs DSC for TGL which is not true for
* XE_LPD where uncompressed joiner is supported.
*/
- if (DISPLAY_VER(dev_priv) < 13 && bigjoiner && !dsc)
- return MODE_CLOCK_HIGH;
+ if (DISPLAY_VER(dev_priv) < 13 && bigjoiner && !dsc) {
+ *status = MODE_CLOCK_HIGH;
+ return 0;
+ }
- if (mode_rate > max_rate && !dsc)
- return MODE_CLOCK_HIGH;
+ if (mode_rate > max_rate && !dsc) {
+ *status = MODE_CLOCK_HIGH;
+ return 0;
+ }
*status = intel_mode_valid_max_plane_size(dev_priv, mode, false);
return 0;
--
2.41.0
[Intel-gfx] [PATCH 1/4] drm/i915: Skip some timing checks on BXT/GLK DSI transcoders
From: Ville Syrjälä
Apparently some BXT/GLK systems have DSI panels whose timings
don't agree with the normal cpu transcoder hblank>=32 limitation.
This is perhaps fine as there are no specific hblank/etc. limits
listed for the BXT/GLK DSI transcoders.
Move those checks out from the global intel_mode_valid() into
into connector specific .mode_valid() hooks, skipping BXT/GLK
DSI connectors. We'll leave the basic [hv]display/[hv]total
checks in intel_mode_valid() as those seem like sensible upper
limits regardless of the transcoder used.
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9720
Fixes: 8f4b1068e7fc ("drm/i915: Check some transcoder timing minimum limits")
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/icl_dsi.c | 7 +++
drivers/gpu/drm/i915/display/intel_crt.c | 5 +
drivers/gpu/drm/i915/display/intel_display.c | 10 ++
drivers/gpu/drm/i915/display/intel_display.h | 3 +++
drivers/gpu/drm/i915/display/intel_dp.c | 4
drivers/gpu/drm/i915/display/intel_dp_mst.c | 4
drivers/gpu/drm/i915/display/intel_dvo.c | 6 ++
drivers/gpu/drm/i915/display/intel_hdmi.c| 4
drivers/gpu/drm/i915/display/intel_lvds.c| 5 +
drivers/gpu/drm/i915/display/intel_sdvo.c| 8 +++-
drivers/gpu/drm/i915/display/intel_tv.c | 8 +++-
drivers/gpu/drm/i915/display/vlv_dsi.c | 18 +-
12 files changed, 79 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index 481fcb650850..ac456a2275db 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1440,6 +1440,13 @@ static void gen11_dsi_post_disable(struct
intel_atomic_state *state,
static enum drm_mode_status gen11_dsi_mode_valid(struct drm_connector
*connector,
struct drm_display_mode *mode)
{
+ struct drm_i915_private *i915 = to_i915(connector->dev);
+ enum drm_mode_status status;
+
+ status = intel_cpu_transcoder_mode_valid(i915, mode);
+ if (status != MODE_OK)
+ return status;
+
/* FIXME: DSC? */
return intel_dsi_mode_valid(connector, mode);
}
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
b/drivers/gpu/drm/i915/display/intel_crt.c
index 0e33a0523a75..abaacea5c2cc 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -348,8 +348,13 @@ intel_crt_mode_valid(struct drm_connector *connector,
struct drm_device *dev = connector->dev;
struct drm_i915_private *dev_priv = to_i915(dev);
int max_dotclk = dev_priv->max_dotclk_freq;
+ enum drm_mode_status status;
int max_clock;
+ status = intel_cpu_transcoder_mode_valid(dev_priv, mode);
+ if (status != MODE_OK)
+ return status;
+
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
return MODE_NO_DBLESCAN;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 5cf162628b95..23b077f43614 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7734,6 +7734,16 @@ enum drm_mode_status intel_mode_valid(struct drm_device
*dev,
mode->vtotal > vtotal_max)
return MODE_V_ILLEGAL;
+ return MODE_OK;
+}
+
+enum drm_mode_status intel_cpu_transcoder_mode_valid(struct drm_i915_private
*dev_priv,
+const struct
drm_display_mode *mode)
+{
+ /*
+* Additional transcoder timing limits,
+* excluding BXT/GLK DSI transcoders.
+*/
if (DISPLAY_VER(dev_priv) >= 5) {
if (mode->hdisplay < 64 ||
mode->htotal - mode->hdisplay < 32)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h
b/drivers/gpu/drm/i915/display/intel_display.h
index 8548f49e3972..f4a0773f0fca 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -402,6 +402,9 @@ enum drm_mode_status
intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
const struct drm_display_mode *mode,
bool bigjoiner);
+enum drm_mode_status
+intel_cpu_transcoder_mode_valid(struct drm_i915_private *i915,
+ const struct drm_display_mode *mode);
enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port);
bool is_trans_port_sync_mode(const struct intel_crtc_state *state);
bool is_trans_port_sync_master(const struct intel_crtc_state *state);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index c6e3fe8b75d3..147f49bd12f6 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1227,6
[Intel-gfx] [PATCH] drm/i915/display: Fix null pointer dereference in intel_dp_aux_wait_done and intel_dp_aux_xfer
kasprintf() returns a pointer to dynamically allocated memory
which can be NULL upon failure. When "intel_dp->aux.name" is NULL,
these error messages will trigger the null pointer dereference issue.
Signed-off-by: Kunwu Chan
---
drivers/gpu/drm/i915/display/intel_dp_aux.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c
b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index 2e2af71bcd5a..398c9064eb09 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -67,7 +67,7 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp)
if (ret == -ETIMEDOUT)
drm_err(>drm,
"%s: did not complete or timeout within %ums (status
0x%08x)\n",
- intel_dp->aux.name, timeout_ms, status);
+ intel_dp->aux.name ? intel_dp->aux.name : "",
timeout_ms, status);
return status;
}
@@ -302,7 +302,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
if (status != intel_dp->aux_busy_last_status) {
drm_WARN(>drm, 1,
"%s: not started (status 0x%08x)\n",
-intel_dp->aux.name, status);
+intel_dp->aux.name ? intel_dp->aux.name : "",
status);
intel_dp->aux_busy_last_status = status;
}
@@ -362,7 +362,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
if ((status & DP_AUX_CH_CTL_DONE) == 0) {
drm_err(>drm, "%s: not done (status 0x%08x)\n",
- intel_dp->aux.name, status);
+ intel_dp->aux.name ? intel_dp->aux.name : "", status);
ret = -EBUSY;
goto out;
}
@@ -374,7 +374,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
*/
if (status & DP_AUX_CH_CTL_RECEIVE_ERROR) {
drm_err(>drm, "%s: receive error (status 0x%08x)\n",
- intel_dp->aux.name, status);
+ intel_dp->aux.name ? intel_dp->aux.name : "", status);
ret = -EIO;
goto out;
}
@@ -385,7 +385,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
*/
if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR) {
drm_dbg_kms(>drm, "%s: timeout (status 0x%08x)\n",
- intel_dp->aux.name, status);
+ intel_dp->aux.name ? intel_dp->aux.name : "",
status);
ret = -ETIMEDOUT;
goto out;
}
@@ -401,7 +401,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
if (recv_bytes == 0 || recv_bytes > 20) {
drm_dbg_kms(>drm,
"%s: Forbidden recv_bytes = %d on aux
transaction\n",
- intel_dp->aux.name, recv_bytes);
+ intel_dp->aux.name ? intel_dp->aux.name : "",
recv_bytes);
ret = -EBUSY;
goto out;
}
--
2.34.1
Re: [Intel-gfx] linux-next: build failure after merge of the drm-misc-fixes tree
On Monday, November 27, 2023 5:32 AM, Stephen Rothwell
wrote:
> Hi all,
>
> After merging the drm-misc-fixes tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
>
> ERROR: modpost: "device_is_dependent"
> [drivers/gpu/drm/drm_kms_helper.ko] undefined!
I've sent a new patch series to address the build failure.
It includes a new patch to export device_is_dependent and then
adds the offending commit.
https://lore.kernel.org/all/20231127051414.3783108-1-victor@nxp.com/T/#t
Regards,
Liu Ying
>
> Caused by commit
>
> 39d5b6a64ace ("drm/bridge: panel: Check device dependency before
> managing device link")
>
> I have used the drm-misc-fixes tree from next-20231124 for today.
>
> --
> Cheers,
> Stephen Rothwell
Re: [Intel-gfx] [linus:master] [file] 0ede61d858: will-it-scale.per_thread_ops -2.9% regression
On Mon, Nov 20, 2023 at 03:11:31PM +0800, kernel test robot wrote:
>
>
> Hello,
>
> kernel test robot noticed a -2.9% regression of will-it-scale.per_thread_ops
> on:
>
>
> commit: 0ede61d8589cc2d93aa78230d74ac58b5b8d0244 ("file: convert to
> SLAB_TYPESAFE_BY_RCU")
> https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git master
>
> 93faf426e3cc000c 0ede61d8589cc2d93aa78230d74
> ---
> %stddev %change %stddev
> \ |\
[snip]
> 30.90 ± 4% -20.6 10.35 ± 2%
> perf-profile.self.cycles-pp.__fget_light
> 0.00 +26.5 26.48
> perf-profile.self.cycles-pp.__get_file_rcu
[snip]
So __fget_light now got a func call.
I don't know if this is worth patching (and benchmarking after), but I
if sorting this out is of interest, triviality below is probably the
easiest way out:
diff --git a/fs/file.c b/fs/file.c
index 5fb0b146e79e..d8d3e18800c4 100644
--- a/fs/file.c
+++ b/fs/file.c
@@ -856,14 +856,14 @@ void do_close_on_exec(struct files_struct *files)
spin_unlock(>file_lock);
}
-static struct file *__get_file_rcu(struct file __rcu **f)
+static __always_inline struct file *__get_file_rcu(struct file __rcu **f)
{
struct file __rcu *file;
struct file __rcu *file_reloaded;
struct file __rcu *file_reloaded_cmp;
file = rcu_dereference_raw(*f);
- if (!file)
+ if (unlikely(!file))
return NULL;
if (unlikely(!atomic_long_inc_not_zero(>f_count)))
@@ -891,7 +891,7 @@ static struct file *__get_file_rcu(struct file __rcu **f)
* If the pointers don't match the file has been reallocated by
* SLAB_TYPESAFE_BY_RCU.
*/
- if (file == file_reloaded_cmp)
+ if (likely(file == file_reloaded_cmp))
return file_reloaded;
fput(file);
Re: [Intel-gfx] [PATCH v2 2/4] eventfd: simplify eventfd_signal()
On Wed, 2023-11-22 at 13:48 +0100, Christian Brauner wrote:
> Ever since the evenfd type was introduced back in 2007 in commit
> e1ad7468c77d ("signal/timer/event: eventfd core") the
> eventfd_signal()
> function only ever passed 1 as a value for @n. There's no point in
> keeping that additional argument.
>
> Signed-off-by: Christian Brauner
Acked-by: Andrew Donnellan # ocxl
--
Andrew DonnellanOzLabs, ADL Canberra
a...@linux.ibm.com IBM Australia Limited
Re: [Intel-gfx] [PATCH] drm/i915/irq: Improve error logging for unexpected DE Misc interrupts
On Thursday, November 23rd, 2023 at 11:54 PM, Borah, Chaitanya Kumar wrote: > > -Original Message- > > From: Intel-gfx On Behalf Of Rahul > > Rameshbabu > > Sent: Thursday, November 23, 2023 11:27 PM > > To: intel-gfx@lists.freedesktop.org > > Cc: Nikula, Jani ; dri-de...@lists.freedesktop.org; > > Rahul Rameshbabu > > Subject: [Intel-gfx] [PATCH] drm/i915/irq: Improve error logging for > > unexpected DE Misc interrupts > > > > Dump the iir value in hex when the interrupt is unexpected. > > > > Link: https://gitlab.freedesktop.org/drm/intel/-/issues/9652#note_2178501 > > Cc: Jani Nikula > > Signed-off-by: Rahul Rameshbabu > > --- > > drivers/gpu/drm/i915/display/intel_display_irq.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c > > b/drivers/gpu/drm/i915/display/intel_display_irq.c > > index bff4a76310c0..1a5a9e0fc01e 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display_irq.c > > +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c > > @@ -896,7 +896,7 @@ gen8_de_misc_irq_handler(struct drm_i915_private > > *dev_priv, u32 iir) > > } > > > > if (!found) > > - drm_err(_priv->drm, "Unexpected DE Misc > > interrupt\n"); > > + drm_err(_priv->drm, "Unexpected DE Misc interrupt: > > %#x\n", iir); > > > Nit: It could use a format specifier like "0x%08x" (like other instances in > the file) to maintain uniform width. Agreed. I made this change initially for debugging without actually checking the practices used in the file. Will send a v2 with this change and your Reviewed-by tag soon. Away from my development machine right now. > Other than that. LGTM. > > Reviewed-by: Chaitanya Kumar Borah -- Thanks, Rahul Rameshbabu
Re: [Intel-gfx] [char-misc-next 3/4] mei: pxp: re-enable client on errors
On Mon, Nov 27, 2023 at 03:22:29PM +0200, Ville Syrjälä wrote: > On Wed, Nov 15, 2023 at 10:35:16PM +0200, Ville Syrjälä wrote: > > On Tue, Nov 14, 2023 at 06:40:26PM +, Winkler, Tomas wrote: > > > > > > > > > > -Original Message- > > > > From: Teres Alexis, Alan Previn > > > > Sent: Tuesday, November 14, 2023 5:32 PM > > > > To: ville.syrj...@linux.intel.com; Winkler, Tomas > > > > > > > > Cc: gre...@linuxfoundation.org; Usyskin, Alexander > > > > ; linux-ker...@vger.kernel.org; intel- > > > > g...@lists.freedesktop.org; Lubart, Vitaly > > > > Subject: Re: [char-misc-next 3/4] mei: pxp: re-enable client on errors > > > > > > > > On Tue, 2023-11-14 at 16:00 +0200, Ville Syrjälä wrote: > > > > > On Wed, Oct 11, 2023 at 02:01:56PM +0300, Tomas Winkler wrote: > > > > > > From: Alexander Usyskin > > > > > > > > > > > > Disable and enable mei-pxp client on errors to clean the internal > > > > > > state. > > > > > > > > > > This broke i915 on my Alderlake-P laptop. > > > > > > This fix was already posted, just missed the merging window > > > https://lkml.org/lkml/2023/10/31/636 > > > > Gave this a spin and it fixes the issue for me. Thanks. > > > > > > > > Greg can you please take this fix into v6.7-rc2 run, or I can repost it > > > with the correct subject. > > We're at -rc3 already and this fix is still not in! Ah, good point, I'll take it now, sorry, catching up on things...
Re: [Intel-gfx] [char-misc-next 3/4] mei: pxp: re-enable client on errors
On Wed, Nov 15, 2023 at 10:35:16PM +0200, Ville Syrjälä wrote: > On Tue, Nov 14, 2023 at 06:40:26PM +, Winkler, Tomas wrote: > > > > > > > -Original Message- > > > From: Teres Alexis, Alan Previn > > > Sent: Tuesday, November 14, 2023 5:32 PM > > > To: ville.syrj...@linux.intel.com; Winkler, Tomas > > > > > > Cc: gre...@linuxfoundation.org; Usyskin, Alexander > > > ; linux-ker...@vger.kernel.org; intel- > > > g...@lists.freedesktop.org; Lubart, Vitaly > > > Subject: Re: [char-misc-next 3/4] mei: pxp: re-enable client on errors > > > > > > On Tue, 2023-11-14 at 16:00 +0200, Ville Syrjälä wrote: > > > > On Wed, Oct 11, 2023 at 02:01:56PM +0300, Tomas Winkler wrote: > > > > > From: Alexander Usyskin > > > > > > > > > > Disable and enable mei-pxp client on errors to clean the internal > > > > > state. > > > > > > > > This broke i915 on my Alderlake-P laptop. > > > > This fix was already posted, just missed the merging window > > https://lkml.org/lkml/2023/10/31/636 > > Gave this a spin and it fixes the issue for me. Thanks. > > > > > Greg can you please take this fix into v6.7-rc2 run, or I can repost it > > with the correct subject. We're at -rc3 already and this fix is still not in! > > Thanks > > Tomas > > > > > > > > > > > > > > > > > Hi Alex, i just relooked at the series that got merged, and i noticed > > > that in patch > > > #3 of the series, you had changed mei_pxp_send_message to return bytes > > > sent > > > instead of zero on success. IIRC, we had agreed to not effect the > > > behavior of > > > this component interface (other than adding the timeout) - this was the > > > intention of Patch #4 that i was pushing for in order to spec the > > > interface > > > (which continues to say zero on success). We should fix this to stay with > > > the > > > original behavior - where mei-pxp should NOT send partial packets and will > > > only return zero in success case where success is sending of the complete > > > packets - so we don't need to get back the "bytes sent" > > > from mei_pxp_send_message. So i think this might be causing the problem. > > > > > > > > > Side note to Ville:, are you enabling PXP kernel config by default in > > > all MESA > > > contexts? I recall that MESA folks were running some CI testing with > > > enable > > > pxp contexts, but didn't realize this is being enabled by default in all > > > contexts. > > > Please be aware that enabling pxp-contexts would temporarily disabled > > > runtime-pm during that contexts lifetime. > > > Also pxp contexts will be forced to be irrecoverable if it ever hangs. > > > The former is a hardware architecture requirement but doesn't do anything > > > if > > > you're enabling display (which I beleive also blocks in ADL). The latter > > > was a > > > requirement to comply with Vulkan. > > > > > > ...alan > > > > > > > -- > Ville Syrjälä > Intel -- Ville Syrjälä Intel
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/irq: Improve error logging for unexpected DE Misc interrupts (rev2)
== Series Details ==
Series: drm/i915/irq: Improve error logging for unexpected DE Misc interrupts
(rev2)
URL : https://patchwork.freedesktop.org/series/126843/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13926 -> Patchwork_126843v2
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/index.html
Participating hosts (36 -> 36)
--
Additional (2): bat-dg2-9 bat-dg1-5
Missing(2): bat-mtlp-8 fi-snb-2520m
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_126843v2:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_psr@psr_sprite_plane_onoff}:
- bat-dg2-9: NOTRUN -> [SKIP][1] +3 other tests skip
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-dg2-9/igt@kms_psr@psr_sprite_plane_onoff.html
Known issues
Here are the changes found in Patchwork_126843v2 that come from known issues:
### CI changes ###
Possible fixes
* boot:
- bat-adlp-11:[FAIL][2] ([i915#8293]) -> [PASS][3]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13926/bat-adlp-11/boot.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-adlp-11/boot.html
- bat-jsl-1: [FAIL][4] ([i915#8293]) -> [PASS][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13926/bat-jsl-1/boot.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-jsl-1/boot.html
### IGT changes ###
Issues hit
* igt@core_auth@basic-auth:
- fi-bsw-nick:[PASS][6] -> [DMESG-WARN][7] ([i915#1982])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13926/fi-bsw-nick/igt@core_a...@basic-auth.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/fi-bsw-nick/igt@core_a...@basic-auth.html
* igt@debugfs_test@basic-hwmon:
- bat-jsl-1: NOTRUN -> [SKIP][8] ([i915#9318])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html
- bat-adlp-11:NOTRUN -> [SKIP][9] ([i915#9318])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-adlp-11/igt@debugfs_t...@basic-hwmon.html
* igt@gem_huc_copy@huc-copy:
- bat-jsl-1: NOTRUN -> [SKIP][10] ([i915#2190])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-jsl-1/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-jsl-1: NOTRUN -> [SKIP][11] ([i915#4613]) +3 other tests skip
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-jsl-1/igt@gem_lmem_swapp...@parallel-random-engines.html
* igt@gem_mmap@basic:
- bat-dg1-5: NOTRUN -> [SKIP][12] ([i915#4083])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-dg1-5/igt@gem_m...@basic.html
- bat-dg2-9: NOTRUN -> [SKIP][13] ([i915#4083])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-dg2-9/igt@gem_m...@basic.html
* igt@gem_mmap_gtt@basic:
- bat-dg2-9: NOTRUN -> [SKIP][14] ([i915#4077]) +2 other tests skip
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-dg2-9/igt@gem_mmap_...@basic.html
* igt@gem_tiled_blits@basic:
- bat-dg1-5: NOTRUN -> [SKIP][15] ([i915#4077]) +2 other tests skip
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-dg1-5/igt@gem_tiled_bl...@basic.html
* igt@gem_tiled_pread_basic:
- bat-dg1-5: NOTRUN -> [SKIP][16] ([i915#4079]) +1 other test skip
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-dg1-5/igt@gem_tiled_pread_basic.html
- bat-dg2-9: NOTRUN -> [SKIP][17] ([i915#4079]) +1 other test skip
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-dg2-9/igt@gem_tiled_pread_basic.html
- bat-adlp-11:NOTRUN -> [SKIP][18] ([i915#3282])
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-adlp-11/igt@gem_tiled_pread_basic.html
* igt@i915_pm_rps@basic-api:
- bat-dg1-5: NOTRUN -> [SKIP][19] ([i915#6621])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-dg1-5/igt@i915_pm_...@basic-api.html
- bat-dg2-9: NOTRUN -> [SKIP][20] ([i915#6621])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-dg2-9/igt@i915_pm_...@basic-api.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-dg2-9: NOTRUN -> [SKIP][21] ([i915#5190])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126843v2/bat-dg2-9/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html
*
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/irq: Improve error logging for unexpected DE Misc interrupts (rev2)
== Series Details == Series: drm/i915/irq: Improve error logging for unexpected DE Misc interrupts (rev2) URL : https://patchwork.freedesktop.org/series/126843/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2
Re: [Intel-gfx] [PATCH 3/4] drm/i915/dp_mst: Use helpers to get dsc min/max input bpc
On 11/27/2023 3:07 PM, Jani Nikula wrote:
On Mon, 27 Nov 2023, Ankit Nautiyal wrote:
Use helpers for source min/max input bpc with DSC.
While at it, make them return int instead of u8.
v2: Make the helpers return int instead of u8. (Jani)
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_dp.c | 6 ++
drivers/gpu/drm/i915/display/intel_dp.h | 2 ++
drivers/gpu/drm/i915/display/intel_dp_mst.c | 11 ---
3 files changed, 8 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 1f68d4819282..74000b65829e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1622,8 +1622,7 @@ intel_dp_compute_link_config_wide(struct intel_dp
*intel_dp,
return -EINVAL;
}
-static
-u8 intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915)
+int intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915)
{
if (!HAS_DSC(i915))
return 0;
@@ -2022,8 +2021,7 @@ static int dsc_compute_compressed_bpp(struct intel_dp
*intel_dp,
dsc_max_bpp, dsc_min_bpp, pipe_bpp,
timeslots);
}
-static
-u8 intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915)
+int intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915)
{
/* Min DSC Input BPC for ICL+ is 8 */
return HAS_DSC(i915) ? 8 : 0;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
b/drivers/gpu/drm/i915/display/intel_dp.h
index 05db46b111f2..f613ced9eda6 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -184,5 +184,7 @@ intel_dp_compute_config_link_bpp_limits(struct intel_dp
*intel_dp,
struct link_config_limits *limits);
void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector *connector);
+int intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915);
+int intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915);
#endif /* __INTEL_DP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 63364c9602ef..01e9d6fb9548 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -293,17 +293,14 @@ static int intel_dp_dsc_mst_compute_link_config(struct
intel_encoder *encoder,
int i, num_bpc;
u8 dsc_bpc[3] = {};
int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp;
- u8 dsc_max_bpc;
+ u8 dsc_max_bpc, dsc_min_bpc;
int min_compressed_bpp, max_compressed_bpp;
- /* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */
- if (DISPLAY_VER(i915) >= 12)
- dsc_max_bpc = min_t(u8, 12, conn_state->max_requested_bpc);
- else
- dsc_max_bpc = min_t(u8, 10, conn_state->max_requested_bpc);
+ dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(i915);
+ dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(i915);
max_bpp = min_t(u8, dsc_max_bpc * 3, limits->pipe.max_bpp);
- min_bpp = limits->pipe.min_bpp;
+ min_bpp = max_t(u8, dsc_min_bpc * 3, limits->pipe.min_bpp);
I thought it would be obvious you'd also need to change these to ints
and drop the forced u8 etc.
Ah ok. But still in some places we need to force to u8 when comparing
with conn_state->max_requested_bpc,which is u8.
Regards,
Ankit
BR,
Jani.
num_bpc = drm_dp_dsc_sink_supported_input_bpcs(connector->dp.dsc_dpcd,
dsc_bpc);
Re: [Intel-gfx] [PATCH 3/3] drm/i915/display/:Compute and enable daptive Sync SDP
Typo in the Subject: s/daptive/adaptive/
On 11/23/2023 7:32 PM, Mitul Golani wrote:
Add necessary functions and register definitions to enable
and compute AS SDP data. The new `intel_dp_compute_as_sdp`
function computes AS SDP values based on the display
configuration, ensuring proper handling of Variable Refresh
Rate (VRR).
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_dp.c | 21 +
drivers/gpu/drm/i915/display/intel_hdmi.c | 11 +--
drivers/gpu/drm/i915/i915_reg.h | 6 ++
3 files changed, 36 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 39624746d612..b3eb2d342a99 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2629,6 +2629,26 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp
*intel_dp,
_state->infoframes.vsc);
}
+static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp,
+ struct intel_crtc_state *crtc_state,
+const struct drm_connector_state
*conn_state)
+{
+ struct drm_dp_as_sdp *async = _state->infoframes.async;
+ struct intel_connector *connector = intel_dp->attached_connector;
+ int vrefresh = drm_mode_vrefresh(_state->hw.adjusted_mode);
+
+ if (intel_vrr_is_in_range(connector, vrefresh))
+ return;
+
+ crtc_state->infoframes.enable |=
intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC);
To make this work, need to add DP_SDP_ADAPTIVE_SYNC to
infoframe_type_to_idx().
+ async->sdp_type = DP_SDP_ADAPTIVE_SYNC;
+ async->length = 0x9;
+ async->vmin = crtc_state->vrr.vmin;
+ async->vmax = crtc_state->vrr.vmax;
+ async->target_rr = 0;
+ async->operation_mode = 0x0;
+}
+
void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state,
@@ -2965,6 +2985,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
intel_psr_compute_config(intel_dp, pipe_config, conn_state);
intel_dp_drrs_compute_config(connector, pipe_config, link_bpp_x16);
intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
+ intel_dp_compute_as_sdp(intel_dp, pipe_config, conn_state);
IMHO, This compute part and read and write calls to
intel_read/write_dp_sdp should be in separate patch
intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config,
conn_state);
return 0;
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index ab18cfc19c0a..abea359985ce 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -136,6 +136,8 @@ static u32 hsw_infoframe_enable(unsigned int type)
return VIDEO_DIP_ENABLE_GMP_HSW;
case DP_SDP_VSC:
return VIDEO_DIP_ENABLE_VSC_HSW;
+ case DP_SDP_ADAPTIVE_SYNC:
+ return VIDEO_DIP_ENABLE_AS_HSW;
case DP_SDP_PPS:
return VDIP_ENABLE_PPS;
case HDMI_INFOFRAME_TYPE_AVI:
@@ -163,6 +165,8 @@ hsw_dip_data_reg(struct drm_i915_private *dev_priv,
return HSW_TVIDEO_DIP_GMP_DATA(cpu_transcoder, i);
case DP_SDP_VSC:
return HSW_TVIDEO_DIP_VSC_DATA(cpu_transcoder, i);
+ case DP_SDP_ADAPTIVE_SYNC:
+ return HSW_TVIDEO_DIP_ASYNC_DATA(cpu_transcoder, i);
case DP_SDP_PPS:
return ICL_VIDEO_DIP_PPS_DATA(cpu_transcoder, i);
case HDMI_INFOFRAME_TYPE_AVI:
@@ -185,6 +189,8 @@ static int hsw_dip_data_size(struct drm_i915_private
*dev_priv,
switch (type) {
case DP_SDP_VSC:
return VIDEO_DIP_VSC_DATA_SIZE;
+ case DP_SDP_ADAPTIVE_SYNC:
+ return VIDEO_DIP_ASYNC_DATA_SIZE;
case DP_SDP_PPS:
return VIDEO_DIP_PPS_DATA_SIZE;
case HDMI_PACKET_TYPE_GAMUT_METADATA:
@@ -555,7 +561,8 @@ static u32 hsw_infoframes_enabled(struct intel_encoder
*encoder,
mask = (VIDEO_DIP_ENABLE_VSC_HSW | VIDEO_DIP_ENABLE_AVI_HSW |
VIDEO_DIP_ENABLE_GCP_HSW | VIDEO_DIP_ENABLE_VS_HSW |
- VIDEO_DIP_ENABLE_GMP_HSW | VIDEO_DIP_ENABLE_SPD_HSW);
+ VIDEO_DIP_ENABLE_GMP_HSW | VIDEO_DIP_ENABLE_SPD_HSW |
+ VIDEO_DIP_ENABLE_AS_HSW);
if (DISPLAY_VER(dev_priv) >= 10)
mask |= VIDEO_DIP_ENABLE_DRM_GLK;
@@ -1209,7 +1216,7 @@ static void hsw_set_infoframes(struct intel_encoder
*encoder,
val &= ~(VIDEO_DIP_ENABLE_VSC_HSW | VIDEO_DIP_ENABLE_AVI_HSW |
VIDEO_DIP_ENABLE_GCP_HSW | VIDEO_DIP_ENABLE_VS_HSW |
VIDEO_DIP_ENABLE_GMP_HSW | VIDEO_DIP_ENABLE_SPD_HSW |
-
Re: [Intel-gfx] [PATCH 2/3] drm/i915/display/: Add Read/Write support for Adaptive Sync SDP
On 11/23/2023 7:32 PM, Mitul Golani wrote:
Add the necessary structures and functions to handle reading and
unpacking Adaptive Sync Secondary Data Packets. Also add support
to write and pack AS SDP.
Signed-off-by: Mitul Golani
---
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 118 +-
2 files changed, 114 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 9a44350ba05d..7d87923f63af 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1325,6 +1325,7 @@ struct intel_crtc_state {
union hdmi_infoframe hdmi;
union hdmi_infoframe drm;
struct drm_dp_vsc_sdp vsc;
+ struct drm_dp_as_sdp async;
} infoframes;
u8 eld[MAX_ELD_BYTES];
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 1422c2370269..39624746d612 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -94,6 +94,8 @@
#define INTEL_DP_RESOLUTION_STANDARD (2 << INTEL_DP_RESOLUTION_SHIFT_MASK)
#define INTEL_DP_RESOLUTION_FAILSAFE (3 << INTEL_DP_RESOLUTION_SHIFT_MASK)
+#define AS_SDP_ENABLE REG_BIT(2)
+#define AS_SDP_OP_MODE REG_GENMASK(1, 0)
/* Constants for DP DSC configurations */
static const u8 valid_dsc_bpp[] = {6, 8, 10, 12, 15};
@@ -4113,6 +4115,42 @@ intel_dp_needs_vsc_sdp(const struct intel_crtc_state
*crtc_state,
return false;
}
+static ssize_t intel_dp_as_sdp_pack(const struct drm_dp_as_sdp *async,
+ struct dp_sdp *sdp, size_t size)
+{
+ size_t length = sizeof(struct dp_sdp);
+
+ if (size < length)
+ return -ENOSPC;
+
+ memset(sdp, 0, size);
+
+ /* Prepare AS (Adaptive Sync) VSC Header */
+ sdp->sdp_header.HB0 = 0;
+ sdp->sdp_header.HB1 = async->sdp_type;
+ sdp->sdp_header.HB2 = 0x02;
+ sdp->sdp_header.HB3 = async->length;
+
+ /* Fill AS (Adaptive Sync) SDP Payload */
+ if ((sdp->db[0] & 0x03) == 0) {
+ sdp->db[3] = 0;
+ sdp->db[4] &= 0xFC;
+ }
+
+ sdp->db[1] = async->vmin & 0xFF;
+ sdp->db[2] = (async->vmin >> 8) & 0xF;
+ sdp->db[17] = (async->vmin >> 8) & 0xFF;
+ sdp->db[18] = async->vmax & 0xFF;
+ sdp->db[19] = (async->vmax >> 8) & 0xFF;
+ sdp->db[20] = async->target_rr & 0xFF;
+ sdp->db[21] = (async->target_rr >> 8) & 0xFF;
+ sdp->db[22] = async->duration_incr_ms;
+ sdp->db[23] = async->duration_decr_ms;
+ sdp->db[24] = async->operation_mode;
This doesnt look correct, DB9-31 are supposed to be 0, am I missing
something? Can you re-check this?
+
+ return length;
+}
+
static ssize_t intel_dp_vsc_sdp_pack(const struct drm_dp_vsc_sdp *vsc,
struct dp_sdp *sdp, size_t size)
{
@@ -4280,6 +4318,10 @@ static void intel_write_dp_sdp(struct intel_encoder
*encoder,
_state->infoframes.drm.drm,
,
sizeof(sdp));
break;
+ case DP_SDP_ADAPTIVE_SYNC:
+ len = intel_dp_as_sdp_pack(_state->infoframes.async, ,
+ sizeof(sdp));
+ break;
The function intel_write_dp_sdp with type DP_SDP_ADAPTIVE_SYNC needs to
be called from intel_dp_set_infoframes.
I see this is missing, perhaps to be added as last patch.
default:
MISSING_CASE(type);
return;
@@ -4342,6 +4384,44 @@ void intel_dp_set_infoframes(struct intel_encoder
*encoder,
intel_write_dp_sdp(encoder, crtc_state,
HDMI_PACKET_TYPE_GAMUT_METADATA);
}
+/*
+ * This function is to unpack AS SDP Packet
+ */
+static
+int intel_dp_as_sdp_unpack(struct drm_dp_as_sdp *async,
+ const void *buffer, size_t size)
+{
+ const struct dp_sdp *sdp = buffer;
+
+ if (size < sizeof(struct dp_sdp))
+ return -EINVAL;
+
+ memset(async, 0, sizeof(*async));
+
+ if (sdp->sdp_header.HB0 != 0)
+ return -EINVAL;
+
+ if (sdp->sdp_header.HB1 != DP_SDP_ADAPTIVE_SYNC)
+ return -EINVAL;
+
+ if (sdp->sdp_header.HB2 != 0x02)
+ return -EINVAL;
+
+ if ((sdp->sdp_header.HB3 & 0x3F) != 9)
+ return -EINVAL;
+
+ if (sdp->db[0] != (AS_SDP_ENABLE | AS_SDP_OP_MODE))
+ return -EINVAL;
+
+ async->vmin = ((u64)sdp->db[2] << 32) | (u64)sdp->db[1];
+ async->vmax = 0;
+ async->target_rr = 0;
+ async->duration_incr_ms = 0;
+ async->duration_decr_ms = 0;
+
+
Re: [Intel-gfx] [linus:master] [file] 0ede61d858: will-it-scale.per_thread_ops -2.9% regression
> So that nobody else would waste any time on this, attached is a new > attempt. This time actually tested *after* the changes. So I've picked up your patch (vfs.misc). It's clever alright so thanks for the comments in there otherwise I would've stared at this for far too long. It's a little unpleasant because of the cast-orama going on before we check the file pointer but I don't see that it's in any way wrong. And given how focussed people are with __fget_* performance I think it might even be the right thing to do. But the cleverness means we have the same logic slightly differently twice. Not too bad ofc but not too nice either especially because that rcu lookup is pretty complicated already. A few days ago I did just write a long explanatory off-list email to someone who had questions about this and who is fairly experienced so we're not making it easy on people. But performance or simplicity; one can't necessarily always have both.
[Intel-gfx] ✗ Fi.CI.IGT: failure for DP DSC min/max src bpc fixes (rev6)
== Series Details ==
Series: DP DSC min/max src bpc fixes (rev6)
URL : https://patchwork.freedesktop.org/series/125571/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13924_full -> Patchwork_125571v6_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_125571v6_full absolutely need
to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_125571v6_full, please notify your bug team
(i915-ci-in...@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (10 -> 9)
--
Missing(1): shard-mtlp0
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_125571v6_full:
### IGT changes ###
Possible regressions
* igt@kms_psr@psr2_primary_blt:
- shard-dg2: NOTRUN -> [SKIP][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/shard-dg2-11/igt@kms_psr@psr2_primary_blt.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_psr@psr_sprite_plane_move}:
- shard-dg2: NOTRUN -> [SKIP][2] +2 other tests skip
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/shard-dg2-11/igt@kms_psr@psr_sprite_plane_move.html
Known issues
Here are the changes found in Patchwork_125571v6_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@api_intel_bb@blit-reloc-purge-cache:
- shard-dg2: NOTRUN -> [SKIP][3] ([i915#8411]) +2 other tests skip
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/shard-dg2-11/igt@api_intel...@blit-reloc-purge-cache.html
* igt@api_intel_bb@object-reloc-keep-cache:
- shard-mtlp: NOTRUN -> [SKIP][4] ([i915#8411])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/shard-mtlp-1/igt@api_intel...@object-reloc-keep-cache.html
* igt@device_reset@cold-reset-bound:
- shard-mtlp: NOTRUN -> [SKIP][5] ([i915#7701])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/shard-mtlp-5/igt@device_re...@cold-reset-bound.html
- shard-dg2: NOTRUN -> [SKIP][6] ([i915#7701])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/shard-dg2-1/igt@device_re...@cold-reset-bound.html
* igt@drm_fdinfo@all-busy-check-all:
- shard-mtlp: NOTRUN -> [SKIP][7] ([i915#8414]) +7 other tests skip
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/shard-mtlp-1/igt@drm_fdi...@all-busy-check-all.html
* igt@drm_fdinfo@busy-idle@bcs0:
- shard-dg2: NOTRUN -> [SKIP][8] ([i915#8414]) +22 other tests skip
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/shard-dg2-10/igt@drm_fdinfo@busy-i...@bcs0.html
* igt@gem_basic@multigpu-create-close:
- shard-dg2: NOTRUN -> [SKIP][9] ([i915#7697])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/shard-dg2-11/igt@gem_ba...@multigpu-create-close.html
* igt@gem_caching@writes:
- shard-mtlp: NOTRUN -> [SKIP][10] ([i915#4873])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/shard-mtlp-5/igt@gem_cach...@writes.html
* igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-lmem0-lmem0:
- shard-dg2: NOTRUN -> [INCOMPLETE][11] ([i915#7297])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/shard-dg2-2/igt@gem_ccs@suspend-res...@tile4-compressed-compfmt0-lmem0-lmem0.html
* igt@gem_ctx_persistence@heartbeat-hang:
- shard-dg2: NOTRUN -> [SKIP][12] ([i915#8555]) +1 other test skip
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/shard-dg2-10/igt@gem_ctx_persiste...@heartbeat-hang.html
* igt@gem_ctx_persistence@heartbeat-hostile:
- shard-mtlp: NOTRUN -> [SKIP][13] ([i915#8555]) +1 other test skip
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/shard-mtlp-2/igt@gem_ctx_persiste...@heartbeat-hostile.html
* igt@gem_ctx_persistence@saturated-hostile-nopreempt@ccs0:
- shard-dg2: NOTRUN -> [SKIP][14] ([i915#5882]) +9 other tests skip
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/shard-dg2-10/igt@gem_ctx_persistence@saturated-hostile-nopree...@ccs0.html
* igt@gem_ctx_sseu@invalid-args:
- shard-mtlp: NOTRUN -> [SKIP][15] ([i915#280])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/shard-mtlp-1/igt@gem_ctx_s...@invalid-args.html
* igt@gem_ctx_sseu@invalid-sseu:
- shard-dg2: NOTRUN -> [SKIP][16] ([i915#280]) +1 other test skip
[16]:
Re: [Intel-gfx] [linus:master] [file] 0ede61d858: will-it-scale.per_thread_ops -2.9% regression
> I took a look at the code generation, and honestly, I think we're > better off just making __fget_files_rcu() have special logic for this > all, and not use __get_file_rcu(). My initial massaging of the patch did that btw. Then I sat there wondering whether it would matter if we just made it possible to reuse that code and I went through a bunch of iterations. Oh well, it seems to matter. > Comments? I also looked at that odd OPTIMIZER_HIDE_VAR() that Concept looks sane to me. > __get_file_rcu() does, and I don't get it. Both things come from > volatile accesses, I don't see the point of those games, but I also > didn't care, since it's no longer in a critical code path. > > Christian? Puts his completely imagined "I understand RCU head on". SLAB_TYPESAFE_BY_RCU makes the RCU consume memory ordering that the compiler doesn't officialy support (afaik) a bit wonky. So the thinking was that we could have code patterns where you could free the object and reallocate it while legitimatly passing the pointer recheck. In that case there is no memory ordering between the allocation and the pointer recheck because the last (re)allocation could have been after the rcu_dereference(). To combat that all future loads were made to have a dependency on the first load using the hidevar trick. I guess that might only be theoretically possible but not in practice? But then I liked that we explicitly commented on it as a reminder.
[Intel-gfx] [PATCH v2] drm/i915/irq: Improve error logging for unexpected DE Misc interrupts
Dump the iir value in hex when the interrupt is unexpected. Link: https://gitlab.freedesktop.org/drm/intel/-/issues/9652#note_2178501 Cc: Jani Nikula Signed-off-by: Rahul Rameshbabu Reviewed-by: Chaitanya Kumar Borah --- Notes: Changes: v1->v2: - Change format specifier to pad minimum width - https://lore.kernel.org/intel-gfx/20231123175638.27650-1-sergeantsag...@protonmail.com/ drivers/gpu/drm/i915/display/intel_display_irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c index bff4a76310c0..7c6f20cd951e 100644 --- a/drivers/gpu/drm/i915/display/intel_display_irq.c +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c @@ -896,7 +896,7 @@ gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir) } if (!found) - drm_err(_priv->drm, "Unexpected DE Misc interrupt\n"); + drm_err(_priv->drm, "Unexpected DE Misc interrupt: 0x%08x\n", iir); } static void gen11_dsi_te_interrupt_handler(struct drm_i915_private *dev_priv, -- 2.40.1
Re: [Intel-gfx] [PATCH 3/4] drm/i915/dp_mst: Use helpers to get dsc min/max input bpc
On Mon, 27 Nov 2023, Ankit Nautiyal wrote:
> Use helpers for source min/max input bpc with DSC.
> While at it, make them return int instead of u8.
>
> v2: Make the helpers return int instead of u8. (Jani)
>
> Signed-off-by: Ankit Nautiyal
> Reviewed-by: Suraj Kandpal
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 6 ++
> drivers/gpu/drm/i915/display/intel_dp.h | 2 ++
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 11 ---
> 3 files changed, 8 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 1f68d4819282..74000b65829e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1622,8 +1622,7 @@ intel_dp_compute_link_config_wide(struct intel_dp
> *intel_dp,
> return -EINVAL;
> }
>
> -static
> -u8 intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915)
> +int intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915)
> {
> if (!HAS_DSC(i915))
> return 0;
> @@ -2022,8 +2021,7 @@ static int dsc_compute_compressed_bpp(struct intel_dp
> *intel_dp,
> dsc_max_bpp, dsc_min_bpp, pipe_bpp,
> timeslots);
> }
>
> -static
> -u8 intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915)
> +int intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915)
> {
> /* Min DSC Input BPC for ICL+ is 8 */
> return HAS_DSC(i915) ? 8 : 0;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index 05db46b111f2..f613ced9eda6 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -184,5 +184,7 @@ intel_dp_compute_config_link_bpp_limits(struct intel_dp
> *intel_dp,
> struct link_config_limits *limits);
>
> void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector
> *connector);
> +int intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915);
> +int intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915);
>
> #endif /* __INTEL_DP_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 63364c9602ef..01e9d6fb9548 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -293,17 +293,14 @@ static int intel_dp_dsc_mst_compute_link_config(struct
> intel_encoder *encoder,
> int i, num_bpc;
> u8 dsc_bpc[3] = {};
> int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp;
> - u8 dsc_max_bpc;
> + u8 dsc_max_bpc, dsc_min_bpc;
> int min_compressed_bpp, max_compressed_bpp;
>
> - /* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */
> - if (DISPLAY_VER(i915) >= 12)
> - dsc_max_bpc = min_t(u8, 12, conn_state->max_requested_bpc);
> - else
> - dsc_max_bpc = min_t(u8, 10, conn_state->max_requested_bpc);
> + dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(i915);
> + dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(i915);
>
> max_bpp = min_t(u8, dsc_max_bpc * 3, limits->pipe.max_bpp);
> - min_bpp = limits->pipe.min_bpp;
> + min_bpp = max_t(u8, dsc_min_bpc * 3, limits->pipe.min_bpp);
I thought it would be obvious you'd also need to change these to ints
and drop the forced u8 etc.
BR,
Jani.
>
> num_bpc = drm_dp_dsc_sink_supported_input_bpcs(connector->dp.dsc_dpcd,
> dsc_bpc);
--
Jani Nikula, Intel
[Intel-gfx] ✓ Fi.CI.BAT: success for DP DSC min/max src bpc fixes (rev6)
== Series Details ==
Series: DP DSC min/max src bpc fixes (rev6)
URL : https://patchwork.freedesktop.org/series/125571/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13924 -> Patchwork_125571v6
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/index.html
Participating hosts (33 -> 36)
--
Additional (7): bat-kbl-2 bat-adlp-11 bat-dg1-5 bat-dg2-8 bat-adlm-1
bat-rpls-1 bat-mtlp-8
Missing(4): bat-dg2-14 fi-bsw-n3050 fi-snb-2520m fi-pnv-d510
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_125571v6:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_psr@psr_cursor_plane_move}:
- bat-dg2-8: NOTRUN -> [SKIP][1] +3 other tests skip
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-dg2-8/igt@kms_psr@psr_cursor_plane_move.html
* {igt@kms_psr@psr_primary_mmap_gtt}:
- bat-rpls-1: NOTRUN -> [SKIP][2] +3 other tests skip
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-rpls-1/igt@kms_psr@psr_primary_mmap_gtt.html
- bat-dg1-5: NOTRUN -> [SKIP][3] +3 other tests skip
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-dg1-5/igt@kms_psr@psr_primary_mmap_gtt.html
- bat-adlm-1: NOTRUN -> [SKIP][4] +3 other tests skip
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-adlm-1/igt@kms_psr@psr_primary_mmap_gtt.html
Known issues
Here are the changes found in Patchwork_125571v6 that come from known issues:
### CI changes ###
Issues hit
* boot:
- bat-jsl-1: [PASS][5] -> [FAIL][6] ([i915#8293])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13924/bat-jsl-1/boot.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-jsl-1/boot.html
### IGT changes ###
Issues hit
* igt@debugfs_test@basic-hwmon:
- bat-mtlp-8: NOTRUN -> [SKIP][7] ([i915#9318])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html
- bat-adlp-11:NOTRUN -> [SKIP][8] ([i915#9318])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-adlp-11/igt@debugfs_t...@basic-hwmon.html
- bat-adlm-1: NOTRUN -> [SKIP][9] ([i915#3826])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-adlm-1/igt@debugfs_t...@basic-hwmon.html
- bat-rpls-1: NOTRUN -> [SKIP][10] ([i915#9318])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-rpls-1/igt@debugfs_t...@basic-hwmon.html
* igt@fbdev@eof:
- bat-adlm-1: NOTRUN -> [SKIP][11] ([i915#2582]) +3 other tests skip
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-adlm-1/igt@fb...@eof.html
* igt@fbdev@info:
- bat-rpls-1: NOTRUN -> [SKIP][12] ([i915#1849] / [i915#2582])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-rpls-1/igt@fb...@info.html
- bat-kbl-2: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#1849])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-kbl-2/igt@fb...@info.html
- bat-adlm-1: NOTRUN -> [SKIP][14] ([i915#1849] / [i915#2582])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-adlm-1/igt@fb...@info.html
* igt@fbdev@write:
- bat-rpls-1: NOTRUN -> [SKIP][15] ([i915#2582]) +3 other tests skip
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-rpls-1/igt@fb...@write.html
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-kbl-2: NOTRUN -> [SKIP][16] ([fdo#109271]) +20 other tests
skip
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html
- bat-adlm-1: NOTRUN -> [SKIP][17] ([i915#4613]) +3 other tests skip
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-adlm-1/igt@gem_lmem_swapp...@parallel-random-engines.html
* igt@gem_lmem_swapping@random-engines:
- bat-rpls-1: NOTRUN -> [SKIP][18] ([i915#4613]) +3 other tests skip
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-rpls-1/igt@gem_lmem_swapp...@random-engines.html
* igt@gem_lmem_swapping@verify-random:
- bat-mtlp-8: NOTRUN -> [SKIP][19] ([i915#4613]) +3 other tests skip
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125571v6/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html
* igt@gem_mmap@basic:
- bat-dg1-5: NOTRUN -> [SKIP][20] ([i915#4083])
[20]:
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for DP DSC min/max src bpc fixes (rev6)
== Series Details == Series: DP DSC min/max src bpc fixes (rev6) URL : https://patchwork.freedesktop.org/series/125571/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2
