> -Original Message-
> From: dri-devel On Behalf Of Pekka
> Paalanen
> Sent: Friday, March 8, 2024 2:18 PM
> To: Garg, Nemesa
> Cc: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
> Subject: Re: [PATCH 1/5] drm: Introduce sharpness mode property
>
> On Thu, 7 Mar
Multiplying XE_PAGE_SIZE with another u32 and the product stored in
u64 can potentially lead to overflow. Change one of the value to u64 so
as to perform 64 bit arithmetic operation as the product is u64.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 10 +-
1
On Mon, Mar 11, 2024 at 06:13:29PM -0300, Gustavo Sousa wrote:
> Quoting Lisovskiy, Stanislav (2024-03-11 18:01:04-03:00)
> >On Mon, Mar 04, 2024 at 03:30:25PM -0300, Gustavo Sousa wrote:
> >> Commit 394b4b7df9f7 ("drm/i915/lnl: Add CDCLK table") and commit
> >> 3d3696c0fed1 ("drm/i915/lnl: Start
This KMS property is not implementing any formula and the values that are
being used are based on empirical analysis and certain experiments done on the
hardware. These values are fixed and is not expected to change and this can
change from vendor to vendor.
The client can choose any
On 11/03/2024 19:22, Rodrigo Vivi wrote:
xe_pm_init is the very last thing during the xe_pci_probe(),
hence these protections are useless from the point of view
of ensuring that the device is awake.
Let's remove it so we continue towards the goal of killing
xe_device_mem_access.
v2: Adding
On 11/03/2024 19:27, Lucas De Marchi wrote:
On Mon, Mar 11, 2024 at 05:43:00PM +, Tvrtko Ursulin wrote:
On 06/03/2024 19:36, Lucas De Marchi wrote:
Remove platforms that never had their PCI IDs added to the driver and
are of course marked with requiring force_probe. Note that most of
== Series Details ==
Series: drm/xe/display: fix potential overflow when multiplying 2 u32
URL : https://patchwork.freedesktop.org/series/131014/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14420 -> Patchwork_131014v1
On Tue, 12 Mar 2024, Imre Deak wrote:
> On Mon, Mar 11, 2024 at 11:10:55PM +, Chris Bainbridge wrote:
>> Fix a regression when using nouveau and unplugging a StarTech MSTDP122DP
>> DisplaypPort 1.2 MST hub (the same regression does not appear when using
>> a Cable Matters DisplayPort 1.4 MST
== Series Details ==
Series: drm/i915/selftests: Pick correct caching mode.
URL : https://patchwork.freedesktop.org/series/131019/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14420 -> Patchwork_131019v1
Summary
---
On Mon, Mar 11, 2024 at 11:10:55PM +, Chris Bainbridge wrote:
> Fix a regression when using nouveau and unplugging a StarTech MSTDP122DP
> DisplaypPort 1.2 MST hub (the same regression does not appear when using
> a Cable Matters DisplayPort 1.4 MST hub). Trace:
>
> divide error: [#1]
-Original Message-
From: Das, Nirmoy
Sent: Tuesday, March 12, 2024 4:18 AM
To: intel-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org; Das, Nirmoy ; Andi
Shyti ; Janusz Krzysztofik
; Cavitt, Jonathan
Subject: [PATCH] drm/i915/selftests: Pick correct caching mode.
>
>
== Series Details ==
Series: Fix divide-by-zero regression on DP MST unplug with nouveau
URL : https://patchwork.freedesktop.org/series/131002/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14420_full -> Patchwork_131002v1_full
bt_present(i915);
|^~
|intel_opregion_asle_present
cc1: all warnings being treated as errors
Seen on next-20240312.
>
> Suggested-by: Jani Nikula
> Signed-off-by: Radhakrishna Sripada
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 3 +--
&
The opregion code needs stubs for ACPI=n. Add the missing stub for
intel_opregion_vbt_present().
Reported-by: Thomas Weißschuh
Closes:
https://lore.kernel.org/r/20240312120240-afdb1b83-8517-434b-be79-06f41bafd...@linutronix.de
Fixes: 9d9bb71f3e11 ("drm/i915: Extract opregion vbt presence
== Series Details ==
Series: drm/xe/display: fix potential overflow when multiplying 2 u32
URL : https://patchwork.freedesktop.org/series/131014/
State : warning
== Summary ==
Error: dim checkpatch failed
6fef8a077711 drm/xe/display: fix potential overflow when multiplying 2 u32
-:31:
licit-function-declaration]
> 3425 | return intel_opregion_vbt_present(i915);
> |^~
> |intel_opregion_asle_present
> cc1: all warnings being treated as errors
>
> Seen on next-20240312.
Thanks for t
On Tue, Mar 12, 2024 at 09:54:41AM +, Tvrtko Ursulin wrote:
On 11/03/2024 19:27, Lucas De Marchi wrote:
On Mon, Mar 11, 2024 at 05:43:00PM +, Tvrtko Ursulin wrote:
On 06/03/2024 19:36, Lucas De Marchi wrote:
Remove platforms that never had their PCI IDs added to the driver and
are
On Fri, 2024-03-08 at 16:56 +0200, Ville Syrjälä wrote:
> On Fri, Mar 08, 2024 at 04:39:55PM +0200, Ville Syrjälä wrote:
> > On Fri, Mar 08, 2024 at 01:00:38PM +0200, Jouni Högander wrote:
> > > IO buffer wake time used for IO wake calculation is dependent on
> > > port clock
> > > on LunarLake
Caching mode is HW dependent so pick a correct one using
intel_gt_coherent_map_type().
Cc: Andi Shyti
Cc: Janusz Krzysztofik
Cc: Jonathan Cavitt
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10249
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c
On 3/12/2024 3:28 PM, Andi Shyti wrote:
Hi Nirmoy,
On Tue, Mar 12, 2024 at 12:18:15PM +0100, Nirmoy Das wrote:
Caching mode is HW dependent so pick a correct one using
intel_gt_coherent_map_type().
Cc: Andi Shyti
Cc: Janusz Krzysztofik
Cc: Jonathan Cavitt
Closes:
We cannot write requests to objects without struct pages, so escape
early if the requests are bound to objects that lack them.
Signed-off-by: Jonathan Cavitt
---
v2: s/vma-obj/vma->obj
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 7 +++
1 file changed, 7 insertions(+)
diff --git
On Tue, Mar 12, 2024 at 09:03:03AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/dp: Fix DSC state HW readout for SST connectors
> URL : https://patchwork.freedesktop.org/series/130986/
> State : failure
Thanks for the review, pushed to drm-intel-next with the Closes:
On Tue, 12 Mar 2024 08:30:34 +
"Garg, Nemesa" wrote:
> This KMS property is not implementing any formula
Sure it is. Maybe Intel just does not want to tell what the algorithm
is, or maybe it's even patented.
> and the values
> that are being used are based on empirical analysis and
Based on my ideas at [1], pass the encoder around more instead of i915,
port pair. Look up phy and TC port based on encoder.
This could be later extended to e.g. cache the info to encoder and/or
look up data from encoder->devdata.
I know relying solely on encoder has its drawbacks, namely not
Pass encoder to the _port_to_ddc_pin() functions, and rename to
_encoder_to_ddc_pin().
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 60 ++-
1 file changed, 37 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
Pass encoder to intel_snps_phy_update_psr_power_state().
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_psr.c | 7 ++-
drivers/gpu/drm/i915/display/intel_snps_phy.c | 6 --
drivers/gpu/drm/i915/display/intel_snps_phy.h | 4 ++--
3 files changed, 8 insertions(+),
Add a number of encoder based functions to check if the port/phy of the
encoder is of a certain type, or to convert to phy or tc_port. Initially
these are just wrappers around the existing functions, but they can be
improved to use VBT data or use some cached info in the future.
Signed-off-by:
Pass encoder to intel_wait_ddi_buf_active().
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_ddi.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index
Hi Nirmoy,
On Tue, Mar 12, 2024 at 12:18:15PM +0100, Nirmoy Das wrote:
> Caching mode is HW dependent so pick a correct one using
> intel_gt_coherent_map_type().
>
> Cc: Andi Shyti
> Cc: Janusz Krzysztofik
> Cc: Jonathan Cavitt
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10249
Hi Bug Filing,
On Tuesday, 12 March 2024 11:02:19 CET Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/hwmon: Fix locking inversion in sysfs getter (rev2)
> URL : https://patchwork.freedesktop.org/series/130966/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from
LGTM,
Reviewed-by: Radhakrishna Sripada
> -Original Message-
> From: Nikula, Jani
> Sent: Tuesday, March 12, 2024 4:58 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani ; Thomas Weißschuh
> ; Sripada, Radhakrishna
>
> Subject: [PATCH] drm/i915/opregion: add
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 36 ++
drivers/gpu/drm/i915/display/intel_ddi.c | 116 +++---
.../drm/i915/display/intel_ddi_buf_trans.c| 14 +--
.../i915/display/intel_display_power_well.c | 2 +-
Unused.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 14 --
drivers/gpu/drm/i915/display/intel_cx0_phy.h | 2 --
2 files changed, 4 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 258 ++-
1 file changed, 136 insertions(+), 122 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index b88ffc75cf4a..d2e4439562e3
On Wed, Mar 06, 2024 at 11:36:40AM -0800, Lucas De Marchi wrote:
> PCI IDs for XEHPSDV were never added and platform always marked with
> force_probe. Drop what's not used and rename some places to either be
> xehp or dg2, depending on the platform/IP checks.
>
> The registers not used anymore
== Series Details ==
Series: drm/i915: cleanup dead code
URL : https://patchwork.freedesktop.org/series/131049/
State : warning
== Summary ==
Error: dim checkpatch failed
0eed5859f6c8 drm/i915: Drop dead code for xehpsdv
-:918: WARNING:LINE_CONTINUATIONS: Avoid unnecessary line continuations
== Series Details ==
Series: drm/i915: cleanup dead code
URL : https://patchwork.freedesktop.org/series/131049/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Below failures are False positive, please help to re-report.
-shekhar
From: Patchwork
Sent: Tuesday, March 12, 2024 05:10
To: Chauhan, Shekhar
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.BAT: failure for drm/i915/dp: Increase idle pattern wait
timeout to 2ms (rev4)
Patch Details
Now when we enable bigjoiner for MST, in MST case
intel_ddi_post_disable_hdmi_or_sst() function wont get called,
Do we need similar changes for MST case to loop over the joined pipes
in MST bigjoiner case?
Manasi
On Fri, Mar 8, 2024 at 5:12 AM Stanislav Lisovskiy
wrote:
>
> From: Vidya Srinivas
On Tue, Mar 12, 2024 at 03:58:19PM -0700, Matt Roper wrote:
On Wed, Mar 06, 2024 at 11:36:40AM -0800, Lucas De Marchi wrote:
PCI IDs for XEHPSDV were never added and platform always marked with
force_probe. Drop what's not used and rename some places to either be
xehp or dg2, depending on the
On Wed, Mar 06, 2024 at 11:36:39AM -0800, Lucas De Marchi wrote:
> With dynamic load-balancing disabled on the compute side, there's no
> reason left to enable WA 16015675438. Drop it from both PVC and DG2.
> Note that this can be done because now the driver always set a fixed
> partition of EUs
On 3/12/2024 09:24, Matt Roper wrote:
On Thu, Mar 07, 2024 at 06:01:29PM -0800, john.c.harri...@intel.com wrote:
From: John Harrison
An existing workaround has been extended in both platforms affected
and implementation complexity.
Signed-off-by: John Harrison
---
On Fri, Mar 8, 2024 at 5:11 AM Stanislav Lisovskiy
wrote:
>
> Unify the master vs. slave handling in
> intel_ddi_post_disable_hdmi_or_sst() by looping over all the
> pipes in one go.
How will we handle looping through all joined pipes for MST case,
does this need to be accounted for in the last
PCI IDs for XEHPSDV were never added and platform always marked with
force_probe. Drop what's not used and rename some places to either be
xehp or dg2, depending on the platform/IP checks.
The registers not used anymore are also removed.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Lucas De Marchi
With no platform using graphics/media IP_VER(12, 50), replace the
checks throughout the code with IP_VER(12, 55) so the code makes sense
by itself with no additional explanation of previous baggage.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Lucas De Marchi
---
Now that DG2 is the only user of this forcewake table, remove the macro
and use FORCEWAKE_RENDER explicitly for range 0xd800 - 0xd87f.
Suggested-by: Matt Roper
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_uncore.c | 297 ++--
1 file changed, 145
== Series Details ==
Series: drm/i915/selftests: Pick correct caching mode.
URL : https://patchwork.freedesktop.org/series/131019/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14420_full -> Patchwork_131019v1_full
Summary
All the platforms that inherit the media/graphics version
from XE_HPM_FEATURES / XE_HP_FEATURES just override it to another
version. Just set the version directly in the respective struct
and remove the versions from the _FEATURES macros. Since that was the
only use for XE_HPM_FEATURES, remove it
PCI IDs for PVC were never added and platform always marked with
force_probe. Drop what's not used and rename some places as needed.
The registers not used anymore are also removed.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Lucas De Marchi
---
.../gpu/drm/i915/gem/i915_gem_object_types.h |
With both XEHPSDV and PVC removed (as platforms, most of their code
remain used by others), there's no need to handle !RCS_MASK() as
other platforms don't ever have fused-off render. Remove those code
paths and the special WA flag when initializing GuC.
Signed-off-by: Lucas De Marchi
---
Remove platforms that never had their PCI IDs added to the driver and
are of course marked with requiring force_probe. Note that most of the
code for those platforms is actually used by subsequent ones, so it's
not a huge amount of code being removed.
On Tue, Mar 12, 2024 at 04:43:06PM -0700, John Harrison wrote:
On 3/12/2024 09:24, Matt Roper wrote:
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 0c67d674c94de..4c3dae98656af 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++
== Series Details ==
Series: drm/i915: cleanup dead code
URL : https://patchwork.freedesktop.org/series/131049/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14423 -> Patchwork_131049v1
Summary
---
**FAILURE**
== Series Details ==
Series: Enable LNL display (rev2)
URL : https://patchwork.freedesktop.org/series/130689/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14421_full -> Patchwork_130689v2_full
Summary
---
Quoting Lucas De Marchi (2024-03-12 20:51:42-03:00)
>All the platforms that inherit the media/graphics version
>from XE_HPM_FEATURES / XE_HP_FEATURES just override it to another
>version. Just set the version directly in the respective struct
>and remove the versions from the _FEATURES macros.
Compute vrr_vsync_start/end, which sets the position
for hardware to send the Vsync at a fixed position
relative to the end of the Vblank.
--v2:
- Updated VSYNC_START/END macros to VRR_VSYNC_START/END. (Ankit)
- Updated bit fields of VRR_VSYNC_START/END. (Ankit)
--v3:
- Add
== Series Details ==
Series: Disable automatic load CCS load balancing (rev8)
URL : https://patchwork.freedesktop.org/series/129951/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/129951/revisions/8/mbox/ not
applied
Applying: drm/i915/gt:
On Tue, Mar 12, 2024 at 03:54:09PM -0700, Matt Roper wrote:
On Wed, Mar 06, 2024 at 11:36:39AM -0800, Lucas De Marchi wrote:
With dynamic load-balancing disabled on the compute side, there's no
reason left to enable WA 16015675438. Drop it from both PVC and DG2.
Note that this can be done
Thanks Stan for the cleanup around post disable non MST case, one comment below
On Fri, Mar 8, 2024 at 5:11 AM Stanislav Lisovskiy
wrote:
>
> Extract the "not-MST" stuff from intel_ddi_post_disable() so that
> the whole thing isn't so cluttered.
>
> The bigjoiner slave handling was outside of
== Series Details ==
Series: Enable Adaptive Sync SDP Support for DP (rev18)
URL : https://patchwork.freedesktop.org/series/126829/
State : warning
== Summary ==
Error: dim checkpatch failed
b375ee417fe9 drm/dp: Add support to indicate if sink supports AS SDP
fe133c6b8a7d drm: Add Adaptive
== Series Details ==
Series: Enable Adaptive Sync SDP Support for DP (rev18)
URL : https://patchwork.freedesktop.org/series/126829/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Enable Adaptive Sync SDP Support for DP (rev18)
URL : https://patchwork.freedesktop.org/series/126829/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14423 -> Patchwork_126829v18
Summary
---
On Mon, 11 Mar 2024 13:34:58 -0700, Janusz Krzysztofik wrote:
>
> In i915 hwmon sysfs getter path we now take a hwmon_lock, then acquire an
> rpm wakeref. That results in lock inversion:
>
> <4> [197.079335] ==
> <4> [197.085473] WARNING:
On Thu, Mar 07, 2024 at 06:01:29PM -0800, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> An existing workaround has been extended in both platforms affected
> and implementation complexity.
>
> Signed-off-by: John Harrison
> ---
> drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h | 3
On Mon, Mar 11, 2024 at 11:16:06AM -0400, Rodrigo Vivi wrote:
On Wed, Mar 06, 2024 at 11:36:40AM -0800, Lucas De Marchi wrote:
PCI IDs for XEHPSDV were never added and platform always marked with
force_probe. Drop what's not used and rename some places to either be
xehp or dg2, depending on the
Quoting Gustavo Sousa (2024-03-12 13:36:36-03:00)
>Xe2LPD always selects the CDCLK PLL as source for the MDCLK. Because of
>that, the ratio between MDCLK and CDCLK is not be constant anymore. As
>such, make sure to have the current ratio available in intel_dbuf_state
>so that it can be used during
On Tue, Mar 12, 2024 at 01:45:32PM -0300, Gustavo Sousa wrote:
> Quoting Gustavo Sousa (2024-03-12 13:36:36-03:00)
> >Xe2LPD always selects the CDCLK PLL as source for the MDCLK. Because of
> >that, the ratio between MDCLK and CDCLK is not be constant anymore. As
> >such, make sure to have the
== Series Details ==
Series: drm/i915/opregion: add intel_opregion_vbt_present() stub for ACPI=n
URL : https://patchwork.freedesktop.org/series/131021/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Fri, Mar 08, 2024 at 09:22:17PM +0100, Andi Shyti wrote:
> For the upcoming changes we need a cleaner way to build the list
> of uabi engines.
>
> Suggested-by: Tvrtko Ursulin
> Signed-off-by: Andi Shyti
> Cc: # v6.2+
I don't really see why we need patches 2 & 3 in this series. If we want
== Series Details ==
Series: drm/i915/opregion: add intel_opregion_vbt_present() stub for ACPI=n
URL : https://patchwork.freedesktop.org/series/131021/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14421 -> Patchwork_131021v1
It is no use computing the squash waveform if we are not going to use
it. Move the call to cdclk_squash_waveform() inside the block guarded by
HAS_CDCLK_SQUASH(dev_priv).
v2:
- Move "u16 waveform" declaration to inside the block where it is
initialized and used. (Matt)
Reviewed-by: Matt
As of Xe2LPD, it is now possible to select the source of the MDCLK
as either the CD2XCLK or the CDCLK PLL.
Previous display IPs were hardcoded to use the CD2XCLK. For those, the
ratio between MDCLK and CDCLK remained constant, namely 2. For Xe2LPD,
when we select the CDCLK PLL as the source, the
Xe2LPD always selects the CDCLK PLL as source for the MDCLK. Because of
that, the ratio between MDCLK and CDCLK is not be constant anymore. As
such, make sure to have the current ratio available in intel_dbuf_state
so that it can be used during dbuf programming.
Note that we write-lock the global
This series aims at providing the remaining patches for enabling display
on Lunar Lake, which used Xe2LPD display IP.
The first set of patches contains fixes and extra stuff required for
supporting CDCLK on Xe2LPD:
drm/i915/cdclk: Rename lnl_cdclk_table to xe2lpd_cdclk_table
The CDCLK table is tied to Xe2LPD display and not to the platform. Let's
rename lnl_cdclk_table to xe2lpd_cdclk_table in order to reflect that.
Reviewed-by: Matt Roper
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 4 ++--
1 file changed, 2 insertions(+), 2
Currently, only Xe2LPD uses CDCLK PLL as the source of MDCLK and
previous display IPs use the CD2XCLK. There will be changes in code
paths common to those platforms that will rely on which source is being
used. As such, let's make that information explicit with the addition of
the predicate
On Fri, Mar 08, 2024 at 01:00:39PM +0200, Jouni Högander wrote:
> Increasing number of fast wake sync pulses seem to fix problems with
> certain PSR panels. This should be ok for other panels as well as the eDP
> specification allows 10...16 precharge pulses and we are still within that
> range.
>
On Tue, Mar 12, 2024 at 03:24:41PM +0530, Arun R Murthy wrote:
> Multiplying XE_PAGE_SIZE with another u32 and the product stored in
> u64 can potentially lead to overflow. Change one of the value to u64 so
> as to perform 64 bit arithmetic operation as the product is u64.
These should never get
On Tue, Mar 12, 2024 at 01:36:33PM -0300, Gustavo Sousa wrote:
> Currently, only Xe2LPD uses CDCLK PLL as the source of MDCLK and
> previous display IPs use the CD2XCLK. There will be changes in code
> paths common to those platforms that will rely on which source is being
> used. As such, let's
On Fri, Mar 08, 2024 at 09:22:16PM +0100, Andi Shyti wrote:
> The hardware should not dynamically balance the load between CCS
> engines. Wa_14019159160 recommends disabling it across all
> platforms.
>
> Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement")
> Signed-off-by: Andi
Hi Janusz,
On Mon, Mar 11, 2024 at 09:34:58PM +0100, Janusz Krzysztofik wrote:
> In i915 hwmon sysfs getter path we now take a hwmon_lock, then acquire an
> rpm wakeref. That results in lock inversion:
>
> <4> [197.079335] ==
> <4>
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: a1184cae56bcb96b86df3ee0377cec507a3f56e0 Add linux-next specific
files for 20240312
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202403121924.e3xrqdss-...@intel.com
Error
== Series Details ==
Series: drm/i915: pass encoder around more for port/phy checks
URL : https://patchwork.freedesktop.org/series/131031/
State : warning
== Summary ==
Error: dim checkpatch failed
e1b7c8c052d0 drm/hdmi: convert *_port_to_ddc_pin() to *_encoder_to_ddc_pin()
d4b8dffcc1db
== Series Details ==
Series: drm/i915: pass encoder around more for port/phy checks
URL : https://patchwork.freedesktop.org/series/131031/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: pass encoder around more for port/phy checks
URL : https://patchwork.freedesktop.org/series/131031/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14421 -> Patchwork_131031v1
Summary
From: Balasubramani Vivekanandan
Load DMC for Xe2LPD. The value 0x8000 is the maximum payload size for
any Xe2LPD DMC firmware.
v2:
- s/XE2LPD_MAX_FW_SIZE/XE2LPD_DMC_MAX_FW_SIZE/. (Lucas)
Signed-off-by: Balasubramani Vivekanandan
Signed-off-by: Dnyaneshwar Bhadane
Reviewed-by: Lucas De
Commit 394b4b7df9f7 ("drm/i915/lnl: Add CDCLK table") and commit
3d3696c0fed1 ("drm/i915/lnl: Start using CDCLK through PLL") started
adding support for CDCLK programming support for Xe2LPD. One final piece
is missing, which is the programming necessary for changed in the ratio
between MDCLK and
From: Balasubramani Vivekanandan
Enable display support for Lunar Lake.
Signed-off-by: Balasubramani Vivekanandan
Signed-off-by: Lucas De Marchi
Reviewed-by: Lucas De Marchi
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/xe/xe_pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git
Hi Ashutosh,
On Tuesday, 12 March 2024 17:25:14 CET Dixit, Ashutosh wrote:
> On Mon, 11 Mar 2024 13:34:58 -0700, Janusz Krzysztofik wrote:
> >
> > In i915 hwmon sysfs getter path we now take a hwmon_lock, then acquire an
> > rpm wakeref. That results in lock inversion:
> >
> > <4> [197.079335]
On Tuesday, 12 March 2024 18:09:37 CET Andi Shyti wrote:
> Hi Janusz,
>
> On Mon, Mar 11, 2024 at 09:34:58PM +0100, Janusz Krzysztofik wrote:
> > In i915 hwmon sysfs getter path we now take a hwmon_lock, then acquire an
> > rpm wakeref. That results in lock inversion:
> >
> > <4> [197.079335]
Hi Matt,
...
> > #define GEN12_RCU_MODE _MMIO(0x14800)
> > #define GEN12_RCU_MODE_CCS_ENABLEREG_BIT(0)
> > +#define XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE REG_BIT(1)
>
> Nitpick: we usually order register bits in descending order. Aside from
On Tue, Mar 12, 2024 at 10:08:33AM -0700, Matt Roper wrote:
> On Fri, Mar 08, 2024 at 09:22:17PM +0100, Andi Shyti wrote:
> > For the upcoming changes we need a cleaner way to build the list
> > of uabi engines.
> >
> > Suggested-by: Tvrtko Ursulin
> > Signed-off-by: Andi Shyti
> > Cc: # v6.2+
On Tue, 12 Mar 2024 13:34:25 -0700, Janusz Krzysztofik wrote:
>
Hi Janusz,
> On Tuesday, 12 March 2024 17:25:14 CET Dixit, Ashutosh wrote:
> > On Mon, 11 Mar 2024 13:34:58 -0700, Janusz Krzysztofik wrote:
> > >
> > > In i915 hwmon sysfs getter path we now take a hwmon_lock, then acquire an
> > >
== Series Details ==
Series: Enable LNL display (rev2)
URL : https://patchwork.freedesktop.org/series/130689/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14421 -> Patchwork_130689v2
Summary
---
**SUCCESS**
No
== Series Details ==
Series: drm/i915/gem: Execbuffer objects must have struct pages. (rev2)
URL : https://patchwork.freedesktop.org/series/131000/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14421 -> Patchwork_131000v2
== Series Details ==
Series: Enable LNL display (rev2)
URL : https://patchwork.freedesktop.org/series/130689/
State : warning
== Summary ==
Error: dim checkpatch failed
ba3eac026061 drm/i915/cdclk: Rename lnl_cdclk_table to xe2lpd_cdclk_table
3d99b83d61e5 drm/i915/cdclk: Add and use
== Series Details ==
Series: Enable LNL display (rev2)
URL : https://patchwork.freedesktop.org/series/130689/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
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