[Intel-gfx] [PATCH 01/11] drm/i915: Only print an message if there was an error
Only report an error if the GPU has actually detected one, otherwise we
are just hung.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_irq.c | 38 --
1 files changed, 24 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b5dba47..2479be0 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -692,24 +692,13 @@ void i915_destroy_error_state(struct drm_device *dev)
i915_error_state_free(dev, error);
}
-/**
- * i915_handle_error - handle an error interrupt
- * @dev: drm device
- *
- * Do some basic checking of regsiter state at error interrupt time and
- * dump it to the syslog. Also call i915_capture_error_state() to make
- * sure we get a record and make it available in debugfs. Fire a uevent
- * so userspace knows something bad happened (should trigger collection
- * of a ring dump etc.).
- */
-static void i915_handle_error(struct drm_device *dev, bool wedged)
+static void i915_report_and_clear_eir(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev-dev_private;
u32 eir = I915_READ(EIR);
- u32 pipea_stats = I915_READ(PIPEASTAT);
- u32 pipeb_stats = I915_READ(PIPEBSTAT);
- i915_capture_error_state(dev);
+ if (!eir)
+ return;
printk(KERN_ERR render error detected, EIR: 0x%08x\n,
eir);
@@ -755,6 +744,9 @@ static void i915_handle_error(struct drm_device *dev, bool
wedged)
}
if (eir I915_ERROR_MEMORY_REFRESH) {
+ u32 pipea_stats = I915_READ(PIPEASTAT);
+ u32 pipeb_stats = I915_READ(PIPEBSTAT);
+
printk(KERN_ERR memory refresh error\n);
printk(KERN_ERR PIPEASTAT: 0x%08x\n,
pipea_stats);
@@ -811,6 +803,24 @@ static void i915_handle_error(struct drm_device *dev, bool
wedged)
I915_WRITE(EMR, I915_READ(EMR) | eir);
I915_WRITE(IIR, I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT);
}
+}
+
+/**
+ * i915_handle_error - handle an error interrupt
+ * @dev: drm device
+ *
+ * Do some basic checking of regsiter state at error interrupt time and
+ * dump it to the syslog. Also call i915_capture_error_state() to make
+ * sure we get a record and make it available in debugfs. Fire a uevent
+ * so userspace knows something bad happened (should trigger collection
+ * of a ring dump etc.).
+ */
+static void i915_handle_error(struct drm_device *dev, bool wedged)
+{
+ struct drm_i915_private *dev_priv = dev-dev_private;
+
+ i915_capture_error_state(dev);
+ i915_report_and_clear_eir(dev);
if (wedged) {
atomic_set(dev_priv-mm.wedged, 1);
--
1.7.1
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[Intel-gfx] [PATCH 02/11] drm/i915: Hold the spinlock whilst resetting unpin_work along error path
Delay taking the mutex until we need to and ensure that we hold the
spinlock when resetting unpin_work on the error path. Also defer the
debugging print messages until after we have released the spinlock.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: Jesse Barnes jbar...@virtuousgeek.org
Cc: Kristian Høgsberg k...@bitplanet.net
---
drivers/gpu/drm/i915/intel_display.c | 20
1 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index cfac4dd..1845a06 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4667,8 +4667,6 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
if (work == NULL)
return -ENOMEM;
- mutex_lock(dev-struct_mutex);
-
work-event = event;
work-dev = crtc-dev;
intel_fb = to_intel_framebuffer(crtc-fb);
@@ -4678,10 +4676,10 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
/* We borrow the event spin lock for protecting unpin_work */
spin_lock_irqsave(dev-event_lock, flags);
if (intel_crtc-unpin_work) {
- DRM_DEBUG_DRIVER(flip queue: crtc already busy\n);
spin_unlock_irqrestore(dev-event_lock, flags);
kfree(work);
- mutex_unlock(dev-struct_mutex);
+
+ DRM_DEBUG_DRIVER(flip queue: crtc already busy\n);
return -EBUSY;
}
intel_crtc-unpin_work = work;
@@ -4690,13 +4688,19 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
intel_fb = to_intel_framebuffer(fb);
obj = intel_fb-obj;
+ mutex_lock(dev-struct_mutex);
ret = intel_pin_and_fence_fb_obj(dev, obj);
if (ret != 0) {
- DRM_DEBUG_DRIVER(flip queue: %p pin fence failed\n,
- to_intel_bo(obj));
- kfree(work);
- intel_crtc-unpin_work = NULL;
mutex_unlock(dev-struct_mutex);
+
+ spin_lock_irqsave(dev-event_lock, flags);
+ intel_crtc-unpin_work = NULL;
+ spin_unlock_irqrestore(dev-event_lock, flags);
+
+ kfree(work);
+
+ DRM_DEBUG_DRIVER(flip queue: %p pin fence failed\n,
+to_intel_bo(obj));
return ret;
}
--
1.7.1
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[Intel-gfx] [PATCH 05/11] drm/i915: Only print nothing to do debug message as required.
If the FBC is already disabled, then we do not even attempt to disable
FBC and so there is no point emitting a debug statement at that point,
having already emitted one saying why we are disabling FBC.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/intel_display.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 1845a06..e504fdb 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1248,10 +1248,11 @@ static void intel_update_fbc(struct drm_crtc *crtc,
return;
out_disable:
- DRM_DEBUG_KMS(unsupported config, disabling FBC\n);
/* Multiple disables should be harmless */
- if (intel_fbc_enabled(dev))
+ if (intel_fbc_enabled(dev)) {
+ DRM_DEBUG_KMS(unsupported config, disabling FBC\n);
intel_disable_fbc(dev);
+ }
}
static int
--
1.7.1
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[Intel-gfx] [PATCH 07/11] drm/i915: Rebind bo if currently bound with incorrect alignment.
Whilst pinning the buffer, check that that its current alignment
matches the requested alignment. If it does not, rebind.
This should clear up any final render errors whilst resuming,
for reference:
Bug 27070 - [i915] Page table errors with empty ringbuffer
https://bugs.freedesktop.org/show_bug.cgi?id=27070
Bug 15502 - render error detected, EIR: 0x0010
https://bugzilla.kernel.org/show_bug.cgi?id=15502
Bug 13844 - i915 error: render error detected
https://bugzilla.kernel.org/show_bug.cgi?id=13844
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: sta...@kernel.org
---
drivers/gpu/drm/i915/i915_gem.c | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 6425c2a..a5ca959 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4164,6 +4164,17 @@ i915_gem_object_pin(struct drm_gem_object *obj, uint32_t
alignment)
BUG_ON(obj_priv-pin_count == DRM_I915_GEM_OBJECT_MAX_PIN_COUNT);
i915_verify_inactive(dev, __FILE__, __LINE__);
+
+ if (obj_priv-gtt_space != NULL) {
+ if (alignment == 0)
+ alignment = i915_gem_get_gtt_alignment(obj);
+ if (obj_priv-gtt_offset (alignment - 1)) {
+ ret = i915_gem_object_unbind(obj);
+ if (ret)
+ return ret;
+ }
+ }
+
if (obj_priv-gtt_space == NULL) {
ret = i915_gem_object_bind_to_gtt(obj, alignment);
if (ret)
--
1.7.1
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[Intel-gfx] [PATCH 09/11] drm/i915: Check error code whilst moving buffer to GTT domain.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/intel_fb.c |6 +-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
index 6f53cf7..f8c76e6 100644
--- a/drivers/gpu/drm/i915/intel_fb.c
+++ b/drivers/gpu/drm/i915/intel_fb.c
@@ -105,7 +105,11 @@ static int intelfb_create(struct intel_fbdev *ifbdev,
}
/* Flush everything out, we'll be doing GTT only from now on */
- i915_gem_object_set_to_gtt_domain(fbo, 1);
+ ret = i915_gem_object_set_to_gtt_domain(fbo, 1);
+ if (ret) {
+ DRM_ERROR(failed to bind fb: %d.\n, ret);
+ goto out_unpin;
+ }
info = framebuffer_alloc(0, device);
if (!info) {
--
1.7.1
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[Intel-gfx] [PATCH 10/11] drm/i915: Reject bind_to_gtt() early if object aperture
If the object is bigger than the entire aperture, reject it early
before evicting everything in a vain attempt to find space.
v2: Use E2BIG as suggested by Owain G. Ainsworth.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: sta...@kernel.org
---
drivers/gpu/drm/i915/i915_gem.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index b87945d..f84c8e9 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2648,6 +2648,14 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj,
unsigned alignment)
return -EINVAL;
}
+ /* If the object is bigger than the entire aperture, reject it early
+* before evicting everything in a vain attempt to find space.
+*/
+ if (obj-size dev-gtt_total) {
+ DRM_ERROR(Attempting to bind an object larger than the
aperture\n);
+ return -E2BIG;
+ }
+
search_free:
free_space = drm_mm_search_free(dev_priv-mm.gtt_space,
obj-size, alignment, 0);
--
1.7.1
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[Intel-gfx] [PATCH 11/11] drm/i915: Cleanup after failed initialization of ringbuffers
The callers expect us to cleanup any partially initialised structures
before reporting the error.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_gem.c | 19 ++-
1 files changed, 18 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f84c8e9..42866c0 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4632,23 +4632,40 @@ i915_gem_init_ringbuffer(struct drm_device *dev)
{
drm_i915_private_t *dev_priv = dev-dev_private;
int ret;
+
dev_priv-render_ring = render_ring;
+
if (!I915_NEED_GFX_HWS(dev)) {
dev_priv-render_ring.status_page.page_addr
= dev_priv-status_page_dmah-vaddr;
memset(dev_priv-render_ring.status_page.page_addr,
0, PAGE_SIZE);
}
+
if (HAS_PIPE_CONTROL(dev)) {
ret = i915_gem_init_pipe_control(dev);
if (ret)
return ret;
}
+
ret = intel_init_ring_buffer(dev, dev_priv-render_ring);
- if (!ret HAS_BSD(dev)) {
+ if (ret)
+ goto cleanup_pipe_control;
+
+ if (HAS_BSD(dev)) {
dev_priv-bsd_ring = bsd_ring;
ret = intel_init_ring_buffer(dev, dev_priv-bsd_ring);
+ if (ret)
+ goto cleanup_render_ring;
}
+
+ return 0;
+
+cleanup_render_ring:
+ intel_cleanup_ring_buffer(dev, dev_priv-render_ring);
+cleanup_pipe_control:
+ if (HAS_PIPE_CONTROL(dev))
+ i915_gem_cleanup_pipe_control(dev);
return ret;
}
--
1.7.1
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[Intel-gfx] [PATCH 2/2] drm/i915: Fix up address spaces in slow_kernel_write()
Since we now get_user_pages() outside of the mutex prior to performing
the copy, we kmap() the page inside the copy routine and so need to
perform an ordinary memcpy() and not copy_from_user().
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_gem.c | 42 +++---
1 files changed, 17 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 6769fab..528ff7d 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -509,25 +509,24 @@ fast_user_write(struct io_mapping *mapping,
* page faults
*/
-static inline int
+static inline void
slow_kernel_write(struct io_mapping *mapping,
loff_t gtt_base, int gtt_offset,
struct page *user_page, int user_offset,
int length)
{
- char *src_vaddr, *dst_vaddr;
- unsigned long unwritten;
+ char __iomem *dst_vaddr;
+ char *src_vaddr;
- dst_vaddr = io_mapping_map_atomic_wc(mapping, gtt_base);
- src_vaddr = kmap_atomic(user_page, KM_USER1);
- unwritten = __copy_from_user_inatomic_nocache(dst_vaddr + gtt_offset,
- src_vaddr + user_offset,
- length);
- kunmap_atomic(src_vaddr, KM_USER1);
- io_mapping_unmap_atomic(dst_vaddr);
- if (unwritten)
- return -EFAULT;
- return 0;
+ dst_vaddr = io_mapping_map_wc(mapping, gtt_base);
+ src_vaddr = kmap(user_page);
+
+ memcpy_toio(dst_vaddr + gtt_offset,
+ src_vaddr + user_offset,
+ length);
+
+ kunmap(user_page);
+ io_mapping_unmap(dst_vaddr);
}
static inline int
@@ -700,18 +699,11 @@ i915_gem_gtt_pwrite_slow(struct drm_device *dev, struct
drm_gem_object *obj,
if ((data_page_offset + page_length) PAGE_SIZE)
page_length = PAGE_SIZE - data_page_offset;
- ret = slow_kernel_write(dev_priv-mm.gtt_mapping,
- gtt_page_base, gtt_page_offset,
- user_pages[data_page_index],
- data_page_offset,
- page_length);
-
- /* If we get a fault while copying data, then (presumably) our
-* source page isn't available. Return the error and we'll
-* retry in the slow path.
-*/
- if (ret)
- goto out_unpin_object;
+ slow_kernel_write(dev_priv-mm.gtt_mapping,
+ gtt_page_base, gtt_page_offset,
+ user_pages[data_page_index],
+ data_page_offset,
+ page_length);
remain -= page_length;
offset += page_length;
--
1.7.1
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Re: [Intel-gfx] [PATCH 02/11] drm/i915: Hold the spinlock whilst resetting unpin_work along error path
On Thu, 27 May 2010 13:18:13 +0100
Chris Wilson ch...@chris-wilson.co.uk wrote:
Delay taking the mutex until we need to and ensure that we hold the
spinlock when resetting unpin_work on the error path. Also defer the
debugging print messages until after we have released the spinlock.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: Jesse Barnes jbar...@virtuousgeek.org
Cc: Kristian Høgsberg k...@bitplanet.net
---
drivers/gpu/drm/i915/intel_display.c | 20
1 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index cfac4dd..1845a06 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4667,8 +4667,6 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
if (work == NULL)
return -ENOMEM;
- mutex_lock(dev-struct_mutex);
-
work-event = event;
work-dev = crtc-dev;
intel_fb = to_intel_framebuffer(crtc-fb);
@@ -4678,10 +4676,10 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
/* We borrow the event spin lock for protecting unpin_work */
spin_lock_irqsave(dev-event_lock, flags);
if (intel_crtc-unpin_work) {
- DRM_DEBUG_DRIVER(flip queue: crtc already busy\n);
spin_unlock_irqrestore(dev-event_lock, flags);
kfree(work);
- mutex_unlock(dev-struct_mutex);
+
+ DRM_DEBUG_DRIVER(flip queue: crtc already busy\n);
return -EBUSY;
}
intel_crtc-unpin_work = work;
@@ -4690,13 +4688,19 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
intel_fb = to_intel_framebuffer(fb);
obj = intel_fb-obj;
+ mutex_lock(dev-struct_mutex);
ret = intel_pin_and_fence_fb_obj(dev, obj);
if (ret != 0) {
- DRM_DEBUG_DRIVER(flip queue: %p pin fence failed\n,
- to_intel_bo(obj));
- kfree(work);
- intel_crtc-unpin_work = NULL;
mutex_unlock(dev-struct_mutex);
+
+ spin_lock_irqsave(dev-event_lock, flags);
+ intel_crtc-unpin_work = NULL;
+ spin_unlock_irqrestore(dev-event_lock, flags);
+
+ kfree(work);
+
+ DRM_DEBUG_DRIVER(flip queue: %p pin fence failed\n,
+ to_intel_bo(obj));
return ret;
}
The mutex change looks like a good cleanup, and the spin lock addition
is a good fix. Thanks.
Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org
--
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Re: [Intel-gfx] [PATCH 04/11] drm/i915: Propagate error from unbinding an unfenceable object.
On Thu, 27 May 2010 13:18:15 +0100
Chris Wilson ch...@chris-wilson.co.uk wrote:
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/i915_gem.c | 10 +++---
1 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 1c65f0b..6425c2a 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3307,9 +3307,13 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object
*obj,
obj_priv-tiling_mode != I915_TILING_NONE;
/* Check fence reg constraints and rebind if necessary */
- if (need_fence !i915_gem_object_fence_offset_ok(obj,
- obj_priv-tiling_mode))
- i915_gem_object_unbind(obj);
+ if (need_fence
+ !i915_gem_object_fence_offset_ok(obj,
+ obj_priv-tiling_mode)) {
+ ret = i915_gem_object_unbind(obj);
+ if (ret)
+ return ret;
+ }
/* Choose the GTT offset for our buffer and put it there. */
ret = i915_gem_object_pin(obj, (uint32_t) entry-alignment);
Looks ok to me. Out of curiosity, are you seeing errors here on unbind
with some loads?
Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org
--
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[Intel-gfx] [PATCH] drm/i915/gen4: Fix interrupt setup ordering
Unmask, then enable interrupts, then enable interrupt sources; matches
PCH ordering. The old way (sources, enable, unmask) gives a window
during which interrupt conditions would appear in ISR but would never
reach IIR and thus never raise an IRQ. Since interrupts only trigger
on rising edges in ISR, this would lead to conditions where (for
example) output hotplugging would never fire an interrupt because it
was already stuck on in ISR.
Also, since we know IIR and PIPExSTAT have been cleared during
irq_preinstall, don't clear them again during irq_postinstall, nothing
good can come of that.
Signed-off-by: Adam Jackson a...@redhat.com
---
drivers/gpu/drm/i915/i915_irq.c | 50 ++-
1 files changed, 23 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index a7e4b1f..f9d2cc0 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1402,29 +1402,10 @@ int i915_driver_irq_postinstall(struct drm_device *dev)
dev_priv-pipestat[1] = 0;
if (I915_HAS_HOTPLUG(dev)) {
- u32 hotplug_en = I915_READ(PORT_HOTPLUG_EN);
-
- /* Note HDMI and DP share bits */
- if (dev_priv-hotplug_supported_mask HDMIB_HOTPLUG_INT_STATUS)
- hotplug_en |= HDMIB_HOTPLUG_INT_EN;
- if (dev_priv-hotplug_supported_mask HDMIC_HOTPLUG_INT_STATUS)
- hotplug_en |= HDMIC_HOTPLUG_INT_EN;
- if (dev_priv-hotplug_supported_mask HDMID_HOTPLUG_INT_STATUS)
- hotplug_en |= HDMID_HOTPLUG_INT_EN;
- if (dev_priv-hotplug_supported_mask SDVOC_HOTPLUG_INT_STATUS)
- hotplug_en |= SDVOC_HOTPLUG_INT_EN;
- if (dev_priv-hotplug_supported_mask SDVOB_HOTPLUG_INT_STATUS)
- hotplug_en |= SDVOB_HOTPLUG_INT_EN;
- if (dev_priv-hotplug_supported_mask CRT_HOTPLUG_INT_STATUS)
- hotplug_en |= CRT_HOTPLUG_INT_EN;
- /* Ignore TV since it's buggy */
-
- I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
-
/* Enable in IER... */
enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
/* and unmask in IMR */
- i915_enable_irq(dev_priv, I915_DISPLAY_PORT_INTERRUPT);
+ dev_priv-irq_mask_reg = ~I915_DISPLAY_PORT_INTERRUPT;
}
/*
@@ -1442,16 +1423,31 @@ int i915_driver_irq_postinstall(struct drm_device *dev)
}
I915_WRITE(EMR, error_mask);
- /* Disable pipe interrupt enables, clear pending pipe status */
- I915_WRITE(PIPEASTAT, I915_READ(PIPEASTAT) 0x8000);
- I915_WRITE(PIPEBSTAT, I915_READ(PIPEBSTAT) 0x8000);
- /* Clear pending interrupt status */
- I915_WRITE(IIR, I915_READ(IIR));
-
- I915_WRITE(IER, enable_mask);
I915_WRITE(IMR, dev_priv-irq_mask_reg);
+ I915_WRITE(IER, enable_mask);
(void) I915_READ(IER);
+ if (I915_HAS_HOTPLUG(dev)) {
+ u32 hotplug_en = I915_READ(PORT_HOTPLUG_EN);
+
+ /* Note HDMI and DP share bits */
+ if (dev_priv-hotplug_supported_mask HDMIB_HOTPLUG_INT_STATUS)
+ hotplug_en |= HDMIB_HOTPLUG_INT_EN;
+ if (dev_priv-hotplug_supported_mask HDMIC_HOTPLUG_INT_STATUS)
+ hotplug_en |= HDMIC_HOTPLUG_INT_EN;
+ if (dev_priv-hotplug_supported_mask HDMID_HOTPLUG_INT_STATUS)
+ hotplug_en |= HDMID_HOTPLUG_INT_EN;
+ if (dev_priv-hotplug_supported_mask SDVOC_HOTPLUG_INT_STATUS)
+ hotplug_en |= SDVOC_HOTPLUG_INT_EN;
+ if (dev_priv-hotplug_supported_mask SDVOB_HOTPLUG_INT_STATUS)
+ hotplug_en |= SDVOB_HOTPLUG_INT_EN;
+ if (dev_priv-hotplug_supported_mask CRT_HOTPLUG_INT_STATUS)
+ hotplug_en |= CRT_HOTPLUG_INT_EN;
+ /* Ignore TV since it's buggy */
+
+ I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
+ }
+
opregion_enable_asle(dev);
return 0;
--
1.7.0.1
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Re: [Intel-gfx] [intel-gfx][PATCH] intel: add a new interface drm_intel_bo_alloc_direct
-Original Message- From: intel-gfx-bounces+nanhai.zou=intel@lists.freedesktop.org [mailto:intel-gfx-bounces+nanhai.zou=intel@lists.freedesktop.org] On Behalf Of Eric Anholt Sent: 2010年5月28日 2:59 To: Xiang, Haihao Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [intel-gfx][PATCH] intel: add a new interface drm_intel_bo_alloc_direct On Thu, 27 May 2010 11:22:02 +0800, Xiang, Haihao haihao.xi...@intel.com wrote: On Thu, 2010-05-27 at 04:52 +0800, Eric Anholt wrote: On Tue, 25 May 2010 13:06:50 +0800, Xiang, Haihao haihao.xi...@intel.com wrote: This interface is the same as drm_intel_bo_alloc except the allocated size isn't rounded up, so it bypasses the cache bucket. The size of the BO created by drm_intel_bo_alloc for a 1920x800,4:2:0 YUV planar surface is 4M, it is about 2.2M if using drm_intel_bo_alloc_direct. You could just init a cache bucket of that size, and get BO caching with no overhead and no new interfaces. I ever considered modifying the cache bucket, including a new interface to override the default cache bucket. The problem is that the the size of the surface BO and related BO may vary from case to case, we don't know the right size when initializing cache bucket. We should probably just make a bunch more buckets. It's not like video is the only thing that suffers from overallocation. Mipmapped textures will tend to be 1.5 times a power of two in size. Maybe a new API to create a new size of bucket, because sizes of buckets in libdrm can not precisely match app's requests. Another issue to use the built-in buckets in libdrm for H.264 is that libdrm is doing too much caching than necessary. Thanks Zou Nan hai ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: use wake_up instead of drm wrapper.
From: Dave Airlie airl...@redhat.com
Since
b9241ea31fae4887104e5d1b3b18f4009c25a0c4 drm/i915: Don't wait interruptible for
possible plane buffer flush
and previous to that
48764bf43f746113fc77877d7e80f2df23ca4cbb drm/i915: add i915_lp_ring_sync helper
The irq wait queue has uninterruptible waiters, however the DRM_WAKEUP macro
wraps wake_up_interruptible which isn't going to do what you want in this case,
just use the normal wake_up variant which does both types fine.
This fixes a regression in the copy fb code we use to get seamless startup on
Fedora/RHEL, without this fix, we block forever in the wait when starting X.
cc: sta...@kernel.org
Signed-off-by: Dave Airlie airl...@redhat.com
---
drivers/gpu/drm/i915/i915_debugfs.c |2 +-
drivers/gpu/drm/i915/i915_irq.c |6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 322070c..1cfd158 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -673,7 +673,7 @@ i915_wedged_write(struct file *filp,
atomic_set(dev_priv-mm.wedged, val);
if (val) {
- DRM_WAKEUP(dev_priv-irq_queue);
+ wake_up(dev_priv-irq_queue);
queue_work(dev_priv-wq, dev_priv-error_work);
}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 8c3f080..f680af1 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -357,7 +357,7 @@ irqreturn_t ironlake_irq_handler(struct drm_device *dev)
u32 seqno = i915_get_gem_seqno(dev);
dev_priv-mm.irq_gem_seqno = seqno;
trace_i915_gem_request_complete(dev, seqno);
- DRM_WAKEUP(dev_priv-irq_queue);
+ wake_up(dev_priv-irq_queue);
dev_priv-hangcheck_count = 0;
mod_timer(dev_priv-hangcheck_timer, jiffies +
DRM_I915_HANGCHECK_PERIOD);
}
@@ -829,7 +829,7 @@ static void i915_handle_error(struct drm_device *dev, bool
wedged)
/*
* Wakeup waiting processes so they don't hang
*/
- DRM_WAKEUP(dev_priv-irq_queue);
+ wake_up(dev_priv-irq_queue);
}
queue_work(dev_priv-wq, dev_priv-error_work);
@@ -931,7 +931,7 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
u32 seqno = i915_get_gem_seqno(dev);
dev_priv-mm.irq_gem_seqno = seqno;
trace_i915_gem_request_complete(dev, seqno);
- DRM_WAKEUP(dev_priv-irq_queue);
+ wake_up(dev_priv-irq_queue);
dev_priv-hangcheck_count = 0;
mod_timer(dev_priv-hangcheck_timer, jiffies +
DRM_I915_HANGCHECK_PERIOD);
}
--
1.6.5.2
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