Re: [Intel-gfx] Intel 82Q35 problem

On Fri, 06 Aug 2010 23:20:42 +0200, Jos Vos wrote: > Via a Fedora mailing list I was redirected to this list to post my > problem. [snip] > So, at the point of the comment, the primary display becomes black > and from then on all output is redirected to the secondary display, > including subseque

Re: [Intel-gfx] [PATCH] drm/i915: Capture the overlay status upon a GPU hang.

On Wed, 4 Aug 2010 20:26:07 +0100, Chris Wilson wrote: > v2: Add the interrupt status and address. Applied. pgpXkBY5hUikw.pgp Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/

Re: [Intel-gfx] [PATCH] drm/i915: Truncate the inode as well as the backing pages on purge

On Wed, 4 Aug 2010 16:22:28 +0100, Chris Wilson wrote: > Signed-off-by: Chris Wilson Any clarification what the impact was here? pgpJukfKw83yH.pgp Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.fr

Re: [Intel-gfx] Small ringbuffer cleanup

On Wed, 4 Aug 2010 15:18:11 +0100, Chris Wilson wrote: > The goal here is to simplify the ringbuffer emission so that we can avoid > the function call overhead when writing into the ringbuffer. Sweet. Applied. pgpDCN497TLQN.pgp Description: PGP signature _

[Intel-gfx] Intel 82Q35 problem

Hi, Via a Fedora mailing list I was redirected to this list to post my problem. I have a problem with an IBM point-of-sale system with an Intel 82Q35 graphics chipset that does not work in RHEL6/F13, but that does work fine on SLED 11 (older software). OpenSUSE 11.3 seems to face the same proble

Re: [Intel-gfx] [PATCH] drm/i915: Kill the active list spinlock

On Fri, 06 Aug 2010 14:41:02 -0700, Eric Anholt wrote: > On Wed, 4 Aug 2010 14:09:45 +0100, Chris Wilson > wrote: > > This spinlock only served debugging purposes in a time when we could not > > be sure of the mutex ever being released upon a GPU hang. As we now > > should be able rely on hangc

Re: [Intel-gfx] [PATCH] drm/i915: Disable FDI link before retraining.

On Fri, 06 Aug 2010 14:21:59 -0700, Eric Anholt wrote: > On Tue, 3 Aug 2010 08:12:12 +0100, Chris Wilson > wrote: > > At the moment, we have a habit of occasionally performing a double dpms > > on. This confuses the FDI link training performed on a dpms on as we can > > only adjust the settings

Re: [Intel-gfx] [PATCH] drm/i915: Emit a backtrace if we attempt to rebind a pinned buffer

On Wed, 4 Aug 2010 12:37:41 +0100, Chris Wilson wrote: > This debugging trace was useful for finding the fbcon regression on > i965, and it may prove useful again in future. > > Signed-off-by: Chris Wilson Applied to for-linus. pgpZZLQVEkKgE.pgp Description: PGP signature __

Re: [Intel-gfx] [PATCH] drm/i915: Disable the cursor for DPMS_OFF

On Wed, 4 Aug 2010 12:24:42 +0100, Chris Wilson wrote: > The comments have long desired that we should switch off the cursor > along with the display plane, make it so. > > Signed-off-by: Chris Wilson Applied to for-linus. pgpopsZwHVail.pgp Description: PGP signature ___

Re: [Intel-gfx] [PATCH] drm/i915: report all active objects as busy

On Wed, 4 Aug 2010 21:11:13 +0200, Daniel Vetter wrote: > On Wed, Aug 04, 2010 at 08:57:26PM +0200, Daniel Vetter wrote: > > On Wed, Aug 04, 2010 at 03:36:30PM +0100, Chris Wilson wrote: > > > Incorporates a similar patch by Daniel Vetter, the alteration being to > > > report the current busy stat

Re: [Intel-gfx] [PATCH] drm/i915: Kill the active list spinlock

On Wed, 4 Aug 2010 14:09:45 +0100, Chris Wilson wrote: > This spinlock only served debugging purposes in a time when we could not > be sure of the mutex ever being released upon a GPU hang. As we now > should be able rely on hangcheck to do the job for us (and that error > reporting should not i

Re: [Intel-gfx] [PATCH] drm/i915: Ensure that while(INREG()) are bounded.

On Fri, 06 Aug 2010 14:23:37 -0700, Eric Anholt wrote: > On Fri, 6 Aug 2010 16:11:54 +0100, Chris Wilson > wrote: > > Add a new macro, wait_for, to simplify the act of waiting on a register > > to change state. wait_for() takes three arguments, the condition to > > inspect on every loop, the ma

Re: [Intel-gfx] [PATCH] drm/i915: Only emit flushes on active rings.

On Wed, 4 Aug 2010 13:55:32 +0100, Chris Wilson wrote: > This avoids the excess flush and requests on idle rings (and spamming > the debug log ;-) Applied to for-linus. pgpX8IaVxLdZK.pgp Description: PGP signature ___ Intel-gfx mailing list Intel-gf

Re: [Intel-gfx] SVDO properties patchset

On Wed, 4 Aug 2010 13:50:22 +0100, Chris Wilson wrote: > This patchset touches virtually all of i915/intel*.c simply to subclass > encoders and connectors, then cleans up intel_sdvo in order to add a few > more TV properties. Applied to for-linus. It's early, let's get this cleanup (and a coup

Re: [Intel-gfx] [PATCH] drm/i915: Do not clobber the contents of TRANS_DP_CTL when enabling.

On Wed, 4 Aug 2010 11:25:21 +0100, Chris Wilson wrote: > Signed-off-by: Chris Wilson Applied to for-linus. pgpYx434Kdaq9.pgp Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/

Re: [Intel-gfx] [PATCH] drm/i915: Remove useless message when disabling "Big FIFO" on PineView

On Wed, 4 Aug 2010 11:17:25 +0100, Chris Wilson wrote: > As we already have appropriate debug and warnings when we activate and > deactivate the self-refresh FIFO, having a further INFO is just annoying. Applied to for-linus. pgp017paipM7Y.pgp Description: PGP signature __

Re: [Intel-gfx] [PATCH] drm/i915: Ensure that while(INREG()) are bounded.

On Fri, 6 Aug 2010 16:11:54 +0100, Chris Wilson wrote: > Add a new macro, wait_for, to simplify the act of waiting on a register > to change state. wait_for() takes three arguments, the condition to > inspect on every loop, the maximum amount of time to wait and whether to > yield the cpu for a

Re: [Intel-gfx] [PATCH] drm/i915: Disable FDI link before retraining.

On Tue, 3 Aug 2010 08:12:12 +0100, Chris Wilson wrote: > At the moment, we have a habit of occasionally performing a double dpms > on. This confuses the FDI link training performed on a dpms on as we can > only adjust the settings whilst the link is disabled and the second > attempt at training

[Intel-gfx] [PATCH] drm/i915: Append the object onto the inactive list on binding.

In order to properly track bound objects, they need to exist on one of the inactive/active lists or be pinned. As this is a requirement, do the work inside i915_gem_bind_to_gtt() rather than dotted around the callsites. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.c |9 -

Re: [Intel-gfx] [PATCH] drm/i915: Implement fair lru eviction across both rings. (v2)

On Fri, 6 Aug 2010 20:58:30 +0200, Daniel Vetter wrote: > On Fri, Aug 06, 2010 at 12:25:45PM +0100, Chris Wilson wrote: > > + return i915_gem_evict_everything(dev); > > I think this should be equivalent to > > return -ENOMEM; Yes, we could return -ENOSPC and then do_execbuffer() would u

Re: [Intel-gfx] [PATCH] drm/i915: Implement fair lru eviction across both rings. (v2)

On Fri, Aug 06, 2010 at 12:25:45PM +0100, Chris Wilson wrote: > Based in a large part upon Daniel Vetter's implementation and adapted > for handling multiple rings in a single pass. > > This should lead to better gtt usage and fixes the page-fault-of-doom > triggered. The fairness is provided by s

[Intel-gfx] [PATCH] drm/i915: Only update i845/i865 CURBASE when disabled (v2)

The i845 and i865 have a peculiarlity in that CURBASE is not the trigger for the vsync update of the cursor registers but instead the modification of that register is prohibited whilst the cursor is enabled. Reorder the write sequence for CURPOS, CURCNTR and CURBASE on i845 to i865 to match. v2: R

[Intel-gfx] [PATCH 2/2] drm/i915: Apply i830 errata for cursor alignment

i830 requires 32bpp cursors to be aligned to 16KB, so we have to expose the alignment parameter to i915_gem_attach_phys_object(). Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h |4 +++- drivers/gpu/drm/i915/i915_gem.c | 11 ++- drivers/gpu/drm/i915/intel_

[Intel-gfx] [PATCH 1/2] drm/i915: Only update i845/i865 CURBASE when disabled.

The i845 and i865 have a peculiarlity in that CURBASE is not the trigger for the vsync update of the cursor registers but instead the modification of that register is prohibited whilst the cursor is enabled. Reorder the write sequence for CURPOS, CURCNTR and CURBASE on i845 to i865 to match. Signe

Re: [Intel-gfx] [stable] [PATCH 2/4] drm/i915: Enable panel fitting for eDP

On Thu, Jul 29, 2010 at 10:58:53AM +1000, Dave Airlie wrote: > did this patch go anywhere? It's now upstream in Linus's tree. thanks, greg k-h > On Mon, Jul 19, 2010 at 6:43 PM, Chris Wilson > wrote: > > From: Zhao Yakui > > > > When trying to set other display mode besides the fixed panel m

[Intel-gfx] [PATCH] drm/i915: FBC is updated within set_base() so remove second call in mode_set()

The FBC is dependent upon a few details of the framebuffer so it is required to be updated within set_base(), so remove the redundant call from mode_set(). Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_display.c |3 --- 1 files changed, 0 insertions(+), 3 deletions(-) diff --gi

[Intel-gfx] [PATCH] drm/i915: Ensure that while(INREG()) are bounded.

Add a new macro, wait_for, to simplify the act of waiting on a register to change state. wait_for() takes three arguments, the condition to inspect on every loop, the maximum amount of time to wait and whether to yield the cpu for a length of time after each check. Signed-off-by: Chris Wilson ---

[Intel-gfx] [PATCH] drm/i915/edp: Flush the write before waiting for PLLs

Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_display.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 9814182..5cae58a 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b

[Intel-gfx] [PATCH] drm/i915: Implement fair lru eviction across both rings. (v2)

Based in a large part upon Daniel Vetter's implementation and adapted for handling multiple rings in a single pass. This should lead to better gtt usage and fixes the page-fault-of-doom triggered. The fairness is provided by scanning through the GTT space amalgamating space in rendering order. As

[Intel-gfx] [PATCH] drm/i915/ringbuffer: Set ring->gem_buffer = NULL on init unwind

The cleanup path for early abort failed to nullify the gem_buffer. The likely consequence of this is zero, since a failure here should mean aborting the module load. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_ringbuffer.c | 31 +-- 1 files changed, 1

[Intel-gfx] [PATCH] drm/i915: Update watermarks for Ironlake after dpms changes

Previously, we only remembered to update the watermarks for i9xx, and incorrectly assumed that the crtc->enabled flag was valid at that point in the dpms cycle. Note that on my x201s this makes a SR bug on pipe 1 much easier to hit. (Since before this patch when disabling pipe 0, we either didn't