All,
After a new round of display testing, some new bugs filed is as
following table.
The kernel is:
The Linux Kernel, the operating system core itself
Kernel: (drm-intel-fixes)d7d39e20cc5e44f915d6c5687f65839632c44381
Some additional commit info:
Author: Jesse Barnes
Hi Keith all,
On Thu, 2011-08-11 at 15:28 -0700, Keith Packard wrote:
On Thu, 11 Aug 2011 21:36:38 +0200, Michel Alexandre Salim
sali...@fedoraproject.org wrote:
Since there's no known regression introduced by Matthew's patch, could
it be merged? Feel free to add a
I've had to amend
On Mon, Aug 22, 2011 at 10:25:24AM +0430, Ali Gholami Rudi wrote:
Yet, /sys/devices/virtual/backlight/acpi_video0/brightness only
appears after the revert. Seems something changes its behavior
if new_bd-dev.parent is not NULL in backlight_device_register().
Well, yes, if it has a parent it
On Fri, 12 Aug 2011 12:11:33 +0200, Michel Alexandre Salim
sali...@fedoraproject.org wrote:
Matthew's last patch from July 16th applies without modification on top
of Linux 3.0 and 3.1-rc1, and applies with some offsets on top of
drm-intel-fixes.
I must have skipped right over it somehow.
On Fri, 12 Aug 2011 15:58:52 +0800, Sun, Yi yi@intel.com wrote:
Non-text part: multipart/mixed
Non-text part: multipart/alternative
drm/i915: enable/disable spread spectrum as needed on mode set
40031https://bugs.freedesktop.org/show_bug.cgi?id=40031
[Regression] testdisplay can't
On Fri, 2011-08-12 at 06:52 -0700, Keith Packard wrote:
On Fri, 12 Aug 2011 12:11:33 +0200, Michel Alexandre Salim
sali...@fedoraproject.org wrote:
Matthew's last patch from July 16th applies without modification on top
of Linux 3.0 and 3.1-rc1 [...]
From
I'm trying to figure out why this doesn't work. Anyone have ideas?
On gen6+ (well probably since Cantiga actually) we're supposed to use
PIPE_CONTROL rather than MI_FLUSH for flushing the pipeline and
caches. This patch doesn't cause hangs or crashes in my testing, but
does prevent glxgears
GFX_MODE controls important behavior like PPGTT, run lists, and TLB
invalidate behavior. On the SDV I'm using, the TLB invalidation mode
was defaulting to pipe control only which meant regular MI_FLUSHes
wouldn't actually flush the TLB, leading to all sorts of stale data
getting used.
So
These are enabled at init time, but we need to save/restore them as well.
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/i915_suspend.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_suspend.c
On Fri, 12 Aug 2011 14:55:32 -0700
Jesse Barnes jbar...@virtuousgeek.org wrote:
GFX_MODE controls important behavior like PPGTT, run lists, and TLB
invalidate behavior. On the SDV I'm using, the TLB invalidation mode
was defaulting to pipe control only which meant regular MI_FLUSHes
wouldn't
On Fri, 12 Aug 2011 15:18:09 -0700
Jesse Barnes jbar...@virtuousgeek.org wrote:
On Fri, 12 Aug 2011 14:55:32 -0700
Jesse Barnes jbar...@virtuousgeek.org wrote:
GFX_MODE controls important behavior like PPGTT, run lists, and TLB
invalidate behavior. On the SDV I'm using, the TLB
On Fri, 12 Aug 2011 15:28:32 -0700, Jesse Barnes jbar...@virtuousgeek.org
wrote:
I915_WRITE(MI_MODE, mode);
+ if (IS_GEN7(dev))
+ I915_WRITE(GFX_MODE_GEN7, ((GFX_TLB_INVALIDATE_ALWAYS |
+
On Thu, 11 Aug 2011 18:19:40 -0700, Ben Widawsky b...@bwidawsk.net wrote:
Non-text part: multipart/mixed
Non-text part: multipart/signed
On Thu, Aug 11, 2011 at 05:56:21PM -0700, Keith Packard wrote:
On Thu, 11 Aug 2011 17:47:24 -0700, Ben Widawsky b...@bwidawsk.net wrote:
These are dirty
On Fri, 12 Aug 2011 11:18:45 -0700, Jesse Barnes jbar...@virtuousgeek.org
wrote:
I'm trying to figure out why this doesn't work. Anyone have ideas?
On gen6+ (well probably since Cantiga actually) we're supposed to use
PIPE_CONTROL rather than MI_FLUSH for flushing the pipeline and
caches.
On Fri, Aug 12, 2011 at 04:28:17PM -0700, Eric Anholt wrote:
On Thu, 11 Aug 2011 18:19:40 -0700, Ben Widawsky b...@bwidawsk.net wrote:
Non-text part: multipart/mixed
Non-text part: multipart/signed
On Thu, Aug 11, 2011 at 05:56:21PM -0700, Keith Packard wrote:
On Thu, 11 Aug 2011 17:47:24
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