On Mon, Mar 04, 2013 at 05:00:29PM -0800, Ben Widawsky wrote:
On error, this represents the state of the currently running context at
the time it was loaded.
Unfortunately, since we're hung and can't switch out the context this
may not tell us too much about the most current state of the
We need it to restore the ilk rc6 context, since the gpu wait no
requires interrupts. But in general having interrupts around should
help in code sanity, since more and more stuff is interrupt driven.
This regression has been introduced in
commit 3e9605018ab3e333d51cc90fccfde2031886763b
Author:
On Tue, Mar 05, 2013 at 09:50:58AM +0100, Daniel Vetter wrote:
We need it to restore the ilk rc6 context, since the gpu wait no
requires interrupts. But in general having interrupts around should
help in code sanity, since more and more stuff is interrupt driven.
This regression has been
On Wed, Feb 27, 2013 at 08:23:56AM -0800, Jesse Barnes wrote:
Great, then if it helps Stephane, I think we should merge it.
Acked-by-top-post: Jesse Barnes jbar...@virtuousgeek.org
And applied to -fixes.
-Daniel
On Wed, 27 Feb 2013 05:50:08 +
Zhang, Ouping ouping.zh...@intel.com
Add a hotplug IRQ storm detection (triggered when a hotplug interrupt
fires more than 5 times / sec).
Rationale:
Despite of the many attempts to fix the problem with noisy hotplug
interrupt lines we are still seeing systems which have issues:
Once cause of noise seems to be bad routing of the
On Tue, Mar 05, 2013 at 08:53:48AM +, Chris Wilson wrote:
On Tue, Mar 05, 2013 at 09:50:58AM +0100, Daniel Vetter wrote:
We need it to restore the ilk rc6 context, since the gpu wait no
requires interrupts. But in general having interrupts around should
help in code sanity, since more
We disable hoptplug detection when we encounter a hotplug event
storm. Still hotplug detection is required on some outputs (like
Display Port). The interrupt storm may be only temporary (on certain
Dell Laptops for instance it happens at certain charging states of
the system). Thus we enable it
On Mon, Mar 4, 2013 at 10:47 PM, Toralf Förster toralf.foers...@gmx.de wrote:
It is a (small) regression to 3.7.10 with intel integrated graphics i915
- but nevertheless :
With an external VGA display (1680x1050) and a closed internal LVDS1
display (1440x900) the external display starts X11
On Fri, Mar 01, 2013 at 01:14:16PM -0800, Jesse Barnes wrote:
For high res modes m n p calculation is fixed for VLV platform.
Signed-off-by: Vijay Purushothaman vijay.a.purushotha...@intel.com
Signed-off-by: Pallavi G pallav...@intel.com
Signed-off-by: Yogesh M
On Fri, Mar 01, 2013 at 05:44:18PM -0300, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
---
tools/intel_reg_dumper.c |6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/tools/intel_reg_dumper.c
On Fri, Mar 1, 2013 at 11:08 PM, Jesse Barnes jbar...@virtuousgeek.org wrote:
From: Pallavi G pallav...@intel.com
For high res modes m n p calculation is fixed for VLV platform.
Signed-off-by: Vijay Purushothaman vijay.a.purushotha...@intel.com
Signed-off-by: Pallavi G pallav...@intel.com
According to PRM we need to disable hsync and vsync even though ADPA is
disabled. The previous code did infact do the opposite so we fix it.
Signed-off-by: Patrik Jakobsson patrik.r.jakobs...@gmail.com
---
drivers/gpu/drm/i915/intel_crt.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
On Tue, Mar 05, 2013 at 02:24:48PM +0100, Patrik Jakobsson wrote:
According to PRM we need to disable hsync and vsync even though ADPA is
disabled. The previous code did infact do the opposite so we fix it.
Signed-off-by: Patrik Jakobsson patrik.r.jakobs...@gmail.com
---
We disable hoptplug detection when we encounter a hotplug event
storm. Still hotplug detection is required on some outputs (like
Display Port). The interrupt storm may be only temporary (on certain
Dell Laptops for instance it happens at certain charging states of
the system). Thus we enable it
This patch disables hotplug interrupts if an 'interrupt storm'
has been detected.
Noise on the interrupt line renders the hotplug interrupt useless:
each hotplug event causes the devices to be rescanned which will
will only increase the system load.
Thus disable the hotplug interrupts and fall
This way it is possible to limit 're'-detect() of displays to connectors
which have received an HPD event.
v2: Reordered drm_i915_private: Move hpd_event_bits to hpd state tracking.
v3: Fix patch.
Signed-off-by: Egbert Eich e...@suse.de
---
drivers/gpu/drm/i915/i915_drv.h |1 +
Accroding to the docs these bits don't exist on PCH platforms.
intel_crt_dpms() already has a check for this, so I suppose
intel_disable_crt() should have one too.
Also I noticed that we seem to have the hsync and vsync disable
bits reversed. At least that's what the docs are telling me.
From the w/a database:
'To prevent false VT-d type 6 error:
The primary display plane must be 256KiB aligned, and require an extra
128 PTEs of padding afterward;
The sprites planes must be 128KiB aligned, and require an extra 64 PTEs
of padding afterward;
The cursors must be 64KiB
From the w/a database:
'To prevent false VT-d type 6 error:
The primary display plane must be 256KiB aligned, and require an extra
128 PTEs of padding afterward;
The sprites planes must be 128KiB aligned, and require an extra 64 PTEs
of padding afterward;
The cursors must be 64KiB
On Tue, Mar 05, 2013 at 08:00:30AM -0500, Egbert Eich wrote:
This way it is possible to limit 're'-detect() of displays to connectors
which have received an HPD event.
v2: Reordered drm_i915_private: Move hpd_event_bits to hpd state tracking.
v3: Fix patch.
Oops, forget this patch. It's
On Tue, Mar 05, 2013 at 03:33:26PM +0100, Patrik Jakobsson wrote:
Accroding to the docs these bits don't exist on PCH platforms.
intel_crt_dpms() already has a check for this, so I suppose
intel_disable_crt() should have one too.
Also I noticed that we seem to have the hsync and vsync
On Sat, 02 Mar 2013, Jesse Barnes jbar...@virtuousgeek.org wrote:
From: Pallavi G pallav...@intel.com
In Valleyview voltage swing, pre-emphasis and lane control registers can
be programmed only through the h/w side band fabric. Update
vlv_update_pll, i9xx_crtc_enable, and intel_enable_pll
On Sat, 02 Mar 2013, Jesse Barnes jbar...@virtuousgeek.org wrote:
The Gunit has a separate reg for this, so allocate some stolen space for
the power context and initialize the reg.
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/i915_drv.h|2 ++
On Tue, Mar 5, 2013 at 3:59 PM, Ville Syrjälä
ville.syrj...@linux.intel.com wrote:
On Tue, Mar 05, 2013 at 03:33:26PM +0100, Patrik Jakobsson wrote:
Accroding to the docs these bits don't exist on PCH platforms.
intel_crt_dpms() already has a check for this, so I suppose
intel_disable_crt()
On Tue, Mar 05, 2013 at 04:59:12PM +0200, Ville Syrjälä wrote:
On Tue, Mar 05, 2013 at 03:33:26PM +0100, Patrik Jakobsson wrote:
Accroding to the docs these bits don't exist on PCH platforms.
intel_crt_dpms() already has a check for this, so I suppose
intel_disable_crt() should have one
On Tue, Mar 05, 2013 at 02:52:39PM +, Chris Wilson wrote:
From the w/a database:
'To prevent false VT-d type 6 error:
The primary display plane must be 256KiB aligned, and require an extra
128 PTEs of padding afterward;
The sprites planes must be 128KiB aligned, and require an
Instead of calling into the DRM helper layer to poll all connectors for
changes in connected displays probe only those connectors which have
received a hotplug event.
Signed-off-by: Egbert Eich e...@suse.de
---
drivers/gpu/drm/i915/i915_irq.c | 37 +++--
1 files
On Tue, Mar 05, 2013 at 04:23:59PM +0100, Daniel Vetter wrote:
On Tue, Mar 05, 2013 at 04:59:12PM +0200, Ville Syrjälä wrote:
On Tue, Mar 05, 2013 at 03:33:26PM +0100, Patrik Jakobsson wrote:
Accroding to the docs these bits don't exist on PCH platforms.
intel_crt_dpms() already has a
On Tue, Mar 05, 2013 at 05:41:04PM +0200, Ville Syrjälä wrote:
On Tue, Mar 05, 2013 at 04:23:59PM +0100, Daniel Vetter wrote:
On Tue, Mar 05, 2013 at 04:59:12PM +0200, Ville Syrjälä wrote:
On Tue, Mar 05, 2013 at 03:33:26PM +0100, Patrik Jakobsson wrote:
Accroding to the docs these bits
Hi
2013/3/5 Damien Lespiau damien.lesp...@intel.com:
On Fri, Mar 01, 2013 at 05:44:18PM -0300, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
---
tools/intel_reg_dumper.c |6 +-
1 file changed, 5 insertions(+),
Thanks Daniel
I am recompiling the kernel.
I will also open a bug in bugzilla when I collect all the relative information.
Chris
On Mon, Mar 4, 2013 at 9:50 AM, Daniel Vetter daniel.vet...@ffwll.ch wrote:
Two things to test:
- Can you please check whether any of the backlight drivers in
On Mon, Mar 4, 2013 at 3:16 PM, Chris Li l...@chrisli.org wrote:
Two things to test:
- Can you please check whether any of the backlight drivers in
/sys/class/backlight does anything? You need to frob the brightness
file. Please also list all the drivers you have.
This is the kernel with the
On 03/05/2013 11:41 AM, Daniel Vetter wrote:
against DRI - DRM(Intel) and attach the files there together with
your quick description of the regression above.
Thanks, Daniel
np :
https://bugs.freedesktop.org/show_bug.cgi?id=61861
--
MfG/Sincerely
Toralf Förster
pgp finger print: 7B1A 07F4
On Tue, Mar 05, 2013 at 01:05:32PM -0300, Paulo Zanoni wrote:
Hi
2013/3/5 Damien Lespiau damien.lesp...@intel.com:
On Fri, Mar 01, 2013 at 05:44:18PM -0300, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
---
Adding intel-gfx to this thread in the hopes that someone there might have
some ideas since the fengzhe.zh...@intel.com address was bouncing.
Thread origins, for that list's reference:
http://markmail.org/thread/m4jhronecq4fvyk6
On Tue, Mar 5, 2013 at 11:42 AM, Jan Beulich jbeul...@suse.com
Disable bits for ADPA HSYNC and VSYNC where mixed up resulting in suspend
becoming standby and vice versa. Fixed by swapping their bit position.
Reported-by: Ville Syrjälä ville.syrj...@linux.intel.com
Signed-off-by: Patrik Jakobsson patrik.r.jakobs...@gmail.com
---
On Thu, 2013-02-28 at 11:31 -0300, Paulo Zanoni wrote:
Hi
2013/2/28 Chris Wilson ch...@chris-wilson.co.uk:
On Thu, Feb 28, 2013 at 12:06:28AM +0100, Sedat Dilek wrote:
On Wed, Feb 27, 2013 at 11:36 PM, Sedat Dilek sedat.di...@gmail.com
wrote:
Hi,
I am seeing this also on
On Fri, Feb 22, 2013 at 05:05:28PM -0300, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
From the docs:
IIR can queue up to two interrupt events. When the IIR is cleared,
it will set itself again after one clock if a second event was
stored.
Only the rising
Patrik Jakobsson patrik.r.jakobs...@gmail.com writes:
Disable bits for ADPA HSYNC and VSYNC where mixed up resulting in suspend
becoming standby and vice versa. Fixed by swapping their bit position.
Reported-by: Ville Syrjälä ville.syrj...@linux.intel.com
Signed-off-by: Patrik Jakobsson
Dear Patrik,
Am Dienstag, den 05.03.2013, 19:09 +0100 schrieb Patrik Jakobsson:
Disable bits for ADPA HSYNC and VSYNC where mixed up resulting in suspend
becoming standby and vice versa.
nice find. Could you elaborate on the symptoms please as I have never
experienced any issues with suspend
On Sat, 2 Mar 2013, Jesse Barnes wrote:
From: Ben Widawsky b...@bwidawsk.net
Uses slightly different interfaces than other platforms.
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/intel_pm.c | 148 +--
1 file changed, 144
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