Re: [Intel-gfx] [PATCH] Lower threshold for pixel doubling.

2013-06-24 Thread Daniel Vetter
On Sat, Jun 22, 2013 at 12:52 AM, Stuart Abercrombie sabercrom...@google.com wrote: Maybe I missed something, but I didn't see a response to this. Can we get this fix in? Sorry for the delay, I've lost track of this. Can you please boot with drm.debug=0xe and attach the full dmesg (with or

Re: [Intel-gfx] PROBLEM: WARNING, plane B assertion failure

2013-06-24 Thread Daniel Vetter
Can you please boot with drm.debug=0xe added to your kernel bootline, reproduce the issue and the attach the complete dmesg? Thanks, Daniel On Mon, Jun 24, 2013 at 4:35 AM, brian porter brian.j.por...@gmail.com wrote: BIOS Information Vendor: Hewlett-Packard Version: 361A0

Re: [Intel-gfx] [PATCH] drm/i915: move i915_trace_irq_get() out of the tracing macro

2013-06-24 Thread Daniel Vetter
On Fri, Jun 21, 2013 at 02:51:07PM +0200, Sebastian Andrzej Siewior wrote: On 06/21/2013 01:08 PM, Chris Wilson wrote: On Fri, Jun 21, 2013 at 12:15:53PM +0200, Sebastian Andrzej Siewior wrote: There is a report on RT about BUG: scheduling while atomic because the sleeping lock is taken in

Re: [Intel-gfx] [PATCH] drm/i915: Read the hardware state for the transcoder link upon error

2013-06-24 Thread Daniel Vetter
On Fri, Jun 21, 2013 at 03:40:04PM +0100, Chris Wilson wrote: Do not trust our bookkeeping when reporting errors, and instead dump the register contents. In particular, this solves one particular issue when an error is reported before we finish setting up the outputs and have a complete

[Intel-gfx] 'Timed out waiting for forcewake old ack to clear' and hangup on IvyBridge system

2013-06-24 Thread Guenter Roeck
Hi all, after upgrading one of my servers to 3.8, then 3.9.7 and 3.10-rc6, I started to see lots of Timed out waiting for forcewake old ack to clear error messages, including hang-ups especially if the system was highly loaded. With 3.5.24 everything was fine. After backing out commit 36ec8f877

Re: [Intel-gfx] [PATCH 0/3] Fix backlight issues on some Windows 8 systems

2013-06-24 Thread Yves-Alexis Perez
On dim., 2013-06-09 at 19:01 -0400, Matthew Garrett wrote: The first two patches in this series are picked from other patchesets aimed at solving similar problems. The last simply unregisters ACPI backlight control on Windows 8 systems when using an Intel GPU. Similar code could be added to

Re: [Intel-gfx] 'Timed out waiting for forcewake old ack to clear' and hangup on IvyBridge system

2013-06-24 Thread Guenter Roeck
On Sat, Jun 22, 2013 at 12:16:46PM -0700, Jesse Barnes wrote: On Fri, 21 Jun 2013 23:58:08 -0700 Guenter Roeck li...@roeck-us.net wrote: Hi all, after upgrading one of my servers to 3.8, then 3.9.7 and 3.10-rc6, I started to see lots of Timed out waiting for forcewake old ack to

[Intel-gfx] PROBLEM: WARNING, plane B assertion failure

2013-06-24 Thread brian porter
BIOS Information Vendor: Hewlett-Packard Version: 361A0 Ver. F.11 System Information Manufacturer: Hewlett-Packard Product Name: HP Mini Version: F.11 Wake-up Type: Power Switch SKU Number: FW376UA#ABA Family: 103C_5335KV 00:02.0 VGA

Re: [Intel-gfx] [PATCH] drm/i915: Trim the i915_error_printf by the trailing '\0'

2013-06-24 Thread Mika Kuoppala
Chris Wilson ch...@chris-wilson.co.uk writes: It seems the request to vsnprintf will try to write to the byte past the end of the maximum buffer, so trim the length by one byte. [76973.700434] BUG: unable to handle kernel paging request at 1000 [76973.700468] IP:

Re: [Intel-gfx] [PATCH] drm/i915: Trim the i915_error_printf by the trailing '\0'

2013-06-24 Thread Daniel Vetter
On Mon, Jun 24, 2013 at 03:26:54PM +0300, Mika Kuoppala wrote: Chris Wilson ch...@chris-wilson.co.uk writes: It seems the request to vsnprintf will try to write to the byte past the end of the maximum buffer, so trim the length by one byte. [76973.700434] BUG: unable to handle kernel

[Intel-gfx] [PULL] drm-intel-fixes

2013-06-24 Thread Daniel Vetter
Hi Dave, One remaining regression fix for i915. I've left it in -fixes for more than a week since it's in tricky code, and it took us a few kernel releases to notice the regression at all. The fence leak is especially annoying on gen2/3 and will kill userspace there quickly. For extra paranoia

[Intel-gfx] [PATCH] drm/i915: Bail out once we've found the context object

2013-06-24 Thread Damien Lespiau
Once we've found the the context object programmed in CCID, there's no need to look the other objects in the list. Signed-off-by: Damien Lespiau damien.lesp...@intel.com --- drivers/gpu/drm/i915/i915_irq.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/i915_irq.c

Re: [Intel-gfx] [PATCH 21/31] drm/i915: consolidate pch pll enable sequence

2013-06-24 Thread Damien Lespiau
On Wed, Jun 05, 2013 at 01:34:23PM +0200, Daniel Vetter wrote: It's been splattered over 3 different places all doing random things. Now we have (mostly) the same sequence as i8xx/i9xx, but all called from the crtc_enable hook (through the pll-enable function): - write new dividers - enable

Re: [Intel-gfx] [PATCH] drm/i915: Detect invalid scanout pitches

2013-06-24 Thread Ville Syrjälä
On Thu, Jun 20, 2013 at 05:14:20PM +0100, Chris Wilson wrote: Report back the user error of attempting to setup a CRTC with an invalid framebuffer pitch. This is trickier than it should be as on gen4, there is a restriction that tiled surfaces must have a stride less than 16k - which is less

[Intel-gfx] Small FBC fix

2013-06-24 Thread Damien Lespiau
I noticed on pre-HSW machines we get a spurious debug message: [drm:intel_update_fbc], fbc set to per-chip default [drm:intel_update_fbc], fbc disabled per module param but the fbc module parameter is not set. This series fixes it up. -- Damien ___

[Intel-gfx] [PATCH 2/2] drm/i915: Fix reason for per-chip disabling of FBC

2013-06-24 Thread Damien Lespiau
When running on my snb machine, recent kernels display successively: [drm:intel_update_fbc], fbc set to per-chip default [drm:intel_update_fbc], fbc disabled per module param But no module param is set. This happens because the check for the module parameter uses a variable that has been

[Intel-gfx] [PATCH 1/2] drm/i915: Make intel_enable_fbc() static

2013-06-24 Thread Damien Lespiau
This function has no user outside of intel_pm.c. Signed-off-by: Damien Lespiau damien.lesp...@intel.com --- drivers/gpu/drm/i915/intel_drv.h | 1 - drivers/gpu/drm/i915/intel_pm.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_drv.h

[Intel-gfx] Broadcast RGB questions

2013-06-24 Thread Tom Horsley
I don't suppose there is a way to set the default value for this property with a kernel boot option is there? I keep thinking my monitor is broken or my eyes have gone bad while watching the boot messages scroll past :-). (Anyone feel like adding such a kernel option?) If I can't get it set that

[Intel-gfx] [PATCH] drm/i915: tune down DIDL warning about too many outputs

2013-06-24 Thread Daniel Vetter
Nothing the user (nor we) really can do about this, but upsets a nice quiet boot. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65988 Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch --- drivers/gpu/drm/i915/intel_opregion.c |8 1 file changed, 4 insertions(+), 4

[Intel-gfx] [PATCH] drm/i915: PPGTT dump for debug

2013-06-24 Thread Ben Widawsky
No users yet Signed-off-by: Ben Widawsky b...@bwidawsk.net --- drivers/gpu/drm/i915/i915_gem_gtt.c | 31 +++ 1 file changed, 31 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 893007a..005358f 100644 ---

Re: [Intel-gfx] [PATCH] drm/i915: PPGTT dump for debug

2013-06-24 Thread Ben Widawsky
On Mon, Jun 24, 2013 at 10:01:33AM -0700, Ben Widawsky wrote: No users yet Signed-off-by: Ben Widawsky b...@bwidawsk.net I didn't mean to send this yet. Please ignore. -- Ben Widawsky, Intel Open Source Technology Center ___ Intel-gfx mailing list

[Intel-gfx] [PATCH] drm/i915: Fix context sizes on HSW

2013-06-24 Thread Ben Widawsky
With updates to the spec, we can actually see the context layout, and how many dwords are allocated. That table suggests we need 70720 bytes per HW context. Rounded up, this is 18 pages. Looking at what lives after the current 4 pages we use, I can't see too much important (mostly it's d3d

Re: [Intel-gfx] [PATCH] drm/i915: tune down DIDL warning about too many outputs

2013-06-24 Thread Damien Lespiau
On Mon, Jun 24, 2013 at 06:32:36PM +0200, Daniel Vetter wrote: Nothing the user (nor we) really can do about this, but upsets a nice quiet boot. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65988 Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch Reviewed-by: Damien Lespiau

[Intel-gfx] [PATCH] drm/i915: Introduce an HAS_IPS() macro

2013-06-24 Thread Damien Lespiau
Follow the trend and don't code conditions with platforms but with features. Signed-off-by: Damien Lespiau damien.lesp...@intel.com --- drivers/gpu/drm/i915/i915_debugfs.c | 2 +- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_display.c | 4 ++-- 3 files changed, 5

Re: [Intel-gfx] [PATCH] drm/i915: tune down DIDL warning about too many outputs

2013-06-24 Thread Paulo Zanoni
2013/6/24 Daniel Vetter daniel.vet...@ffwll.ch: Nothing the user (nor we) really can do about this, but upsets a nice quiet boot. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65988 Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch What exactly is the impact of this problem? What

Re: [Intel-gfx] [PATCH] drm/i915: tune down DIDL warning about too many outputs

2013-06-24 Thread Daniel Vetter
On Mon, Jun 24, 2013 at 7:30 PM, Paulo Zanoni przan...@gmail.com wrote: 2013/6/24 Daniel Vetter daniel.vet...@ffwll.ch: Nothing the user (nor we) really can do about this, but upsets a nice quiet boot. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65988 Signed-off-by: Daniel Vetter

Re: [Intel-gfx] [PATCH] drm/i915: tune down DIDL warning about too many outputs

2013-06-24 Thread Daniel Vetter
On Mon, Jun 24, 2013 at 06:06:35PM +0100, Damien Lespiau wrote: On Mon, Jun 24, 2013 at 06:32:36PM +0200, Daniel Vetter wrote: Nothing the user (nor we) really can do about this, but upsets a nice quiet boot. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65988 Signed-off-by:

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Make intel_enable_fbc() static

2013-06-24 Thread Daniel Vetter
On Mon, Jun 24, 2013 at 04:22:01PM +0100, Damien Lespiau wrote: This function has no user outside of intel_pm.c. Signed-off-by: Damien Lespiau damien.lesp...@intel.com Queued for -next, thanks for the patch. On the topic of stuff that sparse can catch, we've accumulated a few other ones. On a

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Fix reason for per-chip disabling of FBC

2013-06-24 Thread Daniel Vetter
On Mon, Jun 24, 2013 at 04:22:02PM +0100, Damien Lespiau wrote: When running on my snb machine, recent kernels display successively: [drm:intel_update_fbc], fbc set to per-chip default [drm:intel_update_fbc], fbc disabled per module param But no module param is set. This happens because

Re: [Intel-gfx] [PATCH] drm/i915: fix build warning on format specifier mismatch

2013-06-24 Thread Daniel Vetter
On Tue, Jun 11, 2013 at 09:57:26AM +0300, Ville Syrjälä wrote: On Fri, Jun 07, 2013 at 04:03:50PM +0300, Jani Nikula wrote: drivers/gpu/drm/i915/i915_gem.c: In function ‘i915_gem_object_bind_to_gtt’: drivers/gpu/drm/i915/i915_gem.c:3002:3: warning: format ‘%ld’ expects argument of type

Re: [Intel-gfx] [PATCH] drm/i915: Introduce an HAS_IPS() macro

2013-06-24 Thread Daniel Vetter
On Mon, Jun 24, 2013 at 06:29:34PM +0100, Damien Lespiau wrote: Follow the trend and don't code conditions with platforms but with features. Signed-off-by: Damien Lespiau damien.lesp...@intel.com Queued for -next, thanks for the patch. -Daniel --- drivers/gpu/drm/i915/i915_debugfs.c | 2

[Intel-gfx] [PATCH] drm/i915: Fix up sdvo hpd pins for i965g/gm

2013-06-24 Thread Daniel Vetter
Bspec seems to be full of lies, at least it disagress with reality: Two systems corrobated that SDVO hpd bits are the same as on gen3. Cc: Arthur Ranyan arthur.j.run...@intel.com Cc: Chris Wilson ch...@chris-wilson.co.uk Tested-by: Chris Wilson ch...@chris-wilson.co.uk Reported-and-tested-by:

[Intel-gfx] [PATCH] drm/i915: Fix up sdvo hpd pins for i965g/gm

2013-06-24 Thread Daniel Vetter
Bspec seems to be full of lies, at least it disagress with reality: Two systems corrobated that SDVO hpd bits are the same as on gen3. v2: Update comment a bit. Cc: Arthur Ranyan arthur.j.run...@intel.com Cc: Chris Wilson ch...@chris-wilson.co.uk Tested-by: Chris Wilson ch...@chris-wilson.co.uk

Re: [Intel-gfx] [PATCH] drm/i915: Introduce mapping of user pages into video memory (userptr) ioctl

2013-06-24 Thread Jesse Barnes
On Mon, 8 Apr 2013 21:24:58 +0200 Daniel Vetter dan...@ffwll.ch wrote: On Mon, Apr 8, 2013 at 7:40 PM, Chris Wilson ch...@chris-wilson.co.uk wrote: On Mon, Apr 08, 2013 at 07:18:11PM +0200, Daniel Vetter wrote: On Tue, Feb 12, 2013 at 02:17:22PM +, Chris Wilson wrote: By exporting the

[Intel-gfx] [PATCH 1/3] drm/i915: Use seq_puts/seq_putc when possible

2013-06-24 Thread Damien Lespiau
Caught with checkpatch.pl. Suggested-by: Daniel Vetter daniel.vet...@ffwll.ch Signed-off-by: Damien Lespiau damien.lesp...@intel.com --- drivers/gpu/drm/i915/i915_debugfs.c | 110 ++-- 1 file changed, 55 insertions(+), 55 deletions(-) diff --git

[Intel-gfx] [PATCH 2/3] drm/i915: Fix a few style issues found by checkpatch.pl

2013-06-24 Thread Damien Lespiau
Missing spaces and misplaced '*'. Signed-off-by: Damien Lespiau damien.lesp...@intel.com --- drivers/gpu/drm/i915/i915_debugfs.c | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index

[Intel-gfx] [PATCH 3/3] drm/i915: Fix a couple of should it be static? sparse warnings

2013-06-24 Thread Damien Lespiau
A genuine 'static' omission and 2 other warnings triggered by not including the header where those functions where defined. Signed-off-by: Damien Lespiau damien.lesp...@intel.com --- drivers/gpu/drm/i915/intel_pm.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git

[Intel-gfx] [PATCH] [v2] drm/i915: Fix context sizes on HSW

2013-06-24 Thread Ben Widawsky
With updates to the spec, we can actually see the context layout, and how many dwords are allocated. That table suggests we need 70720 bytes per HW context. Rounded up, this is 18 pages. Looking at what lives after the current 4 pages we use, I can't see too much important (mostly it's d3d

[Intel-gfx] [PATCH] drm: Added SDP and VSC structures for handling PSR for eDP

2013-06-24 Thread Rodrigo Vivi
From: Shobhit Kumar shobhit.ku...@intel.com SDP header and SDP VSC header as per eDP 1.3 spec, section 3.5, chapter PSR Secondary Data Package Support. v2: Modified and corrected the structures to be more in line for kernel coding guidelines and rebased the code on Paulo's DP patchset v3:

[Intel-gfx] [PATCH] drm/i915: Read the EDP DPCD and PSR Capability

2013-06-24 Thread Rodrigo Vivi
From: Shobhit Kumar shobhit.ku...@intel.com v2: reuse of just created is_edp_psr and put it at right place. v3: move is_edp_psr above intel_edp_disable Reviewed-by: Paulo Zanoni paulo.r.zan...@intel.com Reviewed-by: Jani Nikula jani.nik...@intel.com Signed-off-by: Shobhit Kumar