On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Passing the port as a parameter to PANEL_PORT_SELECT_VLV results in
> neater code. Sadly the PCH port select bits aren't suitable for the
> same treatment and the resulting macro would be much uglier, so
> leave th
From: Sonika Jindal
Since planes are universal now, using commit2 so that drmModeSetPlane can be
called for primary plane as well instead of drmModeSetCrtc. drmModeSetPlane will
update the x,y,w,h for the plane.
Cc: Damien Lespiau
Signed-off-by: Sonika Jindal
---
tests/kms_rotation_crc.c |
From: Sonika Jindal
Primary planes support 180 degree rotation. Expose the feature
through rotation drm property.
v2: Calculating linear/tiled offsets based on pipe source width and
height. Added 180 degree rotation support in ironlake_update_plane.
v3: Checking if CRTC is active before issuein
From: Sonika Jindal
Signed-off-by: Sonika Jindal
---
drivers/gpu/drm/i915/intel_display.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index e9b578e..1b0e403 100644
--- a/drivers/gpu/
From: Sonika Jindal
As suggested by Daniel, now calling intel_primary_plane_setplane in
set_property.
Inside setplane, the intel_plane's member variables were not updated in the
structure. The first patch does that updation.
>From kms_rotation_crc igt, drmModeSetCrtc was called to set up crtc f
On Mon, 18 Aug 2014, Clint Taylor wrote:
> On 08/12/2014 07:11 AM, Jani Nikula wrote:
>> This lets the userspace switch off the backlight using the backlight
>> class sysfs bl_power file. The switch is done using the power sequencer;
>> the backlight PWM, and everything else, remains enabled. The
Oh. I also missed this side effect of paths converging.
Reviewed-by: Sagar Kamble
On Mon, 2014-08-18 at 13:20 +0300, Imre Deak wrote:
> Before sharing common parts between the system and runtime s/r
> handlers we WARNed if the runtime s/r handlers were called on GENs that
> didn't support RPM. B
BIOS or firmware can modify hardware state during suspend/resume,
for example on the Toshiba CB35 or Lenovo T400, so log a debug message
instead of a warning if the backlight is unexpectedly enabled.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80930
Cc: Jani Nikula
Signed-off-by: Scot
On 2014/8/18 17:58, Michael S. Tsirkin wrote:
On Mon, Aug 18, 2014 at 05:01:25PM +0800, Chen, Tiejun wrote:
On 2014/8/18 16:21, Michael S. Tsirkin wrote:
On Mon, Aug 18, 2014 at 11:06:29AM +0800, Chen, Tiejun wrote:
On 2014/8/17 18:32, Michael S. Tsirkin wrote:
On Fri, Aug 15, 2014 at 09:58
From: Bob Beckett
Create a scratch page for the two unused PDPs and set all the PTEs
for them to point to it.
This patch addresses a page fault, and subsequent hang in pipe
control flush. In these cases, the Main Graphic Arbiter Error
register [0x40A0] showed a TLB Page Fault error, and a high m
This is another drm-intel-collector updated notice:
http://cgit.freedesktop.org/~vivijim/drm-intel/log/?h=drm-intel-collector
Here goes the update list in order for better reviewers assignment:
Patch drm/i915: Bring UP Power Wells before disabling RC6. - Reviewer:
Patch drm/i915: Don't s
From: Deepak S
We need do forcewake before Disabling RC6, This is what the BIOS
expects while going into suspend.
v2: updated commit message. (Daniel)
Reviewer: Paulo Zanoni
Cc: Paulo Zanoni
Signed-off-by: Deepak S
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_pm.c | 6 ++
From: Chris Wilson
In the move over to use BIOS connector configs, we lost the ability to
force a specific set of connectors on or off. Try to remedy that by
dropping back to the old behavior if we detect a hard coded connector
config that tries to enable a connector (disabling is easy!).
Based
From: Ben Widawsky
v2: fix conflict on rebase.
Cc: Kenneth Graunke
Signed-off-by: Ben Widawsky
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_gem_context.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/dri
On 08/18/2014 12:15 PM, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä
Move the vlv_power_sequencer_pipe() after the IS_VALLEYVIEW() check
and flatten the rest of the function.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dp.c | 24
1 file
From: Clint Taylor
Pixel replicated modes should be 720 horizontal pixel and pixel
replicated by the HW across the HDMI cable at 2X pixel clock. Current
horizontal resolution of 1440 does not allow pixel duplication to
occur and scaling artifacts occur on the TV. HDMI certification
7-26 currently
From: Clint Taylor
Backlight on delay uses PWM enable time to seperate PWM to
backlight enable assert. Previous time difference used timing
from VDD enable which occur several seconds before resulting
in PWM starting 5ms after backlight enable. Changes to backlight
duty cycle take affect at the
From: Ville Syrjälä
VLV/CHV have a per-pipe panel power sequencer which locks onto the
port once used. We need to keep track wich power sequencers are
locked to which ports.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dp.c | 185 ++-
drivers
From: Ville Syrjälä
We need to turn the DP port off after the pipe, otherwise the pipe won't
turn off properly on certain pch platforms at least (happens on my ILK for
example). This also matches the BSpec modeset sequence better. We still
don't match the spec exactly though (eg. audio disable s
From: Ville Syrjälä
Introduce a new mutex (pps_mutex) to protect the power sequencer
state. For now this state includes want_panel_vdd as well as the
power sequencer registers.
We need a single mutex (as opposed to per port) because later on we
will need to deal with VLV/CHV which have multiple
From: Ville Syrjälä
We want to use the higher level vdd on func here. Not a big deal
yet (we'd just get the warn when things go awry) but when the
locking gets fixed this becomes more important.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dp.c | 2 +-
1 file changed, 1 insertio
From: Ville Syrjälä
On VLV/CHV the panel power sequencer may need to be "kicked" a bit to
lock onto the new port, and that needs to happen before any aux
transfers are attempted if we want the aux transfers to actaully
succeed. So turn on panel power (part of the "kick") before aux
transfers (DPM
From: Ville Syrjälä
Bspec says we should enable the DP port before enabling panel power,
and that the port must be enabled with training pattern 1. Do so.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dp.c | 172 +++-
1 file changed, 100 insert
From: Ville Syrjälä
Try to make sure we find the power sequencer that the BIOS used
by first looking for one which has the panel power enabled, then
fall back to one with VDD force bit enabled, and finally look at
just the port select bits. This should make us pick the correct
power sequencer whe
From: Ville Syrjälä
Looks nicer.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dp.c | 40
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 19a818f..e6b4
From: Ville Syrjälä
Less pointless indentation is always nice. There will be a bit more
code in this function once the power sequencer locking is fixed.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dp.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --gi
From: Ville Syrjälä
If we force vdd off warn if someone is still using it. With this
change the delayed vdd off work needs to check want_panel_vdd
itself to make sure it doesn't try to turn vdd off when someone
is using it.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dp.c | 7 +
From: Ville Syrjälä
Add a comment to explain why we care about the current want_panel_vdd
state in intel_dp_aux_ch().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dp.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i91
From: Ville Syrjälä
edp_* are now the lower level functions and intel_edp_* the higher level
ones. One should use them in pairs.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dp.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/g
From: Ville Syrjälä
Move the vlv_power_sequencer_pipe() after the IS_VALLEYVIEW() check
and flatten the rest of the function.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dp.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/
From: Ville Syrjälä
While wrestling with the VLV/CHV panel power sequencer I noticed the locking
in our edp vdd code was rather broken. This series aims to fix that by
introducing a power seqeuencer mutex. I was already thinking about using the
aux.hw_mutex for this since it's already locked arou
From: Ville Syrjälä
Passing the port as a parameter to PANEL_PORT_SELECT_VLV results in
neater code. Sadly the PCH port select bits aren't suitable for the
same treatment and the resulting macro would be much uglier, so
leave those defines as is.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/dr
From: Ville Syrjälä
Somehow the intel_ddi_set_vc_payload_alloc(false) call has ended up
in ironlake_crtc_disable() rather than haswell_crtc_disable(). Move it
to the correct place.
intel_ddi_disable_transcoder_func() already disables the vc payload
allocation so this doesn't actually do anything
On Fri, Aug 15, 2014 at 10:12 AM, Paulo Zanoni wrote:
> 2014-08-15 13:50 GMT-03:00 Rodrigo Vivi :
> >
> >
> >
> > On Fri, Aug 1, 2014 at 2:14 PM, Paulo Zanoni wrote:
> >>
> >> From: Paulo Zanoni
> >>
> >> The GEN6_PM* registers don't exist on BDW anymore, so when we read
> >> this file we trigg
On 08/12/2014 07:11 AM, Jani Nikula wrote:
This lets the userspace switch off the backlight using the backlight
class sysfs bl_power file. The switch is done using the power sequencer;
the backlight PWM, and everything else, remains enabled. The display
backlight won't draw power, but for maximum
gem_mmap seg faults when all tests are run together. This occurs because
the new-object subtest closes the gem object, but short-mmap assumes
it still exists. Thus gem_mmap__cpu() returns nil for addr and memset()
seg faults. This patch makes new-object and short-mmap create and
close their own gem
Piglit allows multiple -t and -x regular expressions to be
given on the command line. This patch enables run-tests.sh to
support that as well.
Signed-off-by: Mike Mason
---
scripts/run-tests.sh | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/scripts/run-tests.sh b/scrip
On 08/14/2014 11:48 AM, Ville Syrjälä wrote:
On Thu, Aug 14, 2014 at 11:09:25AM -0700, clinton.a.tay...@intel.com wrote:
From: Clint Taylor
Pixel replicated modes should be 720 horizontal pixel and pixel
replicated by the HW across the HDMI cable at 2X pixel clock. Current
horizontal resolutio
On 08/12/2014 04:07 AM, Ville Syrjälä wrote:
On Tue, Jul 29, 2014 at 02:58:23PM -0700, clinton.a.tay...@intel.com wrote:
From: Clint Taylor
CEA SD interlaced modes use a horizontal 720 pixels that are pixel replicated
to 1440. The current driver reports 1440 pixel to the OS and does not set p
On 08/12/2014 07:11 AM, Jani Nikula wrote:
Make it possible to change panel power control backlight state without
touching the PWM. No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dp.c | 39 ++-
1 file changed, 26 insertion
On 15 August 2014 20:14, Mason, Michael W wrote:
> This patch just adds kms_flip_event_leak to tests/.gitignore.
Patch merged, thanks.
>
> Signed-off-by: Mike Mason
> ---
> tests/.gitignore | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/tests/.gitignore b/tests/.gitignore index d14d8
On 18 August 2014 14:56, wrote:
> From: Tim Gore
>
> kms_flip_event_leak depends on cairo, so add it to the
> list of tests to skip (in Android.mk) if ANDROID_HAS_CAIRO
> is not set to 1.
Patch merged, thanks.
>
> Signed-off-by: Tim Gore
> ---
> tests/Android.mk | 3 ++-
> 1 file changed, 2
On Mon, Aug 18, 2014 at 03:54:02PM +0100, Thomas Daniel wrote:
> A previous commit broke aliasing PPGTT for lrc, resulting in a kernel oops
> on boot. Add a check so that is full PPGTT is not in use the context is
> populated with the aliasing PPGTT.
>
> Issue: VIZ-4278
> Signed-off-by: Thomas Dan
2014-08-18 5:29 GMT-03:00 Jani Nikula :
> On Fri, 15 Aug 2014, Damien Lespiau wrote:
>> We still have a few missing bits and pieces to have execlists enabled by
>> default eg. the error capture or the render state initialization and so
>> it wouldn't be wise to enable it by default on BDW just yet
A previous commit broke aliasing PPGTT for lrc, resulting in a kernel oops
on boot. Add a check so that is full PPGTT is not in use the context is
populated with the aliasing PPGTT.
Issue: VIZ-4278
Signed-off-by: Thomas Daniel
---
drivers/gpu/drm/i915/intel_lrc.c |7 +++
1 file changed,
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Monday, August 18, 2014 9:33 AM
> To: Daniel, Thomas; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 41/43] drm/i915/bdw: Enable Logical Ring
> Contexts (hence, Execlists)
>
> On Thu,
On Fri, Aug 15, 2014 at 03:59:32PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> If we're runtime suspended and try to use the plane interfaces, we
> will get a lot of WARNs saying we did the wrong thing.
>
> We need to get runtime PM references to pin the objects, and to
> change the fenc
From: Tim Gore
kms_flip_event_leak depends on cairo, so add it to the
list of tests to skip (in Android.mk) if ANDROID_HAS_CAIRO
is not set to 1.
Signed-off-by: Tim Gore
---
tests/Android.mk | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tests/Android.mk b/tests/Android.
Series pushed to -fixes, thanks for the patches and review.
BR,
Jani.
On Mon, 18 Aug 2014, Imre Deak wrote:
> Ville noticed that we can call ibx_digital_port_connected() which accesses
> the HW without holding any power well/runtime pm reference. Fix this by
> holding a display port power doma
On Mon, Aug 18, 2014 at 02:07:40PM +0100, Damien Lespiau wrote:
> On Mon, Aug 18, 2014 at 01:58:06PM +0100, Chris Wilson wrote:
> > On Mon, Aug 18, 2014 at 01:49:10PM +0100, Damien Lespiau wrote:
> > > Chris has decided that enough is enough. It's time to fixup dev Vs
> > > dev_priv. This is a mode
On Mon, Aug 18, 2014 at 01:58:06PM +0100, Chris Wilson wrote:
> On Mon, Aug 18, 2014 at 01:49:10PM +0100, Damien Lespiau wrote:
> > Chris has decided that enough is enough. It's time to fixup dev Vs
> > dev_priv. This is a modest contribution to the crusade.
> >
> > v2: Still use INTEL_INFO(), for
On Mon, Aug 18, 2014 at 01:49:10PM +0100, Damien Lespiau wrote:
> Chris has decided that enough is enough. It's time to fixup dev Vs
> dev_priv. This is a modest contribution to the crusade.
>
> v2: Still use INTEL_INFO(), for the (mythical!) case we want to hardcode
> the info struct with def
Pimp up the debug message that tells us we've been waiting for a vblank
that never arrived. Printing the pipe could lead a "doh!" moment where
we've been waiting for a vblank on a pipe that was off for instance.
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_display.c | 6 --
1
Chris has decided that enough is enough. It's time to fixup dev Vs
dev_priv. This is a modest contribution to the crusade.
v2: Still use INTEL_INFO(), for the (mythical!) case we want to hardcode
the info struct with defines (Chris)
Rename the macro argument from 'dev' to 'dev_priv' (Jani)
Atm, the HPD IRQ reenable timer can get rearmed right after it's
canceled. Also to access the HPD IRQ mask registers we need to wake up
the HW.
Solve both issues by converting the reenable timer to a delayed work and
grabbing a runtime PM reference in the work. By this we can also forgo
canceling
On Mon, 18 Aug 2014, Imre Deak wrote:
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 390ccc2..8a5a03f 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1189,8 +1189,8 @@ static void i915_hotplug_work_func(struct w
Atm we may leave eDP VDD enabled during system suspend after the CRTCs
are disabled through an HPD->DPCD read event. So disable VDD during
suspend at a point when no HPDs can occur.
Note that runtime suspend doesn't have the same problem, since there the
RPM ref held by VDD provides already the ne
Atm we may retrain the DP link even if the CRTC is inactive through
HPD work->intel_dp_check_link_status(). This in turn can lock up the PHY
(at least on BYT), since the DP port is disabled.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81948
Signed-off-by: Imre Deak
Reviewed-by: Ville S
Atm, the HPD IRQ reenable timer can get rearmed right after it's
canceled. Also to access the HPD IRQ mask registers we need to wake up
the HW.
Solve both issues by converting the reenable timer to a delayed work and
grabbing a runtime PM reference in the work. By this we can also forgo
canceling
Make sure these work handlers don't run after we system suspend or
unload the driver. Note that we don't cancel the handlers during runtime
suspend. That could lead to a lockup, since we take a runtime PM ref
from the handlers themselves. Fortunaltely canceling there is not needed
since the RPM ref
Ville noticed that we can call ibx_digital_port_connected() which accesses
the HW without holding any power well/runtime pm reference. Fix this by
holding a display port power domain reference around the whole hpd_pulse
handler.
Signed-off-by: Imre Deak
Reviewed-by: Ville Syrjälä
---
drivers/gp
From: Ville Syrjälä
Clear the override bits to make sure the hardware maanages
the TX FIFO reset master on its own.
v2: Squash with the earlier attempt at forcing the override bits
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_reg.h | 12
drivers/gpu/drm/i915/intel
From: Ville Syrjälä
CHV wants even rps opcodes so print a warning of the
min/max/rpe/rp1 values are odd, and warn if an odd value
slips through to valleyview_set_rps() and truncate it to
an even value.
Also add a comment to chv_freq_opcode() to make sure no one
changes the code without consideri
From: Ville Syrjälä
Here are a few remaining CHV patches from the big series [1].
I reworked some of these a bit.
The remaining patches from the big series are all power sequencer related,
and I'm currently reworking those too. Will post them separately once I have
something decent.
[1] http://
From: Ville Syrjälä
The register can house two different swing marging/deemph settings at
once. However only one gets used based on some other bits. Make sure we
set those bits correctly to make the hardware use the settings we
provided.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i9
From: Ville Syrjälä
init_clock_gating() is too late to read out the mem_freq. We already
want to print out the GPU MHz numbers before it's called. Move the
mem_freq setup to init_gt_powersave().
v2: Also kill the CHV_CZ_CLOCK_FREQ_MODE_* defines
Signed-off-by: Ville Syrjälä
---
drivers/gpu/dr
On 08/18/2014 12:21 PM, Ville Syrjälä wrote:
On Mon, Aug 18, 2014 at 07:31:58AM +0200, Juergen Gross wrote:
On 08/15/2014 12:21 PM, Ville Syrjälä wrote:
On Thu, Aug 14, 2014 at 05:55:11AM +0200, Juergen Gross wrote:
On 08/13/2014 05:07 PM, Jesse Barnes wrote:
On Fri, 8 Aug 2014 15:14:15 +0200
On Fri, 15 Aug 2014, Imre Deak wrote:
> On Fri, 2014-08-15 at 12:48 +0300, Jani Nikula wrote:
>> On Fri, 15 Aug 2014, Imre Deak wrote:
>> > On Wed, 2014-08-13 at 19:33 +0300, Ville Syrjälä wrote:
>> >> The series seems fine to me.
>> >>
>> >> Reviewed-by: Ville Syrjälä
>> >> for the rest as wel
On 15 August 2014 22:08, Mason, Michael W wrote:
> From: Mike Mason
>
This patch and the previous one (scripts: Allow multiple -t and -x
regular expressions for run-tests.sh) look fine, but they don't apply
because tabs have been converted to spaces. Can you check and re-send
with this fixed?
On Mon, Aug 18, 2014 at 07:31:58AM +0200, Juergen Gross wrote:
> On 08/15/2014 12:21 PM, Ville Syrjälä wrote:
> > On Thu, Aug 14, 2014 at 05:55:11AM +0200, Juergen Gross wrote:
> >> On 08/13/2014 05:07 PM, Jesse Barnes wrote:
> >>> On Fri, 8 Aug 2014 15:14:15 +0200
> >>> Daniel Vetter wrote:
> >>>
Before sharing common parts between the system and runtime s/r
handlers we WARNed if the runtime s/r handlers were called on GENs that
didn't support RPM. But this WARN is not correct if the same handler is
called from the system s/r path, since that can happen on any platform.
This also broke syst
On Mon, Aug 18, 2014 at 11:00:42AM +0100, Damien Lespiau wrote:
> Chris has decided that enough is enough. It's time to fixup dev Vs
> dev_priv. This is a modest contribution to the crusade.
>
> v2: Still use INTEL_INFO(), for the (mythical!) case we want to hardcode
> the info struct with def
Chris has decided that enough is enough. It's time to fixup dev Vs
dev_priv. This is a modest contribution to the crusade.
v2: Still use INTEL_INFO(), for the (mythical!) case we want to hardcode
the info struct with defines (Chris)
Rename the macro argument from 'dev' to 'dev_priv' (Jani)
On Mon, Aug 18, 2014 at 05:01:25PM +0800, Chen, Tiejun wrote:
> On 2014/8/18 16:21, Michael S. Tsirkin wrote:
> >On Mon, Aug 18, 2014 at 11:06:29AM +0800, Chen, Tiejun wrote:
> >>On 2014/8/17 18:32, Michael S. Tsirkin wrote:
> >>>On Fri, Aug 15, 2014 at 09:58:40AM +0800, Chen, Tiejun wrote:
> M
Hi Ville,
Apologize for the delay in reply.
For your inputs on the programming side (modeset global resources
handling and self documenting code parts), I agree with you and will
make the changes.
For opens related to info on the feature, internal discussions are
ongoing. I will get back to you on
On 2014/8/18 16:21, Michael S. Tsirkin wrote:
On Mon, Aug 18, 2014 at 11:06:29AM +0800, Chen, Tiejun wrote:
On 2014/8/17 18:32, Michael S. Tsirkin wrote:
On Fri, Aug 15, 2014 at 09:58:40AM +0800, Chen, Tiejun wrote:
Michael and Paolo,
Please re-post discussion on list. These off list ones ar
On Thu, 24 Jul 2014, Thomas Daniel wrote:
> From: Oscar Mateo
>
> The time has come, the Walrus said, to talk of many things.
FYI this causes https://bugs.freedesktop.org/show_bug.cgi?id=82740
> Signed-off-by: Oscar Mateo
> ---
> drivers/gpu/drm/i915/i915_drv.h |2 +-
> 1 file changed, 1
On Fri, 15 Aug 2014, Damien Lespiau wrote:
> We still have a few missing bits and pieces to have execlists enabled by
> default eg. the error capture or the render state initialization and so
> it wouldn't be wise to enable it by default on BDW just yet.
Also,
Bugzilla: https://bugs.freedesktop.
On Fri, 15 Aug 2014, Damien Lespiau wrote:
> Chris has decided that enough is enough. It's time to fixup dev Vs
> dev_priv and the, oh so awful, INTEL_INFO(). This is a modest
> contribution to the crusade.
> -#define for_each_pipe(p) for ((p) = 0; (p) < INTEL_INFO(dev)->num_pipes;
> (p)++)
> +
On Sun, 17 Aug 2014, Bertrik Sikken wrote:
> On 15-8-2014 3:43, Jani Nikula wrote:
>> On Thu, 14 Aug 2014, Bertrik Sikken wrote:
>
>>> Attached is dmesg output from booting kernel 3.14-2 (debian unstable)
>>> with drm.debug=0xe and the samsung_laptop module enabled, from my
>>> Samsung N150plus n
80 matches
Mail list logo
