[Intel-gfx] Steam in-house streaming is not working with Intel IvyBridge graphics on Linux as a client.

Hello people, I've been streaming a game from a Windows host to a Linux box with the following hardware: lspci -nnk | grep -i VGA -A2 Returns: 00:02.0 VGA compatible controller [0300]: Intel Corporation 3rd Gen Core processor Graphics Controller [8086:0166] (rev 09) Subsystem:

[Intel-gfx] [PATCH v2 16/43] drm/i915: s/_CURACNTR/CURCNTR(PIPE_A)/

From: Ville Syrjälä v2: Deal with _CURABASE too Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_debugfs.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 12 ++-- 2 files changed, 7 insertions(+), 7 deletions(-)

[Intel-gfx] [PATCH v2 31/43] drm/i915: Throw out some useless variables

From: Ville Syrjälä Drop some useless 'reg' variables when we only use them once. v2: A few more, including a few variable moves Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_irq.c | 3 +-

Re: [Intel-gfx] [RFC] Docs: drm: Move KMS properties table out to source files

On 09/22/2015 07:22 AM, Graham Whaley wrote: > On Wed, Sep 02, 2015 at 02:50:52PM +0100, Graham Whaley wrote: >>> (RFC/test - not for merging) >>> The below is a test of moving the large HTML KMS properties table >>> out >>> to markdown style in the appropriate files. >>> In the test we only use

Re: [Intel-gfx] [PATCH i-g-t] tests/gem_storedw_loop: Fix use after free for bufmgr

On 09/22/2015 11:02 AM, robert.beck...@intel.com wrote: > From: Robert Beckett > > Move bufmgr destruction to end of tests. This avoids use after free on > successive tests. > > This could be squashed with the following patch to aid bisectability: > > commit

[Intel-gfx] [PATCH] drm/i915: workaround bad DSL readout v3

On HSW at least (still testing other platforms, but should be harmless elsewhere), the DSL reg reads back as 0 when read around vblank start time. This ends up confusing the atomic start/end checking code, since it causes the update to appear as if it crossed a frame count boundary. Avoid the

Re: [Intel-gfx] [PATCH 1/2] drm/i915/bxt: Set oscaledcompmethod to enable scale value

On 9/22/2015 6:32 PM, Imre Deak wrote: On ma, 2015-09-21 at 23:00 +0530, Sivakumar Thulasimani wrote: Reviewed-by: Sivakumar Thulasimani On 9/18/2015 2:11 PM, Sonika Jindal wrote: Bspec update tells that we have to enable oscaledcompmethod instead of

Re: [Intel-gfx] [PATCH 1/2] drm/i915/bxt: Set oscaledcompmethod to enable scale value

On Wed, 2015-09-23 at 00:01 +0530, Sivakumar Thulasimani wrote: > > On 9/22/2015 6:32 PM, Imre Deak wrote: > > On ma, 2015-09-21 at 23:00 +0530, Sivakumar Thulasimani wrote: > >> Reviewed-by: Sivakumar Thulasimani > >> > >> On 9/18/2015 2:11 PM, Sonika Jindal

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Update modeset programming to use intermediate state (v2)

On Thu, Sep 10, 2015 at 07:40:25AM +0200, Maarten Lankhorst wrote: > Op 10-09-15 om 03:57 schreef Matt Roper: > > As suggested by Ville, the general flow should now roughly follow: > > > > // whatever the user wanted > > compute_final_atomic_state() > > > > // include all

Re: [Intel-gfx] [MIPI SEQ PARSING v2 PATCH 04/11] drm/i915: Using the approprite vbt size if vbt is not in mailbox4 of opregion

>-Original Message- >From: Jani Nikula [mailto:jani.nik...@linux.intel.com] >Sent: Thursday, September 17, 2015 5:48 PM >To: Deepak, M; intel-gfx@lists.freedesktop.org >Cc: Deepak, M >Subject: Re: [Intel-gfx] [MIPI SEQ PARSING v2 PATCH 04/11] drm/i915: Using >the approprite vbt size if

Re: [Intel-gfx] [MIPI SEQ PARSING v2 PATCH 05/11] drm/i915: Added support the v3 mipi sequence block

>-Original Message- >From: Jani Nikula [mailto:jani.nik...@linux.intel.com] >Sent: Thursday, September 17, 2015 8:09 PM >To: Deepak, M; intel-gfx@lists.freedesktop.org >Cc: Deepak, M >Subject: Re: [Intel-gfx] [MIPI SEQ PARSING v2 PATCH 05/11] drm/i915: Added >support the v3 mipi sequence

Re: [Intel-gfx] [MIPI SEQ PARSING v2 PATCH 04/11] drm/i915: Using the approprite vbt size if vbt is not in mailbox4 of opregion

>-Original Message- >From: Jani Nikula [mailto:jani.nik...@linux.intel.com] >Sent: Thursday, September 17, 2015 7:01 PM >To: Deepak, M; intel-gfx@lists.freedesktop.org >Cc: Deepak, M >Subject: Re: [Intel-gfx] [MIPI SEQ PARSING v2 PATCH 04/11] drm/i915: Using >the approprite vbt size if

Re: [Intel-gfx] [MIPI SEQ PARSING v2 PATCH 01/11] drm/i915: Adding the parsing logic for the i2c element

>-Original Message- >From: Jani Nikula [mailto:jani.nik...@linux.intel.com] >Sent: Thursday, September 17, 2015 2:48 PM >To: Deepak, M; intel-gfx@lists.freedesktop.org >Cc: Deepak, M >Subject: Re: [Intel-gfx] [MIPI SEQ PARSING v2 PATCH 01/11] drm/i915: Adding >the parsing logic for the

Re: [Intel-gfx] [PATCH 00/38] Fixes related to incorrect usage of unsigned types

On 09/22/2015 11:13 AM, Andrzej Hajda wrote: On 09/21/2015 03:42 PM, David Howells wrote: Andrzej Hajda wrote: Semantic patch finds comparisons of types: unsigned < 0 unsigned >= 0 The former is always false, the latter is always

Re: [Intel-gfx] [PATCH 04/23] drm: Add drm structures for palette color property

Hi Ville, On 22 September 2015 at 16:00, Ville Syrjälä wrote: > On Tue, Sep 22, 2015 at 02:53:54PM +0100, Emil Velikov wrote: >> On 22 September 2015 at 14:08, Daniel Vetter wrote: >> > On Wed, Sep 16, 2015 at 11:07:01PM +0530, Shashank Sharma

Re: [Intel-gfx] [PATCH] drm/i915: workaround bad DSL readout v2

On Thu, Sep 10, 2015 at 02:38:53PM -0700, Jesse Barnes wrote: > On HSW at least (still testing other platforms, but should be harmless > elsewhere), the DSL reg reads back as 0 when read around vblank start > time. This ends up confusing the atomic start/end checking code, since > it causes the

[Intel-gfx] [PATCH] drm/i915: eDP HPD connected check to reduce T3 time

From: Clint Taylor To reduce eDP T3 time check for digital port connected instead of msleep. Maintain VBT time if HPD is not asserted on the port. Current eDP T3 time is an msleep for the panel_power_up time specified in VBT. The eDP specification allows maximum T3

Re: [Intel-gfx] [regression] [git pull] drm for 4.3

On Tue, Sep 22, 2015 at 05:13:55PM +0200, Daniel Vetter wrote: > On Tue, Sep 22, 2015 at 08:00:17AM -0700, Jesse Barnes wrote: > > Cc'ing Maarten and Matt; I'm guessing this may be related to one of > > their recent patches. Sounds like this showed up before my recent work, but I think I might

Re: [Intel-gfx] [PATCH] drm/i915: eDP HPD connected check to reduce T3 time

On Tue, Sep 22, 2015 at 10:09:39AM -0700, clinton.a.tay...@intel.com wrote: > From: Clint Taylor > > To reduce eDP T3 time check for digital port connected instead of > msleep. Maintain VBT time if HPD is not asserted on the port. > > Current eDP T3 time is an msleep

Re: [Intel-gfx] [PATCH 00/43] drm/i915: Type safe register read/write and a ton of prep work

On Fri, Sep 18, 2015 at 08:03:13PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Inspired by the recent misplaced parenthesis fix from Damien, I decided to try > and see what it would take to make our register access type safe. By that mean

[Intel-gfx] [PATCH i-g-t] tests/gem_storedw_loop: Fix use after free for bufmgr

From: Robert Beckett Move bufmgr destruction to end of tests. This avoids use after free on successive tests. This could be squashed with the following patch to aid bisectability: commit 0679702150157706a6def66b893b29c16345f4db Author: Jesse Barnes

Re: [Intel-gfx] [PATCH v2 5/6] drm/i915/guc: Media domain bit needed when notify GuC rc6 state

On Tue, Sep 22, 2015 at 01:48:44PM -0700, yu@intel.com wrote: > From: Alex Dai > > GuC expects two bits for Render and Media domain separately when > driver sends data via host2guc SAMPLE_FORCEWAKE. Bit 0 is for > Render and bit 1 is for Media domain. > > v1: Add

Re: [Intel-gfx] [PATCH] drm/i915/guc: Don't send flips to GuC

On Tue, Sep 22, 2015 at 04:11:48PM -0700, yu@intel.com wrote: > From: Sagar Arun Kamble > > Due to flip interrupts GuC stays awake always and GT does not enter > RC6. Do not route those interrupts to GuC for now. Driver won't touch > DE_GUCRMR register and leave it

Re: [Intel-gfx] [regression] [git pull] drm for 4.3

On Tue, Sep 22, 2015 at 09:15:58AM -0700, Matt Roper wrote: > On Tue, Sep 22, 2015 at 05:13:55PM +0200, Daniel Vetter wrote: > > On Tue, Sep 22, 2015 at 08:00:17AM -0700, Jesse Barnes wrote: > > > Cc'ing Maarten and Matt; I'm guessing this may be related to one of > > > their recent patches.

[Intel-gfx] [PATCH v2 1/6] drm/i915/guc: Fix a bug in GuC status check

From: Alex Dai Bit 16 of GuC status indicates resuming from RC6. The LAPIC_DONE status is a reliable readiness flag only when resuming from RC6. This fix a racing issue that allocation of doorbell fails whilst GuC init is not finished. Signed-off-by: Alex Dai

[Intel-gfx] [PATCH v2 6/6] drm/i915/guc: Enable GuC submission, where supported

From: Dave Gordon This is to enable command submission via GuC. Signed-off-by: Dave Gordon --- drivers/gpu/drm/i915/i915_params.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_params.c

[Intel-gfx] [PATCH v2 4/6] drm/i915/guc: Don't send flips to GuC

From: Sagar Arun Kamble Due to flip interrupts GuC stays awake always and GT does not enter RC6. Do not route those interrupts to GuC for now. Driver won't touch DE_GUCRMR register and leave it as what default value. Signed-off-by: Sagar Arun Kamble

[Intel-gfx] [PATCH v2 3/6] drm/i915/guc: Add host2guc notification for suspend and resume

From: Alex Dai Add host2guc interfaces to nofigy GuC power state changes when enter or resume from power saving state. v1: Change to a more flexible way when fill host to GuC scratch data in order to remove hard coding. Signed-off-by: Alex Dai ---

[Intel-gfx] [PATCH v2 5/6] drm/i915/guc: Media domain bit needed when notify GuC rc6 state

From: Alex Dai GuC expects two bits for Render and Media domain separately when driver sends data via host2guc SAMPLE_FORCEWAKE. Bit 0 is for Render and bit 1 is for Media domain. v1: Add parameters definition to avoid magic value Signed-off-by: Alex Dai

[Intel-gfx] [PATCH v2 0/6] Several GuC related patches

From: Alex Dai Collection of some latest fixes for GuC. v2: This version changes the way how driver handle DE_GUCRMR (0x44054) in patch "Don't send flips to

[Intel-gfx] [PATCH v2 2/6] drm/i915/guc: Add GuC css header parser

From: Alex Dai By using information from GuC css header, we can eliminate some hard code w.r.t size of some components of firmware. v2: Add indent into DOC to make fixed-width format rather than change the tmpl. v1: 1) guc_css_header is defined as __packed now 2) Add and

Re: [Intel-gfx] [PATCH] drm/i915: eDP HPD connected check to reduce T3 time

On 09/22/2015 10:27 AM, Ville Syrjälä wrote: On Tue, Sep 22, 2015 at 10:09:39AM -0700, clinton.a.tay...@intel.com wrote: From: Clint Taylor To reduce eDP T3 time check for digital port connected instead of msleep. Maintain VBT time if HPD is not asserted on the

[Intel-gfx] linux-next: manual merge of the akpm tree with the drm-misc tree

Hi Andrew, Today's linux-next merge of the akpm tree got a conflict in: drivers/gpu/drm/drm_irq.c between commit: 4e32087d8341 ("drm: Use vblank timestamps to guesstimate how many vblanks were missed") from the drm-misc tree and patch: "Remove abs64()" from the akpm tree. I fixed

[Intel-gfx] linux-next: build warning after merge of the drm-misc tree

Hi all, After merging the drm-misc tree, today's linux-next build (arm multi_v7_defconfig) produced this warning: drivers/gpu/drm/drm_crtc.c: In function 'drm_fb_release': drivers/gpu/drm/drm_crtc.c:3494:21: warning: unused variable 'dev' [-Wunused-variable] struct drm_device *dev =

Re: [Intel-gfx] [PATCH 1/2] drm/i915/bxt: Set oscaledcompmethod to enable scale value

On 9/23/2015 1:02 AM, Imre Deak wrote: On Wed, 2015-09-23 at 00:01 +0530, Sivakumar Thulasimani wrote: On 9/22/2015 6:32 PM, Imre Deak wrote: On ma, 2015-09-21 at 23:00 +0530, Sivakumar Thulasimani wrote: Reviewed-by: Sivakumar Thulasimani On 9/18/2015

[Intel-gfx] [PATCH] drm/i915/guc: Enable GuC submission, where supported

From: Dave Gordon This is to enable command submission via GuC. Signed-off-by: Dave Gordon Signed-off-by: Alex Dai --- drivers/gpu/drm/i915/i915_params.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff

[Intel-gfx] [PATCH] drm/i915/guc: Don't send flips to GuC

From: Sagar Arun Kamble Due to flip interrupts GuC stays awake always and GT does not enter RC6. Do not route those interrupts to GuC for now. Driver won't touch DE_GUCRMR register and leave it as what default value. Signed-off-by: Sagar Arun Kamble

Re: [Intel-gfx] [PATCH v2 6/7] drm/i915/guc: Notify coarse power gating configuration to GuC properly

On 09/21/2015 09:51 AM, Yu Dai wrote: On 09/11/2015 09:47 PM, Sagar Arun Kamble wrote: > From: Alex Dai > > GuC expects two bits for Render and Media domain separately when > driver sends data via host2guc SAMPLE_FORCEWAKE when full coarse power > gating is enabled. Bit 0 is

Re: [Intel-gfx] [PULL] topic/drm-misc

On Tue, Sep 22, 2015 at 11:05:00AM +0200, Daniel Vetter wrote: > Hi Dave, > > Updated drm-misc pull, now with backmerge and atomic fbdev: > - better atomic helpers for runtime pm drivers > - atomic fbdev > - dp aux i2c STATUS_UPDATE handling (for short i2c replies from the sink) > - bunch of

Re: [Intel-gfx] [PATCH 00/38] Fixes related to incorrect usage of unsigned types

On 09/21/2015 03:42 PM, David Howells wrote: > Andrzej Hajda wrote: > >> Semantic patch finds comparisons of types: >> unsigned < 0 >> unsigned >= 0 >> The former is always false, the latter is always true. >> Such comparisons are useless,

Re: [Intel-gfx] [PATCH 03/11] drm/i915: Mark debug mod options as _unsafe

On Tue, 08 Sep 2015, Daniel Vetter wrote: > We don't want random people to touch these. > > Especially true since we've just screwed up SKL by holding it way too > long under the preliminary flag because of some ABI issues. And now > there's howtos all over the internets

Re: [Intel-gfx] [PATCH 01/11] drm: s/int crtc/unsigned int pipe/ straggles

On Tue, Sep 15, 2015 at 09:29:41AM +0200, Thierry Reding wrote: > On Mon, Sep 14, 2015 at 10:43:42PM +0300, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > Finish the recent replacement of 'int pipe' with 'unsigned int pipe' > > > > Cc:

Re: [Intel-gfx] Revert "sna: Coldplug unknown connections as well"

On Tue, Sep 22, 2015 at 10:46:09AM +0200, Sedat Dilek wrote: > On Mon, Sep 21, 2015 at 2:52 PM, Chris Wilson > wrote: > > On Mon, Sep 21, 2015 at 02:48:03PM +0200, Sedat Dilek wrote: > >> On Mon, Sep 21, 2015 at 11:42 AM, Chris Wilson > >>

Re: [Intel-gfx] [MIPI SEQ PARSING v2 PATCH 03/11] drm/i915: Parsing VBT if size of VBT exceeds 6KB

On Tue, 22 Sep 2015, "Deepak, M" wrote: >>-Original Message- >>From: Jani Nikula [mailto:jani.nik...@linux.intel.com] >>Sent: Thursday, September 17, 2015 5:41 PM >>To: Deepak, M; intel-gfx@lists.freedesktop.org >>Cc: Deepak, M >>Subject: Re: [Intel-gfx] [MIPI SEQ

Re: [Intel-gfx] [PATCH 04/23] drm: Add drm structures for palette color property

Regards Shashank On 9/21/2015 10:16 PM, Ville Syrjälä wrote: On Wed, Sep 16, 2015 at 11:07:01PM +0530, Shashank Sharma wrote: From: Kausal Malladi This patch adds new structures in DRM layer for Palette color correction.These structures will be used by user space

Re: [Intel-gfx] [PATCH 11/11] drm: Fix vblank timestamp races

On Mon, Sep 14, 2015 at 10:43:52PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > The vblank timestamp ringbuffer only has two entries, so if the > vblank->count is incremented by an even number readers may end up seeing > the new vblank

Re: [Intel-gfx] [PATCH 1/5] drm/i915: Increase maximum polling time to 50ms for forcewake request/clear ack

On 08/26/2015 10:26 AM, Daniel Vetter wrote: On Sun, Aug 23, 2015 at 05:52:47PM +0530, Sagar Arun Kamble wrote: On BXT, We Observe timeout for forcewake request completion with 2ms polling period as given here: [drm:fw_domains_get] ERROR render: timed out waiting for forcewake ack request.

Re: [Intel-gfx] [PATCH 1/5] drm/i915: Increase maximum polling time to 50ms for forcewake request/clear ack

On Tue, Sep 22, 2015 at 10:06:47AM +0100, Tvrtko Ursulin wrote: > > On 08/26/2015 10:26 AM, Daniel Vetter wrote: > >On Sun, Aug 23, 2015 at 05:52:47PM +0530, Sagar Arun Kamble wrote: > >>On BXT, We Observe timeout for forcewake request completion with 2ms > >>polling period as given here: >

[Intel-gfx] [PULL] drm-intel-next

Hi Dave, Another pull to make you open drm-next ;-) drm-intel-next-2015-09-11: - initialize backlight from VBT as fallback (Jani) - hpd A support from Ville - various atomic polish all over (mostly from Maarten) - first parts of virtualize gpu guest support on bdw from Zhiyuan Lv - GuC fixes

[Intel-gfx] [PULL] topic/drm-misc

Hi Dave, Updated drm-misc pull, now with backmerge and atomic fbdev: - better atomic helpers for runtime pm drivers - atomic fbdev - dp aux i2c STATUS_UPDATE handling (for short i2c replies from the sink) - bunch of constify patches - various polish all over - inital kerneldoc for vga switcheroo

Re: [Intel-gfx] [MIPI SEQ PARSING v2 PATCH 03/11] drm/i915: Parsing VBT if size of VBT exceeds 6KB

>-Original Message- >From: Jani Nikula [mailto:jani.nik...@linux.intel.com] >Sent: Thursday, September 17, 2015 5:41 PM >To: Deepak, M; intel-gfx@lists.freedesktop.org >Cc: Deepak, M >Subject: Re: [Intel-gfx] [MIPI SEQ PARSING v2 PATCH 03/11] drm/i915: Parsing >VBT if size of VBT exceeds

Re: [Intel-gfx] [PATCH] drm/i915/skl: Don't clear all watermarks when updating. (v2)

On Mon, Sep 21, 2015 at 02:48:56PM +0100, Damien Lespiau wrote: > On Tue, Jul 21, 2015 at 10:42:53AM -0700, Bob Paauwe wrote: > > Clearing the watermarks for all pipes/planes when updating the > > watermarks for a single CRTC change seems like the wrong thing to > > do here. As is, this code will

Re: [Intel-gfx] [PATCH 00/23] Color Management for DRM

On Wed, Sep 16, 2015 at 11:06:57PM +0530, Shashank Sharma wrote: > This patch set adds Color Manager implementation in DRM layer. Color Manager > is an extension in DRM framework to support color correction/enhancement. > > Various Hardware platforms can support several color correction

Re: [Intel-gfx] [PATCH 04/23] drm: Add drm structures for palette color property

On 22 September 2015 at 14:08, Daniel Vetter wrote: > On Wed, Sep 16, 2015 at 11:07:01PM +0530, Shashank Sharma wrote: >> From: Kausal Malladi >> >> This patch adds new structures in DRM layer for Palette color >> correction.These structures will be used

Re: [Intel-gfx] [RFC] Docs: drm: Move KMS properties table out to source files

On Wed, Sep 02, 2015 at 02:50:52PM +0100, Graham Whaley wrote: > > (RFC/test - not for merging) > > The below is a test of moving the large HTML KMS properties table > > out > > to markdown style in the appropriate files. > > In the test we only use the first few rows of the existing KMS > > table

[Intel-gfx] [PATCH] drm/fbdev: Update legacy plane->fb refcounting for atomic restore

From: Matt Roper Starting with commit commit 28cc504e8d52248962f5b485bdc65f539e3fe21d Author: Rob Clark Date: Tue Aug 25 15:36:00 2015 -0400 drm/i915: enable atomic fb-helper I've been seeing some panics on

Re: [Intel-gfx] [PATCH] drm/fbdev: Update legacy plane->fb refcounting for atomic restore

Hi On Tue, Sep 22, 2015 at 12:56 PM, Daniel Vetter wrote: > From: Matt Roper > > Starting with commit > > commit 28cc504e8d52248962f5b485bdc65f539e3fe21d > Author: Rob Clark > Date: Tue Aug 25

[Intel-gfx] [drm-intel:topic/drm-misc 44/51] drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c:483:26: warning: initialization from incompatible pointer type

tree: git://anongit.freedesktop.org/drm-intel topic/drm-misc head: 4e32087d83411e84d332db444f27e4cad4834ee1 commit: 5f8b9052a82e9b7ef6360553d8f493581267f594 [44/51] drm: Stop using linedur_ns and pixeldur_ns for vblank timestamps config: i386-randconfig-r0-201538 (attached as .config)

Re: [Intel-gfx] [PATCH 03/38] drm/i915: fix handling gen8_emit_flush_coherentl3_wa result

On Mon, Sep 21, 2015 at 04:59:58PM +0300, Jani Nikula wrote: > On Mon, 21 Sep 2015, Andrzej Hajda wrote: > > The function can return negative value. > > > > The problem has been detected using proposed semantic patch > >

Re: [Intel-gfx] [PATCH 1/5] drm/i915: Increase maximum polling time to 50ms for forcewake request/clear ack

On 09/22/2015 10:15 AM, Chris Wilson wrote: On Tue, Sep 22, 2015 at 10:06:47AM +0100, Tvrtko Ursulin wrote: On 08/26/2015 10:26 AM, Daniel Vetter wrote: On Sun, Aug 23, 2015 at 05:52:47PM +0530, Sagar Arun Kamble wrote: On BXT, We Observe timeout for forcewake request completion with 2ms

Re: [Intel-gfx] [PATCH 11/11] drm: Fix vblank timestamp races

Op 22-09-15 om 11:10 schreef Daniel Vetter: > On Mon, Sep 14, 2015 at 10:43:52PM +0300, ville.syrj...@linux.intel.com wrote: >> From: Ville Syrjälä >> >> The vblank timestamp ringbuffer only has two entries, so if the >> vblank->count is incremented by an even

Re: [Intel-gfx] [PATCH 03/11] drm/i915: Mark debug mod options as _unsafe

On Tue, Sep 22, 2015 at 12:34:23PM +0300, Jani Nikula wrote: > On Tue, 08 Sep 2015, Daniel Vetter wrote: > > We don't want random people to touch these. > > > > Especially true since we've just screwed up SKL by holding it way too > > long under the preliminary flag

Re: [Intel-gfx] [PATCH] drm/fbdev: Update legacy plane->fb refcounting for atomic restore

Hey, Op 22-09-15 om 11:55 schreef Daniel Vetter: > From: Matt Roper > > Starting with commit > > commit 28cc504e8d52248962f5b485bdc65f539e3fe21d > Author: Rob Clark > Date: Tue Aug 25 15:36:00 2015 -0400 > >

Re: [Intel-gfx] [PATCH] drm/fbdev: Update legacy plane->fb refcounting for atomic restore

Hi On Tue, Sep 22, 2015 at 12:33 PM, Maarten Lankhorst wrote: > Hey, > > Op 22-09-15 om 11:55 schreef Daniel Vetter: >> From: Matt Roper >> >> Starting with commit >> >> commit 28cc504e8d52248962f5b485bdc65f539e3fe21d >>

Re: [Intel-gfx] [PATCH] drm/fbdev: Update legacy plane->fb refcounting for atomic restore

Hi On Tue, Sep 22, 2015 at 11:55 AM, Daniel Vetter wrote: > From: Matt Roper > > Starting with commit > > commit 28cc504e8d52248962f5b485bdc65f539e3fe21d > Author: Rob Clark > Date: Tue Aug 25

[Intel-gfx] [PATCH] drm/fbdev: Update legacy plane->fb refcounting for atomic restore

From: Matt Roper Starting with commit commit 28cc504e8d52248962f5b485bdc65f539e3fe21d Author: Rob Clark Date: Tue Aug 25 15:36:00 2015 -0400 drm/i915: enable atomic fb-helper I've been seeing some panics on

Re: [Intel-gfx] Revert "sna: Coldplug unknown connections as well"

On Tue, Sep 22, 2015 at 11:27 AM, Chris Wilson wrote: > On Tue, Sep 22, 2015 at 10:46:09AM +0200, Sedat Dilek wrote: >> On Mon, Sep 21, 2015 at 2:52 PM, Chris Wilson >> wrote: >> > On Mon, Sep 21, 2015 at 02:48:03PM +0200, Sedat Dilek wrote:

Re: [Intel-gfx] [PATCH 11/11] drm: Fix vblank timestamp races

On Tue, Sep 22, 2015 at 01:15:01PM +0200, Maarten Lankhorst wrote: > Op 22-09-15 om 11:10 schreef Daniel Vetter: > > On Mon, Sep 14, 2015 at 10:43:52PM +0300, ville.syrj...@linux.intel.com > > wrote: > >> From: Ville Syrjälä > >> > >> The vblank timestamp

[Intel-gfx] [PATCH] drm/i915: Stop calling intel_prepare_ddi during power well initialization.

The comment removed along with the calls explains why they shouldn't be here: /* DDI buffer programming unnecessary during driver-load/resume * as it's already done during modeset initialization then. * It's also invalid here as encoder list is still uninitialized. */ And the protection is

[Intel-gfx] [regression] [git pull] drm for 4.3

On Tue, Sep 22, 2015 at 08:00:17AM -0700, Jesse Barnes wrote: > Cc'ing Maarten and Matt; I'm guessing this may be related to one of > their recent patches. Adding Jairo to track this regression. -Daniel > > Jesse > > On 09/21/2015 11:48 AM, Dave Jones wrote: > > On Mon, Sep 07, 2015 at

Re: [Intel-gfx] [PATCH 0/8] [RFC] Link training test

Thierry Redding is working on some improved dp helper libraries for link training. Would make lots of sense to have all that aligned. Adding him and dri-devel. -Daniel On Tue, Sep 8, 2015 at 2:27 PM, Ander Conselvan de Oliveira wrote: > Hi, > > There's

Re: [Intel-gfx] [PATCH 1/2] drm/core: Preserve the framebuffer after removing it.

Hi On Wed, Sep 9, 2015 at 5:02 PM, Daniel Vetter wrote: > On Wed, Sep 09, 2015 at 04:40:56PM +0200, Maarten Lankhorst wrote: >> Previously RMFB and fd close chose to disable any plane that had >> an active framebuffer from this file. If it was a primary plane the >> crtc was

Re: [Intel-gfx] [PATCH 2/2] drm/core: Preserve the fb id on close.

Hi On Wed, Sep 9, 2015 at 4:40 PM, Maarten Lankhorst wrote: > Keep the fb_id, which means that any application exiting without > unsetting the framebuffer from all planes will preserve its contents. > > This is similar to preserving the initial framebuffer,

Re: [Intel-gfx] [git pull] drm for 4.3

Cc'ing Maarten and Matt; I'm guessing this may be related to one of their recent patches. Jesse On 09/21/2015 11:48 AM, Dave Jones wrote: > On Mon, Sep 07, 2015 at 02:45:59PM -0400, Dave Jones wrote: > > On Fri, Sep 04, 2015 at 11:40:53PM +0100, Dave Airlie wrote: > > > > > > Hi Linus, >

Re: [Intel-gfx] [PATCH 11/11] drm: Fix vblank timestamp races

On Tue, Sep 22, 2015 at 11:10:50AM +0200, Daniel Vetter wrote: > On Mon, Sep 14, 2015 at 10:43:52PM +0300, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > The vblank timestamp ringbuffer only has two entries, so if the > > vblank->count is

Re: [Intel-gfx] [PATCH 02/23] drm: Add structure for querying palette color capabilities

On Wed, Sep 16, 2015 at 10:51:31AM -0700, Matt Roper wrote: > On Wed, Sep 16, 2015 at 11:06:59PM +0530, Shashank Sharma wrote: > > From: Kausal Malladi > > > > The DRM color management framework is targeting various hardware > > platforms and drivers. Different platforms

Re: [Intel-gfx] [PATCH 04/23] drm: Add drm structures for palette color property

On Wed, Sep 16, 2015 at 11:07:01PM +0530, Shashank Sharma wrote: > From: Kausal Malladi > > This patch adds new structures in DRM layer for Palette color > correction.These structures will be used by user space agents > to configure appropriate number of samples and

Re: [Intel-gfx] [PATCH 10/23] drm/i915: Add gamma correction handlers

On Wed, Sep 16, 2015 at 11:07:07PM +0530, Shashank Sharma wrote: > I915 driver registers gamma correction as palette correction > property with DRM layer. This patch adds set_property() and get_property() > handlers for pipe level gamma correction. > > The set function attaches the Gamma

Re: [Intel-gfx] [PATCH 10/23] drm/i915: Add gamma correction handlers

On Tue, Sep 22, 2015 at 03:15:11PM +0200, Daniel Vetter wrote: > On Wed, Sep 16, 2015 at 11:07:07PM +0530, Shashank Sharma wrote: > > I915 driver registers gamma correction as palette correction > > property with DRM layer. This patch adds set_property() and get_property() > > handlers for pipe

[Intel-gfx] [PATCH v3] drm/i915: Clean up associated VMAs on context destruction

From: Tvrtko Ursulin Prevent leaking VMAs and PPGTT VMs when objects are imported via flink. Scenario is that any VMAs created by the importer will be left dangling after the importer exits, or destroys the PPGTT context with which they are associated. This is caused

[Intel-gfx] [drm-intel:topic/drm-misc 47/51] drivers/gpu/drm/drm_irq.c:125: warning: No description found for parameter 'flags'

tree: git://anongit.freedesktop.org/drm-intel topic/drm-misc head: 4e32087d83411e84d332db444f27e4cad4834ee1 commit: 08caf85167b5f7835249c4a7df646696de95ab01 [47/51] drm: Pass flags to drm_update_vblank_count() config: i386-allnoconfig (attached as .config) reproduce: git checkout

Re: [Intel-gfx] [PATCH 1/2] drm/i915/bxt: Set oscaledcompmethod to enable scale value

On ma, 2015-09-21 at 23:00 +0530, Sivakumar Thulasimani wrote: > Reviewed-by: Sivakumar Thulasimani > > On 9/18/2015 2:11 PM, Sonika Jindal wrote: > > Bspec update tells that we have to enable oscaledcompmethod instead of > > ouniqetrangenmethod for enabling

Re: [Intel-gfx] [PATCH 11/11] drm: Fix vblank timestamp races

On Tue, Sep 22, 2015 at 03:36:44PM +0300, Ville Syrjälä wrote: > On Tue, Sep 22, 2015 at 11:10:50AM +0200, Daniel Vetter wrote: > > On Mon, Sep 14, 2015 at 10:43:52PM +0300, ville.syrj...@linux.intel.com > > wrote: > > > From: Ville Syrjälä > > > > > > The vblank

Re: [Intel-gfx] [PATCH 05/23] drm: Add structure to set/get a CTM color property

On Wed, Sep 16, 2015 at 11:07:02PM +0530, Shashank Sharma wrote: > From: Kausal Malladi > > Color Manager framework defines a color correction property for color > space transformation and Gamut mapping. This property is called CTM (Color > Transformation Matrix). > >

Re: [Intel-gfx] [PATCH 09/23] drm/i915: Register pipe color capabilities

On Wed, Sep 16, 2015 at 11:07:06PM +0530, Shashank Sharma wrote: > DRM color manager contains these color properties: > > 1. "crtc_palette_capabilities_property": to allow a > core driver to load and showcase its color correction > capabilities to user space. > 2. "ctm": Color transformation

[Intel-gfx] [PATCH] drm/i915: Do not update pipe state when crtc is inactive.

Nothing good can come from detaching scalers or updating pipe config when the crtc is already disabled. Touching registers while the crtc and power wells are disabled causes unclaimed register access warnings. Reported-by: Mika Kuoppala Signed-off-by: Maarten Lankhorst

Re: [Intel-gfx] [PATCH 1/2] drm/core: Preserve the framebuffer after removing it.

Hi On Thu, Sep 10, 2015 at 12:15 PM, Tvrtko Ursulin wrote: > On 09/10/2015 10:56 AM, Daniel Vetter wrote: >> That's not different from the compositor just freezing instead of >> crashing: Screen contents stays on and nothing happens. Imo this really is >> all just

Re: [Intel-gfx] [PATCH 04/23] drm: Add drm structures for palette color property

On Tue, Sep 22, 2015 at 02:53:54PM +0100, Emil Velikov wrote: > On 22 September 2015 at 14:08, Daniel Vetter wrote: > > On Wed, Sep 16, 2015 at 11:07:01PM +0530, Shashank Sharma wrote: > >> From: Kausal Malladi > >> > >> This patch adds new structures in

Re: [Intel-gfx] [PATCH 1/2] drm/core: Preserve the framebuffer after removing it.

On 09/22/2015 03:53 PM, David Herrmann wrote: Hi On Thu, Sep 10, 2015 at 12:15 PM, Tvrtko Ursulin wrote: On 09/10/2015 10:56 AM, Daniel Vetter wrote: That's not different from the compositor just freezing instead of crashing: Screen contents stays on and

Re: [Intel-gfx] [BXT DMC PATCHES 0/3] Extended dmc support for broxton.

On ti, 2015-08-04 at 22:02 +0530, Animesh Manna wrote: > This patches will extend the support for broxton. > > Earlier these patches are sent part of "Redesign of dmc firmware loading" > patch series. > http://lists.freedesktop.org/archives/intel-gfx/2015-July/072331.html > > To make it simple,

Re: [Intel-gfx] [PATCH 05/23] drm: Add structure to set/get a CTM color property

On Wed, Sep 16, 2015 at 11:07:02PM +0530, Shashank Sharma wrote: > From: Kausal Malladi > > Color Manager framework defines a color correction property for color > space transformation and Gamut mapping. This property is called CTM (Color > Transformation Matrix). > >

[Intel-gfx] [drm-intel:topic/drm-misc 53/53] drivers/gpu/drm/drm_crtc.c:3494:21: warning: unused variable 'dev'

tree: git://anongit.freedesktop.org/drm-intel topic/drm-misc head: 3d2e74c944327b0d4731cecff62fd5e1a8e4816f commit: 3d2e74c944327b0d4731cecff62fd5e1a8e4816f [53/53] drm/core: Preserve the fb id on close. config: mips-jz4740 (attached as .config) reproduce: wget