On Tue, Jan 26, 2016 at 01:05:28PM -0800, Joe Konno wrote:
> On 01/26/2016 12:51 PM, Daniel Vetter wrote:
> > On Tue, Jan 26, 2016 at 11:36:54AM -0800, Joe Konno wrote:
> >> From: Joe Konno
> >>
> >> In tracking down a watermark bug, I discovered the pch and cpu underrun
> >>
On 26/01/16 16:59, Chris Wilson wrote:
On Tue, Jan 26, 2016 at 04:23:28PM +, Tvrtko Ursulin wrote:
On 26/01/16 15:10, Chris Wilson wrote:
On Tue, Jan 26, 2016 at 02:53:31PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
On Wed, Jan 27, 2016 at 03:43:49PM +, daniele.ceraolospu...@intel.com wrote:
> From: Daniele Ceraolo Spurio
>
> While running some tests on the scheduler patches with rpm enabled I
> came across a corruption in the ringbuffer, which was root-caused to
> the
From: Tvrtko Ursulin
This enables mapping via CPU using the proper DRM mmap API for
better debug (Valgrind) and implementation symmetry in the
driver.
v2:
* Use normal mutex, skip domain management and pin pages. (Chris Wilson)
* No need to drop struct mutex over
From: "Kumar, Mahesh"
Don't use pipe pixel rate for plane pixel rate. Calculate plane pixel according
to formula
adjusted plane_pixel_rate = adjusted pipe_pixel_rate * downscale ammount
downscale amount = max[1, src_h/dst_h] * max[1, src_w/dst_w]
if 90/270 rotation use
From: "Kumar, Mahesh"
don't always use 8 ddb as minimum, instead calculate using proper
algorithm.
v2: optimizations as per Matt's comments.
Cc: matthew.d.ro...@intel.com
Signed-off-by: Kumar, Mahesh
---
drivers/gpu/drm/i915/intel_pm.c | 50
From: "Kumar, Mahesh"
if downscaling is enabled plane data rate increases according to scaling
amount. take scaling amount under consideration while calculating plane
data rate
v2: Address Matt's comments, where data rate was overridden because of
missing else.
Cc:
From: "Kumar, Mahesh"
Use plane size for relative data rate calculation. don't always use
pipe source width & height.
adjust height & width according to rotation.
use plane size for watermark calculations also.
v2: Address Matt's comments.
Use
This is needed for WM computation workaround for arbitrated display
bandwidth.
v2: Address Matt's review comments
- Be more paranoid while dmi decoding
- Also add support for decoding speed from configured memory speed
if availble in DMI memory entry
Cc: matthew.d.ro...@intel.com
On Jan 26, 2016, at 19:03, Andreas Radke wrote:
> Am Wed, 6 May 2015 22:02:57 +0200
> schrieb Julien Cristau :
>
>> On Sun, Dec 21, 2014 at 14:47:58 +, Chris Wilson wrote:
>>
>>> Snapshot 2.99.917 (2014-12-21)
>>> ==
>>> 3
From: Tvrtko Ursulin
Old DRM_IOCTL_I915_GEM_MMAP supported write-combine mapping so
add support for it here as well.
v2: Commit msg.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c | 34 +++---
== Summary ==
Built on 5ae916607e3e12ba18c848dff42baaad5b118c4b drm-intel-nightly:
2016y-01m-27d-12h-48m-36s UTC integration manifest
bdw-nuci7total:141 pass:132 dwarn:0 dfail:0 fail:0 skip:9
bdw-ultratotal:144 pass:138 dwarn:0 dfail:0 fail:0 skip:6
On 27/01/16 15:51, Daniel Vetter wrote:
On Wed, Jan 27, 2016 at 03:21:48PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
This enables mapping via CPU using the proper DRM mmap API for
better debug (Valgrind) and implementation symmetry in the
driver.
v2:
*
== Summary ==
Built on 5ae916607e3e12ba18c848dff42baaad5b118c4b drm-intel-nightly:
2016y-01m-27d-12h-48m-36s UTC integration manifest
bdw-nuci7total:141 pass:132 dwarn:0 dfail:0 fail:0 skip:9
bdw-ultratotal:144 pass:138 dwarn:0 dfail:0 fail:0 skip:6
== Summary ==
Built on 5ae916607e3e12ba18c848dff42baaad5b118c4b drm-intel-nightly:
2016y-01m-27d-12h-48m-36s UTC integration manifest
Test kms_flip:
Subgroup basic-flip-vs-dpms:
pass -> DMESG-WARN (ilk-hp8440p) UNSTABLE
bdw-nuci7total:141 pass:132
On Wed, Jan 27, 2016 at 04:51:02PM +0100, Daniel Vetter wrote:
> On Wed, Jan 27, 2016 at 03:21:48PM +, Tvrtko Ursulin wrote:
> > From: Tvrtko Ursulin
> >
> > This enables mapping via CPU using the proper DRM mmap API for
> > better debug (Valgrind) and
== Summary ==
Built on 5ae916607e3e12ba18c848dff42baaad5b118c4b drm-intel-nightly:
2016y-01m-27d-12h-48m-36s UTC integration manifest
bdw-nuci7total:141 pass:132 dwarn:0 dfail:0 fail:0 skip:9
bdw-ultratotal:144 pass:138 dwarn:0 dfail:0 fail:0 skip:6
On Wed, Jan 27, 2016 at 03:02:15PM +, Morton, Derek J wrote:
> >
> >
> >-Original Message-
> >From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> >Sent: Wednesday, January 27, 2016 2:31 PM
> >To: Morton, Derek J
> >Cc: intel-gfx@lists.freedesktop.org
> >Subject: Re:
On 01/15/2016 07:14 AM, Matt Roper wrote:
On Thu, Jan 14, 2016 at 05:32:47PM +0530, Shobhit Kumar wrote:
This is needed for WM computation workaround for arbitrated display
bandwidth.
Signed-off-by: Shobhit Kumar
---
drivers/gpu/drm/i915/i915_dma.c | 19
On Wed, Jan 27, 2016 at 04:01:26PM +, Tvrtko Ursulin wrote:
>
> On 27/01/16 15:51, Daniel Vetter wrote:
> >On Wed, Jan 27, 2016 at 03:21:48PM +, Tvrtko Ursulin wrote:
> >>From: Tvrtko Ursulin
> >>
> >>This enables mapping via CPU using the proper DRM mmap API
On Wed, Jan 27, 2016 at 03:24:43PM +, Tvrtko Ursulin wrote:
>
> On 26/01/16 16:59, Chris Wilson wrote:
> >Another thing I realised was that this severely limits the mmap space on
> >32-bit systems, as the vma manager is unsigned long. The CPU mmaping was
> >a way around some of the
On pe, 2016-01-22 at 14:23 +0200, David Weinehall wrote:
> On Tue, Jan 19, 2016 at 03:26:32PM +0200, Imre Deak wrote:
> > The only device specific dependency of the stolen memory setup is
> > the
> > MMIO mapping and the stolen memory size. Both are already available
> > in
> > i915_gtt_init(), so
From: Daniele Ceraolo Spurio
While running some tests on the scheduler patches with rpm enabled I
came across a corruption in the ringbuffer, which was root-caused to
the GPU being suspended while commands were being emitted to the
ringbuffer. The access to
On Wed, Jan 27, 2016 at 03:21:48PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> This enables mapping via CPU using the proper DRM mmap API for
> better debug (Valgrind) and implementation symmetry in the
> driver.
>
> v2:
> * Use normal mutex, skip domain
From: "Kumar, Mahesh"
If the arbitary display bandwidth is > 60% of memory bandwith, for
x-tile we should increase latency at all levels by 15us.
If the arbitary dsplay bandwidth is greater than 20% of memory bandwith
in case of y-tile being enabled, double the
On Wed, Jan 27, 2016 at 03:24:43PM +, Tvrtko Ursulin wrote:
>
> On 26/01/16 16:59, Chris Wilson wrote:
> >On Tue, Jan 26, 2016 at 04:23:28PM +, Tvrtko Ursulin wrote:
> >>Oh yeah, need to pin the pages..
> >
> >But only whilst inserting. Once inserted they need to be evicted, and I
> >was
== Summary ==
Built on 5ae916607e3e12ba18c848dff42baaad5b118c4b drm-intel-nightly:
2016y-01m-27d-12h-48m-36s UTC integration manifest
Test kms_flip:
Subgroup basic-flip-vs-dpms:
pass -> DMESG-WARN (ilk-hp8440p) UNSTABLE
Test kms_pipe_crc_basic:
Subgroup
== Summary ==
Built on 5ae916607e3e12ba18c848dff42baaad5b118c4b drm-intel-nightly:
2016y-01m-27d-12h-48m-36s UTC integration manifest
bdw-nuci7total:141 pass:132 dwarn:0 dfail:0 fail:0 skip:9
bdw-ultratotal:144 pass:138 dwarn:0 dfail:0 fail:0 skip:6
On Wed, Jan 27, 2016 at 02:01:36PM +, Morton, Derek J wrote:
> >
> >-Original Message-
> >From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> >Vetter
> >Sent: Wednesday, January 27, 2016 1:39 PM
> >To: Ville Syrjälä
> >Cc: Morton, Derek J;
On Wed, Jan 27, 2016 at 01:50:17PM +, Chris Wilson wrote:
> On Wed, Jan 27, 2016 at 01:13:54PM +, Daniele Ceraolo Spurio wrote:
> >
> >
> > On 27/01/16 09:38, Chris Wilson wrote:
> > >On Wed, Jan 27, 2016 at 08:55:40AM +, daniele.ceraolospu...@intel.com
> > >wrote:
> > >>From:
On Wed, Jan 27, 2016 at 02:37:58PM +0100, Daniel Vetter wrote:
> Recently discovered by enabling CONFIG_DMA_API_DEBUG in our CI. By the
> looks of it broken since forever.
>
> v2: Don't forget to set the scratch page back to wb (Chris). Reuse
> intel_gtt_teardown_scratch_page for that (and fix it
>
>
>-Original Message-
>From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
>Sent: Wednesday, January 27, 2016 3:43 PM
>To: Morton, Derek J
>Cc: Daniel Vetter; Ville Syrjälä; intel-gfx@lists.freedesktop.org
>Subject: Re: [Intel-gfx] [PATCH i-g-t] lib/igt_core.c:
On Tue, Jan 26, 2016 at 07:40:58PM +0200, Gabriel Feceoru wrote:
> Moved gem_quiescent_gpu() call to the run path.
>
> Signed-off-by: Gabriel Feceoru
And pushed by Maarten. Thanks,
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
== Summary ==
Built on 430706bace599ea1a908b9a7c6b7ea17535fe17f drm-intel-nightly:
2016y-01m-27d-16h-33m-06s UTC integration manifest
Test kms_pipe_crc_basic:
Subgroup read-crc-pipe-b:
dmesg-warn -> PASS (ilk-hp8440p)
bdw-nuci7total:141 pass:132 dwarn:0
== Summary ==
Built on 430706bace599ea1a908b9a7c6b7ea17535fe17f drm-intel-nightly:
2016y-01m-27d-16h-33m-06s UTC integration manifest
Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-a-frame-sequence:
pass -> DMESG-WARN (skl-i5k-2)
Subgroup
== Summary ==
Built on 430706bace599ea1a908b9a7c6b7ea17535fe17f drm-intel-nightly:
2016y-01m-27d-16h-33m-06s UTC integration manifest
Test kms_flip:
Subgroup basic-flip-vs-dpms:
pass -> DMESG-WARN (ilk-hp8440p) UNSTABLE
Test kms_pipe_crc_basic:
Subgroup
On Wed, Jan 27, 2016 at 11:44:07AM +, Arun Siluvery wrote:
> On 27/01/2016 11:33, Ville Syrjälä wrote:
> >On Tue, Jan 26, 2016 at 05:52:51PM +, Arun Siluvery wrote:
> >>Revision id along with device id is useful in better identification of the
> >>HW
> >>and its limitations so include
On Tue, Jan 26, 2016 at 05:45:31PM +0200, Mika Kuoppala wrote:
> There has been cases where we read DC_STATE and get something that we
> did not write there. As DMC owns power well 1, this could be that DMC
> snoops DC_STATE accesses and needs to wake up power well 1 up to serve
> the access. But
== Summary ==
Built on 430706bace599ea1a908b9a7c6b7ea17535fe17f drm-intel-nightly:
2016y-01m-27d-16h-33m-06s UTC integration manifest
Test kms_flip:
Subgroup basic-flip-vs-dpms:
pass -> DMESG-WARN (ilk-hp8440p) UNSTABLE
Subgroup basic-flip-vs-wf_vblank:
== Summary ==
Tests interrupted
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On 26/01/16 09:44, Joonas Lahtinen wrote:
On ma, 2016-01-25 at 18:57 +, Dave Gordon wrote:
On 25/01/16 18:17, Daniel Vetter wrote:
On Fri, Jan 22, 2016 at 05:54:15PM +0530, akash.g...@intel.com
wrote:
From: Akash Goel
Added a new macro i915_dbg, which is a wrapper
== Summary ==
Built on 430706bace599ea1a908b9a7c6b7ea17535fe17f drm-intel-nightly:
2016y-01m-27d-16h-33m-06s UTC integration manifest
Test kms_pipe_crc_basic:
Subgroup read-crc-pipe-b:
dmesg-warn -> PASS (ilk-hp8440p)
Subgroup suspend-read-crc-pipe-a:
On Wed, Jan 27, 2016 at 09:16:24AM -0800, Joe Perches wrote:
> On Wed, 2016-01-27 at 16:47 +, Patchwork wrote:
> > == Summary ==
> >
> > Built on 5ae916607e3e12ba18c848dff42baaad5b118c4b drm-intel-nightly:
> > 2016y-01m-27d-12h-48m-36s UTC integration manifest
>
> I've no idea what this
Currently emit-request starts writing to the ring and reserves space for
a workaround to be emitted later whilst submitting the request. It is
easier to read if the caller only allocates sufficient space for its
access (then the reader can quickly verify that the ring begin allocates
the exact
== Summary ==
Tests interrupted: fire in drm-intel-nightly tree
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Wed, Jan 27, 2016 at 05:32:55PM +, Dave Gordon wrote:
> On 26/01/16 09:44, Joonas Lahtinen wrote:
> >On ma, 2016-01-25 at 18:57 +, Dave Gordon wrote:
> >>On 25/01/16 18:17, Daniel Vetter wrote:
> >>>On Fri, Jan 22, 2016 at 05:54:15PM +0530, akash.g...@intel.com
> >>>wrote:
> From:
On Wed, Jan 27, 2016 at 04:45:57PM +, Morton, Derek J wrote:
> >
> >
> >-Original Message-
> >From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> >Vetter
> >Sent: Wednesday, January 27, 2016 3:43 PM
> >To: Morton, Derek J
> >Cc: Daniel Vetter; Ville Syrjälä;
Co-Author : Marius Vlad
So far we have had only two commit styles, COMMIT_LEGACY
and COMMIT_UNIVERSAL. This patch adds another commit style
COMMIT_ATOMIC which makes use of drmModeAtomicCommit()
Signed-off-by: Mayuresh Gharpure
---
On Tue, Jan 26, 2016 at 05:52:51PM +, Arun Siluvery wrote:
> Revision id along with device id is useful in better identification of the HW
> and its limitations so include this detail in error state.
>
> Signed-off-by: Arun Siluvery
> ---
>
On 27/01/2016 11:33, Ville Syrjälä wrote:
On Tue, Jan 26, 2016 at 05:52:51PM +, Arun Siluvery wrote:
Revision id along with device id is useful in better identification of the HW
and its limitations so include this detail in error state.
Signed-off-by: Arun Siluvery
On Tue, Jan 26, 2016 at 07:49:55PM +0100, Daniel Vetter wrote:
> We need this to be able to paper over some CI fail: DMA API debuggin
> complaints that we leak the gmch scratch page, but fundamentally
> that's the only way to do it if there's both the intel-agp and i915
> driver using it:
On 26/01/16 14:06, Chris Wilson wrote:
On Tue, Jan 26, 2016 at 01:51:19PM +, Rodrigo Vivi wrote:
On Tue, Jan 26, 2016 at 12:30 AM Chris Wilson
<[1]ch...@chris-wilson.co.uk> wrote:
On Mon, Jan 25, 2016 at 09:17:15PM +, Chris Wilson wrote:
> On Mon, Jan 25, 2016 at
From: Daniele Ceraolo Spurio
While running some tests on the scheduler patches with rpm enabled I
came across a corruption in the ringbuffer, which was root-caused to
the GPU being suspended while commands were being emitted to the
ringbuffer. The access to
Added support for specifying arbitary lists of subtests to run or
to exclude from being run by using : or ^ as a seperator.
:subtest1:subtest2: Will run subtest1 and subtest2
^subtest1^subtest2^ will run all subtests except subtest1 and subtest2
Any subtest string not starting : or ^ is treated
From: Daniele Ceraolo Spurio
While running some tests on the scheduler patches with rpm enabled I
came across a corruption in the ringbuffer, which was root-caused to
the GPU being suspended while commands were being emitted to the
ringbuffer. The access to
On Wed, Jan 27, 2016 at 01:30:01PM +, Morton, Derek J wrote:
> >
> >
> >-Original Message-
> >From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> >Sent: Wednesday, January 27, 2016 12:33 PM
> >To: Morton, Derek J
> >Cc: intel-gfx@lists.freedesktop.org
> >Subject: Re:
>
>
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Chris Wilson
>Sent: Wednesday, January 27, 2016 1:11 PM
>To: intel-gfx@lists.freedesktop.org
>Subject: [Intel-gfx] [PATCH igt] igt: Add gem_exec_basic
>
>Extremely basic check that we
On Mon, Jan 25, 2016 at 10:57:51AM +, Daniel Stone wrote:
> Hi,
>
> On 22 January 2016 at 21:20, Matt Roper wrote:
> > Probably should have noticed/commented on this on your previous
> > iteration, but should we also restrict these new properties to be
> >
On Wed, Jan 27, 2016 at 08:55:40AM +, daniele.ceraolospu...@intel.com wrote:
> From: Daniele Ceraolo Spurio
>
> While running some tests on the scheduler patches with rpm enabled I
> came across a corruption in the ringbuffer, which was root-caused to
> the
Hey,
Op 27-01-16 om 13:41 schreef Tvrtko Ursulin:
>
> On 27/01/16 12:33, Maarten Lankhorst wrote:
>> Hey,
>>
>> Op 25-01-16 om 18:57 schreef Dave Gordon:
>>> In the error-handling paths of i915_gem_do_execbuffer() and
>>> intel_crtc_page_flip(), the local pointer-to-request variables
>>> were
On Wed, Jan 27, 2016 at 01:13:54PM +, Daniele Ceraolo Spurio wrote:
>
>
> On 27/01/16 09:38, Chris Wilson wrote:
> >On Wed, Jan 27, 2016 at 08:55:40AM +, daniele.ceraolospu...@intel.com
> >wrote:
> >>From: Daniele Ceraolo Spurio
> >>
> >>While running
>
>-Original Message-
>From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
>Sent: Wednesday, January 27, 2016 1:39 PM
>To: Ville Syrjälä
>Cc: Morton, Derek J; intel-gfx@lists.freedesktop.org
>Subject: Re: [Intel-gfx] [PATCH i-g-t] lib/igt_core.c: Expand
From: Tvrtko Ursulin
This got broken in:
commit de1add360522c876c25ef2ab1c94bdb509ab
Author: Tvrtko Ursulin
Date: Fri Jan 15 15:12:50 2016 +
drm/i915: Decouple execbuf uAPI from internal implementation
BSD ring
On 27/01/16 12:33, Maarten Lankhorst wrote:
Hey,
Op 25-01-16 om 18:57 schreef Dave Gordon:
In the error-handling paths of i915_gem_do_execbuffer() and
intel_crtc_page_flip(), the local pointer-to-request variables
were expected to be either valid pointers or NULL. Since
2682708 drm/i915:
Extremely basic check that we can dispatch an execbuf on every ring.
Signed-off-by: Chris Wilson
---
tests/Makefile.sources | 1 +
tests/gem_exec_basic.c | 71 ++
2 files changed, 72 insertions(+)
create mode 100644
Recently discovered by enabling CONFIG_DMA_API_DEBUG in our CI. By the
looks of it broken since forever.
v2: Don't forget to set the scratch page back to wb (Chris). Reuse
intel_gtt_teardown_scratch_page for that (and fix it up to treat
needs_dmar y/n correctly).
Cc: Chris Wilson
The fake agp driver for the intel graphics gart is only needed for ums
support. And we ditched that a long time ago:
commit 03dae59c72d8ef6e005f48ba356c863e0587
Author: Daniel Vetter
Date: Wed Jul 23 16:27:25 2014 +0200
drm/i915: Ditch UMS config option
With
The AGP_INTEL driver provides an interface for very old userspace to
control the GART (though the GART itself was only ever emulated on Intel
systems). The pci bridge discovery code is also used by the i915.ko
driver to set up the GTT on old systems, but it does not require the
old userspace
So I have no real justification for this. It does seem to help
a bit though. It all kinda looks like a fifo underrun due to bad
watermarks, but the fifo underruns definitely start to happen
way before we enable the first plane.
And the 4 additional vblanks are also not really perfect in stopping
On 27/01/16 13:00, Chris Wilson wrote:
On Wed, Jan 27, 2016 at 12:38:43PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
This got broken in:
commit de1add360522c876c25ef2ab1c94bdb509ab
Author: Tvrtko Ursulin
Date: Fri
Hey,
Op 25-01-16 om 18:57 schreef Dave Gordon:
> In the error-handling paths of i915_gem_do_execbuffer() and
> intel_crtc_page_flip(), the local pointer-to-request variables
> were expected to be either valid pointers or NULL. Since
>
> 2682708 drm/i915: simplify allocation of driver-internal
Hi,
On Wed, Jan 27, 2016 at 05:50:52PM +0530, Mayuresh Gharpure wrote:
> Co-Author : Marius Vlad
>
> So far we have had only two commit styles, COMMIT_LEGACY
> and COMMIT_UNIVERSAL. This patch adds another commit style
> COMMIT_ATOMIC which makes use of
On 27/01/16 09:38, Chris Wilson wrote:
On Wed, Jan 27, 2016 at 08:55:40AM +, daniele.ceraolospu...@intel.com wrote:
From: Daniele Ceraolo Spurio
While running some tests on the scheduler patches with rpm enabled I
came across a corruption in the
On Wed, Jan 27, 2016 at 10:05:56AM +, Derek Morton wrote:
> Added support for specifying arbitary lists of subtests to run or
> to exclude from being run by using : or ^ as a seperator.
>
> :subtest1:subtest2: Will run subtest1 and subtest2
> ^subtest1^subtest2^ will run all subtests except
This reverts commit 1803c035efb88afb9d3e7feb279ac29a83216382.
It seems to blow up on module unload due to a use-after free hitting a
BUG_ON with CONFIG_DEBUG_SG. Quoting from Tvrtko's mail:
"I've decoded the instructions and it pointed to SG_MAGIC checking:
488b809801 mov 0x198(%rax),%rax
On Wed, Jan 27, 2016 at 12:38:43PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> This got broken in:
>
>commit de1add360522c876c25ef2ab1c94bdb509ab
>Author: Tvrtko Ursulin
>Date: Fri Jan 15 15:12:50 2016 +
>
>
>
>
>-Original Message-
>From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>Sent: Wednesday, January 27, 2016 12:33 PM
>To: Morton, Derek J
>Cc: intel-gfx@lists.freedesktop.org
>Subject: Re: [Intel-gfx] [PATCH i-g-t] lib/igt_core.c: Expand --run-subtest
>functionality.
>
>On
On Wed, Jan 27, 2016 at 02:32:47PM +0200, Ville Syrjälä wrote:
> On Wed, Jan 27, 2016 at 10:05:56AM +, Derek Morton wrote:
> > Added support for specifying arbitary lists of subtests to run or
> > to exclude from being run by using : or ^ as a seperator.
> >
> > :subtest1:subtest2: Will run
From: Tvrtko Ursulin
This got broken in:
commit de1add360522c876c25ef2ab1c94bdb509ab
Author: Tvrtko Ursulin
Date: Fri Jan 15 15:12:50 2016 +
drm/i915: Decouple execbuf uAPI from internal implementation
BSD ring
On Wed, Jan 27, 2016 at 02:37:59PM +0100, Daniel Vetter wrote:
> The AGP_INTEL driver provides an interface for very old userspace to
> control the GART (though the GART itself was only ever emulated on Intel
> systems). The pci bridge discovery code is also used by the i915.ko
> driver to set up
On Wed, Jan 27, 2016 at 01:41:09PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> This got broken in:
>
>commit de1add360522c876c25ef2ab1c94bdb509ab
>Author: Tvrtko Ursulin
>Date: Fri Jan 15 15:12:50 2016 +
>
>
>
>
>-Original Message-
>From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>Sent: Wednesday, January 27, 2016 2:31 PM
>To: Morton, Derek J
>Cc: intel-gfx@lists.freedesktop.org
>Subject: Re: [Intel-gfx] [PATCH i-g-t] lib/igt_core.c: Expand --run-subtest
>functionality.
>
>On Wed,
On Wed, Jan 27, 2016 at 02:37:59PM +0100, Daniel Vetter wrote:
> The AGP_INTEL driver provides an interface for very old userspace to
> control the GART (though the GART itself was only ever emulated on Intel
> systems). The pci bridge discovery code is also used by the i915.ko
> driver to set up
On Wed, Jan 27, 2016 at 02:27:20PM +, daniele.ceraolospu...@intel.com wrote:
> From: Daniele Ceraolo Spurio
>
> While running some tests on the scheduler patches with rpm enabled I
> came across a corruption in the ringbuffer, which was root-caused to
> the
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