[Intel-gfx] [PATCH v2] drm: i915: remove intel_hdmi variable declaration

'intel_hdmi' variable was redeclared, use same variable declared in function scope Signed-off-by: Pierre-Louis Bossart --- drivers/gpu/drm/i915/intel_hdmi.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c

Re: [Intel-gfx] [PATCH] drm/i915: Adjust size of PIPE_CONTROL used for gen8 render seqno write

On Mon, Mar 14, 2016 at 07:24:56PM +0100, Michał Winiarski wrote: > On gen8+ size of PIPE_CONTROL with Post Sync Operation should be 6 dwords. 5 or 6 depending on the size of the write. > Cc: Chris Wilson > Signed-off-by: Michał Winiarski >

[Intel-gfx] [PATCH] drm/i915: Adjust size of PIPE_CONTROL used for gen8 render seqno write

On gen8+ size of PIPE_CONTROL with Post Sync Operation should be 6 dwords. Cc: Chris Wilson Signed-off-by: Michał Winiarski --- drivers/gpu/drm/i915/intel_lrc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git

Re: [Intel-gfx] [PATCH] drm/i915/skl: Remove unused skl_disable_dc6 function

On ma, 2016-03-14 at 14:35 +0100, Patrik Jakobsson wrote: > Left behind by DC state rework and is no longer needed. > > Cc: Imre Deak > Signed-off-by: Patrik Jakobsson Reviewed-by: Imre Deak > --- >  

[Intel-gfx] [PATCH v2] drm/i915/bxt: Fix off-by-one error in Broxton PLL IDs

After the commit below the Broxton PLL IDs had an off-by-one error, so fix this up. Also add a missing brace at intel_shared_dpll_init(), it happened to compile only due to the way the IS_BROXTON macro is defined. v2: - remove debugging left-over Fixes: a3c988ea068c ("drm/i915: Make SKL/KBL

[Intel-gfx] [PATCH] drm/i915/bxt: Fix off-by-one error in Broxton PLL IDs

After the commit below the Broxton PLL IDs had an off-by-one error, so fix this up. Also add a missing brace at intel_shared_dpll_init(), it happened to compile only due to the way the IS_BROXTON macro is defined. Fixes: a3c988ea068c ("drm/i915: Make SKL/KBL DPLL0 managed by the shared dpll

Re: [Intel-gfx] [RFC 04/15] drm/i915: Add headers for non-HDAudio HDMI interface

On 3/14/16 10:30 AM, Ville Syrjälä wrote: On Mon, Mar 14, 2016 at 05:21:54PM +0200, Ville Syrjälä wrote: On Mon, Mar 14, 2016 at 10:13:58AM -0500, Pierre-Louis Bossart wrote: On 3/11/16 1:09 PM, Ville Syrjälä wrote: On Fri, Mar 11, 2016 at 11:27:13AM -0600, Pierre-Louis Bossart wrote: Thanks

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Remove redundant memset in skl_clear_wm

== Series Details == Series: drm/i915: Remove redundant memset in skl_clear_wm URL : https://patchwork.freedesktop.org/series/4436/ State : failure == Summary == Series 4436v1 drm/i915: Remove redundant memset in skl_clear_wm

Re: [Intel-gfx] [PATCH v5] intel: New libdrm interface to create unbound wc user mappings for objects

On 10/03/16 10:39, Martin Peres wrote: On 09/03/16 11:09, akash.g...@intel.com wrote: From: Akash Goel A new libdrm interface 'drm_intel_gem_bo_map_wc' is provided by this patch. Through this interface Gfx clients can create write combining virtual mappings of the Gem

[Intel-gfx] [PATCH v2] i915: module param to disable DisplayPort MST

Updated to resolve merge conflicts and rename parameter to match module style. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH] [i915] add module param "enable_dp_mst"

Adds an (unsafe; auto-kernel-tainting) boolean module parameter to the i915 drm driver: "enable_dp_mst", which is enabled by default. Disabling the parameter forces newly connected DisplayPort sinks to report as not supporting multi-stream transport (MST), thus "forcing" the use of single-stream

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix power domain HW state cleanup on error path

== Series Details == Series: drm/i915: Fix power domain HW state cleanup on error path URL : https://patchwork.freedesktop.org/series/4435/ State : failure == Summary == Series 4435v1 drm/i915: Fix power domain HW state cleanup on error path 2016-03-14T14:52:33.167290

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/mocs: Program MOCS for all engines on init (rev6)

== Series Details == Series: drm/i915/mocs: Program MOCS for all engines on init (rev6) URL : https://patchwork.freedesktop.org/series/4310/ State : failure == Summary == Series 4310v6 drm/i915/mocs: Program MOCS for all engines on init

Re: [Intel-gfx] [RFC 04/15] drm/i915: Add headers for non-HDAudio HDMI interface

On Mon, Mar 14, 2016 at 05:21:54PM +0200, Ville Syrjälä wrote: > On Mon, Mar 14, 2016 at 10:13:58AM -0500, Pierre-Louis Bossart wrote: > > On 3/11/16 1:09 PM, Ville Syrjälä wrote: > > > On Fri, Mar 11, 2016 at 11:27:13AM -0600, Pierre-Louis Bossart wrote: > > >> Thanks for the review Ville > > >>

Re: [Intel-gfx] [RFC 04/15] drm/i915: Add headers for non-HDAudio HDMI interface

On Mon, Mar 14, 2016 at 10:13:58AM -0500, Pierre-Louis Bossart wrote: > On 3/11/16 1:09 PM, Ville Syrjälä wrote: > > On Fri, Mar 11, 2016 at 11:27:13AM -0600, Pierre-Louis Bossart wrote: > >> Thanks for the review Ville > >> > >> [snip] > >> > >>> Kinda hard to see where everything gets used due

Re: [Intel-gfx] [PATCH v6 4/7] drm/i915: Delay the freeing of requests until retire time

On 01/03/2016 15:18, Maarten Lankhorst wrote: Hey, Op 18-02-16 om 15:24 schreef john.c.harri...@intel.com: From: John Harrison The request structure is reference counted. When the count reached zero, the request was immediately freed and all associated objects were

[Intel-gfx] [PATCH] drm/i915: Remove redundant memset in skl_clear_wm

Since I915_MAX_PLANES = PLANE_CURSOR + 1, explicit clearing the wm values for PLANE_CURSOR is already done earlier by a memset. Signed-off-by: Gabriel Feceoru --- drivers/gpu/drm/i915/intel_pm.c | 4 1 file changed, 4 deletions(-) diff --git

Re: [Intel-gfx] [RFC 04/15] drm/i915: Add headers for non-HDAudio HDMI interface

On 3/11/16 1:09 PM, Ville Syrjälä wrote: On Fri, Mar 11, 2016 at 11:27:13AM -0600, Pierre-Louis Bossart wrote: Thanks for the review Ville [snip] Kinda hard to see where everything gets used due to the way the patches are split up. Yes, it's far from great... At least the hotplug/mode

[Intel-gfx] [PATCH] drm/i915: Fix power domain HW state cleanup on error path

Move the cleanup of the power domain HW state on the error path to the same function where the corresponding init call was called from. I noticed this problem when loading the module with load failure injection enabled, making i915_load_modeset_init() fail. CC: Chris Wilson

[Intel-gfx] [PATCH v4] drm/i915/mocs: Program MOCS for all engines on init

Allow for the MOCS to be programmed for all engines. Currently we program the MOCS when the first render batch goes through. This works on most platforms but fails on platforms that do not run a render batch early, i.e. headless servers. The patch now programs all initialised engines on init and

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add fault injection support (rev3)

== Series Details == Series: drm/i915: Add fault injection support (rev3) URL : https://patchwork.freedesktop.org/series/4385/ State : failure == Summary == Series 4385v3 drm/i915: Add fault injection support 2016-03-14T14:37:24.542491

[Intel-gfx] [PATCH v3] drm/i915: Add fault injection support

Add support for forcing an error at selected places in the driver. As an example add 4 options to fail during driver loading. Requested by Chris. v2: - Add fault point for modeset initialization - Print debug message when injecting an error v3: - Rename inject_fault to inject_load_failure,

Re: [Intel-gfx] [PATCH v3] drm/i915/mocs: Program MOCS for all engines on init

On Fri, 11 Mar 2016, Chris Wilson wrote: On Fri, Mar 11, 2016 at 02:00:22PM +, Peter Antoine wrote: Allow for the MOCS to be programmed for all engines. Currently we program the MOCS when the first render batch goes through. This works on most platforms but fails on platforms that do not

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for DPCD Backlight Control (rev4)

It doesn’t look like any of these warnings have anything to do with my patch. They mostly have to do with " Device suspended during HW access" from drm_atomic_commit call. The fail on snb-x220t is a pre-existing one and the last one is " *ERROR* Unclaimed access detected prior to suspending"

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/skl: Remove unused skl_disable_dc6 function

== Series Details == Series: drm/i915/skl: Remove unused skl_disable_dc6 function URL : https://patchwork.freedesktop.org/series/4427/ State : failure == Summary == Series 4427v1 drm/i915/skl: Remove unused skl_disable_dc6 function

Re: [Intel-gfx] [RFC 04/15] drm/i915: Add headers for non-HDAudio HDMI interface

On Mon, Mar 14, 2016 at 10:04:00AM +0100, Daniel Vetter wrote: > On Fri, Mar 11, 2016 at 09:09:12PM +0200, Ville Syrjälä wrote: > > On Fri, Mar 11, 2016 at 11:27:13AM -0600, Pierre-Louis Bossart wrote: > > > Thanks for the review Ville > > > > > > [snip] > > > > > > > Kinda hard to see where

Re: [Intel-gfx] [PATCH 2/8] drm/i915: Merge ironlake_get_refclk() into its only caller

On Mon, 2016-03-14 at 15:55 +0200, Ville Syrjälä wrote: > On Mon, Mar 14, 2016 at 10:55:41AM +0200, Ander Conselvan de Oliveira wrote: > > A previous patche made ironlake_get_refclk() very simple, so merge > > it into its only caller. > > Again I'd like to keep the pch and gmch code as similar as

Re: [Intel-gfx] [PATCH 1/8] drm/i915: Remove checks for clone config with LVDS in ILK+ dpll code

On Mon, Mar 14, 2016 at 01:55:49PM +, Conselvan De Oliveira, Ander wrote: > On Mon, 2016-03-14 at 15:51 +0200, Ville Syrjälä wrote: > > On Mon, Mar 14, 2016 at 10:55:40AM +0200, Ander Conselvan de Oliveira wrote: > > > LVDS is not cloneable, so the check is unnecessary. Removing it makes > > >

Re: [Intel-gfx] [PATCH 1/8] drm/i915: Remove checks for clone config with LVDS in ILK+ dpll code

On Mon, 2016-03-14 at 15:51 +0200, Ville Syrjälä wrote: > On Mon, Mar 14, 2016 at 10:55:40AM +0200, Ander Conselvan de Oliveira wrote: > > LVDS is not cloneable, so the check is unnecessary. Removing it makes > > the surrouding code a bit simpler. > > > > Signed-off-by: Ander Conselvan de

Re: [Intel-gfx] [PATCH 2/8] drm/i915: Merge ironlake_get_refclk() into its only caller

On Mon, Mar 14, 2016 at 10:55:41AM +0200, Ander Conselvan de Oliveira wrote: > A previous patche made ironlake_get_refclk() very simple, so merge > it into its only caller. Again I'd like to keep the pch and gmch code as similar as possible. So could do the same for the gmch code. I already had

Re: [Intel-gfx] [PATCH 1/8] drm/i915: Remove checks for clone config with LVDS in ILK+ dpll code

On Mon, Mar 14, 2016 at 10:55:40AM +0200, Ander Conselvan de Oliveira wrote: > LVDS is not cloneable, so the check is unnecessary. Removing it makes > the surrouding code a bit simpler. > > Signed-off-by: Ander Conselvan de Oliveira > > --- >

Re: [Intel-gfx] [PATCH v5 00/12] Enable GPU switching on pre-retina?MacBook Pro

On Mon, 2016-03-14 at 13:41 +0100, Lukas Wunner wrote: > Hi Bastien, > > sorry for the delay. > > On Sat, Mar 05, 2016 at 05:31:55PM +0100, Bastien Nocera wrote: > > > > We could, on boot, force using the integrated GPU, turning off the > > discrete GPU that we're not interested in. > Yes, many

[Intel-gfx] [PATCH] drm/i915/skl: Remove unused skl_disable_dc6 function

Left behind by DC state rework and is no longer needed. Cc: Imre Deak Signed-off-by: Patrik Jakobsson --- drivers/gpu/drm/i915/intel_drv.h| 1 - drivers/gpu/drm/i915/intel_runtime_pm.c | 7 --- 2 files changed, 8 deletions(-)

Re: [Intel-gfx] [PATCH 6/8] drm/i915: Don't calculate a new clock in ILK+ code if it is already set

Op 14-03-16 om 14:01 schreef Ander Conselvan De Oliveira: > On Mon, 2016-03-14 at 12:51 +0100, Maarten Lankhorst wrote: >> Op 14-03-16 om 09:55 schreef Ander Conselvan de Oliveira: >>> Remove the clock calculation from ironlake_crtc_compute_clock() when the >>> encoder compute_config() already set

Re: [Intel-gfx] [PATCH 6/8] drm/i915: Don't calculate a new clock in ILK+ code if it is already set

On Mon, 2016-03-14 at 12:51 +0100, Maarten Lankhorst wrote: > Op 14-03-16 om 09:55 schreef Ander Conselvan de Oliveira: > > Remove the clock calculation from ironlake_crtc_compute_clock() when the > > encoder compute_config() already set one. The value was just thrown away > > in that case. > > >

Re: [Intel-gfx] [PATCH v5 00/12] Enable GPU switching on pre-retina?MacBook Pro

Hi Bastien, sorry for the delay. On Sat, Mar 05, 2016 at 05:31:55PM +0100, Bastien Nocera wrote: > We could, on boot, force using the integrated GPU, turning off the > discrete GPU that we're not interested in. Yes, many people "solve" this by having grub write the requisite commands to gmux'

Re: [Intel-gfx] [PATCH i-g-t v3 1/6] ioctl_wrappers: make gem_has_ring non static

On 10/03/16 11:03, Derek Morton wrote: For tests that use multiple rings to test interactions it is useful to know if a ring exists without triggering the test to skip. Signed-off-by: Derek Morton --- lib/ioctl_wrappers.c | 2 +- lib/ioctl_wrappers.h | 1 + 2

Re: [Intel-gfx] [PATCH i-g-t v3 2/6] lib/intel_batchbuffer: Add functions to be used in the scheduler test

On 10/03/16 11:03, Derek Morton wrote: Adds functions to create a number of different batch buffers to perform several functions including: Batch buffer which will run for a long duration to provide a delay on a specified ring. Function to calibrate the delay batch buffer to run for a

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Simplify ironlake_crtc_compute_clock() CPU eDP case

Op 14-03-16 om 09:55 schreef Ander Conselvan de Oliveira: > None of the code in ironlake_crtc_compute_clock() is relevant for CPU > eDP. The CPU eDP PLL is turned on and off in ironlake_edp_pll_{on,off} > from the DP code and that doesn't depend on the crtc_state->dpll values, > so just return

Re: [Intel-gfx] [PATCH 3/8] drm/i915: Fold intel_ironlake_limit() into clock computation function

Op 14-03-16 om 12:53 schreef Ander Conselvan De Oliveira: > On Mon, 2016-03-14 at 12:46 +0100, Maarten Lankhorst wrote: >> Op 14-03-16 om 09:55 schreef Ander Conselvan de Oliveira: >>> The funcion intel_ironlake_limit() is only called by the crtc compute >>> clock path. By merging it into

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Split driver init step to phases (rev4)

== Series Details == Series: drm/i915: Split driver init step to phases (rev4) URL : https://patchwork.freedesktop.org/series/4374/ State : failure == Summary == Series 4374v4 drm/i915: Split driver init step to phases http://patchwork.freedesktop.org/api/1.0/series/4374/revisions/4/mbox/

Re: [Intel-gfx] [PATCH 3/8] drm/i915: Fold intel_ironlake_limit() into clock computation function

On Mon, 2016-03-14 at 12:46 +0100, Maarten Lankhorst wrote: > Op 14-03-16 om 09:55 schreef Ander Conselvan de Oliveira: > > The funcion intel_ironlake_limit() is only called by the crtc compute > > clock path. By merging it into ironlake_compute_clocks(), the code gets > > clearer, since there's

Re: [Intel-gfx] [PATCH 6/8] drm/i915: Don't calculate a new clock in ILK+ code if it is already set

Op 14-03-16 om 09:55 schreef Ander Conselvan de Oliveira: > Remove the clock calculation from ironlake_crtc_compute_clock() when the > encoder compute_config() already set one. The value was just thrown away > in that case. > > Signed-off-by: Ander Conselvan de Oliveira >

Re: [Intel-gfx] [PATCH 3/8] drm/i915: Fold intel_ironlake_limit() into clock computation function

Op 14-03-16 om 09:55 schreef Ander Conselvan de Oliveira: > The funcion intel_ironlake_limit() is only called by the crtc compute > clock path. By merging it into ironlake_compute_clocks(), the code gets > clearer, since there's no more if-ladders to follow. > > Signed-off-by: Ander Conselvan de

[Intel-gfx] [PATCH i-g-t] tests/kms_rotation_crc: exercise invalid rotations

Add expect-to-fail tests for invalid rotations on each of the plane types. v2: (Ville Syrjälä) - use igt_create_fb - y-tiled will be rejected by gen < 9 - don't hardcode all the plane rotation failure combinations Cc: Joonas Lahtinen Signed-off-by:

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add fault injection support (rev2)

== Series Details == Series: drm/i915: Add fault injection support (rev2) URL : https://patchwork.freedesktop.org/series/4385/ State : failure == Summary == Series 4385v2 drm/i915: Add fault injection support 2016-03-14T08:58:17.234391

[Intel-gfx] [PATCH v4 17/17] drm/i915: Split out load time interface registration

According to the new init phases scheme we should register the device making it available via some kernel internal or user space interface as the last step in the init sequence, so move the corresponding code to a separate function. Also add a TODO comment about code that still needs to be moved

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Exit cherryview_irq_handler() after one pass (rev3)

== Series Details == Series: drm/i915: Exit cherryview_irq_handler() after one pass (rev3) URL : https://patchwork.freedesktop.org/series/4298/ State : failure == Summary == Series 4298v3 drm/i915: Exit cherryview_irq_handler() after one pass

Re: [Intel-gfx] integration-manifest in drm-intel-nigthly

On Fri, Mar 11, 2016 at 3:25 PM, Marius Vlad wrote: > Hi, > > A lot of people (including myself) have been asking what is the > purpose of the integration manifest file in drm-intel-nigthly. I > for one have to rebase each time, and I'm wondering how do you

[Intel-gfx] [PATCH v2] drm/i915: Add fault injection support

Add support for forcing an error at selected places in the driver. As an example add 4 options to fail during driver loading. Requested by Chris. v2: - Add fault point for modeset initialization - Print debug message when injecting an error CC: Chris Wilson

Re: [Intel-gfx] [RFC 04/15] drm/i915: Add headers for non-HDAudio HDMI interface

On Fri, Mar 11, 2016 at 09:09:12PM +0200, Ville Syrjälä wrote: > On Fri, Mar 11, 2016 at 11:27:13AM -0600, Pierre-Louis Bossart wrote: > > Thanks for the review Ville > > > > [snip] > > > > > Kinda hard to see where everything gets used due to the way the patches > > > are split up. > > > >

[Intel-gfx] [PATCH CI-ping] drm/i915: Exit cherryview_irq_handler() after one pass

This effectively reverts commit 8e5fd599eb219f1054e39b40d18b217af669eea9 Author: Ville Syrjälä Date: Wed Apr 9 13:28:50 2014 +0300 drm/i915/chv: Make CHV irq handler loop until all interrupts are consumed as under continuous execlists load we can saturate

[Intel-gfx] [PATCH 7/8] drm/i915: Remove PCH type checks from ironlake_crtc_compute_clock()

The checks were added in commit 5dc5298bb3e5 ("drm/i915: add proper CPU/PCH checks to crtc_mode_set functions") in a time when there was doubts on what PCHs would be supported by HSW. There are similar checks for PCH type in intel_detect_pch() and the function pointers are initialized based on

[Intel-gfx] [PATCH 6/8] drm/i915: Don't calculate a new clock in ILK+ code if it is already set

Remove the clock calculation from ironlake_crtc_compute_clock() when the encoder compute_config() already set one. The value was just thrown away in that case. Signed-off-by: Ander Conselvan de Oliveira --- drivers/gpu/drm/i915/intel_display.c | 17

[Intel-gfx] [PATCH 5/8] drm/i915: Simplify ironlake reduced clock logic a bit

Check has_reduced_clock only once when setting dpll_hw_state, making the code slightly more readable. Signed-off-by: Ander Conselvan de Oliveira --- drivers/gpu/drm/i915/intel_display.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff

[Intel-gfx] [PATCH 4/8] drm/i915: Call g4x_find_best_dpll() directly from ILK+ code

The call to dev_priv->display.find_dpll() is already in platform specific code, so avoid the extra detour. Signed-off-by: Ander Conselvan de Oliveira Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 5

[Intel-gfx] [PATCH 3/8] drm/i915: Fold intel_ironlake_limit() into clock computation function

The funcion intel_ironlake_limit() is only called by the crtc compute clock path. By merging it into ironlake_compute_clocks(), the code gets clearer, since there's no more if-ladders to follow. Signed-off-by: Ander Conselvan de Oliveira ---

[Intel-gfx] [PATCH 2/8] drm/i915: Merge ironlake_get_refclk() into its only caller

A previous patche made ironlake_get_refclk() very simple, so merge it into its only caller. Signed-off-by: Ander Conselvan de Oliveira --- drivers/gpu/drm/i915/intel_display.c | 24 1 file changed, 8 insertions(+), 16 deletions(-)

[Intel-gfx] [PATCH 8/8] drm/i915: Simplify ironlake_crtc_compute_clock() CPU eDP case

None of the code in ironlake_crtc_compute_clock() is relevant for CPU eDP. The CPU eDP PLL is turned on and off in ironlake_edp_pll_{on,off} from the DP code and that doesn't depend on the crtc_state->dpll values, so just return early in that case. v2: Rebase without patch that drops lvds

[Intel-gfx] [PATCH 1/8] drm/i915: Remove checks for clone config with LVDS in ILK+ dpll code

LVDS is not cloneable, so the check is unnecessary. Removing it makes the surrouding code a bit simpler. Signed-off-by: Ander Conselvan de Oliveira --- drivers/gpu/drm/i915/intel_display.c | 31 --- 1 file changed, 4

[Intel-gfx] [PATCH 0/8] Clean up ironlake clock computation code

Hi, I dropped the patch that deletes the LVDS downclocking code and rebased the other patches. Cc: Ville Syrjälä Ander Conselvan de Oliveira (8): drm/i915: Remove checks for clone config with LVDS in ILK+ dpll code drm/i915: Merge ironlake_get_refclk() into

[Intel-gfx] ✗ Fi.CI.BAT: failure for Prepare dpll for async. (rev2)

== Series Details == Series: Prepare dpll for async. (rev2) URL : https://patchwork.freedesktop.org/series/3914/ State : failure == Summary == Series 3914v2 Prepare dpll for async. http://patchwork.freedesktop.org/api/1.0/series/3914/revisions/2/mbox/ Test core_auth: Subgroup

[Intel-gfx] [PATCH v2 (rebased) 4/4] drm/i915: Add locking to pll updates, v2.

With async modesets this is no longer protected with connection_mutex, so ensure that each pll has its own lock. The pll configuration state is still protected; it's only the pll updates that need locking against concurrency. Changes since v1: - Rebased. - Fix locking to protect all accesses.

[Intel-gfx] [PATCH v2 (rebased) 0/4] Prepare dpll for async.

With the conversion of the driver to support async updates dpll state can no longer be updated in place. dpll->config still contains the committed state, while concurrent access is protected by dpll->mutex. This is a resend because ander's patch series got a conflict which required a rewrite of

[Intel-gfx] [PATCH v2 (rebased) 2/4] drm/i915: Perform dpll commit first, v2.

Warn for the wrong mask in enable only. Disable will have the wrong mask now because the new state is committed before disabling the old state. Changes since v1: - Use crtc_mask (Durgadoss) - Rebase. Signed-off-by: Maarten Lankhorst ---

[Intel-gfx] [PATCH v2 (rebased) 1/4] drm/i915: Use a crtc mask instead of a refcount for dpll functions, v2.

This makes it easier to verify correct dpll setup with only a single crtc. It is also useful to detect double dpll enable/disable. Changes since v1: - Rebase on top of Ander's dpll rework. - Change debugfs active to a mask. - Change enabled_crtcs and active_crtcs to unsigned. Signed-off-by:

[Intel-gfx] [PATCH v2 (rebased) 3/4] drm/i915: Move pll power state to crtc power domains.

Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_display.c | 6 +++--- drivers/gpu/drm/i915/intel_dpll_mgr.c | 4 2 files changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c

Re: [Intel-gfx] [RFC/PATCH xf86-video-intel] sna: Let modestting + glamor handle gen9+

Hi, On 13-03-16 20:36, Rob Clark wrote: On Fri, Mar 11, 2016 at 5:07 AM, Timo Aaltonen wrote: 29.02.2016, 16:47, Hans de Goede kirjoitti: sna has no meaningfull accel for gen9+, this causes problems with i.e. apps using XVideo since the sprite XVideo support does not

[Intel-gfx] Updated drm-intel-testing

Hi all, New -testing cycle with cool stuff: - two-stage wm updates for ilk-style platforms (Matt) - more wm work and fixes from Maarten - more work on rotated framebuffers to prep for rotated nv12 (Ville) - more dc fixes (Imre) - various execlist patches from Tvrtko - various clock cleanups for

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Restrict usage of live status check

On Fri, 11 Mar 2016, Shashank Sharma wrote: > [ text/plain ] > This patch restricts usage of live status check for HDMI detection. > While testing certain (monitor + cable) combinations with various > intel platforms, it seems that live status register is not reliable

Re: [Intel-gfx] [PULL] topic/drm-misc

On Wed, Mar 09, 2016 at 10:56:46AM +0100, Daniel Vetter wrote: > Hi Dave, > > I expect this to be the final drm-misc pull for 4.6: > - color manager core patch from Lionel - i915 side is ready too, but will > only land in 4.7, but I figured it's better to land this earlier for > better

Re: [Intel-gfx] [PATCH] drm/i915: Fix MST audio enabling

On Fri, 11 Mar 2016, Ander Conselvan De Oliveira wrote: > [ text/plain ] > On Fri, 2016-03-11 at 17:37 +0200, Ville Syrjälä wrote: >> On Fri, Mar 11, 2016 at 05:33:06PM +0200, Ander Conselvan de Oliveira wrote: >> > Commit 3d52ccf52f2c ("drm/i915: start adding dp mst audio")