[Intel-gfx] ✗ Ro.CI.BAT: warning for drm/i915/bxt: Enable PSR platform support for BXT

== Series Details == Series: drm/i915/bxt: Enable PSR platform support for BXT URL : https://patchwork.freedesktop.org/series/7675/ State : warning == Summary == Series 7675v1 drm/i915/bxt: Enable PSR platform support for BXT

[Intel-gfx] ✗ Ro.CI.BAT: warning for drm/i915: Reject modeset if the dotclock is too high

== Series Details == Series: drm/i915: Reject modeset if the dotclock is too high URL : https://patchwork.freedesktop.org/series/7653/ State : warning == Summary == Series 7653v1 drm/i915: Reject modeset if the dotclock is too high

[Intel-gfx] [PATCH] drm/i915/bxt: Enable PSR platform support for BXT

From: Clint Taylor Add IS_BROXTON() to the HAS_PSR() MACRO. Tested with a Sharp 2560x1440 panel that claims PSR is enable and in progress. Signed-off-by: Clint Taylor --- drivers/gpu/drm/i915/i915_drv.h |3 ++- 1 file changed, 2

[Intel-gfx] eDP hot plug support on i915 driver

Hello Is the eDP hotplugging capability supported by default by the intel graphic driver, or is it necessary any special configuration? Best Regards, Adolfo Sanchez ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org

Re: [Intel-gfx] [PATCH] drm: use seqlocks for vblank time/count

On 05/18/2016 05:10 PM, Matthew Auld wrote: There's an updated version of this patch already on the ml [1], which I Cc'd you in on. I take it that your @tuebingen.mpg.de is in fact an old email address? [1] https://patchwork.freedesktop.org/patch/86354/ Your patch looks good to me. I'd only

Re: [Intel-gfx] [PATCH v3] drm/i915/ilk: Don't disable SSC source if it's in use

On Tue, May 24, 2016 at 10:27:03AM -0400, Lyude wrote: > Thanks to Ville Syrjälä for pointing me towards the cause of this issue. > > Unfortunately one of the sideaffects of having the refclk for a DPLL set > to SSC is that as long as it's set to SSC, the GPU will prevent us from > powering down

[Intel-gfx] [PATCH i-g-t] tests: Add kms_invalid_dotclock

From: Ville Syrjälä Add a test that makes sure every modeset gets rejected by the kernel if the requested dotclock is beyond the hardware capabilities. For now we just test the preferred mode for each connector, should perhaps test them all to be more sure

[Intel-gfx] [PATCH] drm/i915: Reject modeset if the dotclock is too high

From: Ville Syrjälä Reject the modeset if the requested dotclock exceeds the maximum allowed by the hardware. So far we've only checked this on gen2/3 while also handling the double wide vs. single wide pipe selection. Extend the check to all platforms since we

[Intel-gfx] ✗ Ro.CI.BAT: warning for drm/i915: Revert async unpin and nonblocking atomic commit

== Series Details == Series: drm/i915: Revert async unpin and nonblocking atomic commit URL : https://patchwork.freedesktop.org/series/7643/ State : warning == Summary == Series 7643v1 drm/i915: Revert async unpin and nonblocking atomic commit

[Intel-gfx] [PATCH] drm/i915: Revert async unpin and nonblocking atomic commit

This reverts the following patches: d55dbd06bb5e1399aba9ab5227465339d1bbefff drm/i915: Allow nonblocking update of pageflips. 15c86bdb760185e871c7a0f559978328aa500971 drm/i915: Check for unpin correctness. 95c2ccdc82d520f59ae3b6fdc097b63c9b7082bb Reapply "drm/i915: Avoid stalling on pending

Re: [Intel-gfx] [PATCH i-g-t] tests/Android.mk: Update cairo dependant test list

Applied, thanks! On Tue, May 24, 2016 at 03:32:35PM +0100, Derek Morton wrote: > drm_read > gem_exec_blt > prime_mmap_kms > Have cairo dependency through igt_kms.c so add to skip_tests_list > to fix android build errors. > > Signed-off-by: Derek Morton > --- >

Re: [Intel-gfx] [RFC i-g-t 1/9] configure.ac: Test for libdrm_intel and build for it if present.

On 2016-05-23 11:03 AM, Emil Velikov wrote: On Saturday, May 21, 2016 08:55 BST, Chris Wilson wrote: On Fri, May 20, 2016 at 06:59:25PM -0400, robert.f...@collabora.com wrote: From: Robert Foss Test for libdrm_intel and build for it if

Re: [Intel-gfx] [PATCH] drm: use seqlock for vblank time/count

On Tue, May 24, 2016 at 03:20:54PM +0300, Ville Syrjälä wrote: > On Tue, May 10, 2016 at 03:21:28PM +0100, Matthew Auld wrote: > > This patch aims to replace the roll-your-own seqlock implementation with > > full-blown seqlock'. We also remove the timestamp ring-buffer in favour > > of single

Re: [Intel-gfx] [PATCH i-g-t] tests: Moved gem_concurrent_blit back to the normal set

Applied. On Tue, May 17, 2016 at 03:05:47PM +0300, Gabriel Feceoru wrote: > Repairing the damage I caused not reading properly Daniel's comment in: > https://patchwork.freedesktop.org/patch/81600/ > > Leaving gem_concurrent_all only in the EXTRA set > > Cc: Daniel Vetter

Re: [Intel-gfx] [PATCH i-g-t] tests/Android.mk: Update cairo dependant test list

Tim Gore  Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ > -Original Message- > From: Morton, Derek J > Sent: Tuesday, May 24, 2016 3:33 PM > To: intel-gfx@lists.freedesktop.org > Cc: Gore, Tim; Morton, Derek J > Subject: [PATCH i-g-t] tests/Android.mk:

Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/bxt: Sanitize CDCLK to fix breakage during S4 resume

On Tue, May 24, 2016 at 03:38:33PM +0300, Imre Deak wrote: > I noticed that during S4 resume BIOS incorrectly sets bits 18, 19 which > are reserved/MBZ and sets the decimal frequency fields to all 0xff in > the CDCLK register. The result is a hard lockup as display register > accesses are

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/gen9: Assume CDCLK PLL is off if it's not locked

On Tue, May 24, 2016 at 03:38:32PM +0300, Imre Deak wrote: > If the CDCLK PLL isn't locked or incorrectly configured we can just > assume that it's off resulting in fully re-initializing both CDCLK PLL > and CDCLK dividers. This way the CDCLK PLL sanitization added in the > following patch can be

Re: [Intel-gfx] [PATCH v2 1/4] drm/i915: Wait for flips to complete before returning.

On Tue, May 24, 2016 at 01:24:08PM +0200, Maarten Lankhorst wrote: > Doing a page flip right after setcrtc would fail because part of the update > is run > asynchronously. This is a regression and is causing the kms_flip to fails > after > reverting the atomic page flip patch. How exactly does

[Intel-gfx] [PATCH i-g-t] tests/Android.mk: Update cairo dependant test list

drm_read gem_exec_blt prime_mmap_kms Have cairo dependency through igt_kms.c so add to skip_tests_list to fix android build errors. Signed-off-by: Derek Morton --- tests/Android.mk | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/tests/Android.mk

Re: [Intel-gfx] [PATCH v2 2/4] drm/i915: Bump pin_count to 255.

On Tue, May 24, 2016 at 01:24:09PM +0200, Maarten Lankhorst wrote: > With nonblocking unpin there can be many cursor pins before they're > cleared by the next page flip. > > Fix this by extending pin_count to 255 to prevent a > WARN_ON(vma->pin_count == DRM_I915_GEM_OBJECT_MAX_PIN_COUNT) > > Cc:

[Intel-gfx] [PATCH v3] drm/i915/ilk: Don't disable SSC source if it's in use

Thanks to Ville Syrjälä for pointing me towards the cause of this issue. Unfortunately one of the sideaffects of having the refclk for a DPLL set to SSC is that as long as it's set to SSC, the GPU will prevent us from powering down any of the pipes or transcoders using it. A couple of BIOSes

[Intel-gfx] ✗ Ro.CI.BAT: warning for series starting with [v2,01/11] drm/i915: Rename struct intel_context (rev10)

== Series Details == Series: series starting with [v2,01/11] drm/i915: Rename struct intel_context (rev10) URL : https://patchwork.freedesktop.org/series/7564/ State : warning == Summary == Series 7564v10 Series without cover letter

Re: [Intel-gfx] [PATCH v2] drm/i915/ilk: Don't disable SSC source if it's in use

Huh… so I'm going to have to take back what I said before about this. On further observation, it looks like the "Don't disable SSC source if it's in use" patch actually got rid of the underruns entirely, with or without the wait for a vblank here. On Tue, 2016-05-24 at 16:14 +0300, Ville Syrjälä

Re: [Intel-gfx] [PATCH v2 18/21] drm/i915: Make unpin async.

On Tue, May 17, 2016 at 03:08:01PM +0200, Maarten Lankhorst wrote: > All of intel_post_plane_update is handled there now, so move it over. > This is run after the hw state checker because it can't handle checking > crtc's separately yet. > > Signed-off-by: Maarten Lankhorst

[Intel-gfx] [CI 08/10] drm/i915: Merge legacy+execlists context structs

struct intel_context contains two substructs, one for the legacy RCS and one for every execlists engine. Since legacy RCS is a subset of the execlists engine support, just combine the two substructs. v2: Only pin the default context for legacy mode (the object only exists for legacy, but adding

[Intel-gfx] [CI 05/10] drm/i915: Move pinning of dev_priv->kernel_context into its creator

Rather than have every context ask "am I owned by the kernel? pin!", move that logic into the creator of the kernel context, in order to improve code comprehension. v2: Throw away the user_handle on failure to allocate the ppgtt. Signed-off-by: Chris Wilson Cc: Tvrtko

[Intel-gfx] [CI 10/10] drm/i915/debugfs: Show context objects in i915_gem_objects

One of the uses for i915_gem_objects is pin-pointing leaks. For this, we can compare the number of allocated objects and who owns them, a discrepancy here often indicates a kernel bug. One allocator of unreported objects is for backing context objects, so include those in the listing. v2: Take

[Intel-gfx] [CI 02/10] drm/i915: Apply lockdep annotations to i915_gem_context.c

Markup the functions that require the caller to hold struct_mutex with lockdep_assert_held(). In the hopefully not-too-distant future we will split the struct_mutex up, and in doing so we need to be sure that we know what it protects - here the lockdep annotations are invaluable. Signed-off-by:

[Intel-gfx] [CI 07/10] drm/i915: Put the kernel_context in drm_i915_private next to its friends

Just move the kernel_context member of drm_i915_private next to the engines it is associated with. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Joonas Lahtinen Reviewed-by: Tvrtko Ursulin

[Intel-gfx] [CI 03/10] drm/i915: Rename and inline i915_gem_context_get()

i915_gem_context_get() is a very simple wrapper around idr_find(), so simple that it would be smaller to do the lookup inline. Also we use the verb 'lookup' to return a pointer from a handle, freeing 'get' to imply obtaining a reference to the context. Signed-off-by: Chris Wilson

[Intel-gfx] [CI 06/10] drm/i915: Show i915_gem_context owner in debugfs

Print the context's owner (via the pid under file_priv) under debugfs. In doing so, we must be careful that the filp is not accessed after it is freed (notified via i915_gem_context_close). v2: Mark the file_priv as closed. Signed-off-by: Chris Wilson Cc: Tvrtko

[Intel-gfx] [CI 09/10] drm/i915: Rearrange i915_gem_context

Pack the integers and related types together inside the struct. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Joonas Lahtinen Reviewed-by: Tvrtko Ursulin ---

[Intel-gfx] [CI 01/10] drm/i915: Rename struct intel_context

Our goal is to rename the anonymous per-engine struct beneath the current intel_context. However, after a lively debate resolving around the confusion between intel_context_engine and intel_engine_context, the realisation is that the two structs target different users. The outer struct is API /

[Intel-gfx] [CI 04/10] drm/i915: Name the inner most per-engine intel_context struct

We want to give a name to the currently anonymous per-engine struct inside the context, so that we can assign it to a local variable and save clumsy typing. The name we have chosen is intel_context as it reflects the HW facing portion of the context state (the logical context state, the registers,

Re: [Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: Fix warnings from atomic nonblocking unpin.

Op 24-05-16 om 13:52 schreef Patchwork: > == Series Details == > > Series: drm/i915: Fix warnings from atomic nonblocking unpin. > URL : https://patchwork.freedesktop.org/series/7629/ > State : failure > > == Summary == > > Series 7629v1 drm/i915: Fix warnings from atomic nonblocking unpin. >

Re: [Intel-gfx] [PATCH i-g-t v5 0/7] kms_flip_event_leak and kms_vblank fixes for

Hey, Thanks for being thorough, give me a shout if there is anything specific I can help you look into. Rob. On 2016-05-24 07:19 AM, Marius Vlad wrote: Hi, I'm getting mixed results w/ this series applied. The kernel seems to trip in different ways either from suspend or on reload

Re: [Intel-gfx] ✗ Ro.CI.BAT: failure for series starting with [v2,1/2] drm/i915/gen9: Assume CDCLK PLL is off if it's not locked

On ti, 2016-05-24 at 13:02 +, Patchwork wrote: > == Series Details == > > Series: series starting with [v2,1/2] drm/i915/gen9: Assume CDCLK PLL > is off if it's not locked > URL   : https://patchwork.freedesktop.org/series/7631/ > State : failure > > == Summary == > > Series 7631v1 Series

Re: [Intel-gfx] [PATCH v2] drm/i915/ilk: Don't disable SSC source if it's in use

On Mon, May 23, 2016 at 03:56:36PM -0400, Lyude wrote: > Thanks to Ville Syrjälä for pointing me towards the cause of this issue. > > Unfortunately one of the sideaffects of having the refclk for a DPLL set > to SSC is that as long as it's set to SSC, the GPU will prevent us from > powering down

[Intel-gfx] ✗ Ro.CI.BAT: failure for series starting with [v2,1/2] drm/i915/gen9: Assume CDCLK PLL is off if it's not locked

== Series Details == Series: series starting with [v2,1/2] drm/i915/gen9: Assume CDCLK PLL is off if it's not locked URL : https://patchwork.freedesktop.org/series/7631/ State : failure == Summary == Series 7631v1 Series without cover letter

[Intel-gfx] [PATCH v2 2/2] drm/i915/bxt: Sanitize CDCLK to fix breakage during S4 resume

I noticed that during S4 resume BIOS incorrectly sets bits 18, 19 which are reserved/MBZ and sets the decimal frequency fields to all 0xff in the CDCLK register. The result is a hard lockup as display register accesses are attempted later. Work around this by sanitizing the CDCLK PLL/dividers the

[Intel-gfx] [PATCH v2 1/2] drm/i915/gen9: Assume CDCLK PLL is off if it's not locked

If the CDCLK PLL isn't locked or incorrectly configured we can just assume that it's off resulting in fully re-initializing both CDCLK PLL and CDCLK dividers. This way the CDCLK PLL sanitization added in the following patch can be done on BXT the same way as it's done on SKL. v2: (Ville) - Remove

Re: [Intel-gfx] [PATCH] drm: use seqlock for vblank time/count

On Tue, May 10, 2016 at 03:21:28PM +0100, Matthew Auld wrote: > This patch aims to replace the roll-your-own seqlock implementation with > full-blown seqlock'. We also remove the timestamp ring-buffer in favour > of single timestamp/count pair protected by a seqlock. In turn this > means we can

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gen9: Assume CDCLK PLL is off if it's not locked

On Tue, May 24, 2016 at 02:59:55PM +0300, Imre Deak wrote: > On ti, 2016-05-24 at 13:22 +0300, Ville Syrjälä wrote: > > On Tue, May 24, 2016 at 12:27:50PM +0300, Imre Deak wrote: > > > If the CDCLK PLL isn't locked we can just assume that it's off resulting > > > in fully re-initializing both

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gen9: Assume CDCLK PLL is off if it's not locked

On ti, 2016-05-24 at 13:22 +0300, Ville Syrjälä wrote: > On Tue, May 24, 2016 at 12:27:50PM +0300, Imre Deak wrote: > > If the CDCLK PLL isn't locked we can just assume that it's off resulting > > in fully re-initializing both CDCLK PLL and CDCLK dividers. This way the > > CDCLK PLL sanitization

[Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: Fix warnings from atomic nonblocking unpin.

== Series Details == Series: drm/i915: Fix warnings from atomic nonblocking unpin. URL : https://patchwork.freedesktop.org/series/7629/ State : failure == Summary == Series 7629v1 drm/i915: Fix warnings from atomic nonblocking unpin.

Re: [Intel-gfx] [PATCH] drm/i915/guc: Disable automatic GuC firmware loading

On 24/05/16 12:12, Chris Wilson wrote: On Mon, May 23, 2016 at 04:34:35PM +0100, Tvrtko Ursulin wrote: From: Tvrtko Ursulin New GuC code is logging errors at runtime suspend and resume which causes CI testing to log "orange" status. Default to not trying to load the

[Intel-gfx] [PATCH v2 4/4] Revert "drm/i915: Allow nonblocking update of pageflips."

This reverts commit d55dbd06bb5e1399aba9ab5227465339d1bbefff. It lacks a description, removes the flip trace point, doesn't handle -EBUSY if a flip is already queued and needs to be redone. Cc: Ville Syrjälä Signed-off-by: Maarten Lankhorst

[Intel-gfx] [PATCH v2 3/4] drm/i915: Throttle cursor flip updates.

Throttle after every vblank and when > 64 updates are queued, to prevent running higher than max pin count. For now there's no good way to do fold crtc updates, and to ensure that we don't run out of cursor pins the best option is to throttle. Testcase: kms_cursor_legacy Cc: Ville Syrjälä

[Intel-gfx] [PATCH v2 0/4] drm/i915: Fix warnings from atomic nonblocking unpin.

New version with other approach to fix cursor updates. Pin count is bumped only to 255 to make it more likely to hit, and each crtc can only have 64 updates queued. This will make it impossible to hit the bo pinning limit. It also has the revert for nonblocking update of pageflips, since that

[Intel-gfx] [PATCH v2 2/4] drm/i915: Bump pin_count to 255.

With nonblocking unpin there can be many cursor pins before they're cleared by the next page flip. Fix this by extending pin_count to 255 to prevent a WARN_ON(vma->pin_count == DRM_I915_GEM_OBJECT_MAX_PIN_COUNT) Cc: Ville Syrjälä Reported-by: Chris Wilson

[Intel-gfx] [PATCH v2 1/4] drm/i915: Wait for flips to complete before returning.

Doing a page flip right after setcrtc would fail because part of the update is run asynchronously. This is a regression and is causing the kms_flip to fails after reverting the atomic page flip patch. Signed-off-by: Maarten Lankhorst Fixes: a6747b7304a9

[Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: Skip idling an idle engine

== Series Details == Series: drm/i915: Skip idling an idle engine URL : https://patchwork.freedesktop.org/series/7628/ State : failure == Summary == Series 7628v1 drm/i915: Skip idling an idle engine http://patchwork.freedesktop.org/api/1.0/series/7628/revisions/1/mbox Test gem_busy:

Re: [Intel-gfx] [PATCH v2 04/11] drm/i915: Rename i915_gem_context_reference/unreference()

On Mon, May 23, 2016 at 12:34:11PM +0100, Chris Wilson wrote: > As these are wrappers around kref_get/kref_put() it is preferable to > follow the naming convention and use the same verb get/put in our > wrapper names for manipulating a reference to the context. > > Signed-off-by: Chris Wilson

Re: [Intel-gfx] [PATCH v3] drm/i915/debugfs: Show context objects in i915_gem_objects

On 23/05/16 14:01, Chris Wilson wrote: One of the uses for i915_gem_objects is pin-pointing leaks. For this, we can compare the number of allocated objects and who owns them, a discrepancy here often indicates a kernel bug. One allocator of unreported objects is for backing context objects, so

Re: [Intel-gfx] [PATCH i-g-t v5 0/7] kms_flip_event_leak and kms_vblank fixes for

Hi, I'm getting mixed results w/ this series applied. The kernel seems to trip in different ways either from suspend or on reload (running the BAT suite on a HSW machine), and though it seems totally unrelated I can't reproduce the same behaviour without the series applied. Haven't managed to get

Re: [Intel-gfx] [PATCH] drm/i915/guc: Disable automatic GuC firmware loading

On Mon, May 23, 2016 at 04:34:35PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > New GuC code is logging errors at runtime suspend and resume which > causes CI testing to log "orange" status. Default to not trying to > load the firmware until this is resolved.

Re: [Intel-gfx] [PATCH v3 2/2] drm/i915: Render decompression support for Gen9 and above

Hi Ville, Did you get a chance to review this patch? - Vandana > -Original Message- > From: Kannan, Vandana > Sent: Friday, May 13, 2016 7:35 PM > To: intel-gfx@lists.freedesktop.org > Cc: Kannan, Vandana ; Ville Syrjälä > ;

[Intel-gfx] [PATCH] drm/i915: Skip idling an idle engine

During suspend (or module unload), if we have never accessed the engine (i.e. userspace never submitted a batch to it), the engine is idle. Then we attempt to idle the engine by forcing it to the default context, which actually means we submit a render batch to setup the golden context state and

Re: [Intel-gfx] [RFC][PATCH 3/3] drm/i915: Make RPS enable immediate

On Tue, May 24, 2016 at 01:14:53PM +0300, Ville Syrjälä wrote: > On Tue, May 24, 2016 at 10:27:19AM +0200, Daniel Vetter wrote: > > On Mon, May 23, 2016 at 05:09:43PM +0300, ville.syrj...@linux.intel.com > > wrote: > > > From: Ville Syrjälä > > > > > > On SNB (at

Re: [Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915/guc: Disable automatic GuC firmware loading

On 24/05/16 06:50, Patchwork wrote: == Series Details == Series: drm/i915/guc: Disable automatic GuC firmware loading URL : https://patchwork.freedesktop.org/series/7577/ State : failure == Summary == Series 7577v1 drm/i915/guc: Disable automatic GuC firmware loading

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gen9: Assume CDCLK PLL is off if it's not locked

On Tue, May 24, 2016 at 12:27:50PM +0300, Imre Deak wrote: > If the CDCLK PLL isn't locked we can just assume that it's off resulting > in fully re-initializing both CDCLK PLL and CDCLK dividers. This way the > CDCLK PLL sanitization added in the following patch can be done on BXT > the same way

Re: [Intel-gfx] [RFC][PATCH 3/3] drm/i915: Make RPS enable immediate

On Tue, May 24, 2016 at 10:27:19AM +0200, Daniel Vetter wrote: > On Mon, May 23, 2016 at 05:09:43PM +0300, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > On SNB (at least) it's dangeruopus to hang the GPU with an infinite > > batch buffer loop

Re: [Intel-gfx] [PATCH 1/5] drm/i915: Invoke the DP Compliance test request handler in the short pulse path

i am bit partial :) coz i was involved but isn't the same done in patch shared earlier ? https://patchwork.freedesktop.org/patch/82587/ why not integrate that here if something more is done in the following patches ? regards, Sivakumar On 4/30/2016 6:58 AM, Manasi Navare wrote: HPD Short

[Intel-gfx] ✗ Ro.CI.BAT: warning for series starting with [1/2] drm/i915/gen9: Assume CDCLK PLL is off if it's not locked

== Series Details == Series: series starting with [1/2] drm/i915/gen9: Assume CDCLK PLL is off if it's not locked URL : https://patchwork.freedesktop.org/series/7621/ State : warning == Summary == Series 7621v1 Series without cover letter

Re: [Intel-gfx] [PATCH] drm/i915/ilk: Wait one vblank before enabling audio

On Mon, 23 May 2016, Lyude Paul wrote: > On Mon, 2016-05-23 at 21:06 +0300, Ville Syrjälä wrote: >> On Fri, May 20, 2016 at 05:36:40PM -0400, Lyude wrote: >> > >> > We no longer call ilk_audio_codec_enable() while we have vblanks >> > disabled. As such, we can finally fix this

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Fixes to support the DP Compliance EDID tests.

On Monday 23 May 2016 01:48 PM, Ander Conselvan De Oliveira wrote: On Fri, 2016-04-29 at 18:28 -0700, Manasi Navare wrote: This patch addresses a few issues from the original patch for DP Compliance EDID test support submitted by Todd Previte Do you mean commit

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Fixes to support the DP Compliance EDID tests.

On Monday 23 May 2016 01:48 PM, Ander Conselvan De Oliveira wrote: On Fri, 2016-04-29 at 18:28 -0700, Manasi Navare wrote: This patch addresses a few issues from the original patch for DP Compliance EDID test support submitted by Todd Previte Do you mean commit

[Intel-gfx] [PATCH 2/2] drm/i915/bxt: Sanitize CDCLK to fix breakage during S4 resume

I noticed that during S4 resume BIOS incorrectly sets bits 18, 19 which are reserved/MBZ and sets the decimal frequency fields to all 0xff in the CDCLK register. The result is a hard lockup as display register accesses are attempted later. Work around this by sanitizing the CDCLK PLL/dividers the

[Intel-gfx] [PATCH 1/2] drm/i915/gen9: Assume CDCLK PLL is off if it's not locked

If the CDCLK PLL isn't locked we can just assume that it's off resulting in fully re-initializing both CDCLK PLL and CDCLK dividers. This way the CDCLK PLL sanitization added in the following patch can be done on BXT the same way as it's done on SKL. Signed-off-by: Imre Deak

Re: [Intel-gfx] [PATCH 01/12] drm/i915: Add support for mapping an object page by page

On Wed, 2016-04-20 at 13:04 +0100, Chris Wilson wrote: > On Wed, Apr 20, 2016 at 04:47:28PM +0530, ankitprasad.r.sha...@intel.com > wrote: > > From: Chris Wilson > > > > Introduced a new vm specfic callback insert_page() to program a single pte > > in > > ggtt or

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Don't frob with RPS around GPU reset

On Tue, May 24, 2016 at 10:24:58AM +0200, Daniel Vetter wrote: > On Mon, May 23, 2016 at 03:32:40PM +0100, Chris Wilson wrote: > > On Mon, May 23, 2016 at 05:09:42PM +0300, ville.syrj...@linux.intel.com > > wrote: > > > From: Ville Syrjälä > > > > > > Based on my

Re: [Intel-gfx] Will Gen3/GMA950 benefit from tomic mode-setting ?

On Mon, May 23, 2016 at 04:34:47PM +0200, antistress wrote: > Hi, > > I own a netbook with a good old GMA 950 (Gen3 or Gen3.5 in Intel > glossary) with few hardware decode capabilities (MPEG-2 motion > compensation unless I am mistaken, which doesn't help for DivX > movies for instance). > >

Re: [Intel-gfx] [RFC][PATCH 3/3] drm/i915: Make RPS enable immediate

On Mon, May 23, 2016 at 05:09:43PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > On SNB (at least) it's dangeruopus to hang the GPU with an infinite > batch buffer loop while RPS is disabled. The only thing that keeps > the system going in

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Don't frob with RPS around GPU reset

On Mon, May 23, 2016 at 03:32:40PM +0100, Chris Wilson wrote: > On Mon, May 23, 2016 at 05:09:42PM +0300, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > Based on my observations GPU reset doesn't clobber the RPS state, so > > frobbing with RPS

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Bump pin_count to UINT_MAX.

On Mon, May 23, 2016 at 03:37:41PM +0200, Maarten Lankhorst wrote: > With nonblocking unpin there can be many cursor pins before they're > cleared by the next page flip. > > Fix this by extending pin_count to the full 32-bit to prevent a > WARN_ON(vma->pin_count ==

Re: [Intel-gfx] [PATCH 12/12] drm/i915: Show context objects in debugfs/i915_gem_objects

On Tue, May 24, 2016 at 10:13:24AM +0200, Daniel Vetter wrote: > On Sun, May 22, 2016 at 02:02:32PM +0100, Chris Wilson wrote: > > Signed-off-by: Chris Wilson > > Cc: Tvrtko Ursulin > > Cc: Joonas Lahtinen > >

Re: [Intel-gfx] [PATCH i-g-t] tests/drv_module_reload_basic: Don't use rmmod exit code when reloading the module.

On Tue, May 24, 2016 at 09:03:19AM +0100, Chris Wilson wrote: > On Tue, May 24, 2016 at 09:55:26AM +0200, Daniel Vetter wrote: > > On Mon, May 23, 2016 at 01:43:42PM +0300, Marius Vlad wrote: > > > On Fri, May 20, 2016 at 05:23:56PM +0100, Chris Wilson wrote: > > > > On Fri, May 20, 2016 at

Re: [Intel-gfx] ?==?utf-8?q? [RFC i-g-t 6/9] tests/gem_render_tiled_blits: Switched to new aliases of intel specific functions.

On Friday, May 20, 2016 23:59 BST, robert.f...@collabora.com wrote: > From: Robert Foss > > Switched from drm_XXX aliases drm_intel_XXX aliases for symbols where that > switch is possible. > > Signed-off-by: Robert Foss > --- >

Re: [Intel-gfx] ?==?utf-8?q? [RFC i-g-t 5/9] tests/gem_ppgtt: Switched to new aliases of intel specific functions.

On Friday, May 20, 2016 23:59 BST, robert.f...@collabora.com wrote: > From: Robert Foss > > Switched from drm_XXX aliases drm_intel_XXX aliases for symbols where that > switch is possible. > > Signed-off-by: Robert Foss > --- >

Re: [Intel-gfx] ?==?utf-8?q? [RFC i-g-t 5/9] tests/gem_ppgtt: Switched to new aliases of intel specific functions.

On Friday, May 20, 2016 23:59 BST, robert.f...@collabora.com wrote: > From: Robert Foss > > Switched from drm_XXX aliases drm_intel_XXX aliases for symbols where that > switch is possible. > > Signed-off-by: Robert Foss > --- >

Re: [Intel-gfx] ?==?utf-8?q? [RFC i-g-t 8/9] lib: Replace intel specific header includes with intel_drm_stubs.h.

On Friday, May 20, 2016 23:59 BST, robert.f...@collabora.com wrote: > From: Robert Foss > > Replace intel specific header includes with intel_drm_stubs.h. > > The stubbed functions will all call igt_require(false) and cause a skip. > > Signed-off-by: Robert Foss

Re: [Intel-gfx] ?==?utf-8?q? [RFC i-g-t 7/9] lib/intel_drm_stubs: Add stubs for functionality from libdrm_intel.

On Friday, May 20, 2016 23:59 BST, robert.f...@collabora.com wrote: > --- /dev/null > +++ b/lib/intel_drm_stubs.c Since this and the header file are stubs around intel_bufmgr, it might be better to call them intel_bufmgr_stubs.[ch]. In case "_stubs" in the name brings any confusion one could

[Intel-gfx] Will Gen3/GMA950 benefit from tomic mode-setting ?

Hi, I own a netbook with a good old GMA 950 (Gen3 or Gen3.5 in Intel glossary) with few hardware decode capabilities (MPEG-2 motion compensation unless I am mistaken, which doesn't help for DivX movies for instance). Will that graphical processor benefit from atomic mode-setting so that I

Re: [Intel-gfx] ?==?utf-8?q? ?==?utf-8?q? [RFC i-g-t 1/9]?==?utf-8?q? configure.ac: Test for libdrm_intel and build for it if present.

On Saturday, May 21, 2016 08:55 BST, Chris Wilson wrote: > On Fri, May 20, 2016 at 06:59:25PM -0400, robert.f...@collabora.com wrote: > > From: Robert Foss > > > > Test for libdrm_intel and build for it if present. > > Also expose the

Re: [Intel-gfx] ?==?utf-8?q? [RFC i-g-t 2/9] benchmarks/Makefile: Don't build benchmarks that depend on libdrm_intel.

On Friday, May 20, 2016 23:59 BST, robert.f...@collabora.com wrote: > From: Robert Foss > > Use the HAS_INTEL automake flag to avoid building benchmarks that won't > compile unless libdrm_intel is available in the build system. > > Signed-off-by: Robert Foss

Re: [Intel-gfx] ?==?utf-8?q? [RFC i-g-t 3/9] tools/Makefile: Don't build tools that depend on libdrm_intel.

On Friday, May 20, 2016 23:59 BST, robert.f...@collabora.com wrote: > From: Robert Foss > > Use the HAS_INTEL automake flag to avoid building tools that won't > compile unless libdrm_intel is available in the build system. > > Signed-off-by: Robert Foss

Re: [Intel-gfx] [PATCH 12/12] drm/i915: Show context objects in debugfs/i915_gem_objects

On Sun, May 22, 2016 at 02:02:32PM +0100, Chris Wilson wrote: > Signed-off-by: Chris Wilson > Cc: Tvrtko Ursulin > Cc: Joonas Lahtinen > --- > drivers/gpu/drm/i915/i915_debugfs.c | 35

Re: [Intel-gfx] [PATCH 05/12] drm/i915: Rename i915_gem_context_reference/unreference()

On Mon, May 23, 2016 at 10:17:01AM +0100, Tvrtko Ursulin wrote: > > On 22/05/16 14:02, Chris Wilson wrote: > >As these are wrappers around kref_get/kref_put() it is preferable to > >follow the naming convention and use the same verb get/put in our > >wrapper names for manipulating a reference to

Re: [Intel-gfx] [PATCH i-g-t] tests/drv_module_reload_basic: Don't use rmmod exit code when reloading the module.

On Tue, May 24, 2016 at 09:03:19AM +0100, Chris Wilson wrote: > On Tue, May 24, 2016 at 09:55:26AM +0200, Daniel Vetter wrote: > > On Mon, May 23, 2016 at 01:43:42PM +0300, Marius Vlad wrote: > > > On Fri, May 20, 2016 at 05:23:56PM +0100, Chris Wilson wrote: > > > > On Fri, May 20, 2016 at

Re: [Intel-gfx] [RFC i-g-t 8/9] lib: Replace intel specific header includes with intel_drm_stubs.h.

On Fri, May 20, 2016 at 06:59:32PM -0400, robert.f...@collabora.com wrote: > From: Robert Foss > > Replace intel specific header includes with intel_drm_stubs.h. > > The stubbed functions will all call igt_require(false) and cause a skip. > > Signed-off-by: Robert

Re: [Intel-gfx] [RFC i-g-t 7/9] lib/intel_drm_stubs: Add stubs for functionality from libdrm_intel.

On Fri, May 20, 2016 at 06:59:31PM -0400, robert.f...@collabora.com wrote: > From: Robert Foss > > This patch provides stubs for functionality otherwise provided by > libdrm_intel. > > The stubbed functions all fail with a call to igt_require(false). > Defines and

Re: [Intel-gfx] [RFC i-g-t 6/9] tests/gem_render_tiled_blits: Switched to new aliases of intel specific functions.

On Mon, May 23, 2016 at 03:39:12PM +0100, Emil Velikov wrote: > On Friday, May 20, 2016 23:59 BST, robert.f...@collabora.com wrote: > > From: Robert Foss > > > > Switched from drm_XXX aliases drm_intel_XXX aliases for symbols where that > > switch is possible. > > > >

Re: [Intel-gfx] [PATCH i-g-t] tests/drv_module_reload_basic: Don't use rmmod exit code when reloading the module.

On Tue, May 24, 2016 at 09:55:26AM +0200, Daniel Vetter wrote: > On Mon, May 23, 2016 at 01:43:42PM +0300, Marius Vlad wrote: > > On Fri, May 20, 2016 at 05:23:56PM +0100, Chris Wilson wrote: > > > On Fri, May 20, 2016 at 07:00:18PM +0300, Imre Deak wrote: > > > > On pe, 2016-05-20 at 18:20 +0300,

Re: [Intel-gfx] [RFC i-g-t 5/9] tests/gem_ppgtt: Switched to new aliases of intel specific functions.

On Mon, May 23, 2016 at 03:15:26PM +0100, Emil Velikov wrote: > On Friday, May 20, 2016 23:59 BST, robert.f...@collabora.com wrote: > > From: Robert Foss > > > > Switched from drm_XXX aliases drm_intel_XXX aliases for symbols where that > > switch is possible. > > > >

Re: [Intel-gfx] [RFC i-g-t 2/9] benchmarks/Makefile: Don't build benchmarks that depend on libdrm_intel.

On Mon, May 23, 2016 at 03:04:16PM +0100, Emil Velikov wrote: > On Friday, May 20, 2016 23:59 BST, robert.f...@collabora.com wrote: > > From: Robert Foss > > > > Use the HAS_INTEL automake flag to avoid building benchmarks that won't > > compile unless libdrm_intel is

[Intel-gfx] ✗ Ro.CI.BAT: warning for Add USB typeC based DP support for BXT platform (rev8)

== Series Details == Series: Add USB typeC based DP support for BXT platform (rev8) URL : https://patchwork.freedesktop.org/series/1731/ State : warning == Summary == Series 1731v8 Add USB typeC based DP support for BXT platform

Re: [Intel-gfx] [PATCH i-g-t] tests/drv_module_reload_basic: Don't use rmmod exit code when reloading the module.

On Mon, May 23, 2016 at 01:43:42PM +0300, Marius Vlad wrote: > On Fri, May 20, 2016 at 05:23:56PM +0100, Chris Wilson wrote: > > On Fri, May 20, 2016 at 07:00:18PM +0300, Imre Deak wrote: > > > On pe, 2016-05-20 at 18:20 +0300, Marius Vlad wrote: > > > > Either we return $IGT_EXIT_FAILURE or

Re: [Intel-gfx] [PATCH v2] drm/i915: Remove ddi_pll_sel from intel_crtc_state

> -Original Message- > From: Conselvan De Oliveira, Ander > Sent: Tuesday, May 24, 2016 1:03 PM > To: intel-gfx@lists.freedesktop.org > Cc: R, Durgadoss ; Conselvan De Oliveira, Ander > > Subject: [PATCH v2] drm/i915: Remove

Re: [Intel-gfx] [PATCHv6 5/5] drm/i915/dp: Enable Upfront link training for typeC DP support on BXT

On Fri, 2016-05-20 at 14:29 +0530, Durgadoss R wrote: > To support USB type C alternate DP mode, the display driver needs to > know the number of lanes required by the DP panel as well as number > of lanes that can be supported by the type-C cable. Sometimes, the > type-C cable may limit the

[Intel-gfx] [PATCH v2] drm/i915: Remove ddi_pll_sel from intel_crtc_state

The value of ddi_pll_sel is derived from the selection of shared dpll, so just calculate the final value when necessary. v2: Actually remove it from crtc state and delete remaining usages. (CI) Signed-off-by: Ander Conselvan de Oliveira ---

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