Hello,
since Kernel 4.6, the fbc is broken for me. Some specific X software
(e.g. wireshark-qt, sakura and sublime) display UI modifications, such
as keyboard input, with a delay up to ~1s.
Either downgrading to 4.5 or disabling fbc solve this problem.
This affects at least multiple Thinkpad and
> -Original Message-
> From: Thierry, Michel
> Sent: Thursday, June 23, 2016 3:48 AM
> To: Antoine, Peter ; Xiang, Haihao
> ; daniel.vet...@ffwll.ch
> Cc: Kelley, Sean V ; intel-
> g...@lists.freedesktop.org; Li, Lawrence T ; Vivi,
> Rodrigo
> Subject: Re: [Intel-gfx] [PATCH 4/6] drm/i91
This is unusual. Usually IDs listed on early stages of platform
definition are kept there as reserved for later use.
However these IDs here are not listed anymore in any of steppings
and devices IDs tables for Kabylake on configurations overview
section of BSpec.
So it is better removing them bef
The spec has been updated adding new PCI IDs.
Signed-off-by: Rodrigo Vivi
---
intel/intel_chipset.h | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index e2554c3..0c3ca82 100644
--- a/intel/intel_chipset.h
+++ b/in
The spec has been updated adding new PCI IDs.
Signed-off-by: Rodrigo Vivi
---
include/pci_ids/i965_pci_ids.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
index fce00da..7a7897f 100644
--- a/include/pci_ids/i965_pci_ids.h
+
This is unusual. Usually IDs listed on early stages of platform
definition are kept there as reserved for later use.
However these IDs here are not listed anymore in any of steppings
and devices IDs tables for Kabylake on configurations overview
section of BSpec.
So it is better removing them bef
This is unusual. Usually IDs listed on early stages of platform
definition are kept there as reserved for later use.
However these IDs here are not listed anymore in any of steppings
and devices IDs tables for Kabylake on configurations overview
section of BSpec.
So it is better removing them bef
The spec has been updated adding new PCI IDs.
Signed-off-by: Rodrigo Vivi
---
src/i915_pciids.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/i915_pciids.h b/src/i915_pciids.h
index 9094599..87dde1c 100644
--- a/src/i915_pciids.h
+++ b/src/i915_pciids.h
@@ -309,6 +309,7 @@
I
This is unusual. Usually IDs listed on early stages of platform
definition are kept there as reserved for later use.
However these IDs here are not listed anymore in any of steppings
and devices IDs tables for Kabylake on configurations overview
section of BSpec.
So it is better removing them bef
The spec has been updated adding new PCI IDs.
Signed-off-by: Rodrigo Vivi
---
lib/intel_chipset.h | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index 2f2e435..1c894d5 100644
--- a/lib/intel_chipset.h
+++ b/lib/intel_
The spec has been updated adding new PCI IDs.
Signed-off-by: Rodrigo Vivi
---
include/drm/i915_pciids.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 9094599..87dde1c 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i91
This is unusual. Usually IDs listed on early stages of platform
definition are kept there as reserved for later use.
However these IDs here are not listed anymore in any of steppings
and devices IDs tables for Kabylake on configurations overview
section of BSpec.
So it is better removing them bef
That part is trying to just allocate 8 to each cursor. The buffer used up will
be 8*numpipes, but that's because its assuming you can end up enabling a cursor
on each pipe.
I think its good to go up to 16. The kind of latencies we get on skl mean that
a 64x64 32bpp cursor with 8 blocks will b
On Thu, Jun 23, 2016 at 07:46:03PM +0300, Marius Vlad wrote:
> Signed-off-by: Marius Vlad
> CC: Chris Wilson
> ---
> lib/drmtest.c | 12 +++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/lib/drmtest.c b/lib/drmtest.c
> index 1e28f60..d2ee2d1 100644
> --- a/lib/drmt
On Thu, Jun 23, 2016 at 07:46:02PM +0300, Marius Vlad wrote:
> Signed-off-by: Marius Vlad
> CC: Chris Wilson
> ---
> lib/drmtest.c | 8 +++-
> tests/drv_missed_irq.c| 2 +-
> tests/kms_cursor_legacy.c | 8 ++--
> 3 files changed, 10 insertions(+), 8 deletions(-)
>
> diff
Thanks Art. I believe the commit message should be updated to reflect
this is flexible. Probably coping and pasting this part of spec: "More
allocation might be required to support deeper low power states."
So I went now to the spec to review the code and besides the line
above I also notice for t
The bspec says "These are basic methods that can be used for single and
multi-pipe modes. For optimal power usage, the display driver can choose to use
more advanced allocation techniques as desired."
So we leave it up to the driver to optimize as it sees fit.
-Original Message-
From: Ro
Signed-off-by: Marius Vlad
CC: Chris Wilson
---
lib/drmtest.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/lib/drmtest.c b/lib/drmtest.c
index 1e28f60..d2ee2d1 100644
--- a/lib/drmtest.c
+++ b/lib/drmtest.c
@@ -261,7 +261,17 @@ int __drm_open_driver(int chipse
Signed-off-by: Marius Vlad
CC: Chris Wilson
---
lib/drmtest.c | 8 +++-
tests/drv_missed_irq.c| 2 +-
tests/kms_cursor_legacy.c | 8 ++--
3 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/lib/drmtest.c b/lib/drmtest.c
index 9a1232f..1e28f60 100644
--- a/lib/
vGEM buffers are useful for passing data between software clients and
hardware renders. By allowing the user to create and attach fences to
the exported vGEM buffers (on the dma-buf), the user can implement a
deferred renderer and queue hardware operations like flipping and then
signal the buffer r
The vGEM mmap code has bitrotted slightly and now immediately BUGs.
Since vGEM was last updated, there are new core GEM facilities to
provide more common functions, so let's use those here.
v2: drm_gem_free_mmap_offset() is performed from
drm_gem_object_release() so we can remove the redundant cal
Enable the standard GEM dma-buf interface provided by the DRM core, but
only for exporting the VGEM object. This allows passing around the VGEM
objects created from the dumb interface and using them as sources
elsewhere. Creating a VGEM object for a foriegn handle is not supported.
v2: With additi
On Thu, Jun 23, 2016 at 02:52:41PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Effectively removes one layer of indirection between the mask of
> possible engines and the engine constructors. Instead of spelling
> out in code the mapping of HAS_ to constructors, makes
> more use of th
From: Tvrtko Ursulin
Effectively removes one layer of indirection between the mask of
possible engines and the engine constructors. Instead of spelling
out in code the mapping of HAS_ to constructors, makes
more use of the recently added data driven approach by putting
engine constructor vfuncs i
On Thu, 23 Jun 2016, Dave Gordon wrote:
On 22/06/16 09:31, Daniel Vetter wrote:
On Tue, Jun 21, 2016 at 07:11:22PM +0100, Peter Antoine wrote:
From: Alex Dai
The HuC loading process is similar to GuC. The intel_uc_fw_fetch()
is used for both cases.
HuC loading needs to be before GuC loading
On Thu, Jun 23, 2016 at 01:45:06PM +0200, Maarten Lankhorst wrote:
> Atomic updates may acquire more state than initially locked through
> drm_modeset_lock_crtc, running with heavy stress can cause a
> WARN_ON(crtc->acquire_ctx) in drm_modeset_lock_crtc:
>
> [ 601.491296] [ cut here ]
On Thu, Jun 23, 2016 at 02:16:55PM +0100, Tvrtko Ursulin wrote:
>
> On 23/06/16 13:11, Chris Wilson wrote:
> >On Thu, Jun 23, 2016 at 12:46:42PM +0100, Tvrtko Ursulin wrote:
> >>
> >>On 23/06/16 12:25, Chris Wilson wrote:
> >>>On Thu, Jun 23, 2016 at 12:12:29PM +0100, Tvrtko Ursulin wrote:
> F
On Sun, 2016-06-19 at 14:53 -0700, James Bottomley wrote:
> On Fri, 2016-06-17 at 16:06 -0700, James Bottomley wrote:
> > On Fri, 2016-06-17 at 16:34 +0300, Jani Nikula wrote:
> > > On Fri, 17 Jun 2016, Daniel Vetter wrote:
> > > > On Thu, Jun 16, 2016 at 03:42:12PM -0700, James Bottomley
> > > >
On 23/06/16 13:11, Chris Wilson wrote:
On Thu, Jun 23, 2016 at 12:46:42PM +0100, Tvrtko Ursulin wrote:
On 23/06/16 12:25, Chris Wilson wrote:
On Thu, Jun 23, 2016 at 12:12:29PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Effectively removes one layer of indirection between the mask o
On Thu, 2016-06-23 at 15:59 +0300, Jani Nikula wrote:
> On Thu, 23 Jun 2016, Steven Newbury wrote:
> > [ Unknown signature status ]
> > On Sun, 2016-06-19 at 14:53 -0700, James Bottomley wrote:
> > > On Fri, 2016-06-17 at 16:06 -0700, James Bottomley wrote:
> > > > On Fri, 2016-06-17 at 16:34 +030
On Thu, Jun 23, 2016 at 05:42:33AM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Eliminate DDI encoder->type frobbery (rev2)
> URL : https://patchwork.freedesktop.org/series/8439/
> State : warning
>
> == Summary ==
>
> Series 8439v2 drm/i915: Eliminate DDI encoder->type
On Thu, 23 Jun 2016, Steven Newbury wrote:
> [ Unknown signature status ]
> On Sun, 2016-06-19 at 14:53 -0700, James Bottomley wrote:
>> On Fri, 2016-06-17 at 16:06 -0700, James Bottomley wrote:
>> > On Fri, 2016-06-17 at 16:34 +0300, Jani Nikula wrote:
>> > > On Fri, 17 Jun 2016, Daniel Vetter w
From: Maarten Lankhorst
Rename vlv_compute_wm to vlv_compute_pipe_wm to compute optimal watermark
Add vlv_compute_intermediate_wm to computer intermediate watermark
Add vlv_initial_watermarks to write intermediate watermark into hardware
Add vlv_optimize_watermarks to write optimal watermark into
From: Maarten Lankhorst
For two-stage watermark programming, we need to calculate optimal
watermark which is set after vblank and intermediate watermark which
can be set without waiting for vblank.
This commit adds optimal watermark field and changes the code to use it
in vlv_compute_wm(), vlv_u
From: Maarten Lankhorst
This commit changs some functions to operate on intel_crtc_state rather
than the base CRTC objects in order to transit to atomic. The reason we
want to do this is to allow future patches to move the computation steps
into the atomic 'check' phase where they'll be operating
From: Maarten Lankhorst
Everything except fifo_size is unused and therefore removed
Signed-off-by: Maarten Lankhorst
Signed-off-by: Chi Ding
---
drivers/gpu/drm/i915/intel_drv.h | 15 ---
1 file changed, 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/
From: Maarten Lankhorst
This commit saves watermark for each plane in vlv_wm_state to prepare
for two-level watermark because we'll compute and save intermediate and
optimal watermark and fifo size for each plane.
v2:
- remove redundant debug statements in vlv_pipe_set_fifo_size()
- reverse pass
From: Maarten Lankhorst
Previously the active watermarks is saved in intel_crtc->wm_state
This commit adds a new field "vlv" into intel_crtc->wm.active and save
the active watermarks in it to be consistent with what we do on other
platforms.
Signed-off-by: Maarten Lankhorst
Signed-off-by: Chi D
From: Maarten Lankhorst
This function will be used not only by SKL but also VLV/CHV.
Therefore it's renamed
Signed-off-by: Maarten Lankhorst
Signed-off-by: Chi Ding
---
drivers/gpu/drm/i915/intel_pm.c | 57 +
1 file changed, 29 insertions(+), 28 deletio
From: Maarten Lankhorst
When computing normal watermarks in vlv_compute_wm(), if the value
is bigger than system limitation, return EINVAL
Signed-off-by: Maarten Lankhorst
Signed-off-by: Chi Ding
---
drivers/gpu/drm/i915/intel_pm.c | 11 ---
1 file changed, 8 insertions(+), 3 deletion
From: root
In addition to calculating final watermarks, we also pre-calculate
a set of intermediate watermark values at atomic check time. These
intermediate watermarks are a combination of the watermarks for the
old state and the new state; they should satisfy the requirements of
both states
On Wed, Jun 22, 2016 at 09:33:13PM +0100, Chris Wilson wrote:
> On Wed, Jun 22, 2016 at 04:26:01PM +0300, Ville Syrjälä wrote:
> > On Wed, Jun 22, 2016 at 02:11:51PM +0100, Chris Wilson wrote:
> > > On Wed, Jun 22, 2016 at 04:01:12PM +0300, Ville Syrjälä wrote:
> > > > On Wed, Jun 22, 2016 at 01:34
On Thu, Jun 23, 2016 at 12:46:42PM +0100, Tvrtko Ursulin wrote:
>
> On 23/06/16 12:25, Chris Wilson wrote:
> >On Thu, Jun 23, 2016 at 12:12:29PM +0100, Tvrtko Ursulin wrote:
> >>From: Tvrtko Ursulin
> >>
> >>Effectively removes one layer of indirection between the mask of
> >>possible engines and
On 23/06/16 12:25, Chris Wilson wrote:
On Thu, Jun 23, 2016 at 12:12:29PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Effectively removes one layer of indirection between the mask of
possible engines and the engine constructors. Instead of spelling
out in code the mapping of HAS_ to con
Atomic updates may acquire more state than initially locked through
drm_modeset_lock_crtc, running with heavy stress can cause a
WARN_ON(crtc->acquire_ctx) in drm_modeset_lock_crtc:
[ 601.491296] [ cut here ]
[ 601.491366] WARNING: CPU: 0 PID: 2411 at
drivers/gpu/drm/drm_
On Tue, 2016-06-21 at 17:00 -0400, James Bottomley wrote:
> On Tue, 2016-06-21 at 18:44 +0300, Ville Syrjälä wrote:
> > On Tue, Jun 21, 2016 at 09:53:15AM -0400, James Bottomley wrote:
> > > On Mon, 2016-06-20 at 11:03 +0300, Jani Nikula wrote:
> > > > Cc: Ville
> > > >
> > > > On Mon, 20 Jun 2016
On Thu, Jun 23, 2016 at 12:12:29PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Effectively removes one layer of indirection between the mask of
> possible engines and the engine constructors. Instead of spelling
> out in code the mapping of HAS_ to constructors, makes
> more use of th
Thanks for the tip. I haven't noticed any differences in the generated
output, so I've applied it.
On Thu, May 19, 2016 at 03:07:46PM +0100, Damien Lespiau wrote:
> On Thu, May 19, 2016 at 07:02:40AM -0700, Ben Widawsky wrote:
> > On Thu, May 19, 2016 at 12:28:10PM +0100, Damien Lespiau wrote:
> >
From: Tvrtko Ursulin
Effectively removes one layer of indirection between the mask of
possible engines and the engine constructors. Instead of spelling
out in code the mapping of HAS_ to constructors, makes
more use of the recently added data driven approach by putting
engine constructor vfuncs i
On 6/23/2016 11:01 AM, Peter Antoine wrote:
Daniel,
Is this suggestion acceptable? I don't want to waste time and effort
writing code that is not going to be accepted?
Peter.
Reuse I915_GETPARAM and do more-less what Chris did for i915.enable_gvt? [1]
[1]
https://cgit.freedesktop.org/drm-
On Thu, Jun 23, 2016 at 11:26:27AM +0100, Tvrtko Ursulin wrote:
>
> On 22/06/16 17:59, Chris Wilson wrote:
> >On Wed, Jun 22, 2016 at 05:35:48PM +0100, Tvrtko Ursulin wrote:
> >>From: Tvrtko Ursulin
> >>
> >>Effectively removes one layer of indirection between the mask of
> >>possible engines and
On 22/06/16 17:59, Chris Wilson wrote:
On Wed, Jun 22, 2016 at 05:35:48PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Effectively removes one layer of indirection between the mask of
possible engines and the engine constructors. Instead of spelling
out in code the mapping of HAS_ to con
On 22/06/16 09:31, Daniel Vetter wrote:
On Tue, Jun 21, 2016 at 07:11:22PM +0100, Peter Antoine wrote:
From: Alex Dai
The HuC loading process is similar to GuC. The intel_uc_fw_fetch()
is used for both cases.
HuC loading needs to be before GuC loading. The WOPCM setting must
be done early bef
Daniel,
Is this suggestion acceptable? I don't want to waste time and effort
writing code that is not going to be accepted?
Peter.
On Thu, 23 Jun 2016, Xiang, Haihao wrote:
Hi Peter,
Besides debugfs, could you add a IOCTL to check HuC loading status?
Userspace media driver needs to advert
On 17/06/2016 13:39, Mika Kuoppala wrote:
Add this workaround to prevent hang when in place compression
is used.
References: HSD#2135774
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/i
On Thu, 23 Jun 2016, Xiang, Haihao wrote:
Hi Peter,
Besides debugfs, could you add a IOCTL to check HuC loading status?
Userspace media driver needs to advertise the features based on HuC to
user.
Thanks
Haihao
From: Alex Dai
Add debugfs entry for HuC loading status check.
Signed-off-
From: Robert Foss
Always set HAVE_LIBDRM_INTEL to true for Android targets.
Signed-off-by: Robert Foss
---
Android.mk | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Android.mk b/Android.mk
index 681d114..3690fc5 100644
--- a/Android.mk
+++ b/Android.mk
@@ -1,2 +1,4 @@
+HAVE_LIBDRM_INTEL
From: Robert Foss
Replace the automake specific variable names for listings in Makefile.sources
with something not automake specific.
Signed-off-by: Robert Foss
---
lib/Android.mk | 2 +-
lib/Makefile.am | 2 ++
lib/Makefile.sources | 2 +-
3 files changed, 4 insertions(+), 2 deleti
From: Robert Foss
Use the HAS_INTEL automake flag to avoid building tools that won't
compile unless libdrm_intel is available in the build system.
Signed-off-by: Robert Foss
---
tools/Android.mk | 5 +
tools/Makefile.am | 5 +
tools/Makefile.sources | 16 ++--
From: Robert Foss
Use the HAS_INTEL automake flag to avoid building tools that won't
compile unless libdrm_intel is available in the build system.
Signed-off-by: Robert Foss
---
demos/Android.mk | 5 -
demos/Makefile.am | 8 +---
demos/Makefile.sources | 7 +++
3 files c
From: Robert Foss
Replace the automake specific names of listings with something that isn't
automake specific.
Signed-off-by: Robert Foss
---
lib/tests/Android.mk | 2 +-
lib/tests/Makefile.am | 3 +++
lib/tests/Makefile.sources | 8
3 files changed, 8 insertions(+), 5 dele
From: Robert Foss
Replace the automake specific name of listings in Makefile.sources
with something not automake specific.
Signed-off-by: Robert Foss
---
demos/Android.mk | 2 +-
demos/Makefile.am | 2 ++
demos/Makefile.sources | 2 +-
3 files changed, 4 insertions(+), 2 deletions(-
From: Robert Foss
Replace the automake specific names of listings in Makefile.sources with
something not automake specific.
Signed-off-by: Robert Foss
---
tools/Android.mk | 1 +
tools/Makefile.am | 2 ++
tools/Makefile.sources | 2 +-
3 files changed, 4 insertions(+), 1 deletion(-)
From: Robert Foss
Replace the automake flag HAVE_XXX for VC4/NOUVEAU with HAVE_LIBDRM_XXX in
order for the flags to be more descriptive and also follow the same convention
as HAVE_LIBDRM_INTEL.
Signed-off-by: Robert Foss
---
configure.ac | 8
lib/Makefile.am | 2 +-
tests/Makef
From: Robert Foss
Use the HAS_INTEL automake flag to avoid building benchmarks that won't
compile unless libdrm_intel is available in the build system.
Signed-off-by: Robert Foss
---
benchmarks/Android.mk | 4
benchmarks/Makefile.am | 5 -
benchmarks/Makefile.sources | 13
From: Robert Foss
Harmonize tabs/spaces etc.
Signed-off-by: Robert Foss
---
tools/Makefile.sources | 57 +-
1 file changed, 29 insertions(+), 28 deletions(-)
diff --git a/tools/Makefile.sources b/tools/Makefile.sources
index 07d8d9b..7ed5fe5 100
From: Robert Foss
This patch provides stubs for functionality otherwise provided by intel_bufmgr.
The stubbed functions all fail with a call to igt_require_f(false,"").
Defines and enums have been copied from libdrm_intel.
Due to the stubbed tests failing with an igt_require_f() call, these stu
From: Robert Foss
Replace the automake specific name of listings in Makefile.sources
with something not automake specific.
Signed-off-by: Robert Foss
---
benchmarks/Android.mk | 2 +-
benchmarks/Makefile.am | 2 ++
benchmarks/Makefile.sources | 2 +-
3 files changed, 4 insertions(+)
From: Robert Foss
Test for libdrm_intel and build for it if present.
Also expose the HAVE_INTEL #define to allow code to be conditionally
compiled.
Signed-off-by: Robert Foss
---
configure.ac | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/configure.ac b/c
From: Robert Foss
Hey,
I've been looking at the possibilty of removing the compile time depency on
libdrm_intel. There are two technical solutions to this problem as far as
I can see; stubs and conditional compilation.
This series uses the stubbing approach.
Changes since v1:
- Replaced the a
Hi guys,
2016-06-06 11:32 GMT+02:00 Ville Syrjälä :
> On Sat, Jun 04, 2016 at 02:06:58PM -0700, Greg KH wrote:
> > On Fri, May 27, 2016 at 11:30:30AM +0300, ville.syrj...@linux.intel.com
> wrote:
> > > From: Ville Syrjälä
> > >
> > > Several nasty i915 regressions affecting CHV slipped through
>
== Series Details ==
Series: Add two-stage watermark programming for VLV/CHV (v4)
URL : https://patchwork.freedesktop.org/series/9067/
State : failure
== Summary ==
Applying: drm/i915: Remove unused parameters from intel_plane_wm_parameters
Applying: drm/i915: Rename skl_plane_id to wm_plane_i
From: Maarten Lankhorst
Rename vlv_compute_wm to vlv_compute_pipe_wm to compute optimal watermark
Add vlv_compute_intermediate_wm to computer intermediate watermark
Add vlv_initial_watermarks to write intermediate watermark into hardware
Add vlv_optimize_watermarks to write optimal watermark into
From: Maarten Lankhorst
Everything except fifo_size is unused and therefore removed
Signed-off-by: Maarten Lankhorst
Signed-off-by: Chi Ding
---
drivers/gpu/drm/i915/intel_drv.h | 15 ---
1 file changed, 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/
From: Maarten Lankhorst
Previously the active watermarks is saved in intel_crtc->wm_state
This commit adds a new field "vlv" into intel_crtc->wm.active and save
the active watermarks in it to be consistent with what we do on other
platforms.
Signed-off-by: Maarten Lankhorst
Signed-off-by: Chi D
From: Maarten Lankhorst
For two-stage watermark programming, we need to calculate optimal
watermark which is set after vblank and intermediate watermark which
can be set without waiting for vblank.
This commit adds optimal watermark field and changes the code to use it
in vlv_compute_wm(), vlv_u
From: Maarten Lankhorst
This commit changs some functions to operate on intel_crtc_state rather
than the base CRTC objects in order to transit to atomic. The reason we
want to do this is to allow future patches to move the computation steps
into the atomic 'check' phase where they'll be operating
On Thu, 23 Jun 2016, Andy Lutomirski wrote:
> I have a Dell XPS 13 9350 (Skylake) and a Dell DA200 adapter. The
> latter is a Thunderbolt device that includes an HDMI port and connects
> over USB Type C. I believe that it's internally using DP Alternate
> Mode.
> I don't know whether this is a
From: Maarten Lankhorst
This function will be used not only by SKL but also VLV/CHV.
Therefore it's renamed
Signed-off-by: Maarten Lankhorst
Signed-off-by: Chi Ding
---
drivers/gpu/drm/i915/intel_pm.c | 59 +
1 file changed, 30 insertions(+), 29 deletio
From: Maarten Lankhorst
This commit saves watermark for each plane in vlv_wm_state to prepare
for two-level watermark because we'll compute and save intermediate and
optimal watermark and fifo size for each plane.
v2:
- remove redundant debug statements in vlv_pipe_set_fifo_size()
- reverse pass
From: Maarten Lankhorst
When computing normal watermarks in vlv_compute_wm(), if the value
is bigger than system limitation, return EINVAL
Signed-off-by: Maarten Lankhorst
Signed-off-by: Chi Ding
---
drivers/gpu/drm/i915/intel_pm.c | 11 ---
1 file changed, 8 insertions(+), 3 deletion
From: root
In addition to calculating final watermarks, we also pre-calculate
a set of intermediate watermark values at atomic check time. These
intermediate watermarks are a combination of the watermarks for the
old state and the new state; they should satisfy the requirements of
both states
== Series Details ==
Series: series starting with [1/3] drm/i915/dp: Free the drm_dp_aux along with
the encoder
URL : https://patchwork.freedesktop.org/series/8847/
State : failure
== Summary ==
Applying: drm/i915/dp: Free the drm_dp_aux along with the encoder
Using index info to reconstruct
== Series Details ==
Series: Convert requests to use struct fence (rev9)
URL : https://patchwork.freedesktop.org/series/1068/
State : failure
== Summary ==
Applying: drm/i915: Add per context timelines for fence objects
fatal: sha1 information is lacking or useless (drivers/gpu/drm/i915/i915_g
== Series Details ==
Series: Runtime: set the sub slice according to kernel pooled EU configure.
URL : https://patchwork.freedesktop.org/series/8724/
State : failure
== Summary ==
Applying: Runtime: set the sub slice according to kernel pooled EU configure.
fatal: sha1 information is lacking o
== Series Details ==
Series: series starting with [1/2] lib/gt: Omit illegal instruction on hang
injection with gen 8+
URL : https://patchwork.freedesktop.org/series/8452/
State : failure
== Summary ==
Applying: lib/gt: Omit illegal instruction on hang injection with gen 8+
fatal: sha1 inform
Hi Peter,
Besides debugfs, could you add a IOCTL to check HuC loading status?
Userspace media driver needs to advertise the features based on HuC to
user.
Thanks
Haihao
> From: Alex Dai
>
> Add debugfs entry for HuC loading status check.
>
> Signed-off-by: Alex Dai
> Signed-off-by: Peter A
On Thu, 23 Jun 2016, "Zanoni, Paulo R" wrote:
> Em Ter, 2016-06-21 às 08:25 +0100, Chris Wilson escreveu:
>> Erratum SKL075: Display Flicker May Occur When Both VT-d And FBC Are
>> Enabled
>>
>> "Display flickering may occur when both FBC (Frame Buffer
>> Compression)
>> and VT - d (Intel® Virtua
88 matches
Mail list logo