Re: [Intel-gfx] [PATCH v2] pwm: lpss: Make builtin so that i915 can find the pwm_backlight

Hi, On 20-01-17 08:18, Thierry Reding wrote: On Fri, Jan 20, 2017 at 08:03:33AM +0100, Thierry Reding wrote: On Thu, Jan 19, 2017 at 06:58:30PM +0100, Hans de Goede wrote: The primary consumer of the lpss pwm is the i915 kms driver, the i915 driver does not support get_pwm returning

Re: [Intel-gfx] [alsa-devel] [PATCH V3 3/5] ALSA: add Intel HDMI LPE audio driver for BYT/CHT-T

On Fri, 20 Jan 2017 06:46:05 +0100, Anand, Jerome wrote: > > > > > -Original Message- > > From: Takashi Iwai [mailto:ti...@suse.de] > > Sent: Thursday, January 19, 2017 4:22 PM > > To: Anand, Jerome > > Cc: alsa-de...@alsa-project.org;

Re: [Intel-gfx] [PATCH v2] pwm: lpss: Make builtin so that i915 can find the pwm_backlight

On Fri, Jan 20, 2017 at 08:03:33AM +0100, Thierry Reding wrote: > On Thu, Jan 19, 2017 at 06:58:30PM +0100, Hans de Goede wrote: > > The primary consumer of the lpss pwm is the i915 kms driver, > > the i915 driver does not support get_pwm returning -EPROBE_DEFER and > > its init is very complex

Re: [Intel-gfx] [PATCH v2] pwm: lpss: Make builtin so that i915 can find the pwm_backlight

On Thu, Jan 19, 2017 at 06:58:30PM +0100, Hans de Goede wrote: > The primary consumer of the lpss pwm is the i915 kms driver, > the i915 driver does not support get_pwm returning -EPROBE_DEFER and > its init is very complex making this is almost impossible to fix. > > This commit changes the

Re: [Intel-gfx] [PATCH] drm/i915: Use IS_GEN9 and IS_LP to put Skylake and Kabylake in the same bucket.

On Fri, 20 Jan 2017, Anusha Srivatsa wrote: > With GLK was introduced IS_LP. > With this, we can use IS_GEN9 and IS_LP to put Skylake > and Kabylake in the same bucket. The main intention is > to simplify the if and else statements that gets added > for every new

[Intel-gfx] ✓ Fi.CI.BAT: success for Add Automation Support for DP Compliance (Rev 5)

== Series Details == Series: Add Automation Support for DP Compliance (Rev 5) URL : https://patchwork.freedesktop.org/series/18256/ State : success == Summary == Series 18256v1 Add Automation Support for DP Compliance (Rev 5)

[Intel-gfx] [PATCH 0/4] Add Automation Support for DP Compliance (Rev 5)

This series addresses review comments from the previous series: https://patchwork.freedesktop.org/series/18150/ Apart from addressing review comments, it also adds a fix for CRC mismatch errors in Compliance tests 4.4.1.1 - 4.4.1.3 DP 1.2 compliance testing can be acheived using DPR-120's CTS

[Intel-gfx] [PATCH 4/4] drm/i915: Add support for DP Video pattern compliance tests

The intel_dp_autotest_video_pattern() function gets invoked through the compliance test handler on a HPD short pulse if the test type is set to DP_TEST_VIDEO_PATTERN. This performs the DPCD registers reads to read the requested test pattern, video pattern resolution, frame rate and bits per color

[Intel-gfx] [PATCH 3/4] drm: Add definitions for DP compliance Video pattern tests

v3: * Fix the conventions in bit definitions (Jani Nikula) v2: * Add all the other DP Complianec TEST register defs (Jani Nikula) Cc: dri-de...@lists.freedesktop.org Cc: Jani Nikula Cc: Daniel Vetter Cc: Ville Syrjala

[Intel-gfx] [PATCH 1/4] drm/i915: Add support for DP link training compliance

This patch adds support to handle automated DP compliance link training test requests. This patch has been tested with Unigraf DPR-120 DP Compliance device for testing Link Training Compliance. After we get a short pulse Compliance test request, test request values are read and hotplug uevent is

[Intel-gfx] [PATCH 2/4] drm/i915: Fixes to support DP Compliance EDID tests

This patch addresses a few issues from the original patch for DP Compliance EDID test support submitted by Todd Previte Video Mode requested in the EDID test handler for the EDID Read test (CTS 4.2.2.3) should be set to PREFERRED as per the CTS spec. v2: * Added read

Re: [Intel-gfx] [alsa-devel] [PATCH V3 3/5] ALSA: add Intel HDMI LPE audio driver for BYT/CHT-T

> -Original Message- > From: Takashi Iwai [mailto:ti...@suse.de] > Sent: Thursday, January 19, 2017 4:22 PM > To: Anand, Jerome > Cc: alsa-de...@alsa-project.org; intel-gfx@lists.freedesktop.org; pierre- > louis.boss...@linux.intel.com; broo...@kernel.org;

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/3] drm/i915: Initialize pm_intr_keep during intel_irq_init for GuC

== Series Details == Series: series starting with [CI,1/3] drm/i915: Initialize pm_intr_keep during intel_irq_init for GuC URL : https://patchwork.freedesktop.org/series/18254/ State : failure == Summary == Series 18254v1 Series without cover letter

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Initialize pm_intr_keep during intel_irq_init for GuC

== Series Details == Series: series starting with [1/2] drm/i915: Initialize pm_intr_keep during intel_irq_init for GuC URL : https://patchwork.freedesktop.org/series/18252/ State : failure == Summary == Series 18252v1 Series without cover letter

[Intel-gfx] [CI 3/3] drm/i915: Enable GuC submission

Signed-off-by: Sagar Arun Kamble --- drivers/gpu/drm/i915/i915_params.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index 0e280fb..1d3766c 100644 ---

[Intel-gfx] [CI 1/3] drm/i915: Initialize pm_intr_keep during intel_irq_init for GuC

Driver needs to ensure that it doesn't mask the PM interrupts, which are unmasked/needed by GuC firmware. For that, Driver maintains a bitmask of interrupts to be kept unmasked, pm_intr_keep. pm_intr_keep was determined across GuC load. GuC gets loaded in different scenarios and it is not going

[Intel-gfx] [CI 2/3] drm/i915: Set adjustment to zero on Up/Down interrupts if freq is already max/min

When we reach the user's RPS limits, stop requesting an adjustment. Even though we will clamp the requested frequency later, we rely on interrupt masking to disable further adjustments in the same direction. Even though it is unlikely (one scenario is a bug in the driver, another is careful

[Intel-gfx] [PATCH 2/2] drm/i915: Set adjustment to zero on Up/Down interrupts if freq is already max/min

When we reach the user's RPS limits, stop requesting an adjustment. Even though we will clamp the requested frequency later, we rely on interrupt masking to disable further adjustments in the same direction. Even though it is unlikely (one scenario is a bug in the driver, another is careful

[Intel-gfx] [PATCH 1/2] drm/i915: Initialize pm_intr_keep during intel_irq_init for GuC

Driver needs to ensure that it doesn't mask the PM interrupts, which are unmasked/needed by GuC firmware. For that, Driver maintains a bitmask of interrupts to be kept unmasked, pm_intr_keep. pm_intr_keep was determined across GuC load. GuC gets loaded in different scenarios and it is not going

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Use IS_GEN9 and IS_LP to put Skylake and Kabylake in the same bucket.

== Series Details == Series: drm/i915: Use IS_GEN9 and IS_LP to put Skylake and Kabylake in the same bucket. URL : https://patchwork.freedesktop.org/series/18249/ State : failure == Summary == Series 18249v1 drm/i915: Use IS_GEN9 and IS_LP to put Skylake and Kabylake in the same bucket.

[Intel-gfx] [PATCH] drm/i915: Use IS_GEN9 and IS_LP to put Skylake and Kabylake in the same bucket.

With GLK was introduced IS_LP. With this, we can use IS_GEN9 and IS_LP to put Skylake and Kabylake in the same bucket. The main intention is to simplify the if and else statements that gets added for every new platform. This approach proposes the idea to create a common bucket to put multiple

Re: [Intel-gfx] [PATCH] drm: Provide a driver hook for drm_dev_release()

Hi Chris, On Thursday 19 Jan 2017 11:20:37 Chris Wilson wrote: > On Wed, Dec 14, 2016 at 12:04:38AM +0200, Laurent Pinchart wrote: > > On Thursday 08 Dec 2016 08:18:40 Chris Wilson wrote: > >> Some state is coupled into the device lifetime outside of the > >> load/unload timeframe and requires

Re: [Intel-gfx] [PATCH v3] drm/i915/dp: Do not reset detect_done flag in intel_dp_detect

On Thu, Jan 19, 2017 at 09:59:54PM +0200, Ville Syrjälä wrote: > On Thu, Jan 19, 2017 at 11:38:56AM -0800, Manasi Navare wrote: > > On Thu, Jan 19, 2017 at 09:26:36PM +0200, Ville Syrjälä wrote: > > > On Thu, Jan 19, 2017 at 11:01:01AM -0800, Manasi Navare wrote: > > > > On Thu, Jan 19, 2017 at

Re: [Intel-gfx] [PATCH v3] drm/i915/dp: Do not reset detect_done flag in intel_dp_detect

On Thu, Jan 19, 2017 at 11:38:56AM -0800, Manasi Navare wrote: > On Thu, Jan 19, 2017 at 09:26:36PM +0200, Ville Syrjälä wrote: > > On Thu, Jan 19, 2017 at 11:01:01AM -0800, Manasi Navare wrote: > > > On Thu, Jan 19, 2017 at 03:42:34PM +0200, Ville Syrjälä wrote: > > > > On Tue, Jan 17, 2017 at

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/6] drm/i915: Pass around gen to tile_height to special case gen2

== Series Details == Series: series starting with [1/6] drm/i915: Pass around gen to tile_height to special case gen2 URL : https://patchwork.freedesktop.org/series/18241/ State : failure == Summary == Series 18241v1 Series without cover letter

Re: [Intel-gfx] [PATCH 1/6] drm/i915: Pass around gen to tile_height to special case gen2

On Thu, Jan 19, 2017 at 07:26:54PM +, Chris Wilson wrote: > gen2 has a different tiling pattern, and a fixed tile_height. Pass > along the gen so that we the computed tile_row is large enough to align > with gen2 fences. > > Reported-by: Ville Syrjälä >

Re: [Intel-gfx] [PATCH v3] drm/i915/dp: Do not reset detect_done flag in intel_dp_detect

On Thu, Jan 19, 2017 at 09:26:36PM +0200, Ville Syrjälä wrote: > On Thu, Jan 19, 2017 at 11:01:01AM -0800, Manasi Navare wrote: > > On Thu, Jan 19, 2017 at 03:42:34PM +0200, Ville Syrjälä wrote: > > > On Tue, Jan 17, 2017 at 09:40:42AM -0800, Manasi Navare wrote: > > > > I have verified this patch

[Intel-gfx] [PATCH 4/6] drm/i915: Treat an error from i915_vma_instance() as unlikely

When pinning into the global GTT, an error from creating the VMA is unlikely, so mark it so. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c

[Intel-gfx] [PATCH 2/6] drm/i915: Use common LRU inactive vma bumping for unpin_from_display

Now that i915_gem_object_bump_inactive_ggtt() exists, also make use of it for the LRU bumping from i915_gem_object_unpin_from_display() Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git

[Intel-gfx] [PATCH 3/6] drm/i915: Reject vma creation larger than address space

Disallow creation of a vma that is larger than the available address space, or triggers an overflow on fence expansion. Testcase: igt/gem_exec_reloc/gtt-32 Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: Mika Kuoppala

[Intel-gfx] [PATCH 6/6] drm/i915: Assert that created vma has a whole number of pages

VMA (and their objects) are supposed to composed of whole pages. Add an assert to catch any invalid construct when we create the VMA. Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu/drm/i915/i915_vma.c | 2 ++ 1 file

[Intel-gfx] [PATCH 1/6] drm/i915: Pass around gen to tile_height to special case gen2

gen2 has a different tiling pattern, and a fixed tile_height. Pass along the gen so that we the computed tile_row is large enough to align with gen2 fences. Reported-by: Ville Syrjälä Signed-off-by: Chris Wilson ---

[Intel-gfx] [PATCH 5/6] drm/i915: Assert the drm_mm_node is allocated when on the VM lists

Before moving the vma between the VM active/inactive lists, assert that the node is still allocated. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem_stolen.c | 2 ++ drivers/gpu/drm/i915/i915_vma.c| 2 ++ 2 files changed, 4 insertions(+) diff

Re: [Intel-gfx] [PATCH v3] drm/i915/dp: Do not reset detect_done flag in intel_dp_detect

On Thu, Jan 19, 2017 at 11:01:01AM -0800, Manasi Navare wrote: > On Thu, Jan 19, 2017 at 03:42:34PM +0200, Ville Syrjälä wrote: > > On Tue, Jan 17, 2017 at 09:40:42AM -0800, Manasi Navare wrote: > > > I have verified this patch with the latest drm-tip and it is also > > > absolutely necessary to

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL.

== Series Details == Series: series starting with [1/2] drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL. URL : https://patchwork.freedesktop.org/series/18240/ State : success == Summary == Series 18240v1 Series without cover letter

Re: [Intel-gfx] [PATCH v3] drm/i915/dp: Do not reset detect_done flag in intel_dp_detect

On Thu, Jan 19, 2017 at 03:42:34PM +0200, Ville Syrjälä wrote: > On Tue, Jan 17, 2017 at 09:40:42AM -0800, Manasi Navare wrote: > > I have verified this patch with the latest drm-tip and it is also > > absolutely necessary to ensure the link gets properly retrained > > after link-status is BAD and

Re: [Intel-gfx] [PATCH i-g-t v1 5/6] tests/kms_cursor_legacy: Switch to using for_each_pipe construct

On Thu, Jan 19, 2017 at 12:35:48PM -0500, Robert Foss wrote: > > > On 2017-01-19 12:17 PM, Chris Wilson wrote: > >On Thu, Jan 19, 2017 at 11:35:05AM -0500, Robert Foss wrote: > >>Avoid using hand-rolled construct for iterating over all pipes. > > > >display->n_pipes is a variable and depends

[Intel-gfx] [PATCH 2/2] drm/i915/glk: Apply WaIncreaseDefaultTLBEntries on GLK.

According to wa_database this Wa persist on GLK as it was on BXT. Cc: Tim Gore Cc: Mika Kuoppala Cc: Tvrtko Ursulin Cc: Ander Conselvan de Oliveira Signed-off-by: Rodrigo Vivi

[Intel-gfx] [PATCH 1/2] drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL.

According to wa_database this Wa persist on KBL as it was on SKL. Cc: Tim Gore Cc: Mika Kuoppala Cc: Tvrtko Ursulin Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++-- 1

[Intel-gfx] [PATCH v2] pwm: lpss: Make builtin so that i915 can find the pwm_backlight

The primary consumer of the lpss pwm is the i915 kms driver, the i915 driver does not support get_pwm returning -EPROBE_DEFER and its init is very complex making this is almost impossible to fix. This commit changes the PWM_LPSS Kconfig from a tristate to a bool, so that when the i915 driver

Re: [Intel-gfx] [PATCH i-g-t v1 5/6] tests/kms_cursor_legacy: Switch to using for_each_pipe construct

On 2017-01-19 12:17 PM, Chris Wilson wrote: On Thu, Jan 19, 2017 at 11:35:05AM -0500, Robert Foss wrote: Avoid using hand-rolled construct for iterating over all pipes. display->n_pipes is a variable and depends upon the drmModeGetResources(). It not only changes between machines, but we

Re: [Intel-gfx] [PATCH i-g-t v1 5/6] tests/kms_cursor_legacy: Switch to using for_each_pipe construct

On Thu, Jan 19, 2017 at 11:35:05AM -0500, Robert Foss wrote: > Avoid using hand-rolled construct for iterating over all pipes. display->n_pipes is a variable and depends upon the drmModeGetResources(). It not only changes between machines, but we don't probe the resources when listing tests. Both

[Intel-gfx] [PATCH i-g-t v1 4/6] lib/igt_kms: Set free'd pointer to NULL

Avoid double free's by setting the free'd pointer to NULL after free. Signed-off-by: Robert Foss --- lib/igt_kms.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/igt_kms.c b/lib/igt_kms.c index 8c10568a..52e1f179 100644 --- a/lib/igt_kms.c

[Intel-gfx] [PATCH i-g-t v1 6/6] lib/igt_kms: Fixed typo

Signed-off-by: Robert Foss --- lib/igt_kms.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/igt_kms.c b/lib/igt_kms.c index 52e1f179..d104734a 100644 --- a/lib/igt_kms.c +++ b/lib/igt_kms.c @@ -308,7 +308,7 @@ const unsigned char*

[Intel-gfx] [PATCH i-g-t v1 2/6] lib/igt_kms: Add missing function declaration

Add missing declaration for kmstest_pipe_to_index to header. Signed-off-by: Robert Foss --- lib/igt_kms.h | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/igt_kms.h b/lib/igt_kms.h index 81be77f5..64414a24 100644 --- a/lib/igt_kms.h +++ b/lib/igt_kms.h @@

[Intel-gfx] [PATCH i-g-t v1 5/6] tests/kms_cursor_legacy: Switch to using for_each_pipe construct

Avoid using hand-rolled construct for iterating over all pipes. Signed-off-by: Robert Foss --- tests/kms_cursor_legacy.c | 31 ++- 1 file changed, 14 insertions(+), 17 deletions(-) diff --git a/tests/kms_cursor_legacy.c

[Intel-gfx] [PATCH i-g-t v1 3/6] lib/igt_debugfs: Prevent buffer overflow

buf array may overflow with when writing '\0' if MAX_LINE_LEN bytes are read during read(). Signed-off-by: Robert Foss --- lib/igt_debugfs.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c index

[Intel-gfx] [PATCH i-g-t v1 1/6] lib/igt_kms: Check memory allocations for failures

Add missing descriptive igt_assert_t calls to calloc'd memory. Signed-off-by: Robert Foss --- lib/igt_kms.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/igt_kms.c b/lib/igt_kms.c index 2c5a6e89..8c10568a 100644 --- a/lib/igt_kms.c +++

[Intel-gfx] [PATCH i-g-t v1 0/6] Memory allocation fixes

This series contains a few separate fixes mostly for memory allocations but also some small unrelated small fixes. This series can be found here under the alloc_fixes_$VERSION: https://git.collabora.com/cgit/user/robertfoss/intel-gpu-tools.git/ Robert Foss (6): lib/igt_kms: Check memory

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Add support for DP link training compliance

On Wed, 18 Jan 2017, Manasi Navare wrote: > This patch adds support to handle automated DP compliance > link training test requests. This patch has been tested with > Unigraf DPR-120 DP Compliance device for testing Link > Training Compliance. > After we get a short

[Intel-gfx] [PULL] drm-intel-fixes

Hi Dave - Apparently you haven't pulled my fixes from last week [1], so this one supersedes and includes that one. More GVT-g stuff than I'd like at this stage, but then again that's pretty new and isolated so I'm not too worried. BR, Jani. [1]

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add a timeout to waiting for old reservation.

== Series Details == Series: drm/i915: Add a timeout to waiting for old reservation. URL : https://patchwork.freedesktop.org/series/18234/ State : failure == Summary == Series 18234v1 drm/i915: Add a timeout to waiting for old reservation.

Re: [Intel-gfx] [PATCH] drm/i915: Add a timeout to waiting for old reservation.

Op 19-01-17 om 15:48 schreef Chris Wilson: > On Thu, Jan 19, 2017 at 03:23:12PM +0100, Maarten Lankhorst wrote: >> This prevents hangs in kms_flip. We should also either decrease >> I915_FENCE_TIMEOUT to 5s, or increase the timeouts in >> drm_atomic_helper.c to prevent errors like

Re: [Intel-gfx] [PATCH] drm/i915: Add a timeout to waiting for old reservation.

On Thu, Jan 19, 2017 at 03:23:12PM +0100, Maarten Lankhorst wrote: > This prevents hangs in kms_flip. We should also either decrease > I915_FENCE_TIMEOUT to 5s, or increase the timeouts in > drm_atomic_helper.c to prevent errors like flip_done/hw_done timed out. > > Signed-off-by: Maarten

Re: [Intel-gfx] [PATCH] drm/i915: Assert that created vma has a whole number of pages

Chris Wilson writes: > VMA (and their objects) are supposed to composed of whole pages. Add an > assert to catch any invalid construct when we create the VMA. > > Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala

Re: [Intel-gfx] [PATCH] drm/i915: Assert that the vma->fence_size doesn't overflow and wraparound

Chris Wilson writes: > A large object may need an invalid fence larger than u32 and so wrap. No > hardware can support such large fences, so it is safe to leave the check > as an assert. > > Signed-off-by: Chris Wilson Reviewed-by: Mika

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Assert the vma can fit within the address space

On Thu, Jan 19, 2017 at 12:58:46PM +, Chris Wilson wrote: > Useful sanity check that the vma is legal to bind inside the address > space. > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/i915_vma.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff

[Intel-gfx] [PATCH] drm/i915: Add a timeout to waiting for old reservation.

This prevents hangs in kms_flip. We should also either decrease I915_FENCE_TIMEOUT to 5s, or increase the timeouts in drm_atomic_helper.c to prevent errors like flip_done/hw_done timed out. Signed-off-by: Maarten Lankhorst ---

Re: [Intel-gfx] [PATCH] drm: Show leaked connectors upon unload

Op 19-01-17 om 10:05 schreef Chris Wilson: > After warning that the connector list is not empty on device > unregistration (i.e. module unload) also print out which connectors are > still hanging around to aide finding the leak. > > Signed-off-by: Chris Wilson > --- >

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,01/38] drm: Provide a driver hook for drm_dev_release()

== Series Details == Series: series starting with [v2,01/38] drm: Provide a driver hook for drm_dev_release() URL : https://patchwork.freedesktop.org/series/18227/ State : failure == Summary == Series 18227v1 Series without cover letter

Re: [Intel-gfx] [PATCH] drm/i915: Release temporary load-detect state upon switching

On Thu, Jan 19, 2017 at 03:31:46PM +0200, Ville Syrjälä wrote: > On Thu, Jan 19, 2017 at 11:37:49AM +, Chris Wilson wrote: > > After we call drm_atomic_commit() on the load-detect state, we can free > > our local reference. Upon restore, we only apply and free the previous > > state. > > > >

Re: [Intel-gfx] [PATCH v3] drm/i915/dp: Do not reset detect_done flag in intel_dp_detect

On Tue, Jan 17, 2017 at 09:40:42AM -0800, Manasi Navare wrote: > I have verified this patch with the latest drm-tip and it is also > absolutely necessary to ensure the link gets properly retrained > after link-status is BAD and after anew modeset is triggered by > userspace. Without this patch,

Re: [Intel-gfx] [GLK MIPI DSI V3 1/7] drm/i915/glk: Program dphy param reg for GLK

> -Original Message- > From: Nikula, Jani > Sent: Wednesday, January 18, 2017 7:41 PM > To: Chauhan, Madhav ; intel- > g...@lists.freedesktop.org > Cc: Shankar, Uma ; Mukherjee, Indranil > ; Kamath, Sunil

Re: [Intel-gfx] [PATCH] drm: Show leaked connectors upon unload

On to, 2017-01-19 at 09:05 +, Chris Wilson wrote: > After warning that the connector list is not empty on device > unregistration (i.e. module unload) also print out which connectors are > still hanging around to aide finding the leak. > > Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH] drm/i915: Assert that created vma has a whole number of pages

VMA (and their objects) are supposed to composed of whole pages. Add an assert to catch any invalid construct when we create the VMA. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_vma.c | 1 + 1 file changed, 1 insertion(+) diff --git

Re: [Intel-gfx] [PATCH] drm/i915: Release temporary load-detect state upon switching

On Thu, Jan 19, 2017 at 11:37:49AM +, Chris Wilson wrote: > After we call drm_atomic_commit() on the load-detect state, we can free > our local reference. Upon restore, we only apply and free the previous state. > > Signed-off-by: Chris Wilson Fixes: ?

Re: [Intel-gfx] [PATCH 3/4] drm: Add definitions for DP compliance Video pattern tests

On Wed, 18 Jan 2017, Manasi Navare wrote: > v2: > * Add all the other DP Complianec TEST register defs (Jani Nikula) > Cc: dri-de...@lists.freedesktop.org > Cc: Jani Nikula > Cc: Daniel Vetter > Cc: Ville Syrjala

[Intel-gfx] [PATCH] drm/i915: Assert that the vma->fence_size doesn't overflow and wraparound

A large object may need an invalid fence larger than u32 and so wrap. No hardware can support such large fences, so it is safe to leave the check as an assert. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_vma.c | 1 + 1 file changed, 1 insertion(+) diff

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Reject an attempt to create a GGTT vma larger than the GTT

On Thu, Jan 19, 2017 at 03:18:03PM +0200, Joonas Lahtinen wrote: > On to, 2017-01-19 at 12:58 +, Chris Wilson wrote: > > For accessing large objects through the global GTT we enforce the use of > > partial views, and sanity check that the vma->size doesn't overflow and > > fits within the

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Release temporary load-detect state upon switching

== Series Details == Series: drm/i915: Release temporary load-detect state upon switching URL : https://patchwork.freedesktop.org/series/18225/ State : failure == Summary == Series 18225v1 drm/i915: Release temporary load-detect state upon switching

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Reject an attempt to create a GGTT vma larger than the GTT

On to, 2017-01-19 at 12:58 +, Chris Wilson wrote: > For accessing large objects through the global GTT we enforce the use of > partial views, and sanity check that the vma->size doesn't overflow and > fits within the address space. To prevent 4GiB triggering the assert, > catch the attempt to

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Assert the vma can fit within the address space

On to, 2017-01-19 at 12:58 +, Chris Wilson wrote: > Useful sanity check that the vma is legal to bind inside the address > space. > > Signed-off-by: Chris Wilson Reviewed-by: Joonas Lahtinen Regards, Joonas -- Joonas Lahtinen

Re: [Intel-gfx] [PATCH v2 10/38] drm/i915: Create a fake object for testing huge allocations

On 19 January 2017 at 11:41, Chris Wilson wrote: > We would like to be able to exercise huge allocations even on memory > constrained devices. To do this we create an object that allocates only > a few pages and remaps them across its whole range - each page is reused >

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Assert the vma can fit within the address space

Chris Wilson writes: > Useful sanity check that the vma is legal to bind inside the address > space. > > Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/i915_vma.c | 2 ++ > 1

Re: [Intel-gfx] [PATCH v2 20/38] drm/i915: Test coherency of and barriers between cache domains

On 19 January 2017 at 11:41, Chris Wilson wrote: > Write into an object using WB, WC, GTT, and GPU paths and make sure that > our internal API is sufficient to ensure coherent reads and writes. > > Signed-off-by: Chris Wilson > Reviewed-by:

[Intel-gfx] [PATCH 1/2] drm/i915: Assert the vma can fit within the address space

Useful sanity check that the vma is legal to bind inside the address space. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_vma.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c index

[Intel-gfx] [PATCH 2/2] drm/i915: Reject an attempt to create a GGTT vma larger than the GTT

For accessing large objects through the global GTT we enforce the use of partial views, and sanity check that the vma->size doesn't overflow and fits within the address space. To prevent 4GiB triggering the assert, catch the attempt to create the full sized vma early. Testcase:

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add MIPI_IO WA and program DSI regulators

== Series Details == Series: drm/i915: Add MIPI_IO WA and program DSI regulators URL : https://patchwork.freedesktop.org/series/18223/ State : failure == Summary == Series 18223v1 drm/i915: Add MIPI_IO WA and program DSI regulators

Re: [Intel-gfx] [PATCH] drm/i915: Re-enable preallocated top level PDPs support

On Thu, Jan 19, 2017 at 12:52:39PM +0100, Michał Winiarski wrote: > On Tue, Jan 17, 2017 at 10:06:12PM +0800, Zhi Wang wrote: > > After PPGTT page table is able to be shrinken, the preallocated PDPs and > > PDE pages can be freed even they are preallocated under 3-level PPGTT > > mode. This patch

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915: Do an unlocked wait before set-cache-level ioctl

Chris Wilson writes: > On Thu, Jan 19, 2017 at 01:42:47PM +0200, Mika Kuoppala wrote: >> Chris Wilson writes: >> >> > Since a change in cache level is likely to trigger an unbind, avoid >> > waiting under the mutex by preemptively doing an

Re: [Intel-gfx] [PATCH] drm/i915: Re-enable preallocated top level PDPs support

On Tue, Jan 17, 2017 at 10:06:12PM +0800, Zhi Wang wrote: > After PPGTT page table is able to be shrinken, the preallocated PDPs and > PDE pages can be freed even they are preallocated under 3-level PPGTT > mode. This patch re-enables preallocated top level PDPs and PDE pages > like before. > >

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915: Do an unlocked wait before set-cache-level ioctl

On Thu, Jan 19, 2017 at 01:42:47PM +0200, Mika Kuoppala wrote: > Chris Wilson writes: > > > Since a change in cache level is likely to trigger an unbind, avoid > > waiting under the mutex by preemptively doing an unlocked wait. > > > > Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH v2 34/38] drm/i915: Live testing for context execution

Check we can create and execution within a context. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem_context.c| 1 + drivers/gpu/drm/i915/selftests/i915_gem_context.c | 323 +

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915: Do an unlocked wait before set-cache-level ioctl

Chris Wilson writes: > Since a change in cache level is likely to trigger an unbind, avoid > waiting under the mutex by preemptively doing an unlocked wait. > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/i915_gem.c | 29

[Intel-gfx] [PATCH v2 31/38] drm/i915: Exercise i915_vma_pin/i915_vma_insert

High-level testing of the struct drm_mm by verifying our handling of weird requests to i915_vma_pin. Signed-off-by: Chris Wilson Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/i915_vma.c | 4 +-

[Intel-gfx] [PATCH v2 32/38] drm/i915: Verify page layout for rotated VMA

Exercise creating rotated VMA and checking the page order within. v2: Be more creative in rotated params Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/selftests/i915_vma.c | 177 ++ 1 file changed, 177 insertions(+) diff --git

[Intel-gfx] [PATCH v2 29/38] drm/i915: Exercise filling and removing random ranges from the live GTT

Test the low-level i915_address_space interfaces to sanity check the live insertion/removal of address ranges. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 151 ++ 1 file changed, 151 insertions(+) diff --git

[Intel-gfx] [PATCH v2 30/38] drm/i915: Test creation of VMA

Simple test to exercise creation and lookup of VMA within an object. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_vma.c| 3 + .../gpu/drm/i915/selftests/i915_mock_selftests.h | 1 + drivers/gpu/drm/i915/selftests/i915_vma.c

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915: Do an unlocked wait before set-cache-level ioctl

On Thu, Jan 19, 2017 at 01:36:29PM +0200, Mika Kuoppala wrote: > Chris Wilson writes: > > > Since a change in cache level is likely to trigger an unbind, avoid > > waiting under the mutex by preemptively doing an unlocked wait. > > > > Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH v2 37/38] drm/i915: Add mock exercise for i915_gem_gtt_insert

i915_gem_gtt_insert should allocate from the available free space in the GTT, evicting as necessary to create space. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 208 ++ 1 file changed, 208 insertions(+) diff

[Intel-gfx] [PATCH v2 36/38] drm/i915: Add mock exercise for i915_gem_gtt_reserve

i915_gem_gtt_reserve should put the node exactly as requested in the GTT, evicting as required. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 195 + .../gpu/drm/i915/selftests/i915_mock_selftests.h | 1 + 2

[Intel-gfx] [PATCH v2 33/38] drm/i915: Test creation of partial VMA

Mock testing to ensure we can create and lookup partial VMA. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/selftests/i915_vma.c | 191 ++ 1 file changed, 191 insertions(+) diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c

[Intel-gfx] [PATCH v2 35/38] drm/i915: Initial selftests for exercising eviction

Very simple tests to just ask eviction to find some free space in a full GTT and one with some available space. Signed-off-by: Chris Wilson Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/i915_gem_evict.c | 4 +

[Intel-gfx] [PATCH v2 27/38] drm/i915: Exercise filling the top/bottom portions of the global GTT

Same test as previously for the per-process GTT instead applied to the global GTT. Signed-off-by: Chris Wilson Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 36 ++- 1 file

[Intel-gfx] [PATCH v2 23/38] drm/i915: Sanity check all registers for matching fw domains

Add a late selftest that walks over all forcewake registers (those below 0x4) and uses the mmio debug register to check to see if any are unclaimed. This is possible if we fail to wake the appropriate powerwells for the register. Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH v2 38/38] drm/i915: Add initial selftests for hang detection and resets

Check that we can reset the GPU and continue executing from the next request. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_hangcheck.c | 4 + .../gpu/drm/i915/selftests/i915_live_selftests.h | 1 +

[Intel-gfx] [PATCH v2 19/38] drm/i915: Test exhaustion of the mmap space

An unlikely error condition that we can simulate by stealing most of the range before trying to insert new objects. Signed-off-by: Chris Wilson Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/selftests/i915_gem_object.c | 138

[Intel-gfx] [PATCH v2 22/38] drm/i915: Test all fw tables during mock selftests

In addition to just testing the fw table we load, during the initial mock testing we can test that all tables are valid (so the testing is not limited to just the platforms that load that particular table). Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin

[Intel-gfx] [PATCH v2 11/38] drm/i915: Add selftests for i915_gem_request

Simple starting point for adding seltests for i915_gem_request, first mock a device (with engines and contexts) that allows us to construct and execute a request, along with waiting for the request to complete. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin

[Intel-gfx] [PATCH v2 15/38] drm/i915: Test simultaneously submitting requests to all engines

Use a recursive-batch to busy spin on each to ensure that each is being run simultaneously. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/selftests/i915_gem_request.c | 178 ++ 1 file changed, 178 insertions(+) diff --git

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