Re: [Intel-gfx] [PATCH 2/3] i965: define stuff for scratch page checking in intel_screen

Sighs, I do not know why git send-email made this into two threads, but there it is. Worse, the second patch was from an older version; the one posted lacks the write to the scratch page with noise. At any rate, the thing is also on github at

Re: [Intel-gfx] [PATCH 1/3] drm-uapi: define interface to kernel for scratch page read

Sighs, I do not know why git send-email made this into two threads, but there it is. Worse, the second patch was from an older version; the one posted lacks the write to the scratch page with noise. At any rate, the thing is also on github at

[Intel-gfx] [PATCH 0/3] RFC: Scratch page checking

From: Kevin Rogovin This patch series proposes a new kernel interface for user space to read and write the values of the scratch page for a PPGTT. The user space is expected to guarantee (via its own locking mechanism) that nothing shall read or write to the scratch page

[Intel-gfx] [PATCH 2/3] i965: define stuff for scratch page checking in intel_screen

From: Kevin Rogovin --- src/intel/common/gen_debug.c | 1 + src/intel/common/gen_debug.h | 1 + src/mesa/drivers/dri/i965/intel_screen.c | 26 ++ src/mesa/drivers/dri/i965/intel_screen.h | 12 4 files

[Intel-gfx] [PATCH 1/3] drm-uapi: define interface to kernel for scratch page read

From: Kevin Rogovin --- include/drm-uapi/i915_drm.h | 31 +++ 1 file changed, 31 insertions(+) diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h index 890df227ae..3a9c3a2d0c 100644 --- a/include/drm-uapi/i915_drm.h +++

[Intel-gfx] [PATCH 3/3] i965: check scratch page in a locked fashion on each ioctl

From: Kevin Rogovin --- src/mesa/drivers/dri/i965/intel_batchbuffer.c | 27 ++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c index

[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/2] CONTRIBUTING: Fix spelling mistake and line length

== Series Details == Series: series starting with [1/2] CONTRIBUTING: Fix spelling mistake and line length URL : https://patchwork.freedesktop.org/series/34881/ State : warning == Summary == Test gem_tiled_swapping: Subgroup non-threaded: pass -> INCOMPLETE

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] CONTRIBUTING: Fix spelling mistake and line length

== Series Details == Series: series starting with [1/2] CONTRIBUTING: Fix spelling mistake and line length URL : https://patchwork.freedesktop.org/series/34881/ State : success == Summary == IGT patchset tested on top of latest successful build 88b01d822be1e9ab429ef1085f6754a47dae3487

[Intel-gfx] [PATCH i-g-t 1/2] CONTRIBUTING: Fix spelling mistake and line length

Noticed while I was reading it. Makes for a good first contribution, I guess. Signed-off-by: Sean Paul --- CONTRIBUTING | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/CONTRIBUTING b/CONTRIBUTING index 561c5dd8..ca2ed8a5 100644 ---

[Intel-gfx] [PATCH i-g-t 2/2] kms_content_protection: Add Content Protection test

Pretty simple test: - initializes the output - clears the content protection property - verifies that it clears - sets the content protection property to desired - verifies that it transitions to enabled Does this for both legacy and atomic. Signed-off-by: Sean Paul ---

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Implement HDCP (rev3)

== Series Details == Series: drm/i915: Implement HDCP (rev3) URL : https://patchwork.freedesktop.org/series/34671/ State : failure == Summary == Applying: drm: Fix link-status kerneldoc line lengths error: Failed to merge in the changes. Using index info to reconstruct a base tree... M

[Intel-gfx] [PATCH v3 3/9] drm: Add Content Protection property

This patch adds a new optional connector property to allow userspace to enable protection over the content it is displaying. This will typically be implemented by the driver using HDCP. The property is a tri-state with the following values: - OFF: Self explanatory, no content protection -

[Intel-gfx] [PATCH v3 8/9] drm/i915: Implement HDCP for HDMI

This patch adds HDCP support for HDMI connectors by implementing the intel_hdcp_shim. Nothing too special, just a bunch of DDC reads/writes. Changes in v2: - Rebased on drm-intel-next Changes in v3: - Initialize new worker Signed-off-by: Sean Paul ---

[Intel-gfx] [PATCH v3 9/9] drm/i915: Implement HDCP for DisplayPort

This patch adds HDCP support for DisplayPort connectors by implementing the intel_hdcp_shim. Most of this is straightforward read/write from/to DPCD registers. One thing worth pointing out is the Aksv output bit. It wasn't easily separable like it's HDMI counterpart, so it's crammed in with the

[Intel-gfx] [PATCH v3 5/9] drm/i915: Add HDCP framework + base implementation

This patch adds the framework required to add HDCP support to intel connectors. It implements Aksv loading from fuse, and parts 1/2/3 of the HDCP authentication scheme. Note that without shim implementations, this does not actually implement HDCP. That will come in subsequent patches. Changes in

[Intel-gfx] [PATCH v3 7/9] drm/i915: Add function to output Aksv over GMBUS

Once the Aksv is available in the PCH, we need to get it on the wire to the receiver via DDC. The hardware doesn't allow us to read the value directly, so we need to tell GMBUS to source the Aksv internally and send it to the right offset on the receiver. The way we do this is to initiate an

[Intel-gfx] [PATCH v3 4/9] drm: Add some HDCP related #defines

In preparation for implementing HDCP in i915, add some HDCP related register offsets and defines. The dpcd register offsets will go in drm_dp_helper.h whereas the ddc offsets along with generic HDCP stuff will get stuffed in drm_hdcp.h, which is new. Changes in v2: - drm_hdcp.h gets MIT license

[Intel-gfx] [PATCH v3 6/9] drm/i915: Make use of indexed write GMBUS feature

This patch enables the indexed write feature of the GMBUS to concatenate 2 consecutive messages into one. The criteria for an indexed write is that both messages are writes, the first is length == 1, and the second is length > 0. The first message is sent out by the GMBUS as the slave command, and

[Intel-gfx] [PATCH v3 1/9] drm: Fix link-status kerneldoc line lengths

I'm adding some stuff below it and it's killing my editor's vibe. Changes in v2: - Added to the series Changes in v3: - None Cc: Manasi Navare Acked-by: Daniel Vetter Signed-off-by: Sean Paul ---

[Intel-gfx] [PATCH v3 0/9] drm/i915: Implement HDCP

Oh, hello there. Here's v3 of the HDCP patchset. Highlights of v3 are: - Add atomic_check/commit helpers to intel_hdcp to handle state transitions and call enable/disable at the right time. - intel_hdcp_check_link() gets moved again to avoid being called with locks held - Split out setting the

[Intel-gfx] [PATCH v3 2/9] drm/i915: Add more control to wait_for routines

This patch adds a little more control to a couple wait_for routines such that we can avoid open-coding read/wait/timeout patterns which: - need the value of the register after the wait_for - run arbitrary operation for the read portion This patch also chooses the correct sleep function (based

[Intel-gfx] [GIT PULL] more gvt-next for 4.16

Hi, Here's more gvt-next updates for 4.16. Mostly for final VFIO mdev display dmabuf interface and gvt implementation which have been reviewed by VFIO maintainer and acked to push through gvt merge path. User space qemu support was sent as

Re: [Intel-gfx] [PATCH] i915/gvt: make release_shadow_wa_ctx static.

On 2017.12.04 15:15:28 +0200, Joonas Lahtinen wrote: > + GVT-g list > > Zhenyu, please pick this up. > I've queued fixes from Chris for this and will just send for next pull. thanks. > > On Mon, 2017-12-04 at 09:42 +1000, Dave Airlie wrote: > > From: Dave Airlie > > > >

[Intel-gfx] [drm-tip:drm-tip 8/11] drivers/gpu/drm/i915/intel_dsi.c:1673:13: error: storage size of 'plane' isn't known

tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip head: da94f258bbf0786f7578d4804a77ce75cf58777f commit: b41c97d7270b82207c5edc7c2d67337b15918462 [8/11] Merge remote-tracking branch 'drm-intel/drm-intel-next-queued' into drm-tip config: i386-randconfig-x007-12041112 (attached as

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] tests/gem_exec_schedule: Add reset on failed preemption test.

== Series Details == Series: series starting with [v2,1/2] tests/gem_exec_schedule: Add reset on failed preemption test. URL : https://patchwork.freedesktop.org/series/34874/ State : success == Summary == Test kms_setmode: Subgroup basic: pass -> FAIL

Re: [Intel-gfx] [PATCH] drm/i915: Fix compilation (panel orientation x enum plane rename).

On Tue, Dec 05, 2017 at 12:09:35AM +, Michel Thierry wrote: > On 12/4/2017 4:04 PM, Rodrigo Vivi wrote: > > When commit '82daca297506 ("drm/i915: Add "panel orientation" > > property to the panel connector, v6.")' was done and tested > > by CI, commit 'ed15030d7ab0 ("drm/i915: s/enum

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix compilation (panel orientation x enum plane rename).

On Tue, Dec 05, 2017 at 12:14:22AM +, Patchwork wrote: > == Series Details == > > Series: drm/i915: Fix compilation (panel orientation x enum plane rename). > URL : https://patchwork.freedesktop.org/series/34876/ > State : failure > > == Summary == > > Applying: drm/i915: Fix compilation

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Apply Display WA #1183 on skl, kbl, and cfl

== Series Details == Series: drm/i915: Apply Display WA #1183 on skl, kbl, and cfl URL : https://patchwork.freedesktop.org/series/34873/ State : success == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-render: pass -> FAIL

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix compilation (panel orientation x enum plane rename).

== Series Details == Series: drm/i915: Fix compilation (panel orientation x enum plane rename). URL : https://patchwork.freedesktop.org/series/34876/ State : failure == Summary == Applying: drm/i915: Fix compilation (panel orientation x enum plane rename). error: Failed to merge in the

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] tests/gem_exec_schedule: Add reset on failed preemption test.

== Series Details == Series: series starting with [v2,1/2] tests/gem_exec_schedule: Add reset on failed preemption test. URL : https://patchwork.freedesktop.org/series/34874/ State : success == Summary == IGT patchset tested on top of latest successful build

Re: [Intel-gfx] [PATCH v2 2/2] drm/i915: add platform tag to WA

On Mon, Dec 04, 2017 at 09:51:47PM +, Lucas De Marchi wrote: > v2: add more missing platform tags > > Cc: Ville Syrjälä > Cc: Rodrigo Vivi > Signed-off-by: Lucas De Marchi > --- >

Re: [Intel-gfx] [PATCH] drm/i915: Fix compilation (panel orientation x enum plane rename).

On 12/4/2017 4:04 PM, Rodrigo Vivi wrote: When commit '82daca297506 ("drm/i915: Add "panel orientation" property to the panel connector, v6.")' was done and tested by CI, commit 'ed15030d7ab0 ("drm/i915: s/enum plane/enum i9xx_plane_id/")' wasn't there already. On this race the second patch got

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915: follow single notation for workaround number

On Mon, Dec 04, 2017 at 09:51:46PM +, Lucas De Marchi wrote: > v2: Allow to have or omit space before platform > > Cc: Ville Syrjälä > Cc: Rodrigo Vivi > Signed-off-by: Lucas De Marchi Reviewed-by: Rodrigo

[Intel-gfx] [PATCH] drm/i915: Fix compilation (panel orientation x enum plane rename).

When commit '82daca297506 ("drm/i915: Add "panel orientation" property to the panel connector, v6.")' was done and tested by CI, commit 'ed15030d7ab0 ("drm/i915: s/enum plane/enum i9xx_plane_id/")' wasn't there already. On this race the second patch got merged first so the first one broke i915

[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [v2,1/2] drm/i915: follow single notation for workaround number

== Series Details == Series: series starting with [v2,1/2] drm/i915: follow single notation for workaround number URL : https://patchwork.freedesktop.org/series/34869/ State : warning == Summary == Test kms_cursor_crc: Subgroup cursor-64x21-sliding: pass -> SKIP

[Intel-gfx] [PATCH i-g-t v2 2/2] tests/gem_exec_schedule: Add test for resetting preemptive batch

This patch adds a test that will trigger a preemption of a low priority batch by a 'bad' batch buffer which will hang. The test aims at making sure that a hanging high priority batch will not disrupt the submission flow of low priority contexts. -v2: - Rename subtest (Chris) - Use

[Intel-gfx] [PATCH i-g-t v2 1/2] tests/gem_exec_schedule: Add reset on failed preemption test.

This patch adds a test where a low priority batch is going to be declared hung while a preemption is pending. The test wants to verify that a 'hanging' low priority batch will not disrupt the execution of a high priority context and that the driver does due diligence in managing a reset while a

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Apply Display WA #1183 on skl, kbl, and cfl

== Series Details == Series: drm/i915: Apply Display WA #1183 on skl, kbl, and cfl URL : https://patchwork.freedesktop.org/series/34873/ State : success == Summary == Series 34873v1 drm/i915: Apply Display WA #1183 on skl, kbl, and cfl

[Intel-gfx] [drm-tip:drm-tip 8/11] drivers/gpu//drm/i915/intel_dsi.c:1673:13: error: unused variable 'plane'

tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip head: da94f258bbf0786f7578d4804a77ce75cf58777f commit: b41c97d7270b82207c5edc7c2d67337b15918462 [8/11] Merge remote-tracking branch 'drm-intel/drm-intel-next-queued' into drm-tip config: x86_64-randconfig-x009-201749 (attached as

[Intel-gfx] [PATCH v4] drm/i915: Apply Display WA #1183 on skl, kbl, and cfl

Display WA #1183 was recently added to workaround "Failures when enabling DPLL0 with eDP link rate 2.16 or 4.32 GHz and CD clock frequency 308.57 or 617.14 MHz (CDCLK_CTL CD Frequency Select 10b or 11b) used in this enabling or in previous enabling." This workaround was designed to minimize the

[Intel-gfx] ✓ Fi.CI.IGT: success for drm: savely free connectors from connector_iter

== Series Details == Series: drm: savely free connectors from connector_iter URL : https://patchwork.freedesktop.org/series/34863/ State : success == Summary == Test kms_flip: Subgroup dpms-vs-vblank-race-interruptible: pass -> FAIL (shard-hsw) fdo#103060

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915: follow single notation for workaround number

== Series Details == Series: series starting with [v2,1/2] drm/i915: follow single notation for workaround number URL : https://patchwork.freedesktop.org/series/34869/ State : success == Summary == Series 34869v1 series starting with [v2,1/2] drm/i915: follow single notation for workaround

Re: [Intel-gfx] linux-firmware pull request(SKL:DMC)

>-Original Message- >From: Josh Boyer [mailto:jwbo...@kernel.org] >Sent: Monday, December 4, 2017 6:37 AM >To: Srivatsa, Anusha >Cc: linux-firmw...@kernel.org; Intel Graphics Development g...@lists.freedesktop.org>; Ben Hutchings ; Kyle

Re: [Intel-gfx] [PATCH v7 0/7] drm/fbdev: Panel orientation connector property support

Hi, On 01-12-17 19:02, Bartlomiej Zolnierkiewicz wrote: On Saturday, November 25, 2017 08:35:46 PM Hans de Goede wrote: Here is v7 of my series to add a "panel orientation" property to the drm-connector for the LCD panel to let userspace know about LCD panels which are not mounted upright, as

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/3] lib: avoid < in gtkdoc comments

== Series Details == Series: series starting with [1/3] lib: avoid < in gtkdoc comments URL : https://patchwork.freedesktop.org/series/34865/ State : warning == Summary == IGT patchset tested on top of latest successful build 88b01d822be1e9ab429ef1085f6754a47dae3487 igt/pm_rc6_residency:

[Intel-gfx] [PATCH v2 2/2] drm/i915: add platform tag to WA

v2: add more missing platform tags Cc: Ville Syrjälä Cc: Rodrigo Vivi Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/intel_hdmi.c | 2 +- drivers/gpu/drm/i915/intel_pm.c | 2 +- 2 files changed, 2

[Intel-gfx] [PATCH v2 1/2] drm/i915: follow single notation for workaround number

v2: Allow to have or omit space before platform Cc: Ville Syrjälä Cc: Rodrigo Vivi Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/intel_hdmi.c | 2 +- drivers/gpu/drm/i915/intel_pm.c | 4 ++-- 2 files

Re: [Intel-gfx] [PATCH v3] drm/i915: Use exponential backoff for wait_for()

On 11/29/2017 11:55 PM, Sagar Arun Kamble wrote: On 11/30/2017 12:45 PM, John Harrison wrote: On 11/29/2017 10:19 PM, Sagar Arun Kamble wrote: On 11/30/2017 8:34 AM, John Harrison wrote: On 11/24/2017 6:12 AM, Chris Wilson wrote: Quoting Michał Winiarski (2017-11-24 12:37:56) Since we see

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: savely free connectors from connector_iter

== Series Details == Series: drm: savely free connectors from connector_iter URL : https://patchwork.freedesktop.org/series/34863/ State : success == Summary == Series 34863v1 drm: savely free connectors from connector_iter

Re: [Intel-gfx] HDCP as a Kconfig option

Hi, I understand there there's concerns about the content protection stuff, but please note: - The patches under discussion enforce nothing, they only allow you to enable HDCP if you chose to do so. For real content protection you need a complete system, locked down with secure boot or similar.

[Intel-gfx] HDCP as a Kconfig option

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 (Note: I am not subscribed to the list, please cc me with replies.) Hello i915 developers, I represent Adélie Linux, a Linux distribution that has the goal of empowering users through the true freedom that only libre software can provide. This

Re: [Intel-gfx] linux-firmware pull request(SKL:DMC)

On Mon, Nov 27, 2017 at 6:13 PM, Anusha Srivatsa wrote: > Hi Ben, Kyle, > > Please consider pulling i915 updates to linux-firmware.git. > > i915-firmware-2017-11-27 > The following changes since commit 17e6288135d4500f9fe60224dce2b46d850c346b: > > brcm: update

Re: [Intel-gfx] [PATCH V3 09/29] drm/i915: deprecate pci_get_bus_and_slot()

On 11/28/2017 11:29 AM, Sinan Kaya wrote: > On 11/28/2017 10:30 AM, Ville Syrjälä wrote: >>> + dev_priv->bridge_dev = >>> + pci_get_domain_bus_and_slot(domain, 0, PCI_DEVFN(0, 0)); >> Maybe just pci_get_slot(pdev->bus, PCI_DEVFN(0, 0)) ? >> >> I guess if we want to be pedantic we could

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Implement WaDisableEarlyEOT.

On Fri, Dec 1, 2017 at 3:40 PM, Rafael Antognolli wrote: > There seems to be another clock gating issue which the workaround is > described as: > >"WA: Set 0xE4F0[1] = 1 to disable Early EOT of thread." > > Signed-off-by: Rafael Antognolli

[Intel-gfx] [PATCH i-g-t 1/3] lib: avoid < in gtkdoc comments

For reasons entirely not clear to me meson gtkdoc runs in strict xml parsing mode, whereas automake gtkdoc doesn't. And gtkdoc itself is to dense to correctly escape this stuff. Paper around this. v2: {foo} instead of of tripy foo> (Joonas) Cc: Joonas Lahtinen

[Intel-gfx] [PATCH i-g-t 2/3] meson: gtkdoc support

Bunch of neat improvements: - xml generates correctly depend upon the test binaries - no need to re-run autogen.sh when new chapters/functions get added, all handed by meson Still one issue: - the gtkdoc target doesn't depend upon the custom_target yet, hacked around using build_by_default:

[Intel-gfx] [PATCH i-g-t 3/3] meson: build a full dependency for lib_igt_perf

meson prefers packages dependencies over passing arount static libraries, because those also include linker flags, include dirs and everything else. While at it pull the special cases out from the common build stanzas like we do with other special cases. Just a bit of ocd to keep everything

[Intel-gfx] [PATCH] drm: savely free connectors from connector_iter

In commit 613051dac40da1751ab269572766d3348d45a197 Author: Daniel Vetter Date: Wed Dec 14 00:08:06 2016 +0100 drm: locking iterators for connector_list we've went to extreme lengths to make sure connector iterations works in any context, without introducing any

Re: [Intel-gfx] [PATCH i-g-t 3/3] tests/gem_exec_schedule: Add test for resetting preemptive batch

Quoting Antonio Argenziano (2017-12-04 18:25:16) > > > On 04/12/17 09:42, Chris Wilson wrote: > > Quoting Antonio Argenziano (2017-12-04 17:23:15) > >> This patch adds a test that will trigger a preemption of a low priority > >> batch by a 'bad' batch buffer which will hang. The test aims at

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Implement WaDisableVFclkgate.

Hi, On Fri, Dec 1, 2017 at 3:40 PM, Rafael Antognolli wrote: > This workaround supposedly fixes some hangs in the VF unit. > > Signed-off-by: Rafael Antognolli > --- > drivers/gpu/drm/i915/i915_reg.h | 3 +++ >

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gvt: fix off-by-one comparison of ring_id

== Series Details == Series: drm/i915/gvt: fix off-by-one comparison of ring_id URL : https://patchwork.freedesktop.org/series/34858/ State : success == Summary == Test kms_flip: Subgroup rcs-wf_vblank-vs-modeset: skip -> PASS (shard-hsw) Test

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] igt_dummyload: Add preemptible parameter to spinning batch.

== Series Details == Series: series starting with [1/3] igt_dummyload: Add preemptible parameter to spinning batch. URL : https://patchwork.freedesktop.org/series/34860/ State : failure == Summary == IGT patchset build failed on latest successful build

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/gvt: Add missing breaks in switch statement

== Series Details == Series: drm/i915/gvt: Add missing breaks in switch statement URL : https://patchwork.freedesktop.org/series/34856/ State : warning == Summary == Test gem_eio: Subgroup in-flight: pass -> DMESG-WARN (shard-snb) Test drv_module_reload:

[Intel-gfx] ✓ Fi.CI.IGT: success for igt/pm_rc6_residency: Measure residency after checking for applicability (rev4)

== Series Details == Series: igt/pm_rc6_residency: Measure residency after checking for applicability (rev4) URL : https://patchwork.freedesktop.org/series/32097/ State : success == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-render:

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Expose more GPU properties through sysfs (rev6)

== Series Details == Series: drm/i915: Expose more GPU properties through sysfs (rev6) URL : https://patchwork.freedesktop.org/series/33950/ State : failure == Summary == Test gem_eio: Subgroup in-flight-contexts: pass -> DMESG-WARN (shard-snb) fdo#104058 Test

Re: [Intel-gfx] [PATCH v3 4/4] drm/i915/cnl: only divide up base frequency with crystal source

Em Seg, 2017-12-04 às 15:50 -0200, Paulo Zanoni escreveu: > Em Seg, 2017-11-13 às 23:34 +, Lionel Landwerlin escreveu: > > We apply this logic to Gen9 as well. We didn't notice this issue as > > most part we've encountered so far only use the crystal as source > > for > > their timestamp

Re: [Intel-gfx] [PATCH i-g-t 2/3] tests/gem_exec_schedule: Add reset on failed preemption test.

On 04/12/17 09:37, Chris Wilson wrote: Quoting Antonio Argenziano (2017-12-04 17:23:14) This patch adds a test where a low priority batch is going to be declared hung while a preemption is pending. The test wants to verify that a 'bad' low priority batch will not disrupt the execution of a

Re: [Intel-gfx] [PATCH i-g-t 3/3] tests/gem_exec_schedule: Add test for resetting preemptive batch

On 04/12/17 09:42, Chris Wilson wrote: Quoting Antonio Argenziano (2017-12-04 17:23:15) This patch adds a test that will trigger a preemption of a low priority batch by a 'bad' batch buffer which will hang. The test aims at making sure that a hanging high priority batch will not disrupt the

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gvt: fix off-by-one comparison of ring_id

== Series Details == Series: drm/i915/gvt: fix off-by-one comparison of ring_id URL : https://patchwork.freedesktop.org/series/34858/ State : success == Summary == Series 34858v1 drm/i915/gvt: fix off-by-one comparison of ring_id

Re: [Intel-gfx] [PATCH] drm/i915: Mark expected switch fall-throughs

On Mon, Dec 4, 2017 at 4:20 PM, Gustavo A. R. Silva wrote: > Hi Joonas, > > Quoting Joonas Lahtinen : > >> On Mon, 2017-11-27 at 16:17 -0600, Gustavo A. R. Silva wrote: >>> >>> In preparation to enabling -Wimplicit-fallthrough, mark switch

Re: [Intel-gfx] [PATCH v3 4/4] drm/i915/cnl: only divide up base frequency with crystal source

Em Seg, 2017-11-13 às 23:34 +, Lionel Landwerlin escreveu: > We apply this logic to Gen9 as well. We didn't notice this issue as > most part we've encountered so far only use the crystal as source for > their timestamp registers. > > Fixes: dab9178333 ("drm/i915: expose command stream

Re: [Intel-gfx] [PATCH igt 01/10] igt/perf_pmu: Tighten semaphore-wait measurement

On 04/12/2017 09:27, Chris Wilson wrote: Record the before/after semaphore-wait values around the sleep to try to reduce the inaccuracy from scheduler delays. Previously, the samples were taken before submitting the batch and then after synchronising its completion. The measurement will then be

Re: [Intel-gfx] [PATCH i-g-t 3/3] tests/gem_exec_schedule: Add test for resetting preemptive batch

Quoting Antonio Argenziano (2017-12-04 17:23:15) > This patch adds a test that will trigger a preemption of a low priority > batch by a 'bad' batch buffer which will hang. The test aims at making > sure that a hanging high priority batch will not disrupt the submission > flow of low priority

Re: [Intel-gfx] [PATCH i-g-t 2/3] tests/gem_exec_schedule: Add reset on failed preemption test.

Quoting Antonio Argenziano (2017-12-04 17:23:14) > This patch adds a test where a low priority batch is going to be > declared hung while a preemption is pending. The test wants to verify > that a 'bad' low priority batch will not disrupt the execution of a high > priority context and that the

[Intel-gfx] [PATCH i-g-t 2/3] tests/gem_exec_schedule: Add reset on failed preemption test.

This patch adds a test where a low priority batch is going to be declared hung while a preemption is pending. The test wants to verify that a 'bad' low priority batch will not disrupt the execution of a high priority context and that the driver does due diligence in managing a reset while a

[Intel-gfx] [PATCH i-g-t 3/3] tests/gem_exec_schedule: Add test for resetting preemptive batch

This patch adds a test that will trigger a preemption of a low priority batch by a 'bad' batch buffer which will hang. The test aims at making sure that a hanging high priority batch will not disrupt the submission flow of low priority contexts. Cc: Chris Wilson Cc:

[Intel-gfx] [PATCH i-g-t 1/3] igt_dummyload: Add preemptible parameter to spinning batch.

The recursive batch emitted in the dummyload library is always pre-emptible. This patch adds a parameter to make it conditionally pre-emptible. The batch can now be used in tests where we still want a spinning batch while not being able to preempt it. Note: The behavior preceding this patch has

[Intel-gfx] [PATCH][next] drm/i915/gvt: fix off-by-one comparison of ring_id

From: Colin Ian King The ring_id maximum boundary is being compared using the > operator instead of >=, leading to an off-by-one error and an out of bounds write into array vgpu->hws_pga[]. Fix this by simply using the correct comparison operator. Also re-work another

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gvt: Add missing breaks in switch statement

== Series Details == Series: drm/i915/gvt: Add missing breaks in switch statement URL : https://patchwork.freedesktop.org/series/34856/ State : success == Summary == Series 34856v1 drm/i915/gvt: Add missing breaks in switch statement

[Intel-gfx] [PATCH][next] drm/i915/gvt: Add missing breaks in switch statement

From: Colin Ian King The switch statement is missing breaks for the cases of GVT_FAILSAFE_INSUFFICIENT_RESOURCE and GVT_FAILSAFE_GUEST_ERR. Add them in. Detected by CoverityScan, CID#1462416 ("Missing break in switch") Fixes: e011c6ce2b4f ("drm/i915/gvt: Add VM

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/pm_rc6_residency: Measure residency after checking for applicability (rev4)

== Series Details == Series: igt/pm_rc6_residency: Measure residency after checking for applicability (rev4) URL : https://patchwork.freedesktop.org/series/32097/ State : success == Summary == IGT patchset tested on top of latest successful build 36015334f9ee86b997fc5c0deb4964184f87648f igt:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Expose more GPU properties through sysfs (rev6)

== Series Details == Series: drm/i915: Expose more GPU properties through sysfs (rev6) URL : https://patchwork.freedesktop.org/series/33950/ State : success == Summary == Series 33950v6 drm/i915: Expose more GPU properties through sysfs

Re: [Intel-gfx] [PATCH] drm/i915: Mark expected switch fall-throughs

Hi Joonas, Quoting Joonas Lahtinen : On Mon, 2017-11-27 at 16:17 -0600, Gustavo A. R. Silva wrote: In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. I have to say I'm totally not sold on regexps

[Intel-gfx] ✗ Fi.CI.IGT: failure for test/kms_plane_lowres: Fix display_commit_mode() so it returns the crc

== Series Details == Series: test/kms_plane_lowres: Fix display_commit_mode() so it returns the crc URL : https://patchwork.freedesktop.org/series/34749/ State : failure == Summary == Test kms_setmode: Subgroup basic: fail -> PASS (shard-hsw) fdo#99912 Test

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Flush pending GTT writes before unbinding (rev2)

== Series Details == Series: drm/i915: Flush pending GTT writes before unbinding (rev2) URL : https://patchwork.freedesktop.org/series/34830/ State : failure == Summary == Test testdisplay: pass -> INCOMPLETE (shard-hsw) Test drv_module_reload: Subgroup

[Intel-gfx] [PATCH v6 5/5] drm/i915: expose EU topology through sysfs

With the introduction of asymetric slices in CNL, we cannot rely on the previous SUBSLICE_MASK getparam. Here we introduce a more detailed way of querying the Gen's GPU topology that doesn't aggregate numbers. This is essential for monitoring parts of the GPU with the OA unit, because signals

[Intel-gfx] ✓ Fi.CI.IGT: success for igt/kms_rotation_crc: Add RGB565 90 degree test for gen>9 (rev4)

== Series Details == Series: igt/kms_rotation_crc: Add RGB565 90 degree test for gen>9 (rev4) URL : https://patchwork.freedesktop.org/series/33132/ State : success == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-blt: pass ->

[Intel-gfx] [PATCH v6 4/5] drm/i915: expose engine availability through sysfs

This enables userspace to discover the engines available on the GPU. Here is the layout on a Skylake GT4: /sys/devices/pci:00/:00:02.0/drm/card0/gt/ └── engines ├── bcs │   └── 0 │   ├── capabilities │   ├── class │   ├── id │   └── instance ├──

[Intel-gfx] [PATCH v6 3/5] drm/i915/debugfs: reuse max slice/subslices already stored in sseu

Now that we have that information in topology fields, let's just reused it. Signed-off-by: Lionel Landwerlin --- drivers/gpu/drm/i915/i915_debugfs.c | 26 ++ 1 file changed, 10 insertions(+), 16 deletions(-) diff --git

[Intel-gfx] [PATCH v6 0/5] drm/i915: Expose more GPU properties through sysfs

Hi, After discussion with Chris, Joonas & Tvrtko, this series adds an additional commit to link the render node back to the card through a symlink. Making it obvious from an application using a render node to know where to get the information it needs. Cheers, Lionel Landwerlin (5): drm: add

[Intel-gfx] [PATCH v6 1/5] drm: add card symlink in render sysfs directory

In i915 we would like to expose information about the GPU topology which would be useful mostly to applications making use of the device computational capability (not so much the display part). At the moment we already store information like frequency, etc... into the card directory

[Intel-gfx] [PATCH v6 2/5] drm/i915: store all subslice masks

Up to now, subslice mask was assumed to be uniform across slices. But starting with Cannonlake, slices can be asymetric (for example slice0 has different number of subslices as slice1+). This change stores all subslices masks for all slices rather than having a single mask that applies to all

Re: [Intel-gfx] [PATCH i-g-t] igt: Make dependency on libunwind mandatory

On Fri, Dec 01, 2017 at 01:46:39PM +, Chris Wilson wrote: > Quoting Arkadiusz Hiler (2017-12-01 13:19:54) > > With Android support gone there is not much reason for keeping libunwind > > dependency optional. This also deals (cheaply!) with ifdefs covering > > huge portions of code, removing a

Re: [Intel-gfx] [PATCH igt] igt/drv_selftests: Disable initialising the display

On Thu, 2017-11-30 at 22:04 +, Chris Wilson wrote: > Many of the selftests try to completely fill global resources; > resources > that are presumed available for bringing up the display. Avoid the > contention by simply not bringing up the display! > > This does limit the effectiveness of

[Intel-gfx] ✗ Fi.CI.IGT: failure for igt/pm_rc6_residency: Measure residency after checking for applicability (rev3)

== Series Details == Series: igt/pm_rc6_residency: Measure residency after checking for applicability (rev3) URL : https://patchwork.freedesktop.org/series/32097/ State : failure == Summary == Test gem_busy: Subgroup close-race: pass -> FAIL (shard-snb)

Re: [Intel-gfx] [PATCH igt v3] igt/gem_busy: Replace arbitrary busy batch with indefinite spinbatch

On Sat, 2017-12-02 at 08:47 +, Chris Wilson wrote: > In CI, we were observing situations where the busy blt would complete > before the very next instruction (in userspace) to assert that it was > busy. This is entirely possible if the process was scheduled away and > slept for longer than the

[Intel-gfx] ✓ Fi.CI.BAT: success for test/kms_plane_lowres: Fix display_commit_mode() so it returns the crc

== Series Details == Series: test/kms_plane_lowres: Fix display_commit_mode() so it returns the crc URL : https://patchwork.freedesktop.org/series/34749/ State : success == Summary == IGT patchset tested on top of latest successful build 476c4b462e0453c70ee81664c0227fdddc26cbd0 igt/gem_eio:

[Intel-gfx] [PATCH igt] igt/pm_rc6_residency: Measure residency after checking for applicability

CI doesn't run in whole-test mode, but runs each subtest individually. Tests that are designed to do a block of work to be shared between many subtests end up running that work multiple times (once per subtest) and worse, that work is wasted if the subtest will be skipped. pm_rc6_residency is one

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Flush pending GTT writes before unbinding (rev2)

== Series Details == Series: drm/i915: Flush pending GTT writes before unbinding (rev2) URL : https://patchwork.freedesktop.org/series/34830/ State : success == Summary == Series 34830v2 drm/i915: Flush pending GTT writes before unbinding

Re: [Intel-gfx] [PATCH i-g-t 1/2] lib: avoid < in gtkdoc comments

On Wed, 2017-11-29 at 12:17 +0100, Daniel Vetter wrote: > For reasons entirely not clear to me meson gtkdoc runs in strict > xml parsing mode, whereas automake gtkdoc doesn't. And gtkdoc itself > is to dense to correctly escape this stuff. > > Paper around this. > > Signed-off-by: Daniel

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