[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Move skip_intermediate_wm handling into ilk_compute_intermediate_wm()
== Series Details == Series: drm/i915: Move skip_intermediate_wm handling into ilk_compute_intermediate_wm() URL : https://patchwork.freedesktop.org/series/52248/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5116_full -> Patchwork_10799_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10799_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10799_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10799_full: === IGT changes === Warnings igt@kms_atomic_interruptible@universal-setplane-cursor: shard-snb: SKIP -> PASS +2 igt@perf_pmu@rc6: shard-kbl: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_10799_full that come from known issues: === IGT changes === Issues hit igt@gem_ctx_isolation@rcs0-s3: shard-skl: PASS -> INCOMPLETE (fdo#107773, fdo#104108) igt@gem_exec_schedule@pi-ringfull-blt: shard-skl: NOTRUN -> FAIL (fdo#103158) igt@kms_atomic_transition@1x-modeset-transitions-nonblocking: shard-skl: NOTRUN -> FAIL (fdo#108228, fdo#108470) igt@kms_available_modes_crc@available_mode_test_crc: shard-snb: NOTRUN -> FAIL (fdo#106641) igt@kms_busy@extended-modeset-hang-newfb-render-a: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-modeset-hang-newfb-render-c: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +2 igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: shard-kbl: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c: shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_cursor_crc@cursor-64x21-sliding: shard-skl: NOTRUN -> FAIL (fdo#103232) +1 igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw: shard-skl: NOTRUN -> FAIL (fdo#105682) +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite: shard-apl: PASS -> FAIL (fdo#103167) +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: shard-glk: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-fullscreen: shard-skl: NOTRUN -> FAIL (fdo#103167) +2 igt@kms_plane@pixel-format-pipe-b-planes: shard-skl: NOTRUN -> DMESG-WARN (fdo#106885) +2 igt@kms_plane_alpha_blend@pipe-b-alpha-basic: shard-skl: NOTRUN -> FAIL (fdo#108145, fdo#107815) +1 igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb: shard-glk: NOTRUN -> FAIL (fdo#108145) igt@kms_plane_alpha_blend@pipe-b-alpha-transparant-fb: shard-skl: NOTRUN -> FAIL (fdo#108145) +1 igt@kms_plane_multiple@atomic-pipe-b-tiling-y: shard-glk: PASS -> FAIL (fdo#103166) +1 shard-apl: PASS -> FAIL (fdo#103166) igt@kms_rotation_crc@primary-rotation-90: shard-skl: NOTRUN -> FAIL (fdo#103925, fdo#107815) igt@kms_setmode@basic: shard-snb: NOTRUN -> FAIL (fdo#99912) igt@pm_rpm@dpms-mode-unset-lpsp: shard-skl: NOTRUN -> INCOMPLETE (fdo#107807) Possible fixes igt@gem_cpu_reloc@full: shard-skl: INCOMPLETE (fdo#108073) -> PASS igt@gem_ppgtt@blt-vs-render-ctx0: shard-kbl: INCOMPLETE (fdo#106887, fdo#106023, fdo#103665) -> PASS igt@kms_cursor_crc@cursor-64x64-suspend: shard-skl: INCOMPLETE (fdo#104108) -> PASS +1 igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-glk: FAIL (fdo#105363) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu: shard-apl: FAIL (fdo#103167) -> PASS +2 igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_plane@plane-panning-bottom-right-pipe-b-planes: shard-skl: FAIL (fdo#103166) -> PASS igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max: shard-glk: FAIL (fdo#108145) -> PASS igt@kms_setmode@basic: shard-kbl: FAIL (fdo#99912) -> PASS igt@perf@blocking: shard-hsw: FAIL (fdo#102252) -> PASS igt@pm_rpm@cursor-dpms: shard-skl: INCOMPLETE (fdo#107807) -> PASS +2 igt@pm_rpm@modeset-non-lpsp-stress-no-wait: shard-skl: INCOMPLETE (fdo#107807) -> SKIP fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103166
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3,CI] drm/i915: Make 48bit full ppgtt configuration generic (v10)
== Series Details == Series: series starting with [1/3,CI] drm/i915: Make 48bit full ppgtt configuration generic (v10) URL : https://patchwork.freedesktop.org/series/52309/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5116_full -> Patchwork_10798_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10798_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10798_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10798_full: === IGT changes === Warnings igt@kms_atomic_interruptible@universal-setplane-cursor: shard-snb: SKIP -> PASS +2 igt@pm_rc6_residency@rc6-accuracy: shard-kbl: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_10798_full that come from known issues: === IGT changes === Issues hit igt@gem_exec_schedule@pi-ringfull-blt: shard-skl: NOTRUN -> FAIL (fdo#103158) igt@gem_render_copy_redux@normal: shard-kbl: PASS -> INCOMPLETE (fdo#103665, fdo#106650) igt@kms_atomic_transition@1x-modeset-transitions-nonblocking: shard-skl: NOTRUN -> FAIL (fdo#108228, fdo#108470) igt@kms_available_modes_crc@available_mode_test_crc: shard-snb: NOTRUN -> FAIL (fdo#106641) igt@kms_busy@extended-modeset-hang-newfb-render-a: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c: shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_cursor_crc@cursor-256x256-onscreen: shard-skl: PASS -> FAIL (fdo#103232) igt@kms_cursor_crc@cursor-64x21-sliding: shard-skl: NOTRUN -> FAIL (fdo#103232) +2 igt@kms_flip@flip-vs-expired-vblank: shard-glk: PASS -> FAIL (fdo#102887, fdo#105363) igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-cpu: shard-skl: PASS -> FAIL (fdo#105682) igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw: shard-skl: NOTRUN -> FAIL (fdo#105682) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: shard-glk: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: shard-apl: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render: shard-skl: NOTRUN -> FAIL (fdo#103167) +3 igt@kms_frontbuffer_tracking@fbcpsr-1p-rte: shard-skl: PASS -> FAIL (fdo#105682, fdo#103167) igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-msflip-blt: shard-skl: PASS -> FAIL (fdo#103167) igt@kms_plane@pixel-format-pipe-b-planes: shard-skl: NOTRUN -> DMESG-WARN (fdo#106885) +2 igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: shard-skl: PASS -> FAIL (fdo#107815, fdo#108145) igt@kms_plane_alpha_blend@pipe-b-alpha-basic: shard-skl: NOTRUN -> FAIL (fdo#107815, fdo#108145) +1 igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb: shard-glk: NOTRUN -> FAIL (fdo#108145) igt@kms_plane_alpha_blend@pipe-b-alpha-transparant-fb: shard-skl: NOTRUN -> FAIL (fdo#108145) +1 igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: shard-skl: PASS -> FAIL (fdo#107815) +1 igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-apl: PASS -> FAIL (fdo#103166) +1 igt@kms_plane_multiple@atomic-pipe-a-tiling-yf: shard-glk: PASS -> FAIL (fdo#103166) igt@kms_rotation_crc@primary-rotation-90: shard-skl: NOTRUN -> FAIL (fdo#103925, fdo#107815) igt@kms_setmode@basic: shard-snb: NOTRUN -> FAIL (fdo#99912) igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend: shard-skl: PASS -> INCOMPLETE (fdo#104108, fdo#107773) igt@perf_pmu@busy-start-vcs0: shard-apl: PASS -> DMESG-WARN (fdo#103558, fdo#105602) igt@pm_rpm@system-suspend: shard-skl: PASS -> INCOMPLETE (fdo#107807, fdo#104108) Possible fixes igt@gem_ppgtt@blt-vs-render-ctx0: shard-skl: TIMEOUT (fdo#108039) -> PASS igt@kms_cursor_crc@cursor-64x64-suspend: shard-skl: INCOMPLETE (fdo#104108) -> PASS +1 igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-glk: FAIL (fdo#105363) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu: shard-apl: FAIL (fdo#103167) ->
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gen11: Preempt-to-idle support in execlists. (rev8)
== Series Details == Series: drm/i915/gen11: Preempt-to-idle support in execlists. (rev8) URL : https://patchwork.freedesktop.org/series/40747/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5116_full -> Patchwork_10797_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10797_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10797_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10797_full: === IGT changes === Warnings igt@kms_atomic_interruptible@universal-setplane-cursor: shard-snb: SKIP -> PASS +2 igt@perf_pmu@rc6: shard-kbl: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_10797_full that come from known issues: === IGT changes === Issues hit igt@drv_suspend@shrink: shard-skl: PASS -> INCOMPLETE (fdo#106886) igt@gem_exec_schedule@pi-ringfull-blt: shard-skl: NOTRUN -> FAIL (fdo#103158) igt@kms_available_modes_crc@available_mode_test_crc: shard-snb: NOTRUN -> FAIL (fdo#106641) igt@kms_busy@extended-modeset-hang-newfb-render-a: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-modeset-hang-newfb-render-c: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +2 igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: shard-kbl: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c: shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_color@pipe-c-degamma: shard-apl: PASS -> FAIL (fdo#104782) igt@kms_cursor_crc@cursor-128x128-sliding: shard-apl: PASS -> FAIL (fdo#103232) igt@kms_cursor_crc@cursor-256x256-onscreen: shard-skl: PASS -> FAIL (fdo#103232) igt@kms_cursor_crc@cursor-256x256-suspend: shard-skl: PASS -> INCOMPLETE (fdo#104108) igt@kms_cursor_crc@cursor-64x21-sliding: shard-skl: NOTRUN -> FAIL (fdo#103232) +2 igt@kms_draw_crc@draw-method-xrgb2101010-mmap-gtt-xtiled: shard-skl: PASS -> FAIL (fdo#103184) igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc: shard-glk: PASS -> FAIL (fdo#103167) +3 igt@kms_frontbuffer_tracking@fbcpsr-1p-rte: shard-skl: PASS -> FAIL (fdo#105682) igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-msflip-blt: shard-skl: PASS -> FAIL (fdo#103167) +1 igt@kms_plane@pixel-format-pipe-b-planes: shard-skl: NOTRUN -> DMESG-WARN (fdo#106885) +1 igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: shard-skl: PASS -> FAIL (fdo#108145, fdo#107815) igt@kms_plane_alpha_blend@pipe-b-alpha-basic: shard-skl: NOTRUN -> FAIL (fdo#108145, fdo#107815) +1 igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb: shard-glk: NOTRUN -> FAIL (fdo#108145) igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: shard-skl: PASS -> FAIL (fdo#107815) +1 igt@kms_plane_multiple@atomic-pipe-b-tiling-y: shard-glk: PASS -> FAIL (fdo#103166) +1 shard-apl: PASS -> FAIL (fdo#103166) igt@kms_setmode@basic: shard-snb: NOTRUN -> FAIL (fdo#99912) Possible fixes igt@drv_suspend@forcewake: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@gem_cpu_reloc@full: shard-skl: INCOMPLETE (fdo#108073) -> PASS igt@gem_ppgtt@blt-vs-render-ctx0: shard-skl: TIMEOUT (fdo#108039) -> PASS shard-kbl: INCOMPLETE (fdo#106023, fdo#103665, fdo#106887) -> PASS igt@kms_busy@extended-modeset-hang-newfb-render-b: shard-snb: DMESG-WARN (fdo#107956) -> PASS igt@kms_cursor_crc@cursor-256x256-sliding: shard-apl: FAIL (fdo#103232) -> PASS igt@kms_cursor_crc@cursor-256x256-suspend: shard-apl: FAIL (fdo#103232, fdo#103191) -> PASS igt@kms_cursor_crc@cursor-64x64-suspend: shard-skl: INCOMPLETE (fdo#104108) -> PASS +1 igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-glk: FAIL (fdo#105363) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt: shard-apl: FAIL (fdo#103167) -> PASS +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: shard-glk: FAIL (fdo#103167) -> PASS +2 igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max: shard-glk: FAIL (fdo#108145) -> PASS igt@perf@blocking: shard-hsw: FAIL
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: Handle -EDEADLK from ironlake_check_fdi_lanes()
== Series Details == Series: series starting with [1/3] drm/i915: Handle -EDEADLK from ironlake_check_fdi_lanes() URL : https://patchwork.freedesktop.org/series/52191/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5115_full -> Patchwork_10796_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10796_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10796_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10796_full: === IGT changes === Warnings igt@perf_pmu@rc6: shard-kbl: SKIP -> PASS igt@tools_test@tools_test: shard-apl: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_10796_full that come from known issues: === IGT changes === Issues hit igt@drv_suspend@forcewake: shard-kbl: PASS -> INCOMPLETE (fdo#103665) igt@gem_ppgtt@blt-vs-render-ctxn: shard-skl: NOTRUN -> TIMEOUT (fdo#108039) igt@gem_userptr_blits@readonly-unsync: shard-skl: PASS -> INCOMPLETE (fdo#108074) igt@kms_available_modes_crc@available_mode_test_crc: shard-snb: NOTRUN -> FAIL (fdo#106641) igt@kms_busy@extended-modeset-hang-newfb-render-a: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: shard-kbl: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: shard-apl: PASS -> DMESG-WARN (fdo#107956) igt@kms_draw_crc@draw-method-xrgb2101010-mmap-gtt-xtiled: shard-skl: PASS -> FAIL (fdo#103184) igt@kms_flip@flip-vs-expired-vblank: shard-apl: PASS -> FAIL (fdo#102887, fdo#105363) igt@kms_flip@modeset-vs-vblank-race-interruptible: shard-glk: PASS -> FAIL (fdo#103060) igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite: shard-skl: NOTRUN -> FAIL (fdo#103167) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: shard-skl: PASS -> INCOMPLETE (fdo#107773, fdo#104108) igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: shard-skl: PASS -> FAIL (fdo#107815) igt@kms_plane_multiple@atomic-pipe-c-tiling-y: shard-glk: PASS -> FAIL (fdo#103166) igt@kms_setmode@basic: shard-kbl: PASS -> FAIL (fdo#99912) igt@pm_rpm@gem-pread: shard-skl: PASS -> INCOMPLETE (fdo#107807) Possible fixes igt@drv_suspend@shrink: shard-glk: INCOMPLETE (k.org#198133, fdo#106886, fdo#103359) -> PASS igt@gem_ctx_isolation@vecs0-s3: shard-skl: INCOMPLETE (fdo#107773, fdo#104108) -> PASS igt@gem_ppgtt@blt-vs-render-ctx0: shard-kbl: INCOMPLETE (fdo#106023, fdo#103665, fdo#106887) -> PASS igt@gem_pwrite@big-gtt-fbr: shard-apl: INCOMPLETE (fdo#103927) -> PASS igt@kms_color@pipe-c-legacy-gamma: shard-apl: FAIL (fdo#104782) -> PASS igt@kms_cursor_crc@cursor-128x128-random: shard-apl: FAIL (fdo#103232) -> PASS +2 igt@kms_cursor_legacy@cursor-vs-flip-toggle: shard-hsw: FAIL (fdo#103355) -> PASS igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: shard-skl: FAIL (fdo#106081) -> PASS igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_plane_multiple@atomic-pipe-b-tiling-x: shard-glk: FAIL (fdo#103166) -> PASS igt@kms_plane_multiple@atomic-pipe-c-tiling-y: shard-apl: FAIL (fdo#103166) -> PASS igt@perf@oa-exponents: shard-glk: FAIL (fdo#105483) -> PASS igt@pm_rpm@drm-resources-equal: shard-skl: INCOMPLETE (fdo#107807) -> PASS fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103355 https://bugs.freedesktop.org/show_bug.cgi?id=103355 fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782 fdo#105363
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915/gen9_bc: Work around DMC bug zeroing power well requests
== Series Details == Series: series starting with [1/3] drm/i915/gen9_bc: Work around DMC bug zeroing power well requests URL : https://patchwork.freedesktop.org/series/52302/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5115_full -> Patchwork_10795_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10795_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10795_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10795_full: === IGT changes === Warnings igt@kms_frontbuffer_tracking@fbc-badstride: shard-snb: SKIP -> PASS igt@perf_pmu@rc6: shard-kbl: SKIP -> PASS igt@pm_rc6_residency@rc6-accuracy: shard-kbl: PASS -> SKIP igt@tools_test@tools_test: shard-skl: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_10795_full that come from known issues: === IGT changes === Issues hit igt@drv_suspend@forcewake: shard-kbl: PASS -> INCOMPLETE (fdo#103665) igt@gem_softpin@noreloc-s3: shard-skl: PASS -> INCOMPLETE (fdo#104108, fdo#107773) igt@gem_userptr_blits@readonly-unsync: shard-skl: PASS -> INCOMPLETE (fdo#108074) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: shard-kbl: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: shard-apl: PASS -> DMESG-WARN (fdo#107956) igt@kms_chv_cursor_fail@pipe-c-256x256-top-edge: shard-skl: PASS -> FAIL (fdo#104671) igt@kms_color@pipe-c-ctm-blue-to-red: shard-skl: PASS -> FAIL (fdo#107201) igt@kms_color@pipe-c-degamma: shard-apl: PASS -> FAIL (fdo#104782) igt@kms_cursor_crc@cursor-128x128-sliding: shard-apl: PASS -> FAIL (fdo#103232) igt@kms_flip@flip-vs-expired-vblank: shard-skl: PASS -> FAIL (fdo#105363) igt@kms_flip@flip-vs-modeset-vs-hang-interruptible: shard-apl: PASS -> INCOMPLETE (fdo#103927) igt@kms_flip@plain-flip-ts-check-interruptible: shard-skl: PASS -> FAIL (fdo#100368) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu: shard-apl: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen: shard-glk: PASS -> FAIL (fdo#103167) igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: shard-skl: PASS -> FAIL (fdo#107815) igt@kms_plane_multiple@atomic-pipe-c-tiling-y: shard-glk: PASS -> FAIL (fdo#103166) igt@perf@polling: shard-hsw: PASS -> FAIL (fdo#102252) igt@pm_rpm@modeset-stress-extra-wait: shard-skl: PASS -> INCOMPLETE (fdo#107807) +2 igt@pm_rpm@system-suspend: shard-skl: PASS -> INCOMPLETE (fdo#104108, fdo#107807, fdo#107773) Possible fixes igt@drv_suspend@shrink: shard-glk: INCOMPLETE (fdo#103359, fdo#106886, k.org#198133) -> PASS igt@gem_ctx_isolation@vecs0-s3: shard-skl: INCOMPLETE (fdo#104108, fdo#107773) -> PASS igt@gem_ppgtt@blt-vs-render-ctx0: shard-kbl: INCOMPLETE (fdo#103665, fdo#106887, fdo#106023) -> PASS igt@gem_pwrite@big-gtt-fbr: shard-apl: INCOMPLETE (fdo#103927) -> PASS igt@kms_busy@extended-pageflip-hang-newfb-render-c: shard-apl: DMESG-WARN (fdo#107956) -> PASS igt@kms_color@pipe-c-legacy-gamma: shard-apl: FAIL (fdo#104782) -> PASS igt@kms_cursor_crc@cursor-128x128-random: shard-apl: FAIL (fdo#103232) -> PASS +2 igt@kms_cursor_crc@cursor-256x256-suspend: shard-apl: FAIL (fdo#103232, fdo#103191) -> PASS igt@kms_cursor_legacy@cursor-vs-flip-toggle: shard-hsw: FAIL (fdo#103355) -> PASS igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: shard-skl: FAIL (fdo#106081) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-cpu: shard-skl: FAIL (fdo#105682) -> PASS +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite: shard-apl: FAIL (fdo#103167) -> PASS +2 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-msflip-blt: shard-skl: FAIL (fdo#103167) -> PASS igt@kms_plane@plane-panning-bottom-right-pipe-b-planes: shard-skl: FAIL (fdo#103166) -> PASS
[Intel-gfx] [PATCH 3/3] drm/i915: add ICP support to cnp_rawclk() and kill icp_rawclk()
I think I'm probably the one who argued in favor of having separate
implementations for both PCHs, but the calculations are actually the
same, the clocks are the same and the only difference is that on ICP
we write the numerator to the register.
I have previously suggested to kill cnp_rawclk() and keep the
icp_rawclk() style, but Ville gave some good arguments that what's in
this patch may be the better choice.
Cc: Ville Syrjälä
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_cdclk.c | 37 -
1 file changed, 8 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
b/drivers/gpu/drm/i915/intel_cdclk.c
index 928671936286..60437675354e 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -2661,36 +2661,17 @@ static int cnp_rawclk(struct drm_i915_private *dev_priv)
}
rawclk = CNP_RAWCLK_DIV(divider / 1000);
- if (fraction)
- rawclk |= CNP_RAWCLK_DEN(DIV_ROUND_CLOSEST(1000,
- fraction) - 1);
+ if (fraction) {
+ int numerator = 1000;
- I915_WRITE(PCH_RAWCLK_FREQ, rawclk);
- return divider + fraction;
-}
-
-static int icp_rawclk(struct drm_i915_private *dev_priv)
-{
- u32 rawclk;
- int divider, numerator, denominator, frequency;
-
- if (I915_READ(SFUSE_STRAP) & SFUSE_STRAP_RAW_FREQUENCY) {
- frequency = 24000;
- divider = 24;
- numerator = 0;
- denominator = 0;
- } else {
- frequency = 19200;
- divider = 19;
- numerator = 1;
- denominator = 4;
+ rawclk |= CNP_RAWCLK_DEN(DIV_ROUND_CLOSEST(numerator,
+ fraction) - 1);
+ if (HAS_PCH_ICP(dev_priv))
+ rawclk |= ICP_RAWCLK_NUM(numerator / 1000);
}
- rawclk = CNP_RAWCLK_DIV(divider) | ICP_RAWCLK_NUM(numerator) |
-CNP_RAWCLK_DEN(denominator);
-
I915_WRITE(PCH_RAWCLK_FREQ, rawclk);
- return frequency;
+ return divider + fraction;
}
static int pch_rawclk(struct drm_i915_private *dev_priv)
@@ -2740,9 +2721,7 @@ static int g4x_hrawclk(struct drm_i915_private *dev_priv)
*/
void intel_update_rawclk(struct drm_i915_private *dev_priv)
{
- if (HAS_PCH_ICP(dev_priv))
- dev_priv->rawclk_freq = icp_rawclk(dev_priv);
- else if (HAS_PCH_CNP(dev_priv))
+ if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv))
dev_priv->rawclk_freq = cnp_rawclk(dev_priv);
else if (HAS_PCH_SPLIT(dev_priv))
dev_priv->rawclk_freq = pch_rawclk(dev_priv);
--
2.14.4
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/3] drm/i915: rename CNP_RAWCLK_FRAC to CNP_RAWCLK_DEN
Although CNP names this field "Counter Fraction", what we write to the
register is really the denominator for the fractional part of the
divider, not the fractional part (and the field description even says
that). The ICP spec renamed the field to "Counter Fraction
Denominator", which makes a lot more sense. Use the more complete ICL
naming because we will merge the CNP and ICP functions into a single
one, which will introduce the concept of the numerator. That will make
a lot more sense when you read the "num/frac = den" calculation.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_reg.h| 3 +--
drivers/gpu/drm/i915/intel_cdclk.c | 6 +++---
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index fe4b913e46ac..16f0d73bb4fe 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7907,8 +7907,7 @@ enum {
#define CNP_RAWCLK_DIV_MASK (0x3ff << 16)
#define CNP_RAWCLK_DIV(div) ((div) << 16)
#define CNP_RAWCLK_FRAC_MASK (0xf << 26)
-#define CNP_RAWCLK_FRAC(frac) ((frac) << 26)
-#define ICP_RAWCLK_DEN(den) ((den) << 26)
+#define CNP_RAWCLK_DEN(den) ((den) << 26)
#define ICP_RAWCLK_NUM(num) ((num) << 11)
#define PCH_DPLL_TMR_CFG_MMIO(0xc6208)
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
b/drivers/gpu/drm/i915/intel_cdclk.c
index 810670976e86..928671936286 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -2662,8 +2662,8 @@ static int cnp_rawclk(struct drm_i915_private *dev_priv)
rawclk = CNP_RAWCLK_DIV(divider / 1000);
if (fraction)
- rawclk |= CNP_RAWCLK_FRAC(DIV_ROUND_CLOSEST(1000,
- fraction) - 1);
+ rawclk |= CNP_RAWCLK_DEN(DIV_ROUND_CLOSEST(1000,
+ fraction) - 1);
I915_WRITE(PCH_RAWCLK_FREQ, rawclk);
return divider + fraction;
@@ -2687,7 +2687,7 @@ static int icp_rawclk(struct drm_i915_private *dev_priv)
}
rawclk = CNP_RAWCLK_DIV(divider) | ICP_RAWCLK_NUM(numerator) |
-ICP_RAWCLK_DEN(denominator);
+CNP_RAWCLK_DEN(denominator);
I915_WRITE(PCH_RAWCLK_FREQ, rawclk);
return frequency;
--
2.14.4
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/3] drm/i915/cnp+: update to the new RAWCLK_FREQ recommendations
BSpec was updated and now there's no more "subtract 1" to the
Microsecond Counter Divider field.
It seems this should help fixing some GMBUS issues. I'm not aware of
any specific open bug that could be solved by this patch.
Cc: Ville Syrjälä
Cc: Rodrigo Vivi
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_cdclk.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
b/drivers/gpu/drm/i915/intel_cdclk.c
index 8d74276029e6..810670976e86 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -2660,7 +2660,7 @@ static int cnp_rawclk(struct drm_i915_private *dev_priv)
fraction = 200;
}
- rawclk = CNP_RAWCLK_DIV((divider / 1000) - 1);
+ rawclk = CNP_RAWCLK_DIV(divider / 1000);
if (fraction)
rawclk |= CNP_RAWCLK_FRAC(DIV_ROUND_CLOSEST(1000,
fraction) - 1);
@@ -2676,12 +2676,12 @@ static int icp_rawclk(struct drm_i915_private *dev_priv)
if (I915_READ(SFUSE_STRAP) & SFUSE_STRAP_RAW_FREQUENCY) {
frequency = 24000;
- divider = 23;
+ divider = 24;
numerator = 0;
denominator = 0;
} else {
frequency = 19200;
- divider = 18;
+ divider = 19;
numerator = 1;
denominator = 4;
}
--
2.14.4
___
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA
== Series Details == Series: series starting with [1/2] drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA URL : https://patchwork.freedesktop.org/series/52301/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5113_full -> Patchwork_10794_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10794_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10794_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10794_full: === IGT changes === Warnings igt@pm_rc6_residency@rc6-accuracy: shard-kbl: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_10794_full that come from known issues: === IGT changes === Issues hit igt@gem_ppgtt@blt-vs-render-ctx0: shard-skl: NOTRUN -> TIMEOUT (fdo#108039) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_color@pipe-c-legacy-gamma: shard-apl: PASS -> FAIL (fdo#104782) igt@kms_cursor_crc@cursor-128x128-random: shard-apl: PASS -> FAIL (fdo#103232) +1 igt@kms_cursor_crc@cursor-64x64-suspend: shard-skl: PASS -> INCOMPLETE (fdo#104108) igt@kms_flip@2x-flip-vs-expired-vblank: shard-glk: PASS -> FAIL (fdo#105363) shard-hsw: PASS -> FAIL (fdo#102887) igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render: shard-glk: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbc-stridechange: shard-skl: NOTRUN -> FAIL (fdo#105683) igt@kms_plane@plane-position-covered-pipe-b-planes: shard-glk: PASS -> FAIL (fdo#103166) igt@kms_plane_alpha_blend@pipe-a-alpha-7efc: shard-skl: NOTRUN -> FAIL (fdo#108145, fdo#107815) +2 igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: shard-skl: PASS -> FAIL (fdo#107815) igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: shard-skl: NOTRUN -> FAIL (fdo#108145) +1 igt@kms_plane_multiple@atomic-pipe-c-tiling-y: shard-apl: PASS -> FAIL (fdo#103166) +1 igt@kms_properties@connector-properties-legacy: shard-kbl: PASS -> DMESG-WARN (fdo#103313, fdo#105345) igt@kms_setmode@basic: shard-kbl: PASS -> FAIL (fdo#99912) igt@perf_pmu@busy-start-vcs0: shard-apl: PASS -> DMESG-WARN (fdo#103558, fdo#105602) +1 igt@perf_pmu@rc6-runtime-pm-long: shard-apl: PASS -> INCOMPLETE (fdo#103927) igt@pm_rpm@modeset-non-lpsp-stress-no-wait: shard-skl: SKIP -> INCOMPLETE (fdo#107807) igt@pm_rpm@universal-planes-dpms: shard-skl: PASS -> INCOMPLETE (fdo#107807) +1 Possible fixes igt@gem_softpin@noreloc-s3: shard-skl: INCOMPLETE (fdo#104108, fdo#107773) -> PASS igt@kms_chv_cursor_fail@pipe-c-256x256-top-edge: shard-skl: FAIL (fdo#104671) -> PASS igt@kms_cursor_crc@cursor-256x256-suspend: shard-apl: FAIL (fdo#103191, fdo#103232) -> PASS igt@kms_flip@absolute-wf_vblank: shard-kbl: DMESG-WARN (fdo#103313, fdo#105345) -> PASS igt@kms_flip@flip-vs-expired-vblank: shard-skl: FAIL (fdo#105363) -> PASS igt@kms_setmode@basic: shard-apl: FAIL (fdo#99912) -> PASS igt@pm_rpm@dpms-mode-unset-lpsp: shard-skl: INCOMPLETE (fdo#107807) -> PASS fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313 fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671 fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782 fdo#105345 https://bugs.freedesktop.org/show_bug.cgi?id=105345 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#105683 https://bugs.freedesktop.org/show_bug.cgi?id=105683 fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807 fdo#107815
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/icl: Drop spurious register read from icl_dbuf_slices_update (rev2)
== Series Details == Series: series starting with [1/2] drm/i915/icl: Drop spurious register read from icl_dbuf_slices_update (rev2) URL : https://patchwork.freedesktop.org/series/52299/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5113_full -> Patchwork_10793_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10793_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10793_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10793_full: === IGT changes === Warnings igt@perf_pmu@rc6: shard-kbl: SKIP -> PASS igt@pm_rc6_residency@rc6-accuracy: shard-kbl: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_10793_full that come from known issues: === IGT changes === Issues hit igt@drm_import_export@import-close-race-flink: shard-skl: PASS -> TIMEOUT (fdo#108667) igt@gem_ppgtt@blt-vs-render-ctx0: shard-skl: NOTRUN -> TIMEOUT (fdo#108039) igt@gem_pwrite@display: shard-snb: NOTRUN -> DMESG-WARN (fdo#107469) +1 igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +1 shard-kbl: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_color@pipe-c-ctm-blue-to-red: shard-skl: PASS -> FAIL (fdo#107201) igt@kms_color@pipe-c-legacy-gamma: shard-apl: PASS -> FAIL (fdo#104782) igt@kms_cursor_crc@cursor-128x128-random: shard-apl: PASS -> FAIL (fdo#103232) igt@kms_cursor_crc@cursor-256x256-onscreen: shard-skl: PASS -> FAIL (fdo#103232) igt@kms_cursor_crc@cursor-256x256-suspend: shard-skl: PASS -> INCOMPLETE (fdo#104108, fdo#107773) igt@kms_flip@flip-vs-expired-vblank: shard-glk: PASS -> FAIL (fdo#105363, fdo#102887) igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-skl: PASS -> FAIL (fdo#105363) igt@kms_flip@plain-flip-fb-recreate-interruptible: shard-skl: NOTRUN -> FAIL (fdo#100368) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen: shard-glk: PASS -> FAIL (fdo#103167) igt@kms_plane_alpha_blend@pipe-b-alpha-basic: shard-skl: NOTRUN -> FAIL (fdo#107815, fdo#108145) igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: shard-skl: NOTRUN -> FAIL (fdo#108145) +1 igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: shard-skl: PASS -> FAIL (fdo#107815) igt@kms_plane_multiple@atomic-pipe-b-tiling-x: shard-glk: PASS -> FAIL (fdo#103166) igt@kms_plane_multiple@atomic-pipe-c-tiling-y: shard-apl: PASS -> FAIL (fdo#103166) +1 igt@kms_setmode@basic: shard-kbl: PASS -> FAIL (fdo#99912) igt@prime_busy@wait-hang-default: shard-snb: NOTRUN -> INCOMPLETE (fdo#105411) Possible fixes igt@gem_ppgtt@blt-vs-render-ctx0: shard-kbl: INCOMPLETE (fdo#106023, fdo#103665, fdo#106887) -> PASS igt@gem_softpin@noreloc-s3: shard-skl: INCOMPLETE (fdo#104108, fdo#107773) -> PASS igt@kms_cursor_legacy@cursorb-vs-flipb-toggle: shard-glk: DMESG-WARN (fdo#106538, fdo#105763) -> PASS igt@kms_flip@absolute-wf_vblank: shard-kbl: DMESG-WARN (fdo#105345, fdo#103313) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-render: shard-glk: DMESG-FAIL (fdo#106538) -> PASS igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: shard-skl: INCOMPLETE (fdo#104108) -> PASS igt@kms_plane_multiple@atomic-pipe-b-tiling-y: shard-glk: FAIL (fdo#103166) -> PASS igt@kms_setmode@basic: shard-hsw: FAIL (fdo#99912) -> PASS igt@pm_rpm@dpms-mode-unset-lpsp: shard-skl: INCOMPLETE (fdo#107807) -> PASS Warnings igt@kms_vblank@pipe-a-query-busy: shard-snb: INCOMPLETE (fdo#105411) -> DMESG-WARN (fdo#107469) fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313 fdo#103665
Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/query: fix subslice length
On 09/11/2018 03:15, Patchwork wrote:
== Series Details ==
Series: drm/i915/query: fix subslice length
URL : https://patchwork.freedesktop.org/series/52270/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5108_full -> Patchwork_10784_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10784_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10784_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in
Patchwork_10784_full:
=== IGT changes ===
Warnings
{igt@kms_lease@lease_invalid_connector}:
shard-snb: SKIP -> PASS +1
igt@perf_pmu@rc6:
shard-kbl: SKIP -> PASS
These are unrelated, but still good to see them switching to pass :)
Thanks for the reviews, patch pushed.
Daniele
== Known issues ==
Here are the changes found in Patchwork_10784_full that come from known
issues:
=== IGT changes ===
Issues hit
igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
shard-apl: PASS -> DMESG-WARN (fdo#107956)
igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
shard-glk: PASS -> FAIL (fdo#108145)
igt@kms_chv_cursor_fail@pipe-c-64x64-right-edge:
shard-kbl: PASS -> DMESG-WARN (fdo#105345)
igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
shard-glk: NOTRUN -> FAIL (fdo#106509, fdo#105454)
igt@kms_draw_crc@draw-method-xrgb2101010-mmap-gtt-xtiled:
shard-skl: PASS -> FAIL (fdo#103184)
igt@kms_fbcon_fbt@psr-suspend:
shard-skl: NOTRUN -> FAIL (fdo#107882)
igt@kms_flip@plain-flip-ts-check:
shard-skl: PASS -> FAIL (fdo#100368)
igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
shard-skl: NOTRUN -> FAIL (fdo#103167) +3
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
shard-glk: PASS -> FAIL (fdo#103167)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
shard-apl: PASS -> FAIL (fdo#103167)
igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render:
shard-skl: NOTRUN -> FAIL (fdo#105682)
igt@kms_plane@pixel-format-pipe-c-planes:
shard-skl: NOTRUN -> DMESG-WARN (fdo#106885)
igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
shard-skl: PASS -> FAIL (fdo#107815)
igt@kms_rotation_crc@primary-rotation-90:
shard-skl: NOTRUN -> FAIL (fdo#103925, fdo#107815)
igt@kms_setmode@basic:
shard-apl: PASS -> FAIL (fdo#99912)
shard-glk: NOTRUN -> FAIL (fdo#99912)
shard-kbl: PASS -> FAIL (fdo#99912)
igt@kms_vblank@pipe-c-ts-continuation-modeset-rpm:
shard-kbl: PASS -> DMESG-WARN (fdo#105345, fdo#103313)
igt@pm_rpm@gem-pread:
shard-skl: PASS -> INCOMPLETE (fdo#107807) +1
Possible fixes
igt@kms_busy@extended-pageflip-hang-newfb-render-a:
shard-glk: DMESG-WARN (fdo#107956) -> PASS
igt@kms_chv_cursor_fail@pipe-c-256x256-top-edge:
shard-skl: FAIL (fdo#104671) -> PASS
igt@kms_color@pipe-c-ctm-blue-to-red:
shard-skl: FAIL (fdo#107201) -> PASS
igt@kms_cursor_crc@cursor-128x128-suspend:
shard-skl: INCOMPLETE (fdo#104108) -> PASS
igt@kms_cursor_crc@cursor-256x256-suspend:
shard-apl: FAIL (fdo#103191, fdo#103232) -> PASS
igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render:
shard-glk: FAIL (fdo#103167) -> PASS
igt@kms_plane@pixel-format-pipe-b-planes:
shard-apl: FAIL (fdo#103166) -> PASS
igt@perf@polling:
shard-hsw: FAIL (fdo#102252) -> PASS
igt@pm_rpm@basic-rte:
shard-skl: INCOMPLETE (fdo#107807) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#104108
Re: [Intel-gfx] [PATCH] drm/i915: fix subslice mask array size
On 06/11/2018 10:33, Lionel Landwerlin wrote:
On 06/11/2018 18:29, Daniele Ceraolo Spurio wrote:
We have a subslice mask per slice, not per subslice.
MAX_SUBSLICES > MAX_SLICES, so the wrong size didn't cause any issue
apart from using extra memory.
Cc: Lionel Landwerlin
Signed-off-by: Daniele Ceraolo Spurio
Indeed!
Reviewed-by: Lionel Landwerlin
> Thanks,
-
Lionel
Pushed, thanks for the review.
Daniele
---
drivers/gpu/drm/i915/intel_device_info.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_device_info.h
b/drivers/gpu/drm/i915/intel_device_info.h
index 86ce1db1b33a..88f97210dc49 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -124,7 +124,7 @@ enum intel_ppgtt {
struct sseu_dev_info {
u8 slice_mask;
- u8 subslice_mask[GEN_MAX_SUBSLICES];
+ u8 subslice_mask[GEN_MAX_SLICES];
u16 eu_total;
u8 eu_per_subslice;
u8 min_eu_in_pool;
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/7] drm/i915: Avoid a full port detection in the first eDP short pulse
== Series Details == Series: series starting with [1/7] drm/i915: Avoid a full port detection in the first eDP short pulse URL : https://patchwork.freedesktop.org/series/52313/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5117 -> Patchwork_10800 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10800 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10800, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/52313/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10800: === IGT changes === Possible regressions igt@drv_selftest@live_execlists: fi-cfl-8109u: PASS -> DMESG-WARN == Known issues == Here are the changes found in Patchwork_10800 that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_contexts: fi-icl-u2: NOTRUN -> DMESG-FAIL (fdo#108569) igt@kms_pipe_crc_basic@hang-read-crc-pipe-b: fi-byt-clapper: PASS -> FAIL (fdo#107362, fdo#103191) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: fi-apl-guc: PASS -> DMESG-WARN (fdo#108566) igt@pm_rpm@module-reload: fi-skl-6600u: PASS -> INCOMPLETE (fdo#107807) Possible fixes igt@gem_ctx_create@basic-files: fi-icl-u2: DMESG-WARN (fdo#107724) -> PASS fi-bsw-kefka: FAIL (fdo#108656) -> PASS igt@gem_exec_reloc@basic-write-read: fi-icl-u2: DMESG-WARN -> PASS igt@kms_flip@basic-flip-vs-modeset: fi-hsw-4770r: DMESG-WARN (fdo#105602) -> PASS igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS +1 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724 fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807 fdo#108566 https://bugs.freedesktop.org/show_bug.cgi?id=108566 fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569 fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656 == Participating hosts (53 -> 46) == Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-icl-u == Build changes == * Linux: CI_DRM_5117 -> Patchwork_10800 CI_DRM_5117: 5d5c30c5b1ff128ceaca95ef7148b5a696fc6645 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10800: e157bc67846311786746c90b94f8ffab6b7e2db1 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == e157bc678463 drm/i915/psr: Disable DRRS if enabled when enabling PSR from debugfs 0061dd4a67b5 drm/i915/hsw: Drop the stereo 3D enabled check in psr_compute_config() e17ce4464620 drm/i915: Keep PSR disabled after a driver reload after a PSR error b0512ffaa456 drm/i915: Disable PSR when a PSR aux error happen 6075713b1f8e drm/i915: Do not enable PSR in the next modeset after a error d964efb6165c drm/i915: Check PSR errors instead of retrain while PSR is enabled eb5d436583c5 drm/i915: Avoid a full port detection in the first eDP short pulse == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10800/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA (rev2)
== Series Details == Series: drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA (rev2) URL : https://patchwork.freedesktop.org/series/52297/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5113_full -> Patchwork_10792_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10792_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10792_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10792_full: === IGT changes === Warnings igt@perf_pmu@rc6: shard-kbl: SKIP -> PASS igt@pm_rc6_residency@rc6-accuracy: shard-kbl: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_10792_full that come from known issues: === IGT changes === Issues hit igt@gem_ppgtt@blt-vs-render-ctx0: shard-skl: NOTRUN -> TIMEOUT (fdo#108039) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +1 shard-kbl: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_cursor_crc@cursor-128x128-sliding: shard-apl: PASS -> FAIL (fdo#103232) igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-skl: PASS -> FAIL (fdo#102887) igt@kms_frontbuffer_tracking@fbc-stridechange: shard-skl: NOTRUN -> FAIL (fdo#105683) igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence: shard-kbl: PASS -> DMESG-WARN (fdo#103313, fdo#105345) igt@kms_plane_alpha_blend@pipe-b-alpha-basic: shard-skl: NOTRUN -> FAIL (fdo#107815, fdo#108145) +1 igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: shard-skl: NOTRUN -> FAIL (fdo#108145) +1 igt@kms_plane_multiple@atomic-pipe-b-tiling-x: shard-glk: PASS -> FAIL (fdo#103166) igt@kms_setmode@basic: shard-kbl: PASS -> FAIL (fdo#99912) igt@pm_rpm@dpms-non-lpsp: shard-skl: NOTRUN -> INCOMPLETE (fdo#107807) igt@pm_rpm@system-suspend-modeset: shard-skl: PASS -> INCOMPLETE (fdo#107807, fdo#107773, fdo#104108) Possible fixes igt@drv_suspend@forcewake: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@gem_ppgtt@blt-vs-render-ctx0: shard-kbl: INCOMPLETE (fdo#106887, fdo#103665, fdo#106023) -> PASS igt@gem_softpin@noreloc-s3: shard-skl: INCOMPLETE (fdo#107773, fdo#104108) -> PASS igt@kms_chv_cursor_fail@pipe-c-256x256-top-edge: shard-skl: FAIL (fdo#104671) -> PASS igt@kms_cursor_crc@cursor-256x256-suspend: shard-apl: FAIL (fdo#103232, fdo#103191) -> PASS igt@kms_cursor_legacy@cursorb-vs-flipb-toggle: shard-glk: DMESG-WARN (fdo#105763, fdo#106538) -> PASS igt@kms_flip@absolute-wf_vblank: shard-kbl: DMESG-WARN (fdo#103313, fdo#105345) -> PASS igt@kms_flip@flip-vs-expired-vblank: shard-skl: FAIL (fdo#105363) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite: shard-apl: FAIL (fdo#103167) -> PASS igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-render: shard-glk: DMESG-FAIL (fdo#106538) -> PASS igt@kms_plane_multiple@atomic-pipe-b-tiling-y: shard-glk: FAIL (fdo#103166) -> PASS igt@pm_rpm@dpms-mode-unset-lpsp: shard-skl: INCOMPLETE (fdo#107807) -> PASS fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671 fdo#105345 https://bugs.freedesktop.org/show_bug.cgi?id=105345 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105683 https://bugs.freedesktop.org/show_bug.cgi?id=105683 fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763 fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023 fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538 fdo#106887 https://bugs.freedesktop.org/show_bug.cgi?id=106887 fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807 fdo#107815
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/7] drm/i915: Avoid a full port detection in the first eDP short pulse
== Series Details == Series: series starting with [1/7] drm/i915: Avoid a full port detection in the first eDP short pulse URL : https://patchwork.freedesktop.org/series/52313/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Avoid a full port detection in the first eDP short pulse Okay! Commit: drm/i915: Check PSR errors instead of retrain while PSR is enabled Okay! Commit: drm/i915: Do not enable PSR in the next modeset after a error -drivers/gpu/drm/i915/selftests/../i915_drv.h:3714:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3715:16: warning: expression using sizeof(void) Commit: drm/i915: Disable PSR when a PSR aux error happen -drivers/gpu/drm/i915/selftests/../i915_drv.h:3715:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3716:16: warning: expression using sizeof(void) Commit: drm/i915: Keep PSR disabled after a driver reload after a PSR error Okay! Commit: drm/i915/hsw: Drop the stereo 3D enabled check in psr_compute_config() Okay! Commit: drm/i915/psr: Disable DRRS if enabled when enabling PSR from debugfs Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Avoid a full port detection in the first eDP short pulse
== Series Details == Series: series starting with [1/7] drm/i915: Avoid a full port detection in the first eDP short pulse URL : https://patchwork.freedesktop.org/series/52313/ State : warning == Summary == $ dim checkpatch origin/drm-tip eb5d436583c5 drm/i915: Avoid a full port detection in the first eDP short pulse d964efb6165c drm/i915: Check PSR errors instead of retrain while PSR is enabled 6075713b1f8e drm/i915: Do not enable PSR in the next modeset after a error -:25: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #25: FILE: drivers/gpu/drm/i915/i915_drv.h:644: + bool sink_not_reliable; total: 0 errors, 0 warnings, 1 checks, 36 lines checked b0512ffaa456 drm/i915: Disable PSR when a PSR aux error happen -:38: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #38: FILE: drivers/gpu/drm/i915/i915_drv.h:645: + bool irq_aux_error; total: 0 errors, 0 warnings, 1 checks, 78 lines checked e17ce4464620 drm/i915: Keep PSR disabled after a driver reload after a PSR error 0061dd4a67b5 drm/i915/hsw: Drop the stereo 3D enabled check in psr_compute_config() e157bc678463 drm/i915/psr: Disable DRRS if enabled when enabling PSR from debugfs ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/7] drm/i915: Avoid a full port detection in the first eDP short pulse
Some eDP panels do not set a valid sink count value and even for the
ones that sets is should always be one for eDP, that is why it is not
cached in intel_edp_init_dpcd().
But intel_dp_short_pulse() compares the old count with the read one
if there is a mistmatch a full port detection will be executed, what
was happening in the first short pulse interruption of eDP panels
that sets sink count.
Instead of just skip the compasison for eDP panels, lets not read
the sink count at all for eDP.
v2: the previous version of this patch was caching the sink count
in intel_edp_init_dpcd() but I was pointed out by Ville a patch that
handled a case of a eDP panel that do not set sink count
Cc: Ville Syrjälä
Cc: Dhinakaran Pandiyan
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_dp.c | 44 +++--
1 file changed, 26 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 2b090609bee2..577c166f6483 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3936,8 +3936,6 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
static bool
intel_dp_get_dpcd(struct intel_dp *intel_dp)
{
- u8 sink_count;
-
if (!intel_dp_read_dpcd(intel_dp))
return false;
@@ -3947,25 +3945,35 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
intel_dp_set_common_rates(intel_dp);
}
- if (drm_dp_dpcd_readb(_dp->aux, DP_SINK_COUNT, _count) <= 0)
- return false;
-
/*
-* Sink count can change between short pulse hpd hence
-* a member variable in intel_dp will track any changes
-* between short pulse interrupts.
+* Some eDP panels do not set a valid value for sink count, that is why
+* it don't care about read it here and in intel_edp_init_dpcd().
*/
- intel_dp->sink_count = DP_GET_SINK_COUNT(sink_count);
+ if (!intel_dp_is_edp(intel_dp)) {
+ u8 count;
+ ssize_t r;
- /*
-* SINK_COUNT == 0 and DOWNSTREAM_PORT_PRESENT == 1 implies that
-* a dongle is present but no display. Unless we require to know
-* if a dongle is present or not, we don't need to update
-* downstream port information. So, an early return here saves
-* time from performing other operations which are not required.
-*/
- if (!intel_dp_is_edp(intel_dp) && !intel_dp->sink_count)
- return false;
+ r = drm_dp_dpcd_readb(_dp->aux, DP_SINK_COUNT, );
+ if (r < 1)
+ return false;
+
+ /*
+* Sink count can change between short pulse hpd hence
+* a member variable in intel_dp will track any changes
+* between short pulse interrupts.
+*/
+ intel_dp->sink_count = DP_GET_SINK_COUNT(count);
+
+ /*
+* SINK_COUNT == 0 and DOWNSTREAM_PORT_PRESENT == 1 implies that
+* a dongle is present but no display. Unless we require to know
+* if a dongle is present or not, we don't need to update
+* downstream port information. So, an early return here saves
+* time from performing other operations which are not required.
+*/
+ if (!intel_dp->sink_count)
+ return false;
+ }
if (!drm_dp_is_branch(intel_dp->dpcd))
return true; /* native DP sink */
--
2.19.1
___
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[Intel-gfx] [PATCH 6/7] drm/i915/hsw: Drop the stereo 3D enabled check in psr_compute_config()
We should not access hardware while computing config also we don't
support stereo 3D so this tests was never true.
Suggested-by: Ville Syrjälä
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_psr.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index e505b0b9ae47..853e3f1370a0 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -533,13 +533,6 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
return;
}
- if (IS_HASWELL(dev_priv) &&
- I915_READ(HSW_STEREO_3D_CTL(crtc_state->cpu_transcoder)) &
- S3D_ENABLE) {
- DRM_DEBUG_KMS("PSR condition failed: Stereo 3D is Enabled\n");
- return;
- }
-
if (IS_HASWELL(dev_priv) &&
adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
DRM_DEBUG_KMS("PSR condition failed: Interlaced is Enabled\n");
--
2.19.1
___
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[Intel-gfx] [PATCH 7/7] drm/i915/psr: Disable DRRS if enabled when enabling PSR from debugfs
If panel supports DRRS and PSR and if driver is loaded without PSR
enabled, driver will enable DRRS as expected but if PSR is enabled by
debugfs latter it will keep PSR and DRRS enabled causing possible
problems as DRRS will lower the refresh rate while PSR enabled.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108341
Cc: Maarten Lankhorst
Cc: Dhinakaran Pandiyan
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_psr.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 853e3f1370a0..bfc6a08b5cf4 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -904,8 +904,11 @@ int intel_psr_set_debugfs_mode(struct drm_i915_private
*dev_priv,
intel_psr_irq_control(dev_priv, dev_priv->psr.debug);
- if (dev_priv->psr.prepared && enable)
+ if (dev_priv->psr.prepared && enable) {
+ if (crtc_state)
+ intel_edp_drrs_disable(dp, crtc_state);
intel_psr_enable_locked(dev_priv, crtc_state);
+ }
mutex_unlock(_priv->psr.lock);
return ret;
--
2.19.1
___
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[Intel-gfx] [PATCH 2/7] drm/i915: Check PSR errors instead of retrain while PSR is enabled
When a PSR error happens sink sets the PSR errors register and also
set the link to a error status.
So in the short pulse handling it was returning earlier and doing a
full detection and attempting to retrain but it fails as PSR HW is
in change of the main-link.
Just call intel_psr_short_pulse() before
intel_dp_needs_link_retrain() is not the right fix as
intel_dp_needs_link_retrain() would return true and trigger a full
detection while PSR HW is still in change of main-link.
Check for PSR active is also not safe as it could be inactive due a
frontbuffer invalidate and still doing the PSR exit sequence.
v3: added comment in intel_dp_needs_link_retrain()
Cc: Dhinakaran Pandiyan
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_dp.c | 11 +++
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_psr.c | 15 +++
3 files changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 577c166f6483..158c6f25d2e2 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4383,6 +4383,17 @@ intel_dp_needs_link_retrain(struct intel_dp *intel_dp)
if (!intel_dp->link_trained)
return false;
+ /*
+* While PSR source HW is enabled, it will control main-link sending
+* frames, enabling and disabling it so trying to do a retrain will fail
+* as the link would or not be on or it could mix training patterns
+* and frame data at the same time causing retrain to fail.
+* Also when exiting PSR, HW will retrain the link anyways fixing
+* any link status error.
+*/
+ if (intel_psr_enabled(intel_dp))
+ return false;
+
if (!intel_dp_get_link_status(intel_dp, link_status))
return false;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index cc7fab2b61f4..12f96297299e 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -2046,6 +2046,7 @@ void intel_psr_irq_handler(struct drm_i915_private
*dev_priv, u32 psr_iir);
void intel_psr_short_pulse(struct intel_dp *intel_dp);
int intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state,
u32 *out_value);
+bool intel_psr_enabled(struct intel_dp *intel_dp);
/* intel_quirks.c */
void intel_init_quirks(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 48df16a02fac..f940305b72e4 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -1107,3 +1107,18 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
exit:
mutex_unlock(>lock);
}
+
+bool intel_psr_enabled(struct intel_dp *intel_dp)
+{
+ struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+ bool ret;
+
+ if (!CAN_PSR(dev_priv) || !intel_dp_is_edp(intel_dp))
+ return false;
+
+ mutex_lock(_priv->psr.lock);
+ ret = (dev_priv->psr.dp == intel_dp && dev_priv->psr.enabled);
+ mutex_unlock(_priv->psr.lock);
+
+ return ret;
+}
--
2.19.1
___
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[Intel-gfx] [PATCH 4/7] drm/i915: Disable PSR when a PSR aux error happen
While PSR is active hardware will do aux transactions by it self to
wakeup sink to receive a new frame when necessary. If that
transaction is not acked by sink, hardware will trigger this
interruption.
So let's disable PSR as it is a hint that there is problem with this
sink.
The removed FIXME was asking to manually train the link but we don't
need to do that as by spec sink should do a short pulse when it is
out of sync with source, we just need to make sure it is awaken and
the SDP header with PSR disable will trigger this condition.
v3: added workarround to fix scheduled work starvation cause by
to frequent PSR error interruption
v4: only setting irq_aux_error as we don't care in clear it and
not using dev_priv->irq_lock as consequence.
Cc: Dhinakaran Pandiyan
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_psr.c | 41
2 files changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e13222518c1b..4022a317cf05 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -642,6 +642,7 @@ struct i915_psr {
ktime_t last_entry_attempt;
ktime_t last_exit;
bool sink_not_reliable;
+ bool irq_aux_error;
};
enum intel_pch {
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index cc738497d551..93d8538a2383 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -152,6 +152,7 @@ void intel_psr_irq_handler(struct drm_i915_private
*dev_priv, u32 psr_iir)
u32 transcoders = BIT(TRANSCODER_EDP);
enum transcoder cpu_transcoder;
ktime_t time_ns = ktime_get();
+ u32 mask = 0;
if (INTEL_GEN(dev_priv) >= 8)
transcoders |= BIT(TRANSCODER_A) |
@@ -159,10 +160,22 @@ void intel_psr_irq_handler(struct drm_i915_private
*dev_priv, u32 psr_iir)
BIT(TRANSCODER_C);
for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder, transcoders) {
- /* FIXME: Exit PSR and link train manually when this happens. */
- if (psr_iir & EDP_PSR_ERROR(cpu_transcoder))
- DRM_DEBUG_KMS("[transcoder %s] PSR aux error\n",
- transcoder_name(cpu_transcoder));
+ if (psr_iir & EDP_PSR_ERROR(cpu_transcoder)) {
+ DRM_WARN("[transcoder %s] PSR aux error\n",
+transcoder_name(cpu_transcoder));
+
+ dev_priv->psr.irq_aux_error = true;
+
+ /*
+* If this interruption is not masked it will keep
+* interrupting so fast that it prevents the scheduled
+* work to run.
+* Also after a PSR error, we don't want to arm PSR
+* again so we don't care about unmask the interruption
+* or unset irq_aux_error.
+*/
+ mask |= EDP_PSR_ERROR(cpu_transcoder);
+ }
if (psr_iir & EDP_PSR_PRE_ENTRY(cpu_transcoder)) {
dev_priv->psr.last_entry_attempt = time_ns;
@@ -184,6 +197,13 @@ void intel_psr_irq_handler(struct drm_i915_private
*dev_priv, u32 psr_iir)
}
}
}
+
+ if (mask) {
+ mask |= I915_READ(EDP_PSR_IMR);
+ I915_WRITE(EDP_PSR_IMR, mask);
+
+ schedule_work(_priv->psr.work);
+ }
}
static bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp)
@@ -898,6 +918,16 @@ int intel_psr_set_debugfs_mode(struct drm_i915_private
*dev_priv,
return ret;
}
+static void intel_psr_handle_irq(struct drm_i915_private *dev_priv)
+{
+ struct i915_psr *psr = _priv->psr;
+
+ intel_psr_disable_locked(psr->dp);
+ psr->sink_not_reliable = true;
+ /* let's make sure that sink is awaken */
+ drm_dp_dpcd_writeb(>dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
+}
+
static void intel_psr_work(struct work_struct *work)
{
struct drm_i915_private *dev_priv =
@@ -908,6 +938,9 @@ static void intel_psr_work(struct work_struct *work)
if (!dev_priv->psr.enabled)
goto unlock;
+ if (READ_ONCE(dev_priv->psr.irq_aux_error))
+ intel_psr_handle_irq(dev_priv);
+
/*
* We have to make sure PSR is ready for re-enable
* otherwise it keeps disabled until next full enable/disable cycle.
--
2.19.1
___
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[Intel-gfx] [PATCH 5/7] drm/i915: Keep PSR disabled after a driver reload after a PSR error
If a PSR error happened and the driver is reloaded, the EDP_PSR_IIR
will still keep the error set even after the reset done in the
irq_preinstall and irq_uninstall hooks.
And enabling in this situation cause the screen to freeze in the
first time that PSR HW tries to activate so lets keep PSR disabled
to avoid any rendering problems.
v4: Moved handling from intel_psr_compute_config() to
intel_psr_init() to avoid hardware access during compute(Ville)
Cc: Ville Syrjälä
Cc: Dhinakaran Pandiyan
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_psr.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 93d8538a2383..e505b0b9ae47 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -1084,6 +1084,20 @@ void intel_psr_init(struct drm_i915_private *dev_priv)
if (INTEL_GEN(dev_priv) < 9 || !dev_priv->vbt.psr.enable)
i915_modparams.enable_psr = 0;
+ /*
+* If a PSR error happened and the driver is reloaded, the EDP_PSR_IIR
+* will still keep the error set even after the reset done in the
+* irq_preinstall and irq_uninstall hooks.
+* And enabling in this situation cause the screen to freeze in the
+* first time that PSR HW tries to activate so lets keep PSR disabled
+* to avoid any rendering problems.
+*/
+ if (I915_READ(EDP_PSR_IIR) & EDP_PSR_ERROR(TRANSCODER_EDP)) {
+ DRM_DEBUG_KMS("PSR interruption error set\n");
+ dev_priv->psr.sink_not_reliable = true;
+ return;
+ }
+
/* Set link_standby x link_off defaults */
if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
/* HSW and BDW require workarounds that we don't implement. */
--
2.19.1
___
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[Intel-gfx] [PATCH 3/7] drm/i915: Do not enable PSR in the next modeset after a error
When we detect a error and disable PSR, it is kept disable until the
next modeset but as the sink already show signs that it do not
properly work with PSR lets disabled it for good to avoid any
additional flickering.
Cc: Dhinakaran Pandiyan
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_psr.c | 10 +-
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 08d25aa480f7..e13222518c1b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -641,6 +641,7 @@ struct i915_psr {
u8 sink_sync_latency;
ktime_t last_entry_attempt;
ktime_t last_exit;
+ bool sink_not_reliable;
};
enum intel_pch {
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index f940305b72e4..cc738497d551 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -508,6 +508,11 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
return;
}
+ if (dev_priv->psr.sink_not_reliable) {
+ DRM_DEBUG_KMS("Sink not reliable set\n");
+ return;
+ }
+
if (IS_HASWELL(dev_priv) &&
I915_READ(HSW_STEREO_3D_CTL(crtc_state->cpu_transcoder)) &
S3D_ENABLE) {
@@ -1083,6 +1088,7 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
if ((val & DP_PSR_SINK_STATE_MASK) == DP_PSR_SINK_INTERNAL_ERROR) {
DRM_DEBUG_KMS("PSR sink internal error, disabling PSR\n");
intel_psr_disable_locked(intel_dp);
+ psr->sink_not_reliable = true;
}
if (drm_dp_dpcd_readb(_dp->aux, DP_PSR_ERROR_STATUS, ) != 1) {
@@ -1100,8 +1106,10 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
if (val & ~errors)
DRM_ERROR("PSR_ERROR_STATUS unhandled errors %x\n",
val & ~errors);
- if (val & errors)
+ if (val & errors) {
intel_psr_disable_locked(intel_dp);
+ psr->sink_not_reliable = true;
+ }
/* clear status register */
drm_dp_dpcd_writeb(_dp->aux, DP_PSR_ERROR_STATUS, val);
exit:
--
2.19.1
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Move skip_intermediate_wm handling into ilk_compute_intermediate_wm()
== Series Details == Series: drm/i915: Move skip_intermediate_wm handling into ilk_compute_intermediate_wm() URL : https://patchwork.freedesktop.org/series/52248/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5116 -> Patchwork_10799 = == Summary - WARNING == Minor unknown changes coming with Patchwork_10799 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10799, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/52248/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10799: === IGT changes === Warnings igt@drv_selftest@live_guc: fi-skl-iommu: SKIP -> PASS +1 == Known issues == Here are the changes found in Patchwork_10799 that come from known issues: === IGT changes === Issues hit igt@drv_module_reload@basic-reload: fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718) igt@gem_mmap_gtt@basic-copy: fi-glk-dsi: PASS -> INCOMPLETE (k.org#198133, fdo#103359) igt@kms_flip@basic-flip-vs-modeset: fi-hsw-4770r: PASS -> DMESG-WARN (fdo#105602) igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c: fi-skl-6700k2: PASS -> FAIL (fdo#103191, fdo#107362) Possible fixes igt@drv_selftest@live_hangcheck: fi-skl-iommu: INCOMPLETE (fdo#108602) -> PASS igt@drv_selftest@live_hugepages: fi-skl-6700k2: INCOMPLETE -> PASS igt@kms_chamelium@common-hpd-after-suspend: fi-skl-6700k2: TIMEOUT -> PASS igt@kms_flip@basic-plain-flip: fi-ilk-650: DMESG-WARN (fdo#106387) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#106387 https://bugs.freedesktop.org/show_bug.cgi?id=106387 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#108602 https://bugs.freedesktop.org/show_bug.cgi?id=108602 k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133 == Participating hosts (51 -> 45) == Additional (1): fi-glk-j4005 Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-ctg-p8600 fi-icl-u == Build changes == * Linux: CI_DRM_5116 -> Patchwork_10799 CI_DRM_5116: ade66f7f60026c1c7e68a12ce07d5d4000afce13 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10799: dd7ebb2e178a08e8095841db8d5c1a97943e68ed @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == dd7ebb2e178a drm/i915: Move skip_intermediate_wm handling into ilk_compute_intermediate_wm() == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10799/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3,CI] drm/i915: Make 48bit full ppgtt configuration generic (v10)
== Series Details == Series: series starting with [1/3,CI] drm/i915: Make 48bit full ppgtt configuration generic (v10) URL : https://patchwork.freedesktop.org/series/52309/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5116 -> Patchwork_10798 = == Summary - WARNING == Minor unknown changes coming with Patchwork_10798 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10798, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/52309/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10798: === IGT changes === Warnings igt@drv_selftest@live_guc: fi-skl-iommu: SKIP -> PASS +1 == Known issues == Here are the changes found in Patchwork_10798 that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_coherency: fi-gdg-551: PASS -> DMESG-FAIL (fdo#107164) igt@gem_ctx_create@basic-files: fi-icl-u2: PASS -> DMESG-WARN (fdo#107724) igt@kms_chamelium@dp-crc-fast: fi-kbl-7500u: PASS -> DMESG-FAIL (fdo#103841) igt@kms_flip@basic-flip-vs-modeset: fi-hsw-4770r: PASS -> DMESG-WARN (fdo#105602) igt@kms_frontbuffer_tracking@basic: fi-byt-clapper: PASS -> FAIL (fdo#103167) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362) Possible fixes igt@drv_selftest@live_hangcheck: fi-skl-iommu: INCOMPLETE (fdo#108602) -> PASS igt@drv_selftest@live_hugepages: fi-skl-6700k2: INCOMPLETE -> PASS igt@kms_chamelium@common-hpd-after-suspend: fi-skl-6700k2: TIMEOUT -> PASS igt@kms_flip@basic-plain-flip: fi-ilk-650: DMESG-WARN (fdo#106387) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS Warnings igt@drv_selftest@live_contexts: fi-icl-u2: DMESG-FAIL (fdo#108569) -> INCOMPLETE (fdo#108315) fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#106387 https://bugs.freedesktop.org/show_bug.cgi?id=106387 fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724 fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569 fdo#108602 https://bugs.freedesktop.org/show_bug.cgi?id=108602 == Participating hosts (51 -> 47) == Additional (1): fi-glk-j4005 Missing(5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 == Build changes == * Linux: CI_DRM_5116 -> Patchwork_10798 CI_DRM_5116: ade66f7f60026c1c7e68a12ce07d5d4000afce13 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10798: 1242657587d47333de7bb643658756071a55a6a6 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 1242657587d4 drm/i915: Remove HAS_FULL_PPGTT and device_info.ppgtt enum (v2) cc724d430f0f drm/i915: Remove HAS_4LVL_PPGTT f162ec34469f drm/i915: Make 48bit full ppgtt configuration generic (v10) == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10798/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v4,1/4] drm/i915/psr: Use intel_psr_exit() in intel_psr_disable_source()
Thanks for the reviews DK, patches pushed to drm-intel-next-queued On Fri, 2018-11-09 at 06:36 +, Patchwork wrote: > == Series Details == > > Series: series starting with [v4,1/4] drm/i915/psr: Use > intel_psr_exit() in intel_psr_disable_source() > URL : https://patchwork.freedesktop.org/series/52113/ > State : success > > == Summary == > > = CI Bug Log - changes from CI_DRM_5106_full -> Patchwork_10780_full > = > > == Summary - WARNING == > > Minor unknown changes coming with Patchwork_10780_full need to be > verified > manually. > > If you think the reported changes have nothing to do with the > changes > introduced in Patchwork_10780_full, please notify your bug team to > allow them > to document this new failure mode, which will reduce false > positives in CI. > > > > == Possible new issues == > > Here are the unknown changes that may have been introduced in > Patchwork_10780_full: > > === IGT changes === > > Warnings > > igt@pm_rc6_residency@rc6-accuracy: > shard-snb: PASS -> SKIP > > > == Known issues == > > Here are the changes found in Patchwork_10780_full that come from > known issues: > > === IGT changes === > > Issues hit > > igt@gem_exec_schedule@pi-ringfull-render: > shard-glk: NOTRUN -> FAIL (fdo#103158) > shard-skl: NOTRUN -> FAIL (fdo#103158) > > igt@gem_pipe_control_store_loop@fresh-buffer: > shard-apl: NOTRUN -> INCOMPLETE (fdo#103927) > > igt@kms_available_modes_crc@available_mode_test_crc: > shard-glk: NOTRUN -> FAIL (fdo#106641) > > igt@kms_busy@extended-modeset-hang-newfb-render-c: > shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +2 > > igt@kms_busy@extended-pageflip-hang-newfb-render-a: > shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) +2 > > igt@kms_cursor_crc@cursor-128x42-random: > shard-glk: NOTRUN -> FAIL (fdo#103232) +1 > > igt@kms_cursor_crc@cursor-256x85-sliding: > shard-apl: PASS -> FAIL (fdo#103232) +2 > > igt@kms_fbcon_fbt@psr-suspend: > shard-skl: NOTRUN -> FAIL (fdo#107882) > > igt@kms > _frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite: > shard-apl: PASS -> FAIL (fdo#103167) > > igt@kms_frontbuffer_tracking@fbc-1p-rte: > shard-apl: PASS -> FAIL (fdo#103167, fdo#105682) > > igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack: > shard-skl: NOTRUN -> FAIL (fdo#103167) > > igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt: > shard-glk: PASS -> FAIL (fdo#103167) > > igt@kms > _frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc: > shard-glk: NOTRUN -> FAIL (fdo#103167) +2 > > igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move: > shard-skl: NOTRUN -> FAIL (fdo#105682) > > igt@kms_frontbuffer_tracking@fbcpsr-stridechange: > shard-skl: NOTRUN -> FAIL (fdo#105683) > > igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: > shard-skl: NOTRUN -> FAIL (fdo#107362, fdo#103191) > > igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: > shard-skl: PASS -> FAIL (fdo#107362, fdo#103191) > > igt@kms_plane@pixel-format-pipe-c-planes: > shard-apl: PASS -> FAIL (fdo#103166) +3 > shard-skl: NOTRUN -> DMESG-WARN (fdo#106885) > > igt@kms_plane@plane-position-covered-pipe-b-planes: > shard-glk: NOTRUN -> FAIL (fdo#103166) > > igt@kms_plane_alpha_blend@pipe-a-alpha-basic: > shard-glk: NOTRUN -> FAIL (fdo#108145) +1 > > igt@kms_plane_alpha_blend@pipe-b-alpha-7efc: > shard-skl: NOTRUN -> FAIL (fdo#107815, fdo#108145) +1 > > igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb: > shard-kbl: NOTRUN -> FAIL (fdo#108145) > shard-skl: NOTRUN -> FAIL (fdo#108145) +3 > > igt@kms_plane_multiple@atomic-pipe-a-tiling-x: > shard-skl: NOTRUN -> FAIL (fdo#103166, fdo#107815) > shard-kbl: NOTRUN -> FAIL (fdo#103166) > > igt@kms_setmode@basic: > shard-apl: PASS -> FAIL (fdo#99912) > > igt@pm_rpm@fences: > shard-apl: PASS -> DMESG-WARN (fdo#103558, fdo#105602) > +3 > > igt@pm_rpm@gem-mmap-cpu: > shard-skl: PASS -> INCOMPLETE (fdo#107807) > > igt@pm_rpm@system-suspend-devices: > shard-skl: NOTRUN -> INCOMPLETE (fdo#107807) > > > Possible fixes > > igt@gem_softpin@noreloc-s3: > shard-skl: INCOMPLETE (fdo#107773, fdo#104108) -> PASS > > igt@kms_chv_cursor_fail@pipe-a-128x128-right-edge: > shard-skl: FAIL (fdo#104671) -> PASS > > igt@kms_color@pipe-a-legacy-gamma: > shard-apl: FAIL (fdo#104782, fdo#108145) -> PASS > >
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3,CI] drm/i915: Make 48bit full ppgtt configuration generic (v10)
== Series Details == Series: series starting with [1/3,CI] drm/i915: Make 48bit full ppgtt configuration generic (v10) URL : https://patchwork.freedesktop.org/series/52309/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Make 48bit full ppgtt configuration generic (v10) -./include/linux/slab.h:332:43: warning: dubious: x & !y Commit: drm/i915: Remove HAS_4LVL_PPGTT -drivers/gpu/drm/i915/selftests/../i915_drv.h:3714:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3712:16: warning: expression using sizeof(void) Commit: drm/i915: Remove HAS_FULL_PPGTT and device_info.ppgtt enum (v2) -O:drivers/gpu/drm/i915/i915_drv.c:348:25: warning: expression using sizeof(void) -drivers/gpu/drm/i915/selftests/../i915_drv.h:3712:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3714:16: warning: expression using sizeof(void) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen11: Preempt-to-idle support in execlists. (rev8)
== Series Details == Series: drm/i915/gen11: Preempt-to-idle support in execlists. (rev8) URL : https://patchwork.freedesktop.org/series/40747/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5116 -> Patchwork_10797 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/40747/revisions/8/mbox/ == Known issues == Here are the changes found in Patchwork_10797 that come from known issues: === IGT changes === Issues hit igt@gem_ctx_create@basic-files: fi-icl-u2: PASS -> DMESG-WARN (fdo#107724) igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: fi-byt-clapper: PASS -> FAIL (fdo#107362, fdo#103191) igt@kms_pipe_crc_basic@read-crc-pipe-b: fi-byt-clapper: PASS -> FAIL (fdo#107362) Possible fixes igt@drv_selftest@live_hugepages: fi-skl-6700k2: INCOMPLETE -> PASS igt@kms_chamelium@common-hpd-after-suspend: fi-skl-6700k2: TIMEOUT -> PASS igt@kms_flip@basic-plain-flip: fi-ilk-650: DMESG-WARN (fdo#106387) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#106387 https://bugs.freedesktop.org/show_bug.cgi?id=106387 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724 == Participating hosts (51 -> 46) == Additional (1): fi-glk-j4005 Missing(6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-icl-u == Build changes == * Linux: CI_DRM_5116 -> Patchwork_10797 CI_DRM_5116: ade66f7f60026c1c7e68a12ce07d5d4000afce13 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10797: 565cd7090a442f92340477f4bfe8c55f7590344f @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 565cd7090a44 drm/i915/icl: Preempt-to-idle support in execlists. == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10797/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gen11: Preempt-to-idle support in execlists. (rev8)
== Series Details == Series: drm/i915/gen11: Preempt-to-idle support in execlists. (rev8) URL : https://patchwork.freedesktop.org/series/40747/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/icl: Preempt-to-idle support in execlists. -drivers/gpu/drm/i915/selftests/../i915_drv.h:3714:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3716:16: warning: expression using sizeof(void) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gen11: Preempt-to-idle support in execlists. (rev8)
== Series Details ==
Series: drm/i915/gen11: Preempt-to-idle support in execlists. (rev8)
URL : https://patchwork.freedesktop.org/series/40747/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
565cd7090a44 drm/i915/icl: Preempt-to-idle support in execlists.
-:18: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#18:
The advantage of this new preemption path is that one less context switch is
-:153: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written
"!execlists->ctrl_reg"
#153: FILE: drivers/gpu/drm/i915/intel_lrc.c:514:
+ GEM_BUG_ON(execlists->ctrl_reg == NULL);
-:229: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#229: FILE: drivers/gpu/drm/i915/intel_lrc.c:952:
+ if ((status & GEN8_CTX_STATUS_IDLE_ACTIVE) &&
+(status & GEN11_CTX_STATUS_PREEMPT_IDLE)) {
-:263: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#263: FILE: drivers/gpu/drm/i915/intel_lrc.c:982:
+ buf[2*head + 1] == execlists->preempt_complete_status)) {
^
total: 0 errors, 1 warnings, 3 checks, 187 lines checked
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[Intel-gfx] [PATCH 3/3] [CI] drm/i915: Remove HAS_FULL_PPGTT and device_info.ppgtt enum (v2)
With the address range being specified for each platform, we can use
that instead of the .ppgtt enum to handle the differences between
3 level and 4 level PPGTT. In most cases, we really only care if the
platform supports PPGTT or not. Because of this, we can now remove
the HAS_FULL_PPGTT macro and the device info ppgtt field.
Aliasing PPGTT used by GEN 6 is a bit of an exception. For those cases,
it makes just as much sense to check if we're running on GEN 6 as it
does to check a device info flag.
v2: Reword the commit message to make it correct wrt aliasing ppgtt (Chris)
Signed-off-by: Bob Paauwe
CC: Chris Wilson
---
drivers/gpu/drm/i915/i915_drv.c | 7 ++-
drivers/gpu/drm/i915/i915_drv.h | 8 +---
drivers/gpu/drm/i915/i915_gem_context.c | 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 6 --
drivers/gpu/drm/i915/intel_device_info.c| 2 +-
drivers/gpu/drm/i915/intel_device_info.h| 9 +
drivers/gpu/drm/i915/selftests/huge_pages.c | 4 ++--
drivers/gpu/drm/i915/selftests/i915_gem_evict.c | 2 +-
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 2 +-
10 files changed, 19 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 05fe8e2852bd..b957677fbbf0 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -345,7 +345,12 @@ static int i915_getparam_ioctl(struct drm_device *dev,
void *data,
value = HAS_WT(dev_priv);
break;
case I915_PARAM_HAS_ALIASING_PPGTT:
- value = min_t(int, INTEL_PPGTT(dev_priv), I915_GEM_PPGTT_FULL);
+ if (INTEL_GEN(dev_priv) < 6)
+ value = I915_GEM_PPGTT_NONE;
+ else if (IS_GEN6(dev_priv))
+ value = I915_GEM_PPGTT_ALIASING;
+ else
+ value = I915_GEM_PPGTT_FULL;
break;
case I915_PARAM_HAS_SEMAPHORES:
value = HAS_LEGACY_SEMAPHORES(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3ee0d3a283e9..950b0f50ee4a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2582,11 +2582,13 @@ intel_info(const struct drm_i915_private *dev_priv)
#define HAS_EXECLISTS(dev_priv) HAS_LOGICAL_RING_CONTEXTS(dev_priv)
-#define INTEL_PPGTT(dev_priv) (INTEL_INFO(dev_priv)->ppgtt)
+#define INTEL_PPGTT_BITS(dev_priv) (INTEL_INFO(dev_priv)->ppgtt_bits)
#define HAS_PPGTT(dev_priv) \
- (INTEL_PPGTT(dev_priv) != INTEL_PPGTT_NONE)
+ (INTEL_PPGTT_BITS(dev_priv) != 0)
+/*
#define HAS_FULL_PPGTT(dev_priv) \
- (INTEL_PPGTT(dev_priv) >= INTEL_PPGTT_FULL)
+ (INTEL_PPGTT_BITS(dev_priv) >= 31)
+*/
#define HAS_PAGE_SIZES(dev_priv, sizes) ({ \
GEM_BUG_ON((sizes) == 0); \
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index 1853e82cebd5..7bab4754b20c 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -414,7 +414,7 @@ i915_gem_create_context(struct drm_i915_private *dev_priv,
if (IS_ERR(ctx))
return ctx;
- if (HAS_FULL_PPGTT(dev_priv)) {
+ if (INTEL_GEN(dev_priv) > 6) {
struct i915_hw_ppgtt *ppgtt;
ppgtt = i915_ppgtt_create(dev_priv, file_priv);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index b4d5f28474a2..76bb88c8fe6d 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2877,7 +2877,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
/* And finally clear the reserved guard page */
ggtt->vm.clear_range(>vm, ggtt->vm.total - PAGE_SIZE, PAGE_SIZE);
- if (INTEL_PPGTT(dev_priv) == INTEL_PPGTT_ALIASING) {
+ if (IS_GEN6(dev_priv)) {
ret = i915_gem_init_aliasing_ppgtt(dev_priv);
if (ret)
goto err;
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f6e76635c970..816b41674e01 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -249,7 +249,6 @@ static const struct intel_device_info intel_ironlake_m_info
= {
.has_llc = 1, \
.has_rc6 = 1, \
.has_rc6p = 1, \
- .ppgtt = INTEL_PPGTT_ALIASING, \
.ppgtt_bits = 31, \
GEN_DEFAULT_PIPEOFFSETS, \
GEN_DEFAULT_PAGE_SIZES, \
@@ -295,7 +294,6 @@ static const struct intel_device_info
intel_sandybridge_m_gt2_info = {
.has_llc = 1, \
.has_rc6 = 1, \
.has_rc6p = 1, \
- .ppgtt = INTEL_PPGTT_FULL, \
.ppgtt_bits = 31, \
GEN_DEFAULT_PIPEOFFSETS, \
GEN_DEFAULT_PAGE_SIZES, \
@@ -349,7 +347,6 @@ static const struct
[Intel-gfx] [PATCH 1/3] [CI] drm/i915: Make 48bit full ppgtt configuration generic (v10)
48 bit ppgtt device configuration is really just extended address
range full ppgtt and may actually be something other than 48 bits.
Change HAS_FULL_48BIT_PPGTT() to HAS_4LVL_PPGTT() to better
describe that a 4 level walk table extended range PPGTT is being
used. Add a new device info field that specifies the number of
bits to prepare for cases where the range is not 32 or 48 bits.
Also rename other functions and comments from 48bit to 4-level.
Making use of the device info address range for gen6 highlights
simularities in the gen6 and gen8 code paths so move the common
code in to a common function.
v2: Keep HAS_FULL_PPGTT() unchanged (Chris)
v3: Simplify condition in gen8_ppgtt_create() (Chris)
Remove unnecessary line coninuations (Bob)
Rename functions/defines/comments from 48bit to 4lvl (Rodrigo/Bob)
v4: Rename FULL_4LVL_PPGTT to simply 4LVL_PPGTT (Rodrigo)
Be explised in setting vm.total to 1ULL << 32 (Rodrigo)
Gen 7 is 31 bits, not 32 (Chris)
v5: Mock device is 64b(63b) not 48b (Chris)
v6: Rebase to latest drm-tip (Bob)
v7: Combine common code for gen6/gen8 ppgtt create (Chris)
Improve comment on device info field (Chris)
v8: gvt is actually full ppgtt (both 3-lvl and 4-lvl) so name cap
define appropriately (Chris)
v9: rebase on latest
v10: fix missed vgpu change of FULL_48BIT to FULL in CAPS define (Bob)
Signed-off-by: Bob Paauwe
CC: Rodrigo Vivi
CC: Michel Thierry
CC: Chris Wilson
---
drivers/gpu/drm/i915/gvt/vgpu.c | 2 +-
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_gem_context.c | 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 130 --
drivers/gpu/drm/i915/i915_gem_gtt.h | 4 +-
drivers/gpu/drm/i915/i915_pci.c | 6 +
drivers/gpu/drm/i915/i915_pvinfo.h| 2 +-
drivers/gpu/drm/i915/i915_vgpu.c | 4 +-
drivers/gpu/drm/i915/i915_vgpu.h | 2 +-
drivers/gpu/drm/i915/intel_device_info.c | 1 +
drivers/gpu/drm/i915/intel_device_info.h | 3 +
drivers/gpu/drm/i915/intel_lrc.c | 6 +-
drivers/gpu/drm/i915/selftests/huge_pages.c | 8 +-
.../gpu/drm/i915/selftests/mock_gem_device.c | 2 +
15 files changed, 85 insertions(+), 91 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c
index c628be05fbfe..fb0f46bec9e6 100644
--- a/drivers/gpu/drm/i915/gvt/vgpu.c
+++ b/drivers/gpu/drm/i915/gvt/vgpu.c
@@ -44,7 +44,7 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu)
vgpu_vreg_t(vgpu, vgtif_reg(display_ready)) = 0;
vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) = vgpu->id;
- vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_48BIT_PPGTT;
+ vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_PPGTT;
vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION;
vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HUGE_GTT;
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index acb516308262..05fe8e2852bd 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1367,7 +1367,7 @@ static int i915_driver_init_hw(struct drm_i915_private
*dev_priv)
if (HAS_PPGTT(dev_priv)) {
if (intel_vgpu_active(dev_priv) &&
- !intel_vgpu_has_full_48bit_ppgtt(dev_priv)) {
+ !intel_vgpu_has_4lvl_ppgtt(dev_priv)) {
i915_report_error(dev_priv,
"incompatible vGPU found, support for
isolated ppGTT required\n");
return -ENXIO;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0c8438de3c1b..97649c5614c9 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2587,7 +2587,7 @@ intel_info(const struct drm_i915_private *dev_priv)
(INTEL_PPGTT(dev_priv) != INTEL_PPGTT_NONE)
#define HAS_FULL_PPGTT(dev_priv) \
(INTEL_PPGTT(dev_priv) >= INTEL_PPGTT_FULL)
-#define HAS_FULL_48BIT_PPGTT(dev_priv) \
+#define HAS_4LVL_PPGTT(dev_priv) \
(INTEL_PPGTT(dev_priv) >= INTEL_PPGTT_FULL_4LVL)
#define HAS_PAGE_SIZES(dev_priv, sizes) ({ \
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index b97963db0287..1853e82cebd5 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -307,7 +307,7 @@ static u32 default_desc_template(const struct
drm_i915_private *i915,
desc = GEN8_CTX_VALID | GEN8_CTX_PRIVILEGE;
address_mode = INTEL_LEGACY_32B_CONTEXT;
- if (ppgtt && i915_vm_is_48bit(>vm))
+ if (ppgtt && i915_vm_is_4lvl(>vm))
address_mode = INTEL_LEGACY_64B_CONTEXT;
desc |= address_mode << GEN8_CTX_ADDRESSING_MODE_SHIFT;
diff --git
[Intel-gfx] [PATCH 2/3] [CI] drm/i915: Remove HAS_4LVL_PPGTT
We no longer need to differentiate between 4LVL and FULL ppgtt as
the number of bits in the address range provides that information now.
Signed-off-by: Bob Paauwe
---
drivers/gpu/drm/i915/i915_drv.h | 2 --
drivers/gpu/drm/i915/i915_pci.c | 4 ++--
drivers/gpu/drm/i915/intel_device_info.h| 1 -
drivers/gpu/drm/i915/selftests/huge_pages.c | 4 ++--
4 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 97649c5614c9..3ee0d3a283e9 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2587,8 +2587,6 @@ intel_info(const struct drm_i915_private *dev_priv)
(INTEL_PPGTT(dev_priv) != INTEL_PPGTT_NONE)
#define HAS_FULL_PPGTT(dev_priv) \
(INTEL_PPGTT(dev_priv) >= INTEL_PPGTT_FULL)
-#define HAS_4LVL_PPGTT(dev_priv) \
- (INTEL_PPGTT(dev_priv) >= INTEL_PPGTT_FULL_4LVL)
#define HAS_PAGE_SIZES(dev_priv, sizes) ({ \
GEM_BUG_ON((sizes) == 0); \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index d9686bc22f68..f6e76635c970 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -397,7 +397,7 @@ static const struct intel_device_info
intel_haswell_gt3_info = {
.page_sizes = I915_GTT_PAGE_SIZE_4K | \
I915_GTT_PAGE_SIZE_2M, \
.has_logical_ring_contexts = 1, \
- .ppgtt = INTEL_PPGTT_FULL_4LVL, \
+ .ppgtt = INTEL_PPGTT_FULL, \
.ppgtt_bits = 48, \
.has_64bit_reloc = 1, \
.has_reset_engine = 1
@@ -519,7 +519,7 @@ static const struct intel_device_info
intel_skylake_gt4_info = {
.has_logical_ring_contexts = 1, \
.has_logical_ring_preemption = 1, \
.has_guc = 1, \
- .ppgtt = INTEL_PPGTT_FULL_4LVL, \
+ .ppgtt = INTEL_PPGTT_FULL, \
.ppgtt_bits = 48, \
.has_reset_engine = 1, \
.has_snoop = true, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h
b/drivers/gpu/drm/i915/intel_device_info.h
index 78df4de37665..4d45d5eab65d 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -80,7 +80,6 @@ enum intel_ppgtt {
INTEL_PPGTT_NONE = I915_GEM_PPGTT_NONE,
INTEL_PPGTT_ALIASING = I915_GEM_PPGTT_ALIASING,
INTEL_PPGTT_FULL = I915_GEM_PPGTT_FULL,
- INTEL_PPGTT_FULL_4LVL,
};
#define DEV_INFO_FOR_EACH_FLAG(func) \
diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c
b/drivers/gpu/drm/i915/selftests/huge_pages.c
index 8cc8ed75f941..c49ace1a4685 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -1450,7 +1450,7 @@ static int igt_ppgtt_pin_update(void *arg)
* huge-gtt-pages.
*/
- if (!HAS_4LVL_PPGTT(dev_priv)) {
+ if (INTEL_INFO(dev_priv)->ppgtt_bits <= 32) {
pr_info("Extended range PPGTT not supported, skipping\n");
return 0;
}
@@ -1711,7 +1711,7 @@ int i915_gem_huge_page_mock_selftests(void)
return -ENOMEM;
/* Pretend to be a device which supports the 48b PPGTT */
- mkwrite_device_info(dev_priv)->ppgtt = INTEL_PPGTT_FULL_4LVL;
+ mkwrite_device_info(dev_priv)->ppgtt = INTEL_PPGTT_FULL;
pdev = dev_priv->drm.pdev;
dma_coerce_mask_and_coherent(>dev, DMA_BIT_MASK(39));
--
2.17.1
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Re: [Intel-gfx] [PATCH 36/36] drm/i915: Support per-context user requests for GPU frequency control
I think we have some interest in reviving this for the performance query use case. Is that on anybody's todo list? Thanks, - Lionel On 14/03/2018 09:37, Chris Wilson wrote: Often, we find ourselves facing a workload where the user knows in advance what GPU frequency they require for it to complete in a timely manner, and using past experience they can outperform the HW assisted RPS autotuning. An example might be kodi (HTPC) where they know that video decoding and compositing require a minimum frequency to avoid ever dropping a frame, or conversely know when they are in a powersaving mode and would rather have slower updates than ramp up the GPU frequency and power consumption. Other workloads may defeat the autotuning entirely and need manual control to meet their performance goals, e.g. bursty applications which require low latency. To accommodate the varying needs of different applications, that may be running concurrently, we want a more flexible system than a global limit supplied by sysfs. To this end, we offer the application the option to set their desired frequency bounds on the context itself, and apply those bounds when we execute commands from the application, switching between bounds just as easily as we switch between the clients themselves. The clients can query the range supported by the HW, or at least the range they are restricted to, and then freely select frequencies within that range that they want to run at. (They can select just a single frequency if they so choose.) As this is subject to the global limit supplied by the user in sysfs, and a client can only reduce the range of frequencies they allow the HW to run at, we allow all clients to adjust their request (and not restrict raising the minimum to privileged CAP_SYS_NICE clients). Testcase: igt/gem_ctx_freq Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: Tvrtko Ursulin Cc: Praveen Paneri Cc: Sagar A Kamble --- drivers/gpu/drm/i915/i915_debugfs.c| 16 ++- drivers/gpu/drm/i915/i915_drv.h| 5 + drivers/gpu/drm/i915/i915_gem_context.c| 54 + drivers/gpu/drm/i915/i915_gem_context.h| 3 + drivers/gpu/drm/i915/intel_gt_pm.c | 121 --- drivers/gpu/drm/i915/intel_gt_pm.h | 4 + drivers/gpu/drm/i915/intel_guc_submission.c| 16 ++- drivers/gpu/drm/i915/intel_lrc.c | 15 +++ .../gpu/drm/i915/selftests/i915_mock_selftests.h | 1 + drivers/gpu/drm/i915/selftests/intel_gt_pm.c | 130 + include/uapi/drm/i915_drm.h| 20 11 files changed, 368 insertions(+), 17 deletions(-) create mode 100644 drivers/gpu/drm/i915/selftests/intel_gt_pm.c diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 7c7afdac8c8c..a21b9164ade8 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2191,6 +2191,7 @@ static int i915_rps_boost_info(struct seq_file *m, void *data) struct drm_device *dev = _priv->drm; struct intel_rps *rps = _priv->gt_pm.rps; struct drm_file *file; + int n; seq_printf(m, "GPU busy? %s [%d requests]\n", yesno(dev_priv->gt.awake), dev_priv->gt.active_requests); @@ -2198,17 +2199,30 @@ static int i915_rps_boost_info(struct seq_file *m, void *data) seq_printf(m, "CPU waiting? %d\n", count_irq_waiters(dev_priv)); seq_printf(m, "Boosts outstanding? %d\n", atomic_read(>num_waiters)); + seq_printf(m, "Worker pending? %s\n", yesno(work_busy(>work))); seq_printf(m, "Frequency requested %d [%d, %d]\n", intel_gpu_freq(dev_priv, rps->freq), intel_gpu_freq(dev_priv, rps->min), intel_gpu_freq(dev_priv, rps->max)); - seq_printf(m, " min hard:%d, soft:%d user:%d; max user:%d, soft: %d hard:%d\n", + seq_printf(m, " min hard:%d, soft:%d, ctx:%d, user:%d; max user:%d, ctx:%d, soft:%d, hard:%d\n", intel_gpu_freq(dev_priv, rps->min_freq_hw), intel_gpu_freq(dev_priv, rps->min_freq_soft), + intel_gpu_freq(dev_priv, rps->min_freq_context), intel_gpu_freq(dev_priv, rps->min_freq_user), intel_gpu_freq(dev_priv, rps->max_freq_user), + intel_gpu_freq(dev_priv, rps->max_freq_context), intel_gpu_freq(dev_priv, rps->max_freq_soft), intel_gpu_freq(dev_priv, rps->max_freq_hw)); + seq_printf(m, " engines min: ["); + for (n = 0; n < ARRAY_SIZE(rps->min_freq_engine); n++) + seq_printf(m, "%s%d", n ? ", " : "", + intel_gpu_freq(dev_priv, rps->min_freq_engine[n])); + seq_printf(m, "]\n engines max: ["); + for (n = 0; n < ARRAY_SIZE(rps->max_freq_engine); n++) +
Re: [Intel-gfx] [PATCH 1/3] drm/i915/gen9_bc: Work around DMC bug zeroing power well requests
On Fri, Nov 09, 2018 at 05:04:40PM +0200, Ville Syrjälä wrote:
> On Fri, Nov 09, 2018 at 04:58:20PM +0200, Imre Deak wrote:
> > A DMC bug on GEN9 big core machines fails to restore the driver's
> > request bits for the PW1 and MISC_IO power wells after a DC5/6
> > entry->exit sequence. As a consequence the driver's subsequent check for
> > the enabled status of these power wells will fail, as the check
> > considers the power wells being enabled only if both the status and
> > request bits are set. To work around this borrow the request bits from
> > BIOS's own request register in which DMC forces on the request bits when
> > exiting from DC5/6.
> >
> > This fixes a problem reported by Ramalingam, where HDCP init failed,
> > since PW1 reported itself as being disabled, while in reality it was
> > enabled.
> >
> > Reported-by: Ramalingam C
> > Cc: Ramalingam C
> > Cc: Daniel Vetter
> > Cc: Ville Syrjälä
> > Signed-off-by: Imre Deak
> > ---
> > drivers/gpu/drm/i915/intel_runtime_pm.c | 16 +++-
> > 1 file changed, 15 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index f945db6ea420..9c49b876055d 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -493,11 +493,25 @@ static bool hsw_power_well_enabled(struct
> > drm_i915_private *dev_priv,
> >struct i915_power_well *power_well)
> > {
> > const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
> > + enum i915_power_well_id id = power_well->desc->id;
> > int pw_idx = power_well->desc->hsw.idx;
> > u32 mask = HSW_PWR_WELL_CTL_REQ(pw_idx) |
> >HSW_PWR_WELL_CTL_STATE(pw_idx);
> > + u32 val;
> > +
> > + val = I915_READ(regs->driver);
> > +
> > + /*
> > +* On GEN9 big core due to a DMC bug the driver's request bits for PW1
> > +* and the MISC_IO PW will be not restored, so check instead for the
> > +* BIOS's own request bits, which are forced-on for these power wells
> > +* when exiting DC5/6.
> > +*/
> > + if (IS_GEN9(dev_priv) && !IS_GEN9_LP(dev_priv) &&
>
> IS_GEN9_BC() ?
Yep, should've known there must be a macro for this already :/
>
> Apart from that
> Reviewed-by: Ville Syrjälä
>
> > + (id == SKL_DISP_PW_1 || id == SKL_DISP_PW_MISC_IO))
> > + val |= I915_READ(regs->bios);
> >
> > - return (I915_READ(regs->driver) & mask) == mask;
> > + return (val & mask) == mask;
> > }
> >
> > static void assert_can_enable_dc9(struct drm_i915_private *dev_priv)
> > --
> > 2.13.2
>
> --
> Ville Syrjälä
> Intel
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Handle -EDEADLK from ironlake_check_fdi_lanes()
== Series Details == Series: series starting with [1/3] drm/i915: Handle -EDEADLK from ironlake_check_fdi_lanes() URL : https://patchwork.freedesktop.org/series/52191/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5115 -> Patchwork_10796 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/52191/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10796 that come from known issues: === IGT changes === Issues hit igt@drv_module_reload@basic-reload: fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718) igt@gem_ctx_switch@basic-default: fi-icl-u2: PASS -> DMESG-WARN (fdo#107724) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362) Possible fixes igt@gem_ctx_create@basic-files: fi-icl-u2: DMESG-WARN (fdo#107724) -> PASS igt@kms_frontbuffer_tracking@basic: fi-icl-u2: FAIL (fdo#103167) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724 == Participating hosts (52 -> 45) == Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-pnv-d510 fi-icl-u == Build changes == * Linux: CI_DRM_5115 -> Patchwork_10796 CI_DRM_5115: 95830469c0077bb86031e794106fdd7781369625 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10796: bb90c8eac186682956168a680f55bf95afdf7f9b @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == bb90c8eac186 drm/i915: Clean up the baseline bpp computation cf1be25f9c7a drm/i915: Remove pointless goto fail 7f7a78ce3234 drm/i915: Handle -EDEADLK from ironlake_check_fdi_lanes() == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10796/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm: Check if primary mst is null
Pushed with small changes to drm-misc-fixes: Renamed patch and added stable Cc
Thanks!
On Fri, 2018-11-09 at 11:00 +0200, Stanislav Lisovskiy wrote:
> Unfortunately drm_dp_get_mst_branch_device which is called from both
> drm_dp_mst_handle_down_rep and drm_dp_mst_handle_up_rep seem to rely
> on that mgr->mst_primary is not NULL, which seem to be wrong as it can be
> cleared with simultaneous mode set, if probing fails or in other case.
> mgr->lock mutex doesn't protect against that as it might just get
> assigned to NULL right before, not simultaneously.
>
> There are currently bugs 107738, 108616 bugs which crash in
> drm_dp_get_mst_branch_device, caused by this issue.
>
> v2: Refactored the code, as it was nicely noticed.
> Fixed Bugzilla bug numbers(second was 108616, but not 108816)
> and added links.
>
> Reviewed-by: Lyude Paul
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108616
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107738
> Signed-off-by: Stanislav Lisovskiy
> ---
> drivers/gpu/drm/drm_dp_mst_topology.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
> b/drivers/gpu/drm/drm_dp_mst_topology.c
> index 5ff1d79b86c4..0e0df398222d 100644
> --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> @@ -1275,6 +1275,9 @@ static struct drm_dp_mst_branch
> *drm_dp_get_mst_branch_device(struct drm_dp_mst_
> mutex_lock(>lock);
> mstb = mgr->mst_primary;
>
> + if (!mstb)
> + goto out;
> +
> for (i = 0; i < lct - 1; i++) {
> int shift = (i % 2) ? 0 : 4;
> int port_num = (rad[i / 2] >> shift) & 0xf;
--
Cheers,
Lyude Paul
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Re: [Intel-gfx] [PATCH v2 02/14] drm/i915: Clean up skl_program_scaler()
On Wed, Nov 07, 2018 at 08:29:53PM +0200, Ville Syrjälä wrote:
> On Thu, Nov 01, 2018 at 11:13:50AM -0700, Rodrigo Vivi wrote:
> > On Thu, Nov 01, 2018 at 05:17:36PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Remove the "sizes are 0 based" stuff that is not even true for the
> > > scaler.
> > >
> > > v2: Rebase
> > >
> > > Signed-off-by: Ville Syrjälä
> >
> > Reviewed-by: Rodrigo Vivi
>
> Thanks. First two patches pushed.
And now also 3-5 and 8. The rest had some amount of discussion still
happening, so I'll refrain from pushing more until I address Matt's
comments and repost the remaining patches.
Thanks for the reviews so far.
>
> >
> > > ---
> > > drivers/gpu/drm/i915/intel_sprite.c | 18 +-
> > > 1 file changed, 5 insertions(+), 13 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_sprite.c
> > > b/drivers/gpu/drm/i915/intel_sprite.c
> > > index 30b7485f1992..a77a17fda692 100644
> > > --- a/drivers/gpu/drm/i915/intel_sprite.c
> > > +++ b/drivers/gpu/drm/i915/intel_sprite.c
> > > @@ -310,12 +310,11 @@ skl_plane_max_stride(struct intel_plane *plane,
> > > }
> > >
> > > static void
> > > -skl_program_scaler(struct drm_i915_private *dev_priv,
> > > -struct intel_plane *plane,
> > > +skl_program_scaler(struct intel_plane *plane,
> > > const struct intel_crtc_state *crtc_state,
> > > const struct intel_plane_state *plane_state)
> > > {
> > > - enum plane_id plane_id = plane->id;
> > > + struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> > > enum pipe pipe = plane->pipe;
> > > int scaler_id = plane_state->scaler_id;
> > > const struct intel_scaler *scaler =
> > > @@ -327,10 +326,6 @@ skl_program_scaler(struct drm_i915_private *dev_priv,
> > > u16 y_hphase, uv_rgb_hphase;
> > > u16 y_vphase, uv_rgb_vphase;
> > >
> > > - /* Sizes are 0 based */
> > > - crtc_w--;
> > > - crtc_h--;
> > > -
> > > /* TODO: handle sub-pixel coordinates */
> > > if (plane_state->base.fb->format->format == DRM_FORMAT_NV12 &&
> > > !icl_is_hdr_plane(plane)) {
> > > @@ -350,15 +345,14 @@ skl_program_scaler(struct drm_i915_private
> > > *dev_priv,
> > > }
> > >
> > > I915_WRITE_FW(SKL_PS_CTRL(pipe, scaler_id),
> > > - PS_SCALER_EN | PS_PLANE_SEL(plane_id) | scaler->mode);
> > > + PS_SCALER_EN | PS_PLANE_SEL(plane->id) | scaler->mode);
> > > I915_WRITE_FW(SKL_PS_PWR_GATE(pipe, scaler_id), 0);
> > > I915_WRITE_FW(SKL_PS_VPHASE(pipe, scaler_id),
> > > PS_Y_PHASE(y_vphase) | PS_UV_RGB_PHASE(uv_rgb_vphase));
> > > I915_WRITE_FW(SKL_PS_HPHASE(pipe, scaler_id),
> > > PS_Y_PHASE(y_hphase) | PS_UV_RGB_PHASE(uv_rgb_hphase));
> > > I915_WRITE_FW(SKL_PS_WIN_POS(pipe, scaler_id), (crtc_x << 16) | crtc_y);
> > > - I915_WRITE_FW(SKL_PS_WIN_SZ(pipe, scaler_id),
> > > - ((crtc_w + 1) << 16)|(crtc_h + 1));
> > > + I915_WRITE_FW(SKL_PS_WIN_SZ(pipe, scaler_id), (crtc_w << 16) | crtc_h);
> > > }
> > >
> > > static void
> > > @@ -441,11 +435,9 @@ skl_program_plane(struct intel_plane *plane,
> > > I915_WRITE_FW(PLANE_CUS_CTL(pipe, plane_id), cus_ctl);
> > > }
> > >
> > > - /* program plane scaler */
> > > if (plane_state->scaler_id >= 0) {
> > > if (!slave)
> > > - skl_program_scaler(dev_priv, plane,
> > > -crtc_state, plane_state);
> > > + skl_program_scaler(plane, crtc_state, plane_state);
> > >
> > > I915_WRITE_FW(PLANE_POS(pipe, plane_id), 0);
> > > } else {
> > > --
> > > 2.18.1
> > >
> > > ___
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel
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--
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Intel
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[Intel-gfx] [PATCH v6] drm/i915/icl: Preempt-to-idle support in execlists.
The patch adds support of preempt-to-idle requesting by setting a proper
bit within Execlist Control Register, and receiving preemption result from
Context Status Buffer.
Preemption in previous gens required a special batch buffer to be executed,
so the Command Streamer never preempted to idle directly. In Icelake it is
possible, as there is a hardware mechanism to inform the kernel about
status of the preemption request.
This patch does not cover using the new preemption mechanism when GuC is
active.
The advantage of this new preemption path is that one less context switch is
needed, and returning information about preempion being complete is received
earlier. This leads to significant improvement in our IGT latency test.
Test performed: `gem_exec_latency --run-subtest render-preemption`, executed
100 times, on the same platform, same kernel, without and with this patch.
Then taken average of the execution latency times:
subcase old preempt.icl preempt.
render-render 853.2036840.1176
render-bsd 2328.8708 2083.2576
render-blt 2080.1501 1852.0792
render-vebox1553.5134 1428.762
Improvement observed:
subcase improvement
render-render1.53%
render-bsd 10.55%
render-blt 10.96%
render-vebox 8.03%
v2: Added needs_preempt_context() change so that it is not created when
preempt-to-idle is supported. (Chris)
Updated setting HWACK flag so that it is cleared after
preempt-to-dle. (Chris, Daniele)
Updated to use I915_ENGINE_HAS_PREEMPTION flag. (Chris)
v3: Fixed needs_preempt_context() change. (Chris)
Merged preemption trigger functions to one. (Chris)
Fixed conyext state tonot assume COMPLETED_MASK after preemption,
since idle-to-idle case will not have it set.
v4: Simplified needs_preempt_context() change. (Daniele)
Removed clearing HWACK flag in idle-to-idle preempt. (Daniele)
v5: Renamed inject_preempt_context(). (Daniele)
Removed duplicated GEM_BUG_ON() on HWACK (Daniele)
v6: Added performance test results.
Bspec: 18922
Cc: Joonas Lahtinen
Cc: Chris Wilson
Cc: Daniele Ceraolo Spurio
Cc: Michal Winiarski
Cc: Mika Kuoppala
Reviewed-by: Daniele Ceraolo Spurio
Signed-off-by: Tomasz Lis
---
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_gem_context.c | 3 +-
drivers/gpu/drm/i915/i915_pci.c | 3 +-
drivers/gpu/drm/i915/intel_device_info.h | 1 +
drivers/gpu/drm/i915/intel_lrc.c | 109 +--
drivers/gpu/drm/i915/intel_lrc.h | 1 +
6 files changed, 84 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 08d25aa..d2cc9f1 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2579,6 +2579,8 @@ intel_info(const struct drm_i915_private *dev_priv)
((dev_priv)->info.has_logical_ring_elsq)
#define HAS_LOGICAL_RING_PREEMPTION(dev_priv) \
((dev_priv)->info.has_logical_ring_preemption)
+#define HAS_HW_PREEMPT_TO_IDLE(dev_priv) \
+ ((dev_priv)->info.has_hw_preempt_to_idle)
#define HAS_EXECLISTS(dev_priv) HAS_LOGICAL_RING_CONTEXTS(dev_priv)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index b97963d..10b1d61 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -529,7 +529,8 @@ static void init_contexts(struct drm_i915_private *i915)
static bool needs_preempt_context(struct drm_i915_private *i915)
{
- return HAS_LOGICAL_RING_PREEMPTION(i915);
+ return HAS_LOGICAL_RING_PREEMPTION(i915) &&
+ !HAS_HW_PREEMPT_TO_IDLE(i915);
}
int i915_gem_contexts_init(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 4ccab83..82125cf 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -600,7 +600,8 @@ static const struct intel_device_info intel_cannonlake_info
= {
TRANSCODER_DSI0_OFFSET, TRANSCODER_DSI1_OFFSET}, \
GEN(11), \
.ddb_size = 2048, \
- .has_logical_ring_elsq = 1
+ .has_logical_ring_elsq = 1, \
+ .has_hw_preempt_to_idle = 1
static const struct intel_device_info intel_icelake_11_info = {
GEN11_FEATURES,
diff --git a/drivers/gpu/drm/i915/intel_device_info.h
b/drivers/gpu/drm/i915/intel_device_info.h
index 86ce1db..a2ee278 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -104,6 +104,7 @@ enum intel_ppgtt {
func(has_logical_ring_contexts); \
func(has_logical_ring_elsq); \
func(has_logical_ring_preemption); \
+ func(has_hw_preempt_to_idle); \
func(has_overlay); \
func(has_pooled_eu); \
func(has_psr); \
diff --git a/drivers/gpu/drm/i915/intel_lrc.c
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/gen9_bc: Work around DMC bug zeroing power well requests
== Series Details == Series: series starting with [1/3] drm/i915/gen9_bc: Work around DMC bug zeroing power well requests URL : https://patchwork.freedesktop.org/series/52302/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5115 -> Patchwork_10795 = == Summary - WARNING == Minor unknown changes coming with Patchwork_10795 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10795, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/52302/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10795: === IGT changes === Warnings igt@drv_selftest@live_guc: fi-icl-u: PASS -> SKIP +2 == Known issues == Here are the changes found in Patchwork_10795 that come from known issues: === IGT changes === Issues hit igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence: fi-byt-clapper: PASS -> FAIL (fdo#107362, fdo#103191) +1 igt@kms_pipe_crc_basic@read-crc-pipe-a: fi-byt-clapper: PASS -> FAIL (fdo#107362) Possible fixes igt@kms_frontbuffer_tracking@basic: fi-icl-u2: FAIL (fdo#103167) -> PASS Warnings igt@drv_selftest@live_contexts: fi-icl-u: DMESG-FAIL (fdo#108569) -> INCOMPLETE (fdo#108315) fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569 == Participating hosts (52 -> 47) == Missing(5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 == Build changes == * Linux: CI_DRM_5115 -> Patchwork_10795 CI_DRM_5115: 95830469c0077bb86031e794106fdd7781369625 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10795: 3ee8d9251fe6ab2126286deb5710dfb7789fe5f0 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 3ee8d9251fe6 drm/i915: Remove special case for power well 1/MISC_IO state verification 41c5c0fe774c drm/i915: Use proper bool bitfield initializer in power well descs 426d5741f641 drm/i915/gen9_bc: Work around DMC bug zeroing power well requests == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10795/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/ddi: Add more sanity check to the encoder HW readout
== Series Details == Series: series starting with [1/2] drm/i915/ddi: Add more sanity check to the encoder HW readout URL : https://patchwork.freedesktop.org/series/52187/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5100_full -> Patchwork_10758_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10758_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10758_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10758_full: === IGT changes === Warnings igt@gem_exec_capture@capture-bsd2: shard-snb: SKIP -> ( 2 SKIP ) +1156 igt@gem_exec_reloc@basic-cpu-gtt-noreloc: shard-skl: PASS -> ( 2 PASS ) +792 igt@gem_pwrite@small-cpu-fbr: shard-kbl: PASS -> ( 2 PASS ) +1783 igt@gem_userptr_blits@map-fixed-invalidate-overlap: shard-glk: PASS -> ( 2 PASS ) +1601 igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-f: shard-hsw: SKIP -> ( 2 SKIP ) +983 igt@kms_flip@bo-too-big-interruptible: shard-snb: PASS -> ( 2 PASS ) +1183 igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-render: shard-glk: SKIP -> ( 2 SKIP ) +639 igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc: shard-kbl: SKIP -> ( 2 SKIP ) +683 igt@kms_rotation_crc@sprite-rotation-90-pos-100-0: shard-apl: PASS -> ( 2 PASS ) +1732 igt@perf_pmu@rc6: shard-kbl: SKIP -> ( 1 PASS, 1 SKIP ) igt@perf_pmu@semaphore-wait-vcs1: shard-skl: SKIP -> ( 2 SKIP ) +302 igt@pm_rc6_residency@rc6-accuracy: shard-snb: PASS -> ( 2 SKIP ) igt@prime_vgem@sync-bsd1: shard-apl: SKIP -> ( 2 SKIP ) +816 igt@syncobj_basic@bad-create-flags: shard-hsw: PASS -> ( 2 PASS ) +1797 igt@tools_test@tools_test: shard-kbl: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_10758_full that come from known issues: === IGT changes === Issues hit igt@gem_exec_suspend@basic-s3: shard-kbl: PASS -> FAIL (fdo#103375) igt@kms_atomic@plane_cursor_legacy: shard-glk: PASS -> ( 1 INCOMPLETE, 1 PASS ) (fdo#103359, k.org#198133) igt@kms_color@pipe-a-degamma: shard-apl: PASS -> ( 1 FAIL, 1 PASS ) (fdo#108145, fdo#104782) igt@kms_color@pipe-b-legacy-gamma: shard-apl: PASS -> ( 2 FAIL ) (fdo#104782) igt@kms_cursor_crc@cursor-128x128-offscreen: shard-skl: PASS -> ( 1 FAIL, 1 PASS ) (fdo#103232) +1 igt@kms_cursor_crc@cursor-128x128-random: shard-glk: PASS -> ( 2 FAIL ) (fdo#103232) igt@kms_cursor_crc@cursor-128x128-suspend: shard-apl: PASS -> ( 1 FAIL, 1 PASS ) (fdo#103191, fdo#103232) igt@kms_cursor_crc@cursor-128x42-onscreen: shard-apl: PASS -> ( 1 FAIL, 1 PASS ) (fdo#103232) +1 igt@kms_cursor_crc@cursor-256x256-suspend: shard-skl: PASS -> ( 1 INCOMPLETE, 1 PASS ) (fdo#104108) shard-apl: PASS -> ( 2 FAIL ) (fdo#103191, fdo#103232) igt@kms_cursor_legacy@cursora-vs-flipa-toggle: shard-glk: PASS -> ( 2 DMESG-WARN ) (fdo#105763, fdo#106538) igt@kms_draw_crc@draw-method-rgb565-mmap-wc-untiled: shard-skl: PASS -> ( 2 FAIL ) (fdo#103184) igt@kms_flip@flip-vs-expired-vblank: shard-glk: PASS -> ( 1 FAIL, 1 PASS ) (fdo#105363, fdo#102887) igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-glk: PASS -> ( 1 FAIL, 1 PASS ) (fdo#105363) igt@kms_flip_tiling@flip-to-y-tiled: shard-skl: PASS -> ( 1 FAIL, 1 PASS ) (fdo#107931) +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: shard-apl: PASS -> ( 1 FAIL, 1 PASS ) (fdo#103167) +4 igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc: shard-glk: PASS -> ( 2 FAIL ) (fdo#103167) +2 igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt: shard-glk: PASS -> ( 1 FAIL, 1 PASS ) (fdo#103167) +3 igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-pgflip-blt: shard-apl: SKIP -> ( 1 INCOMPLETE, 1 SKIP ) (fdo#103927) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: shard-skl: PASS -> ( 1 INCOMPLETE, 1 PASS ) (fdo#104108, fdo#107773) igt@kms_plane@pixel-format-pipe-a-planes: shard-apl: PASS -> ( 1 FAIL, 1 PASS ) (fdo#103166) +2 igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: shard-skl: PASS -> ( 1 FAIL, 1 PASS ) (fdo#107815)
Re: [Intel-gfx] [PATCH xf86-video-intel v7 2/2] sna: Added AYUV format support for textured and sprite video adapters.
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Friday, November 9, 2018 6:12 PM
> To: Lisovskiy, Stanislav ; intel-
> g...@lists.freedesktop.org
> Cc: Syrjala, Ville ; Peres, Martin
> ; Lisovskiy, Stanislav
> ;
> Heikkila, Juha-pekka ;
> maarten.lankho...@linux.intel.com
> Subject: Re: [PATCH xf86-video-intel v7 2/2] sna: Added AYUV format support
> for textured and sprite video adapters.
>
> Quoting Stanislav Lisovskiy (2018-11-09 14:14:40)
> > diff --git a/src/sna/sna_video_textured.c
> > b/src/sna/sna_video_textured.c index a784fe2e..46c213ef 100644
> > --- a/src/sna/sna_video_textured.c
> > +++ b/src/sna/sna_video_textured.c
> > @@ -68,6 +68,7 @@ static const XvImageRec gen4_Images[] = {
> > XVIMAGE_I420,
> > XVIMAGE_NV12,
> > XVIMAGE_UYVY,
> > + XVIMAGE_AYUV,
> > XVMC_YUV,
> > };
>
> This exposes the format to all gen4+ machines, but you've only added the
> sampling kernel to gen9?
Apparently there was no other architecture available in sna_video_textured.c,
like gen9_images. Looks like it either chooses gen2, gen3 or gen4_images for
the rest in sna_video_textured_setup function.
> -Chris
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Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v3,1/3] drm/i915: Reuse the aux_domain cached
On Fri, Nov 09, 2018 at 03:29:27PM +, Patchwork wrote: > == Series Details == > > Series: series starting with [v3,1/3] drm/i915: Reuse the aux_domain cached > URL : https://patchwork.freedesktop.org/series/52194/ > State : success > > == Summary == > > = CI Bug Log - changes from CI_DRM_5105_full -> Patchwork_10778_full = > > == Summary - WARNING == > > Minor unknown changes coming with Patchwork_10778_full need to be verified > manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_10778_full, please notify your bug team to allow > them > to document this new failure mode, which will reduce false positives in CI. > > > > == Possible new issues == > > Here are the unknown changes that may have been introduced in > Patchwork_10778_full: > > === IGT changes === > > Warnings > > igt@perf_pmu@rc6: > shard-kbl: PASS -> SKIP Looks like https://bugs.freedesktop.org/show_bug.cgi?id=108664 . I pushed the series to -dinq, thanks for the fix and reviews. > > > == Known issues == > > Here are the changes found in Patchwork_10778_full that come from known > issues: > > === IGT changes === > > Issues hit > > igt@kms_cursor_crc@cursor-128x128-random: > shard-apl: PASS -> FAIL (fdo#103232) +2 > > igt@kms_draw_crc@draw-method-rgb565-mmap-wc-untiled: > shard-skl: PASS -> FAIL (fdo#103184) > > igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt: > shard-apl: PASS -> FAIL (fdo#103167) > > igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff: > shard-glk: PASS -> FAIL (fdo#103167) +1 > > igt@kms_plane@pixel-format-pipe-b-planes: > shard-apl: PASS -> FAIL (fdo#103166) > > igt@kms_plane_multiple@atomic-pipe-a-tiling-x: > shard-glk: PASS -> FAIL (fdo#103166) > > igt@pm_rpm@modeset-lpsp-stress: > shard-skl: PASS -> INCOMPLETE (fdo#107807) +1 > > > Possible fixes > > igt@drm_import_export@import-close-race-flink: > shard-skl: TIMEOUT (fdo#108667) -> PASS > > igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: > shard-skl: DMESG-WARN (fdo#107956) -> PASS > > igt@kms_color@pipe-b-legacy-gamma: > shard-apl: FAIL (fdo#104782) -> PASS > > igt@kms_cursor_crc@cursor-256x256-suspend: > shard-apl: FAIL (fdo#103232, fdo#103191) -> PASS > > igt@kms_cursor_crc@cursor-64x64-random: > shard-glk: FAIL (fdo#103232) -> PASS > > igt@kms_cursor_crc@cursor-size-change: > shard-apl: FAIL (fdo#103232) -> PASS > > igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: > shard-glk: FAIL (fdo#105363) -> PASS > > igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: > shard-apl: FAIL (fdo#103167) -> PASS +1 > > igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite: > shard-glk: FAIL (fdo#103167) -> PASS +2 > > igt@kms_frontbuffer_tracking@psr-suspend: > shard-skl: INCOMPLETE (fdo#106978, fdo#104108, fdo#107773) -> > PASS > > igt@kms_plane@plane-position-covered-pipe-b-planes: > shard-glk: FAIL (fdo#103166) -> PASS > > igt@kms_plane_multiple@atomic-pipe-a-tiling-x: > shard-apl: FAIL (fdo#103166) -> PASS +1 > > > fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 > fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 > fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184 > fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 > fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 > fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 > fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782 > fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 > fdo#106978 https://bugs.freedesktop.org/show_bug.cgi?id=106978 > fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 > fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807 > fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 > fdo#108667 https://bugs.freedesktop.org/show_bug.cgi?id=108667 > > > == Participating hosts (6 -> 6) == > > No changes in participating hosts > > > == Build changes == > > * Linux: CI_DRM_5105 -> Patchwork_10778 > > CI_DRM_5105: e44a1cc644d1719d195bd0afb9e319ae555059e1 @ > git://anongit.freedesktop.org/gfx-ci/linux > IGT_4712: a3ede1b535ac8137f6949c468edd7054453d5dae @ > git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > Patchwork_10778: 0bf78b3561dcad33f6af786b617b373e91354a84 @ > git://anongit.freedesktop.org/gfx-ci/linux > piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ > git://anongit.freedesktop.org/piglit
Re: [Intel-gfx] [PATCH xf86-video-intel v7 2/2] sna: Added AYUV format support for textured and sprite video adapters.
Quoting Stanislav Lisovskiy (2018-11-09 14:14:40)
> diff --git a/src/sna/sna_video_textured.c b/src/sna/sna_video_textured.c
> index a784fe2e..46c213ef 100644
> --- a/src/sna/sna_video_textured.c
> +++ b/src/sna/sna_video_textured.c
> @@ -68,6 +68,7 @@ static const XvImageRec gen4_Images[] = {
> XVIMAGE_I420,
> XVIMAGE_NV12,
> XVIMAGE_UYVY,
> + XVIMAGE_AYUV,
> XVMC_YUV,
> };
This exposes the format to all gen4+ machines, but you've only added the
sampling kernel to gen9?
-Chris
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA
== Series Details == Series: series starting with [1/2] drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA URL : https://patchwork.freedesktop.org/series/52301/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5113 -> Patchwork_10794 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/52301/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10794 that come from known issues: === IGT changes === Issues hit igt@gem_ctx_create@basic-files: fi-bsw-n3050: PASS -> FAIL (fdo#108656) fi-bsw-kefka: PASS -> FAIL (fdo#108656) Possible fixes igt@gem_close_race@basic-threads: fi-bsw-kefka: FAIL (fdo#108656) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656 == Participating hosts (53 -> 47) == Additional (1): fi-kbl-7560u Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-ctg-p8600 == Build changes == * Linux: CI_DRM_5113 -> Patchwork_10794 CI_DRM_5113: 54a159cbae565f40866b2a54edef1620ef8581f1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10794: a63f6f70b5c17bb1336916c1d3fabe1cb7dd300e @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == a63f6f70b5c1 drm/i915: Fix icl workarounds whitespaces 4297fd927509 drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10794/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Sanitize PCH port transcoder select on IBX
On Thu, Nov 08, 2018 at 06:36:15PM +0200, Ville Syrjälä wrote:
> On Thu, Nov 08, 2018 at 04:23:48PM +, Chris Wilson wrote:
> > Quoting Ville Syrjala (2018-11-08 14:36:35)
> > > From: Ville Syrjälä
> > >
> > > IBX has a documented workaround which states that when we disable the
> > > port we must change its transcoder select to A, otherwise it will
> > > prevent the other port (DP vs. HDMI/SDVO) from using transcoder A.
> > > We implement the workaround during encoder disable, but looks like
> > > some BIOSen leave transcoder B selected even when the port wasn't
> > > actually enabled by the BIOS. That will trip up our asserts
> > > that attempt to make sure we never forget this w/a.
> > >
> > > Sanitize the transcoder select to A for all disabled PCH
> > > DP/HDMI/SDVO ports. We assume that the port was never enabled
> > > by the BIOS on transcoder B, because if it had we'd actually have
> > > to toggle the port on and back off to properly switch it back to
> > > transcoder A. That would cause some display flicker if transcoder A
> > > is already enabled on some other port, so it's better not to do it
> > > unless absolutely necessary. Since we have no indication that the
> > > transcoder select is misbehaving on the affected machines we can
> > > assume the port was never actually enabled by the BIOS.
> > >
> > > This cures warning like this during driver load:
> > > IBX PCH DP C still using transcoder B
> > > WARNING: CPU: 2 PID: 172 at drivers/gpu/drm/i915/intel_display.c:1279
> > > assert_pch_dp_disabled+0x9e/0xb0 [i915]
> > >
> > > Cc: Chris Wilson
> > > Signed-off-by: Ville Syrjälä
> > > ---
> > > drivers/gpu/drm/i915/intel_display.c | 61
> > > 1 file changed, 61 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > > b/drivers/gpu/drm/i915/intel_display.c
> > > index ae6d58dbf1ed..71b7bff85e52 100644
> > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > @@ -15653,6 +15653,64 @@ static void intel_early_display_was(struct
> > > drm_i915_private *dev_priv)
> > > }
> > > }
> > >
> > > +static void ibx_sanitize_pch_hdmi_port(struct drm_i915_private *dev_priv,
> > > + enum port port, i915_reg_t
> > > hdmi_reg)
> > > +{
> > > + u32 val = I915_READ(hdmi_reg);
> > > +
> > > + if (val & SDVO_ENABLE ||
> > > + (val & SDVO_PIPE_SEL_MASK) == SDVO_PIPE_SEL(PIPE_A))
> > > + return;
> >
> > Hmm, the w/a is also applied in intel_sdvo.c. Do we need to worry about
> > those as well?
> >
> > Oh my, it's perfectly obvious SDVO is aliased to HDMI on ibx.
> >
> > Reviewed-by: Chris Wilson
> >
> > I would have s/hdmi/svdo/ here so that the labelling was all consistent
> > and added a reminder in the comment below that hdmi is aliased to sdvo.
>
> I wanted to be consistent with assert_pch_hdmi_disabled(). I think only
> port B can be SDVO actually, or something along those lines. Not sure
> we want to rename all of this for that reason. But a comment seems like
> a very good idea at least. I'll add one.
Tossed in a few comments about SDVOB being an alias for HDMIB
and pushed to dinq. Thanks for the review.
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH] drm/i915: Fix hpd handling for pins with two encoders
On Thu, Nov 08, 2018 at 06:35:10PM -0500, Lyude Paul wrote:
> lgtm
>
> Reviewed-by: Lyude Paul
Thanks. Pushed to dinq.
>
> On Thu, 2018-11-08 at 22:04 +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > In my haste to remove irq_port[] I accidentally changed the
> > way we deal with hpd pins that are shared by multiple encoders
> > (DP and HDMI for pre-DDI platforms). Previously we would only
> > handle such pins via ->hpd_pulse(), but now we queue up the
> > hotplug work for the HDMI encoder directly. Worse yet, we now
> > count each hpd twice and this increment the hpd storm count
> > twice as fast. This can lead to spurious storms being detected.
> >
> > Go back to the old way of doing things, ie. delegate to
> > ->hpd_pulse() for any pin which has an encoder with that hook
> > implemented. I don't really like the idea of adding irq_port[]
> > back so let's loop through the encoders first to check if we
> > have an encoder with ->hpd_pulse() for the pin, and then go
> > through all the pins and decided on the correct course of action
> > based on the earlier findings.
> >
> > I have occasionally toyed with the idea of unifying the pre-DDI
> > HDMI and DP encoders into a single encoder as well. Besides the
> > hotplug processing it would have the other benefit of preventing
> > userspace from trying to enable both encoders at the same time.
> > That is simply illegal as they share the same clock/data pins.
> > We have some testcases that will attempt that and thus fail on
> > many older machines. But for now let's stick to fixing just the
> > hotplug code.
> >
> > Cc: sta...@vger.kernel.org # 4.19+
> > Cc: Lyude Paul
> > Cc: Rodrigo Vivi
> > Fixes: b6ca3eee18ba ("drm/i915: Nuke dev_priv->irq_port[]")
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/intel_hotplug.c | 55 +---
> > 1 file changed, 42 insertions(+), 13 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_hotplug.c
> > b/drivers/gpu/drm/i915/intel_hotplug.c
> > index 42e61e10f517..e24174d08fed 100644
> > --- a/drivers/gpu/drm/i915/intel_hotplug.c
> > +++ b/drivers/gpu/drm/i915/intel_hotplug.c
> > @@ -414,33 +414,54 @@ void intel_hpd_irq_handler(struct drm_i915_private
> > *dev_priv,
> > struct intel_encoder *encoder;
> > bool storm_detected = false;
> > bool queue_dig = false, queue_hp = false;
> > + u32 long_hpd_pulse_mask = 0;
> > + u32 short_hpd_pulse_mask = 0;
> > + enum hpd_pin pin;
> >
> > if (!pin_mask)
> > return;
> >
> > spin_lock(_priv->irq_lock);
> > +
> > + /*
> > +* Determine whether ->hpd_pulse() exists for each pin, and
> > +* whether we have a short or a long pulse. This is needed
> > +* as each pin may have up to two encoders (HDMI and DP) and
> > +* only the one of them (DP) will have ->hpd_pulse().
> > +*/
> > for_each_intel_encoder(_priv->drm, encoder) {
> > - enum hpd_pin pin = encoder->hpd_pin;
> > bool has_hpd_pulse = intel_encoder_has_hpd_pulse(encoder);
> > - bool long_hpd = true;
> > + enum port port = encoder->port;
> > + bool long_hpd;
> >
> > + pin = encoder->hpd_pin;
> > if (!(BIT(pin) & pin_mask))
> > continue;
> >
> > - if (has_hpd_pulse) {
> > - enum port port = encoder->port;
> > + if (!has_hpd_pulse)
> > + continue;
> >
> > - long_hpd = long_mask & BIT(pin);
> > + long_hpd = long_mask & BIT(pin);
> >
> > - DRM_DEBUG_DRIVER("digital hpd port %c - %s\n",
> > port_name(port),
> > -long_hpd ? "long" : "short");
> > - queue_dig = true;
> > - if (long_hpd)
> > - dev_priv->hotplug.long_port_mask |= (1 <<
> > port);
> > - else
> > - dev_priv->hotplug.short_port_mask |= (1 <<
> > port);
> > + DRM_DEBUG_DRIVER("digital hpd port %c - %s\n",
> > port_name(port),
> > +long_hpd ? "long" : "short");
> > + queue_dig = true;
> >
> > + if (long_hpd) {
> > + long_hpd_pulse_mask |= BIT(pin);
> > + dev_priv->hotplug.long_port_mask |= BIT(port);
> > + } else {
> > + short_hpd_pulse_mask |= BIT(pin);
> > + dev_priv->hotplug.short_port_mask |= BIT(port);
> > }
> > + }
> > +
> > + /* Now process each pin just once */
> > + for_each_hpd_pin(pin) {
> > + bool long_hpd;
> > +
> > + if (!(BIT(pin) & pin_mask))
> > + continue;
> >
> > if (dev_priv->hotplug.stats[pin].state == HPD_DISABLED) {
> > /*
> > @@ -457,8 +478,16 @@ void intel_hpd_irq_handler(struct drm_i915_private
> > *dev_priv,
> > if
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA
== Series Details ==
Series: series starting with [1/2] drm/i915: Deduplicate register definition
for GAMW_ECO_DEV_RW_IA
URL : https://patchwork.freedesktop.org/series/52301/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4297fd927509 drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA
-:13: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 908ae0517363 ("drm/i915/icl:
WaDisCtxReload")'
#13:
References: 908ae0517363 ("drm/i915/icl: WaDisCtxReload")
total: 1 errors, 0 warnings, 0 checks, 27 lines checked
a63f6f70b5c1 drm/i915: Fix icl workarounds whitespaces
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/icl: Drop spurious register read from icl_dbuf_slices_update (rev2)
== Series Details == Series: series starting with [1/2] drm/i915/icl: Drop spurious register read from icl_dbuf_slices_update (rev2) URL : https://patchwork.freedesktop.org/series/52299/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5113 -> Patchwork_10793 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/52299/revisions/2/mbox/ == Known issues == Here are the changes found in Patchwork_10793 that come from known issues: === IGT changes === Issues hit igt@drv_module_reload@basic-no-display: fi-byt-clapper: PASS -> WARN (fdo#108688) igt@gem_ctx_create@basic-files: fi-icl-u2: PASS -> DMESG-WARN (fdo#107724) fi-bsw-kefka: PASS -> FAIL (fdo#108656) igt@gem_exec_suspend@basic-s3: fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718) igt@kms_frontbuffer_tracking@basic: fi-icl-u2: PASS -> FAIL (fdo#103167) igt@kms_pipe_crc_basic@read-crc-pipe-b: fi-byt-clapper: PASS -> FAIL (fdo#107362) Possible fixes igt@gem_close_race@basic-threads: fi-bsw-kefka: FAIL (fdo#108656) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724 fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656 fdo#108688 https://bugs.freedesktop.org/show_bug.cgi?id=108688 == Participating hosts (53 -> 46) == Additional (1): fi-kbl-7560u Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-ctg-p8600 == Build changes == * Linux: CI_DRM_5113 -> Patchwork_10793 CI_DRM_5113: 54a159cbae565f40866b2a54edef1620ef8581f1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10793: e4ba00d8d494f8fd767f36cd496af438c13b6736 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == e4ba00d8d494 drm/i915: Request no slices if no active pipes 1b65f68a1dad drm/i915/icl: Drop spurious register read from icl_dbuf_slices_update == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10793/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/icl: Drop spurious register read from icl_dbuf_slices_update (rev2)
== Series Details == Series: series starting with [1/2] drm/i915/icl: Drop spurious register read from icl_dbuf_slices_update (rev2) URL : https://patchwork.freedesktop.org/series/52299/ State : warning == Summary == $ dim checkpatch origin/drm-tip 1b65f68a1dad drm/i915/icl: Drop spurious register read from icl_dbuf_slices_update e4ba00d8d494 drm/i915: Request no slices if no active pipes -:88: CHECK:LINE_SPACING: Please don't use multiple blank lines #88: FILE: drivers/gpu/drm/i915/intel_display.c:12722: + total: 0 errors, 0 warnings, 1 checks, 97 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA (rev2)
== Series Details == Series: drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA (rev2) URL : https://patchwork.freedesktop.org/series/52297/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5113 -> Patchwork_10792 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/52297/revisions/2/mbox/ == Known issues == Here are the changes found in Patchwork_10792 that come from known issues: === IGT changes === Issues hit igt@gem_ctx_create@basic-files: fi-icl-u2: PASS -> DMESG-WARN (fdo#107724) igt@kms_flip@basic-flip-vs-modeset: fi-hsw-4770r: PASS -> DMESG-WARN (fdo#105602) +1 igt@kms_frontbuffer_tracking@basic: fi-icl-u2: PASS -> FAIL (fdo#103167) igt@pm_rpm@module-reload: fi-skl-6600u: PASS -> INCOMPLETE (fdo#107807) Possible fixes igt@gem_close_race@basic-threads: fi-bsw-kefka: FAIL (fdo#108656) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724 fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807 fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656 == Participating hosts (53 -> 47) == Additional (1): fi-kbl-7560u Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-ctg-p8600 == Build changes == * Linux: CI_DRM_5113 -> Patchwork_10792 CI_DRM_5113: 54a159cbae565f40866b2a54edef1620ef8581f1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10792: c48f4f89537dafd553b35f748fbbd2eeb4b2ab83 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == c48f4f89537d drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10792/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v3,1/3] drm/i915: Reuse the aux_domain cached
== Series Details == Series: series starting with [v3,1/3] drm/i915: Reuse the aux_domain cached URL : https://patchwork.freedesktop.org/series/52194/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5105_full -> Patchwork_10778_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10778_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10778_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10778_full: === IGT changes === Warnings igt@perf_pmu@rc6: shard-kbl: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_10778_full that come from known issues: === IGT changes === Issues hit igt@kms_cursor_crc@cursor-128x128-random: shard-apl: PASS -> FAIL (fdo#103232) +2 igt@kms_draw_crc@draw-method-rgb565-mmap-wc-untiled: shard-skl: PASS -> FAIL (fdo#103184) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt: shard-apl: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff: shard-glk: PASS -> FAIL (fdo#103167) +1 igt@kms_plane@pixel-format-pipe-b-planes: shard-apl: PASS -> FAIL (fdo#103166) igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-glk: PASS -> FAIL (fdo#103166) igt@pm_rpm@modeset-lpsp-stress: shard-skl: PASS -> INCOMPLETE (fdo#107807) +1 Possible fixes igt@drm_import_export@import-close-race-flink: shard-skl: TIMEOUT (fdo#108667) -> PASS igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: shard-skl: DMESG-WARN (fdo#107956) -> PASS igt@kms_color@pipe-b-legacy-gamma: shard-apl: FAIL (fdo#104782) -> PASS igt@kms_cursor_crc@cursor-256x256-suspend: shard-apl: FAIL (fdo#103232, fdo#103191) -> PASS igt@kms_cursor_crc@cursor-64x64-random: shard-glk: FAIL (fdo#103232) -> PASS igt@kms_cursor_crc@cursor-size-change: shard-apl: FAIL (fdo#103232) -> PASS igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: shard-glk: FAIL (fdo#105363) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: shard-apl: FAIL (fdo#103167) -> PASS +1 igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite: shard-glk: FAIL (fdo#103167) -> PASS +2 igt@kms_frontbuffer_tracking@psr-suspend: shard-skl: INCOMPLETE (fdo#106978, fdo#104108, fdo#107773) -> PASS igt@kms_plane@plane-position-covered-pipe-b-planes: shard-glk: FAIL (fdo#103166) -> PASS igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-apl: FAIL (fdo#103166) -> PASS +1 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#106978 https://bugs.freedesktop.org/show_bug.cgi?id=106978 fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#108667 https://bugs.freedesktop.org/show_bug.cgi?id=108667 == Participating hosts (6 -> 6) == No changes in participating hosts == Build changes == * Linux: CI_DRM_5105 -> Patchwork_10778 CI_DRM_5105: e44a1cc644d1719d195bd0afb9e319ae555059e1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4712: a3ede1b535ac8137f6949c468edd7054453d5dae @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10778: 0bf78b3561dcad33f6af786b617b373e91354a84 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10778/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915: Fix icl workarounds whitespaces
Quoting Mika Kuoppala (2018-11-09 14:53:33) > Align icl workarounds whitespace with the rest of the file > > Cc: Chris Wilson > Signed-off-by: Mika Kuoppala That'll do. Fine piece of Wensleydale, Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA (rev2)
== Series Details ==
Series: drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA (rev2)
URL : https://patchwork.freedesktop.org/series/52297/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c48f4f89537d drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA
-:13: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 908ae0517363 ("drm/i915/icl:
WaDisCtxReload")'
#13:
References: 908ae0517363 ("drm/i915/icl: WaDisCtxReload")
total: 1 errors, 0 warnings, 0 checks, 26 lines checked
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Re: [Intel-gfx] [PATCH 1/3] drm/i915/gen9_bc: Work around DMC bug zeroing power well requests
On Fri, Nov 09, 2018 at 04:58:20PM +0200, Imre Deak wrote:
> A DMC bug on GEN9 big core machines fails to restore the driver's
> request bits for the PW1 and MISC_IO power wells after a DC5/6
> entry->exit sequence. As a consequence the driver's subsequent check for
> the enabled status of these power wells will fail, as the check
> considers the power wells being enabled only if both the status and
> request bits are set. To work around this borrow the request bits from
> BIOS's own request register in which DMC forces on the request bits when
> exiting from DC5/6.
>
> This fixes a problem reported by Ramalingam, where HDCP init failed,
> since PW1 reported itself as being disabled, while in reality it was
> enabled.
>
> Reported-by: Ramalingam C
> Cc: Ramalingam C
> Cc: Daniel Vetter
> Cc: Ville Syrjälä
> Signed-off-by: Imre Deak
> ---
> drivers/gpu/drm/i915/intel_runtime_pm.c | 16 +++-
> 1 file changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index f945db6ea420..9c49b876055d 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -493,11 +493,25 @@ static bool hsw_power_well_enabled(struct
> drm_i915_private *dev_priv,
> struct i915_power_well *power_well)
> {
> const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
> + enum i915_power_well_id id = power_well->desc->id;
> int pw_idx = power_well->desc->hsw.idx;
> u32 mask = HSW_PWR_WELL_CTL_REQ(pw_idx) |
> HSW_PWR_WELL_CTL_STATE(pw_idx);
> + u32 val;
> +
> + val = I915_READ(regs->driver);
> +
> + /*
> + * On GEN9 big core due to a DMC bug the driver's request bits for PW1
> + * and the MISC_IO PW will be not restored, so check instead for the
> + * BIOS's own request bits, which are forced-on for these power wells
> + * when exiting DC5/6.
> + */
> + if (IS_GEN9(dev_priv) && !IS_GEN9_LP(dev_priv) &&
IS_GEN9_BC() ?
Apart from that
Reviewed-by: Ville Syrjälä
> + (id == SKL_DISP_PW_1 || id == SKL_DISP_PW_MISC_IO))
> + val |= I915_READ(regs->bios);
>
> - return (I915_READ(regs->driver) & mask) == mask;
> + return (val & mask) == mask;
> }
>
> static void assert_can_enable_dc9(struct drm_i915_private *dev_priv)
> --
> 2.13.2
--
Ville Syrjälä
Intel
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[Intel-gfx] [PATCH 2/3] drm/i915: Use proper bool bitfield initializer in power well descs
We can just use a proper true/false initializer even for bitfields,
which is more descriptive.
Cc: Ramalingam C
Cc: Daniel Vetter
Cc: Ville Syrjälä
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 9c49b876055d..44a77de439f2 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -2098,7 +2098,7 @@ static const struct i915_power_well_ops
chv_dpio_cmn_power_well_ops = {
static const struct i915_power_well_desc i9xx_always_on_power_well[] = {
{
.name = "always-on",
- .always_on = 1,
+ .always_on = true,
.domains = POWER_DOMAIN_MASK,
.ops = _always_on_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2115,7 +2115,7 @@ static const struct i915_power_well_ops
i830_pipes_power_well_ops = {
static const struct i915_power_well_desc i830_power_wells[] = {
{
.name = "always-on",
- .always_on = 1,
+ .always_on = true,
.domains = POWER_DOMAIN_MASK,
.ops = _always_on_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2159,7 +2159,7 @@ static const struct i915_power_well_regs
hsw_power_well_regs = {
static const struct i915_power_well_desc hsw_power_wells[] = {
{
.name = "always-on",
- .always_on = 1,
+ .always_on = true,
.domains = POWER_DOMAIN_MASK,
.ops = _always_on_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2180,7 +2180,7 @@ static const struct i915_power_well_desc
hsw_power_wells[] = {
static const struct i915_power_well_desc bdw_power_wells[] = {
{
.name = "always-on",
- .always_on = 1,
+ .always_on = true,
.domains = POWER_DOMAIN_MASK,
.ops = _always_on_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2223,7 +2223,7 @@ static const struct i915_power_well_ops
vlv_dpio_power_well_ops = {
static const struct i915_power_well_desc vlv_power_wells[] = {
{
.name = "always-on",
- .always_on = 1,
+ .always_on = true,
.domains = POWER_DOMAIN_MASK,
.ops = _always_on_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2299,7 +2299,7 @@ static const struct i915_power_well_desc
vlv_power_wells[] = {
static const struct i915_power_well_desc chv_power_wells[] = {
{
.name = "always-on",
- .always_on = 1,
+ .always_on = true,
.domains = POWER_DOMAIN_MASK,
.ops = _always_on_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2350,7 +2350,7 @@ bool intel_display_power_well_is_enabled(struct
drm_i915_private *dev_priv,
static const struct i915_power_well_desc skl_power_wells[] = {
{
.name = "always-on",
- .always_on = 1,
+ .always_on = true,
.domains = POWER_DOMAIN_MASK,
.ops = _always_on_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2442,7 +2442,7 @@ static const struct i915_power_well_desc
skl_power_wells[] = {
static const struct i915_power_well_desc bxt_power_wells[] = {
{
.name = "always-on",
- .always_on = 1,
+ .always_on = true,
.domains = POWER_DOMAIN_MASK,
.ops = _always_on_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2500,7 +2500,7 @@ static const struct i915_power_well_desc
bxt_power_wells[] = {
static const struct i915_power_well_desc glk_power_wells[] = {
{
.name = "always-on",
- .always_on = 1,
+ .always_on = true,
.domains = POWER_DOMAIN_MASK,
.ops = _always_on_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2628,7 +2628,7 @@ static const struct i915_power_well_desc
glk_power_wells[] = {
static const struct i915_power_well_desc cnl_power_wells[] = {
{
.name = "always-on",
- .always_on = 1,
+ .always_on = true,
.domains = POWER_DOMAIN_MASK,
.ops = _always_on_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2795,7 +2795,7 @@ static const struct i915_power_well_regs
icl_ddi_power_well_regs = {
static const struct i915_power_well_desc icl_power_wells[] = {
{
.name = "always-on",
- .always_on = 1,
+ .always_on = true,
.domains = POWER_DOMAIN_MASK,
.ops = _always_on_power_well_ops,
.id = DISP_PW_ID_NONE,
--
2.13.2
[Intel-gfx] [PATCH 1/3] drm/i915/gen9_bc: Work around DMC bug zeroing power well requests
A DMC bug on GEN9 big core machines fails to restore the driver's
request bits for the PW1 and MISC_IO power wells after a DC5/6
entry->exit sequence. As a consequence the driver's subsequent check for
the enabled status of these power wells will fail, as the check
considers the power wells being enabled only if both the status and
request bits are set. To work around this borrow the request bits from
BIOS's own request register in which DMC forces on the request bits when
exiting from DC5/6.
This fixes a problem reported by Ramalingam, where HDCP init failed,
since PW1 reported itself as being disabled, while in reality it was
enabled.
Reported-by: Ramalingam C
Cc: Ramalingam C
Cc: Daniel Vetter
Cc: Ville Syrjälä
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index f945db6ea420..9c49b876055d 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -493,11 +493,25 @@ static bool hsw_power_well_enabled(struct
drm_i915_private *dev_priv,
struct i915_power_well *power_well)
{
const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
+ enum i915_power_well_id id = power_well->desc->id;
int pw_idx = power_well->desc->hsw.idx;
u32 mask = HSW_PWR_WELL_CTL_REQ(pw_idx) |
HSW_PWR_WELL_CTL_STATE(pw_idx);
+ u32 val;
+
+ val = I915_READ(regs->driver);
+
+ /*
+* On GEN9 big core due to a DMC bug the driver's request bits for PW1
+* and the MISC_IO PW will be not restored, so check instead for the
+* BIOS's own request bits, which are forced-on for these power wells
+* when exiting DC5/6.
+*/
+ if (IS_GEN9(dev_priv) && !IS_GEN9_LP(dev_priv) &&
+ (id == SKL_DISP_PW_1 || id == SKL_DISP_PW_MISC_IO))
+ val |= I915_READ(regs->bios);
- return (I915_READ(regs->driver) & mask) == mask;
+ return (val & mask) == mask;
}
static void assert_can_enable_dc9(struct drm_i915_private *dev_priv)
--
2.13.2
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[Intel-gfx] [PATCH 3/3] drm/i915: Remove special case for power well 1/MISC_IO state verification
Even though PW#1 and the MISC_IO power wells are managed by the
DMC firmware (toggled dynamically if conditions allow it) from the
driver's POV they are always on if the display core is initialized
(always restored by DMC to the enabled state after exiting from DC5/6
for instance b/c of MMIO access). Accordingly we can just mark them as
always-on and remove the special casing for them during state
verification (thus enabling verification for these power wells too).
Cc: Ramalingam C
Cc: Daniel Vetter
Cc: Ville Syrjälä
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 44a77de439f2..6b1576ae778f 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -2358,6 +2358,7 @@ static const struct i915_power_well_desc
skl_power_wells[] = {
{
.name = "power well 1",
/* Handled by the DMC firmware */
+ .always_on = true,
.domains = 0,
.ops = _power_well_ops,
.id = SKL_DISP_PW_1,
@@ -2370,6 +2371,7 @@ static const struct i915_power_well_desc
skl_power_wells[] = {
{
.name = "MISC IO power well",
/* Handled by the DMC firmware */
+ .always_on = true,
.domains = 0,
.ops = _power_well_ops,
.id = SKL_DISP_PW_MISC_IO,
@@ -2449,6 +2451,8 @@ static const struct i915_power_well_desc
bxt_power_wells[] = {
},
{
.name = "power well 1",
+ /* Handled by the DMC firmware */
+ .always_on = true,
.domains = 0,
.ops = _power_well_ops,
.id = SKL_DISP_PW_1,
@@ -2508,6 +2512,7 @@ static const struct i915_power_well_desc
glk_power_wells[] = {
{
.name = "power well 1",
/* Handled by the DMC firmware */
+ .always_on = true,
.domains = 0,
.ops = _power_well_ops,
.id = SKL_DISP_PW_1,
@@ -2636,6 +2641,7 @@ static const struct i915_power_well_desc
cnl_power_wells[] = {
{
.name = "power well 1",
/* Handled by the DMC firmware */
+ .always_on = true,
.domains = 0,
.ops = _power_well_ops,
.id = SKL_DISP_PW_1,
@@ -2803,6 +2809,7 @@ static const struct i915_power_well_desc
icl_power_wells[] = {
{
.name = "power well 1",
/* Handled by the DMC firmware */
+ .always_on = true,
.domains = 0,
.ops = _power_well_ops,
.id = SKL_DISP_PW_1,
@@ -3936,14 +3943,6 @@ static void intel_power_domains_verify_state(struct
drm_i915_private *dev_priv)
int domains_count;
bool enabled;
- /*
-* Power wells not belonging to any domain (like the MISC_IO
-* and PW1 power wells) are under FW control, so ignore them,
-* since their state can change asynchronously.
-*/
- if (!power_well->desc->domains)
- continue;
-
enabled = power_well->desc->ops->is_enabled(dev_priv,
power_well);
if ((power_well->count || power_well->desc->always_on) !=
--
2.13.2
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/icl: Drop spurious register read from icl_dbuf_slices_update
== Series Details == Series: series starting with [1/2] drm/i915/icl: Drop spurious register read from icl_dbuf_slices_update URL : https://patchwork.freedesktop.org/series/52299/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5112 -> Patchwork_10791 = == Summary - WARNING == Minor unknown changes coming with Patchwork_10791 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10791, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/52299/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10791: === IGT changes === Warnings igt@drv_selftest@live_guc: fi-apl-guc: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_10791 that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_execlists: fi-apl-guc: PASS -> INCOMPLETE (fdo#103927, fdo#106693) igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a: fi-byt-clapper: PASS -> FAIL (fdo#107362) Possible fixes igt@kms_frontbuffer_tracking@basic: fi-icl-u2: FAIL (fdo#103167) -> PASS Warnings igt@drv_selftest@live_contexts: fi-icl-u2: INCOMPLETE (fdo#108315) -> DMESG-FAIL (fdo#108569) fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#106693 https://bugs.freedesktop.org/show_bug.cgi?id=106693 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569 == Participating hosts (53 -> 46) == Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-ctg-p8600 == Build changes == * Linux: CI_DRM_5112 -> Patchwork_10791 CI_DRM_5112: 9bb09c1a2b52d761b1dc212fe33641e19c9454cd @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10791: b25fc211da75a483a51a48e5e1309f9ad6e8f42f @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == b25fc211da75 drm/i915: Request no slices if no active pipes 5c3d07354868 drm/i915/icl: Drop spurious register read from icl_dbuf_slices_update == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10791/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/2] drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA
This got duplicated on introducing icl workarounds.
Fix by using the older definition and moving the wa bit
definition there. No functional changes.
v3: avoid fixes tag, whitespace (Chris)
References: 908ae0517363 ("drm/i915/icl: WaDisCtxReload")
Signed-off-by: Mika Kuoppala
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_reg.h | 4 +---
drivers/gpu/drm/i915/intel_workarounds.c | 5 +++--
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 158cf4716d03..68f7e8a42258 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2400,6 +2400,7 @@ enum i915_power_well_id {
#define GEN8_GAMW_ECO_DEV_RW_IA _MMIO(0x4080)
#define GAMW_ECO_ENABLE_64K_IPS_FIELD 0xF
+#define GAMW_ECO_DEV_CTX_RELOAD_DISABLE (1 << 7)
#define GAMT_CHKN_BIT_REG _MMIO(0x4ab8)
#define GAMT_CHKN_DISABLE_L3_COH_PIPE(1 << 31)
@@ -8708,9 +8709,6 @@ enum {
#define GEN11_LSN_UNSLCVC_GAFS_HALF_CL2_MAXALLOC (1 << 9)
#define GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC (1 << 7)
-#define GAMW_ECO_DEV_RW_IA_REG _MMIO(0x4080)
-#define GAMW_ECO_DEV_CTX_RELOAD_DISABLE (1 << 7)
-
#define GEN10_SAMPLER_MODE _MMIO(0xE18C)
/* IVYBRIDGE DPF */
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c
b/drivers/gpu/drm/i915/intel_workarounds.c
index d7176213e3ce..406ba5bab063 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -867,8 +867,9 @@ static void icl_gt_workarounds_apply(struct
drm_i915_private *dev_priv)
/* Wa_220166154:icl
* Formerly known as WaDisCtxReload
*/
- I915_WRITE(GAMW_ECO_DEV_RW_IA_REG, I915_READ(GAMW_ECO_DEV_RW_IA_REG) |
- GAMW_ECO_DEV_CTX_RELOAD_DISABLE);
+ I915_WRITE(GEN8_GAMW_ECO_DEV_RW_IA,
+ I915_READ(GEN8_GAMW_ECO_DEV_RW_IA) |
+ GAMW_ECO_DEV_CTX_RELOAD_DISABLE);
/* Wa_1405779004:icl (pre-prod) */
if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_A0))
--
2.17.1
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[Intel-gfx] [PATCH 2/2] drm/i915: Fix icl workarounds whitespaces
Align icl workarounds whitespace with the rest of the file Cc: Chris Wilson Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/intel_workarounds.c | 27 ++-- 1 file changed, 16 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index 406ba5bab063..ca1f78a42b17 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c @@ -823,18 +823,21 @@ static void icl_gt_workarounds_apply(struct drm_i915_private *dev_priv) _MASKED_BIT_ENABLE(_3D_CHICKEN3_AA_LINE_QUALITY_FIX_ENABLE)); /* WaInPlaceDecompressionHang:icl */ - I915_WRITE(GEN9_GAMT_ECO_REG_RW_IA, I915_READ(GEN9_GAMT_ECO_REG_RW_IA) | - GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS); + I915_WRITE(GEN9_GAMT_ECO_REG_RW_IA, + I915_READ(GEN9_GAMT_ECO_REG_RW_IA) | + GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS); /* WaPipelineFlushCoherentLines:icl */ - I915_WRITE(GEN8_L3SQCREG4, I915_READ(GEN8_L3SQCREG4) | - GEN8_LQSC_FLUSH_COHERENT_LINES); + I915_WRITE(GEN8_L3SQCREG4, + I915_READ(GEN8_L3SQCREG4) | + GEN8_LQSC_FLUSH_COHERENT_LINES); /* Wa_1405543622:icl * Formerly known as WaGAPZPriorityScheme */ - I915_WRITE(GEN8_GARBCNTL, I915_READ(GEN8_GARBCNTL) | - GEN11_ARBITRATION_PRIO_ORDER_MASK); + I915_WRITE(GEN8_GARBCNTL, + I915_READ(GEN8_GARBCNTL) | + GEN11_ARBITRATION_PRIO_ORDER_MASK); /* Wa_1604223664:icl * Formerly known as WaL3BankAddressHashing @@ -854,15 +857,17 @@ static void icl_gt_workarounds_apply(struct drm_i915_private *dev_priv) /* Wa_1405733216:icl * Formerly known as WaDisableCleanEvicts */ - I915_WRITE(GEN8_L3SQCREG4, I915_READ(GEN8_L3SQCREG4) | - GEN11_LQSC_CLEAN_EVICT_DISABLE); + I915_WRITE(GEN8_L3SQCREG4, + I915_READ(GEN8_L3SQCREG4) | + GEN11_LQSC_CLEAN_EVICT_DISABLE); /* Wa_1405766107:icl * Formerly known as WaCL2SFHalfMaxAlloc */ - I915_WRITE(GEN11_LSN_UNSLCVC, I915_READ(GEN11_LSN_UNSLCVC) | - GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC | - GEN11_LSN_UNSLCVC_GAFS_HALF_CL2_MAXALLOC); + I915_WRITE(GEN11_LSN_UNSLCVC, + I915_READ(GEN11_LSN_UNSLCVC) | + GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC | + GEN11_LSN_UNSLCVC_GAFS_HALF_CL2_MAXALLOC); /* Wa_220166154:icl * Formerly known as WaDisCtxReload -- 2.17.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 13/14] drm/i915: Move ddb/wm programming into plane update/disable hooks on skl+
On Thu, Nov 08, 2018 at 05:38:37PM -0800, Matt Roper wrote:
> On Wed, Nov 07, 2018 at 08:44:30PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > On SKL+ the plane WM/BUF_CFG registers are a proper part of each
> > plane's register set. That means accessing them will cancel any
> > pending plane update, and we would need a PLANE_SURF register write
> > to arm the wm/ddb change as well.
> >
> > To avoid all the problems with that let's just move the wm/ddb
> > programming into the plane update/disable hooks. Now all plane
> > registers get written in one (hopefully atomic) operation.
> >
> > To make that feasible we'll move the plane ddb tracking into
> > the crtc state. Watermarks were already tracked there.
> >
> > v2: Rebase due to input CSC
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/i915_debugfs.c | 21 +-
> > drivers/gpu/drm/i915/i915_drv.h | 3 -
> > drivers/gpu/drm/i915/intel_display.c | 16 +-
> > drivers/gpu/drm/i915/intel_display.h | 11 +-
> > drivers/gpu/drm/i915/intel_drv.h | 9 +
> > drivers/gpu/drm/i915/intel_pm.c | 450 ---
> > drivers/gpu/drm/i915/intel_sprite.c | 4 +
> > 7 files changed, 250 insertions(+), 264 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> > b/drivers/gpu/drm/i915/i915_debugfs.c
> > index f60485906f7e..3e80a04d2790 100644
> > --- a/drivers/gpu/drm/i915/i915_debugfs.c
> > +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> > @@ -3437,31 +3437,32 @@ static int i915_ddb_info(struct seq_file *m, void
> > *unused)
> > {
> > struct drm_i915_private *dev_priv = node_to_i915(m->private);
> > struct drm_device *dev = _priv->drm;
> > - struct skl_ddb_allocation *ddb;
> > struct skl_ddb_entry *entry;
> > - enum pipe pipe;
> > - int plane;
> > + struct intel_crtc *crtc;
> >
> > if (INTEL_GEN(dev_priv) < 9)
> > return -ENODEV;
> >
> > drm_modeset_lock_all(dev);
> >
> > - ddb = _priv->wm.skl_hw.ddb;
> > -
> > seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size");
> >
> > - for_each_pipe(dev_priv, pipe) {
> > + for_each_intel_crtc(_priv->drm, crtc) {
> > + struct intel_crtc_state *crtc_state =
> > + to_intel_crtc_state(crtc->base.state);
> > + enum pipe pipe = crtc->pipe;
> > + enum plane_id plane_id;
> > +
> > seq_printf(m, "Pipe %c\n", pipe_name(pipe));
> >
> > - for_each_universal_plane(dev_priv, pipe, plane) {
> > - entry = >plane[pipe][plane];
> > - seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane + 1,
> > + for_each_plane_id_on_crtc(crtc, plane_id) {
> > + entry = _state->wm.skl.plane_ddb_y[plane_id];
> > + seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1,
> >entry->start, entry->end,
> >skl_ddb_entry_size(entry));
> > }
> >
> > - entry = >plane[pipe][PLANE_CURSOR];
> > + entry = _state->wm.skl.plane_ddb_y[PLANE_CURSOR];
> > seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start,
> >entry->end, skl_ddb_entry_size(entry));
> > }
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h
> > index 2a88a7eb871b..17023a869091 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1236,9 +1236,6 @@ static inline bool skl_ddb_entry_equal(const struct
> > skl_ddb_entry *e1,
> > }
> >
> > struct skl_ddb_allocation {
> > - /* packed/y */
> > - struct skl_ddb_entry plane[I915_MAX_PIPES][I915_MAX_PLANES];
> > - struct skl_ddb_entry uv_plane[I915_MAX_PIPES][I915_MAX_PLANES];
> > u8 enabled_slices; /* GEN11 has configurable 2 slices */
> > };
>
> Now that we're down to a single field here, there isn't really a need to
> wrap it in a struct. Can we just eliminate the structure?
Probably. The enabled_slices thing is a bit busted anyway at the moment.
A few people have noticed that we try to reprogram the slice count even
all pipes are off which leads to a warning about a missing rpma reference.
Whoever fixes that should probably figure out where this thing should
live as well.
>
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index ac3687a0245d..f497bb521baf 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -10040,6 +10040,10 @@ static void i9xx_update_cursor(struct intel_plane
> > *plane,
> > * except when the plane is getting enabled at which time
> > * the CURCNTR write arms the update.
> > */
> > +
> > + if (INTEL_GEN(dev_priv) >= 9)
> > + skl_write_cursor_wm(plane, crtc_state);
> > +
> > if (plane->cursor.base != base ||
> > plane->cursor.size != fbc_ctl ||
> >
[Intel-gfx] [PATCH 2/2] drm/i915: Request no slices if no active pipes
Skip the hardware dbuf slice update if we don't have active
pipes. With no active pipes, we don't have powerwell and thus
programming the dbuf slice counts leads to accessing
hardware without runtime pm ref.
v2: bugzilla tag (Imre)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108654
Cc: Imre Deak
Cc: Ville Syrjälä
Cc: Rodrigo Vivi
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/intel_display.c| 32 +++--
drivers/gpu/drm/i915/intel_drv.h| 3 +--
drivers/gpu/drm/i915/intel_runtime_pm.c | 12 --
3 files changed, 30 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 05125c7c2aa1..0514b89611ac 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12644,23 +12644,23 @@ static void skl_update_crtcs(struct drm_atomic_state
*state)
struct intel_crtc *intel_crtc;
struct drm_crtc_state *old_crtc_state, *new_crtc_state;
struct intel_crtc_state *cstate;
- unsigned int updated = 0;
+ unsigned int updated = 0, active_count = 0;
+ u8 required_slices;
bool progress;
enum pipe pipe;
int i;
- u8 hw_enabled_slices = dev_priv->wm.skl_hw.ddb.enabled_slices;
- u8 required_slices = intel_state->wm_results.ddb.enabled_slices;
-
const struct skl_ddb_entry *entries[I915_MAX_PIPES] = {};
- for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i)
+ for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
/* ignore allocations for crtc's that have been turned off. */
- if (new_crtc_state->active)
+ if (new_crtc_state->active) {
+ active_count++;
entries[i] =
_intel_crtc_state(old_crtc_state)->wm.skl.ddb;
+ }
+ }
- /* If 2nd DBuf slice required, enable it here */
- if (INTEL_GEN(dev_priv) >= 11 && required_slices > hw_enabled_slices)
- icl_dbuf_slices_update(dev_priv, required_slices);
+ required_slices = active_count ?
intel_state->wm_results.ddb.enabled_slices : 0;
+ intel_dbuf_slices_update(dev_priv, required_slices);
/*
* Whenever the number of active pipes changes, we need to make sure we
@@ -12670,6 +12670,7 @@ static void skl_update_crtcs(struct drm_atomic_state
*state)
*/
do {
progress = false;
+ active_count = 0;
for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
bool vbl_wait = false;
@@ -12679,7 +12680,12 @@ static void skl_update_crtcs(struct drm_atomic_state
*state)
cstate = to_intel_crtc_state(new_crtc_state);
pipe = intel_crtc->pipe;
- if (updated & cmask || !cstate->base.active)
+ if (!cstate->base.active)
+ continue;
+
+ active_count++;
+
+ if (updated & cmask)
continue;
if (skl_ddb_allocation_overlaps(dev_priv,
@@ -12713,9 +12719,9 @@ static void skl_update_crtcs(struct drm_atomic_state
*state)
}
} while (progress);
- /* If 2nd DBuf slice is no more required disable it */
- if (INTEL_GEN(dev_priv) >= 11 && required_slices < hw_enabled_slices)
- icl_dbuf_slices_update(dev_priv, required_slices);
+
+ required_slices = active_count ?
intel_state->wm_results.ddb.enabled_slices : 0;
+ intel_dbuf_slices_update(dev_priv, required_slices);
}
static void intel_atomic_helper_free_state(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 21819a9bdcae..d643f8877097 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -2086,8 +2086,7 @@ bool intel_display_power_get_if_enabled(struct
drm_i915_private *dev_priv,
enum intel_display_power_domain domain);
void intel_display_power_put(struct drm_i915_private *dev_priv,
enum intel_display_power_domain domain);
-void icl_dbuf_slices_update(struct drm_i915_private *dev_priv,
- u8 req_slices);
+void intel_dbuf_slices_update(struct drm_i915_private *dev_priv, u8
req_slices);
static inline void
assert_rpm_device_not_suspended(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 770de2632530..3a271ac22fec 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -3233,8 +3233,8 @@ static u8 intel_dbuf_max_slices(struct drm_i915_private
*dev_priv)
return
Re: [Intel-gfx] [PATCH 11/14] drm/i915: Fix latency==0 handling for level 0 watermark on skl+
On Thu, Nov 08, 2018 at 04:01:18PM -0800, Matt Roper wrote:
> On Thu, Nov 01, 2018 at 05:06:02PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > If the level 0 latency is 0 we can't do anything. Return an error
> > rather than success.
> >
> > Signed-off-by: Ville Syrjälä
>
> Is it possible to get 0 latency here? I thought we increased the
> latency to 2us if punit told us that level0=0 (WaWmMemoryReadLatency)?
Yeah, under normal circumstances this shouldn't happen. But you
can zero out the level 0 latency via debugfs. Should probably note
that in the commit message.
>
>
> Matt
>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 6 --
> > 1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c
> > b/drivers/gpu/drm/i915/intel_pm.c
> > index 6fa1634e2db5..bd5f16bc7e08 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -4703,8 +4703,10 @@ static int skl_compute_plane_wm(const struct
> > drm_i915_private *dev_priv,
> > bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
> > uint32_t min_disp_buf_needed;
> >
> > - if (latency == 0 ||
> > - !intel_wm_plane_visible(cstate, intel_pstate)) {
> > + if (latency == 0)
> > + return level == 0 ? -EINVAL : 0;
> > +
> > + if (!intel_wm_plane_visible(cstate, intel_pstate)) {
> > result->plane_en = false;
> > return 0;
> > }
> > --
> > 2.18.1
> >
> > ___
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Matt Roper
> Graphics Software Engineer
> IoTG Platform Enabling & Development
> Intel Corporation
> (916) 356-2795
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH 10/14] drm/i915: Pass the new crtc_state to ->disable_plane()
On Thu, Nov 08, 2018 at 03:52:02PM -0800, Matt Roper wrote:
> On Thu, Nov 01, 2018 at 05:06:01PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > We're going to need access to the new crtc state in ->disable_plane()
> > for SKL+ wm/ddb programming and pre-skl pipe gamma/csc control. Pass
> > the crtc state down.
> >
> > We'll also try to make intel_crtc_disable_planes() drtr as much as
>
> What does "drtr" stand for?
Should have been "dtrt" as in "do the right thing".
>
> The main behavioral change I see in that function is that we don't do
> frontbuffer tracking for nv12 slave planes anymore (and in the future
> won't do it for other planes that weren't visible, but you still want to
> reprogram them in some way).
So intel_post_plane_update() calls
frontbuffer_flip(pipe_config->fb_bits), pipe_config->fb_bits is
populated by intel_plane_atomic_calc_changes() based on the
old+new plane visibility, hence new slave planes won't be set in
that bitmask, unless they were previosuly used as non-slave
planes. So I think that does agree with my new code pretty well.
However, thinking a bit more what the frontbuffer tracking is trying
to achieve, maybe we should always include every visible plane that
is being reprogrammed. Eg. if we have to reprogram plane 1A on account
of a ddb change the resulting flip does cause an fbc nuke, which
could be used by the frontbuffer tracking to re-enable fbc if it
had been previosuly invalidated. But this probably needs more thought
so should be done later (if ever).
>
>
> Matt
>
> > it's possible. The fact that we don't have a separate crtc state
> > for the disabled state when we're going to re-enable the crtc later
> > means we might end up poking at a few extra planes in there. But
> > that's harmless. I suppose one migth argue that we wouldn't have to
> > care about proper ddb/wm/csc/gamma if the pipe is going to permanently
> > disable anyway, but the state checker probably cares so we should try
> > our best to make sure everything is programmed correctly even in that
> > case.
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/intel_atomic_plane.c | 2 +-
> > drivers/gpu/drm/i915/intel_display.c | 39 ++-
> > drivers/gpu/drm/i915/intel_display.h | 8 +
> > drivers/gpu/drm/i915/intel_drv.h | 2 +-
> > drivers/gpu/drm/i915/intel_sprite.c | 12 ---
> > 5 files changed, 42 insertions(+), 21 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c
> > b/drivers/gpu/drm/i915/intel_atomic_plane.c
> > index 010269a12390..69fc7010190c 100644
> > --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
> > +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
> > @@ -210,7 +210,7 @@ void intel_update_planes_on_crtc(struct
> > intel_atomic_state *old_state,
> > } else {
> > trace_intel_disable_plane(>base, crtc);
> >
> > - plane->disable_plane(plane, crtc);
> > + plane->disable_plane(plane, new_crtc_state);
> > }
> > }
> > }
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index 33d73915b73e..6088ae554e56 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -2781,7 +2781,7 @@ static void intel_plane_disable_noatomic(struct
> > intel_crtc *crtc,
> > intel_pre_disable_primary_noatomic(>base);
> >
> > trace_intel_disable_plane(>base, crtc);
> > - plane->disable_plane(plane, crtc);
> > + plane->disable_plane(plane, crtc_state);
> > }
> >
> > static void
> > @@ -3386,7 +3386,7 @@ static void i9xx_update_plane(struct intel_plane
> > *plane,
> > }
> >
> > static void i9xx_disable_plane(struct intel_plane *plane,
> > - struct intel_crtc *crtc)
> > + const struct intel_crtc_state *crtc_state)
> > {
> > struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> > enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
> > @@ -5421,23 +5421,32 @@ static void intel_pre_plane_update(struct
> > intel_crtc_state *old_crtc_state,
> > intel_update_watermarks(crtc);
> > }
> >
> > -static void intel_crtc_disable_planes(struct intel_crtc *crtc, unsigned
> > plane_mask)
> > +static void intel_crtc_disable_planes(struct intel_atomic_state *state,
> > + struct intel_crtc *crtc)
> > {
> > - struct drm_device *dev = crtc->base.dev;
> > + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > + const struct intel_crtc_state *new_crtc_state =
> > + intel_atomic_get_new_crtc_state(state, crtc);
> > + unsigned int update_mask = new_crtc_state->update_planes;
> > + const struct intel_plane_state *old_plane_state;
> > struct intel_plane *plane;
> > unsigned fb_bits = 0;
> > + int i;
> >
> > intel_crtc_dpms_overlay_disable(crtc);
> >
Re: [Intel-gfx] [PATCH] drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA
Quoting Mika Kuoppala (2018-11-09 14:18:19)
> This got duplicated on introducing icl workarounds.
> Fix by using the older definition and moving the wa bit
> definition there. No functional changes.
>
> v2: avoid fixes tag, whitespace (Chris)
>
> References: 908ae0517363 ("drm/i915/icl: WaDisCtxReload")
> Signed-off-by: Mika Kuoppala
> Reviewed-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/i915_reg.h | 4 +---
> drivers/gpu/drm/i915/intel_workarounds.c | 4 ++--
> 2 files changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 158cf4716d03..68f7e8a42258 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2400,6 +2400,7 @@ enum i915_power_well_id {
>
> #define GEN8_GAMW_ECO_DEV_RW_IA _MMIO(0x4080)
> #define GAMW_ECO_ENABLE_64K_IPS_FIELD 0xF
> +#define GAMW_ECO_DEV_CTX_RELOAD_DISABLE (1 << 7)
>
> #define GAMT_CHKN_BIT_REG _MMIO(0x4ab8)
> #define GAMT_CHKN_DISABLE_L3_COH_PIPE(1 << 31)
> @@ -8708,9 +8709,6 @@ enum {
> #define GEN11_LSN_UNSLCVC_GAFS_HALF_CL2_MAXALLOC (1 << 9)
> #define GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC (1 << 7)
>
> -#define GAMW_ECO_DEV_RW_IA_REG _MMIO(0x4080)
> -#define GAMW_ECO_DEV_CTX_RELOAD_DISABLE (1 << 7)
> -
> #define GEN10_SAMPLER_MODE _MMIO(0xE18C)
>
> /* IVYBRIDGE DPF */
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c
> b/drivers/gpu/drm/i915/intel_workarounds.c
> index d7176213e3ce..a2b04d2e1b68 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> @@ -867,8 +867,8 @@ static void icl_gt_workarounds_apply(struct
> drm_i915_private *dev_priv)
> /* Wa_220166154:icl
> * Formerly known as WaDisCtxReload
> */
> - I915_WRITE(GAMW_ECO_DEV_RW_IA_REG, I915_READ(GAMW_ECO_DEV_RW_IA_REG) |
> - GAMW_ECO_DEV_CTX_RELOAD_DISABLE);
> + I915_WRITE(GEN8_GAMW_ECO_DEV_RW_IA,
> I915_READ(GEN8_GAMW_ECO_DEV_RW_IA) |
> + GAMW_ECO_DEV_CTX_RELOAD_DISABLE);
Nah, we align to (
I915_WRITE(GEN8_GAMW_ECO_DEV_RW_IA,
I915_READ(GEN8_GAMW_ECO_DEV_RW_IA) |
GAMW_ECO_DEV_CTX_RELOAD_DISABLE);
Is what the rest of the file (and driver where foreign codingstyles
haven't snuck in) uses.
-Chris
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/icl: Drop spurious register read from icl_dbuf_slices_update
== Series Details == Series: series starting with [1/2] drm/i915/icl: Drop spurious register read from icl_dbuf_slices_update URL : https://patchwork.freedesktop.org/series/52299/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5c3d07354868 drm/i915/icl: Drop spurious register read from icl_dbuf_slices_update b25fc211da75 drm/i915: Request no slices if no active pipes -:85: CHECK:LINE_SPACING: Please don't use multiple blank lines #85: FILE: drivers/gpu/drm/i915/intel_display.c:12722: + total: 0 errors, 0 warnings, 1 checks, 97 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA
This got duplicated on introducing icl workarounds.
Fix by using the older definition and moving the wa bit
definition there. No functional changes.
v2: avoid fixes tag, whitespace (Chris)
References: 908ae0517363 ("drm/i915/icl: WaDisCtxReload")
Signed-off-by: Mika Kuoppala
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_reg.h | 4 +---
drivers/gpu/drm/i915/intel_workarounds.c | 4 ++--
2 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 158cf4716d03..68f7e8a42258 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2400,6 +2400,7 @@ enum i915_power_well_id {
#define GEN8_GAMW_ECO_DEV_RW_IA _MMIO(0x4080)
#define GAMW_ECO_ENABLE_64K_IPS_FIELD 0xF
+#define GAMW_ECO_DEV_CTX_RELOAD_DISABLE (1 << 7)
#define GAMT_CHKN_BIT_REG _MMIO(0x4ab8)
#define GAMT_CHKN_DISABLE_L3_COH_PIPE(1 << 31)
@@ -8708,9 +8709,6 @@ enum {
#define GEN11_LSN_UNSLCVC_GAFS_HALF_CL2_MAXALLOC (1 << 9)
#define GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC (1 << 7)
-#define GAMW_ECO_DEV_RW_IA_REG _MMIO(0x4080)
-#define GAMW_ECO_DEV_CTX_RELOAD_DISABLE (1 << 7)
-
#define GEN10_SAMPLER_MODE _MMIO(0xE18C)
/* IVYBRIDGE DPF */
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c
b/drivers/gpu/drm/i915/intel_workarounds.c
index d7176213e3ce..a2b04d2e1b68 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -867,8 +867,8 @@ static void icl_gt_workarounds_apply(struct
drm_i915_private *dev_priv)
/* Wa_220166154:icl
* Formerly known as WaDisCtxReload
*/
- I915_WRITE(GAMW_ECO_DEV_RW_IA_REG, I915_READ(GAMW_ECO_DEV_RW_IA_REG) |
- GAMW_ECO_DEV_CTX_RELOAD_DISABLE);
+ I915_WRITE(GEN8_GAMW_ECO_DEV_RW_IA, I915_READ(GEN8_GAMW_ECO_DEV_RW_IA) |
+ GAMW_ECO_DEV_CTX_RELOAD_DISABLE);
/* Wa_1405779004:icl (pre-prod) */
if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_A0))
--
2.17.1
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[Intel-gfx] [PATCH xf86-video-intel v7 1/2] sna/gen9+: Split out wm_kernel from the sna_composite_op flags
With the extra video kernels we already ran out of bits in
the flags. To tackle that let's just split out the
wm_kernel to its own thing.
Signed-off-by: Stanislav Lisovskiy
---
src/sna/gen9_render.c | 35 ++-
src/sna/sna_render.h | 1 +
2 files changed, 23 insertions(+), 13 deletions(-)
diff --git a/src/sna/gen9_render.c b/src/sna/gen9_render.c
index 505b98af..eb22b642 100644
--- a/src/sna/gen9_render.c
+++ b/src/sna/gen9_render.c
@@ -226,19 +226,18 @@ static const struct blendinfo {
#define COPY_SAMPLER 0
#define COPY_VERTEX VERTEX_2s2s
-#define COPY_FLAGS(a) GEN9_SET_FLAGS(COPY_SAMPLER, (a) == GXcopy ? NO_BLEND :
CLEAR, GEN9_WM_KERNEL_NOMASK, COPY_VERTEX)
+#define COPY_FLAGS(a) GEN9_SET_FLAGS(COPY_SAMPLER, (a) == GXcopy ? NO_BLEND :
CLEAR, COPY_VERTEX)
#define FILL_SAMPLER 1
#define FILL_VERTEX VERTEX_2s2s
-#define FILL_FLAGS(op, format) GEN9_SET_FLAGS(FILL_SAMPLER,
gen9_get_blend((op), false, (format)), GEN9_WM_KERNEL_NOMASK, FILL_VERTEX)
-#define FILL_FLAGS_NOBLEND GEN9_SET_FLAGS(FILL_SAMPLER, NO_BLEND,
GEN9_WM_KERNEL_NOMASK, FILL_VERTEX)
+#define FILL_FLAGS(op, format) GEN9_SET_FLAGS(FILL_SAMPLER,
gen9_get_blend((op), false, (format)), FILL_VERTEX)
+#define FILL_FLAGS_NOBLEND GEN9_SET_FLAGS(FILL_SAMPLER, NO_BLEND, FILL_VERTEX)
#define GEN9_SAMPLER(f) (((f) >> 20) & 0xfff)
#define GEN9_BLEND(f) (((f) >> 4) & 0x7ff)
#define GEN9_READS_DST(f) (((f) >> 15) & 1)
-#define GEN9_KERNEL(f) (((f) >> 16) & 0xf)
#define GEN9_VERTEX(f) (((f) >> 0) & 0xf)
-#define GEN9_SET_FLAGS(S, B, K, V) ((S) << 20 | (K) << 16 | (B) | (V))
+#define GEN9_SET_FLAGS(S, B, V) ((S) << 20 | (B) | (V))
#define OUT_BATCH(v) batch_emit(sna, v)
#define OUT_BATCH64(v) batch_emit64(sna, v)
@@ -1349,7 +1348,7 @@ gen9_emit_state(struct sna *sna,
gen9_emit_cc(sna, GEN9_BLEND(op->u.gen9.flags));
gen9_emit_sampler(sna, GEN9_SAMPLER(op->u.gen9.flags));
gen9_emit_sf(sna, GEN9_VERTEX(op->u.gen9.flags) >> 2);
- gen9_emit_wm(sna, GEN9_KERNEL(op->u.gen9.flags));
+ gen9_emit_wm(sna, op->u.gen9.wm_kernel);
gen9_emit_vertex_elements(sna, op);
gen9_emit_binding_table(sna, wm_binding_table);
@@ -1618,7 +1617,7 @@ static int gen9_get_rectangles__flush(struct sna *sna,
if (gen9_magic_ca_pass(sna, op)) {
gen9_emit_pipe_invalidate(sna);
gen9_emit_cc(sna, GEN9_BLEND(op->u.gen9.flags));
- gen9_emit_wm(sna, GEN9_KERNEL(op->u.gen9.flags));
+ gen9_emit_wm(sna, op->u.gen9.wm_kernel);
}
}
@@ -2548,11 +2547,11 @@ gen9_render_composite(struct sna *sna,
gen9_get_blend(tmp->op,
tmp->has_component_alpha,
tmp->dst.format),
- gen9_choose_composite_kernel(tmp->op,
- tmp->mask.bo !=
NULL,
-
tmp->has_component_alpha,
- tmp->is_affine),
gen4_choose_composite_emitter(sna, tmp));
+ tmp->u.gen9.wm_kernel = gen9_choose_composite_kernel(tmp->op,
+tmp->mask.bo !=
NULL,
+
tmp->has_component_alpha,
+tmp->is_affine);
tmp->blt = gen9_render_composite_blt;
tmp->box = gen9_render_composite_box;
@@ -2781,8 +2780,9 @@ gen9_render_composite_spans(struct sna *sna,
SAMPLER_FILTER_NEAREST,
SAMPLER_EXTEND_PAD),
gen9_get_blend(tmp->base.op, false,
tmp->base.dst.format),
- GEN9_WM_KERNEL_OPACITY | !tmp->base.is_affine,
gen4_choose_spans_emitter(sna, tmp));
+ tmp->base.u.gen9.wm_kernel =
+ GEN9_WM_KERNEL_OPACITY | !tmp->base.is_affine;
tmp->box = gen9_render_composite_spans_box;
tmp->boxes = gen9_render_composite_spans_boxes;
@@ -3045,6 +3045,7 @@ fallback_blt:
tmp.need_magic_ca_pass = 0;
tmp.u.gen9.flags = COPY_FLAGS(alu);
+ tmp.u.gen9.wm_kernel = GEN9_WM_KERNEL_NOMASK;
kgem_set_mode(>kgem, KGEM_RENDER, tmp.dst.bo);
if (!kgem_check_bo(>kgem, tmp.dst.bo, tmp.src.bo, NULL)) {
@@ -3214,6 +3215,7 @@ fallback:
op->base.floats_per_rect = 6;
op->base.u.gen9.flags = COPY_FLAGS(alu);
+ op->base.u.gen9.wm_kernel = GEN9_WM_KERNEL_NOMASK;
kgem_set_mode(>kgem, KGEM_RENDER, dst_bo);
if (!kgem_check_bo(>kgem, dst_bo, src_bo, NULL)) {
@@ -3366,6 +3368,7 @@ gen9_render_fill_boxes(struct sna *sna,
[Intel-gfx] [PATCH xf86-video-intel v7 2/2] sna: Added AYUV format support for textured and sprite video adapters.
v2: Renamed DRM_FORMAT_XYUV to DRM_FORMAT_XYUV.
Added comment about AYUV byte ordering in Gstreamer.
v3: Removed sna_composite_op flags related change to the separate patch.
v4: Fixed review comments, done code refactoring
v5: Fixed following review comments:
- Fixed comment in shader code for ayuv kernel.
- Fixed naming to VIDEO_AYUV_BT601/BT709 for ayuv kernels.
- Removed duplicate gen9_kernel parameter, left from previous patches
- Added colorspace handling for new AYUV kernel
- Fixed naming of sna_copy_packed_data_ayuv to sna_copy_ayuv_data
- Started using standard bswap_32 function for byte swapping in
sna_copy_ayuv_data
- Removed redundant code in sna_copy_ayuv_data so that it looks more neat
- Fixed XVIMAGE_AYUV structure initialization to contain proper byte
sequence for GST
- Fixed bogus comment about subsampling for DRM_FORMAT_XYUV
- Fixed AYUV advertisement for all platforms
- Removed unnecessary RGB888 declaration.
v6:
- Fixed surface format not to use alpha as supposed
- Now doing byte swapping always during copy
- Changed hack, required for GST to work to be at one place
- Fixed invalid sampling values for XVIMAGE_AYUV
- Fixed sprite format checking order and images_ayuv definition.
v7:
- Removed reverse_bytes bool parameter, now swapping bytes
for XYUV unconditionally both for textured and sprite modes.
Signed-off-by: Stanislav Lisovskiy
---
src/render_program/Makefile.am| 2 +
.../exa_wm_src_sample_argb_ayuv.g8a | 76 +++
.../exa_wm_src_sample_argb_ayuv.g8b | 8 ++
src/sna/gen9_render.c | 24 +-
src/sna/sna_render.h | 3 +
src/sna/sna_video.c | 72 +-
src/sna/sna_video.h | 20 +
src/sna/sna_video_sprite.c| 20 -
src/sna/sna_video_textured.c | 7 ++
9 files changed, 227 insertions(+), 5 deletions(-)
create mode 100644 src/render_program/exa_wm_src_sample_argb_ayuv.g8a
create mode 100644 src/render_program/exa_wm_src_sample_argb_ayuv.g8b
diff --git a/src/render_program/Makefile.am b/src/render_program/Makefile.am
index dc58138f..e35ffa52 100644
--- a/src/render_program/Makefile.am
+++ b/src/render_program/Makefile.am
@@ -196,6 +196,7 @@ INTEL_G7B = \
INTEL_G8A =\
exa_wm_src_affine.g8a \
exa_wm_src_sample_argb.g8a \
+ exa_wm_src_sample_argb_ayuv.g8a \
exa_wm_src_sample_nv12.g8a \
exa_wm_src_sample_planar.g8a\
exa_wm_write.g8a\
@@ -205,6 +206,7 @@ INTEL_G8A = \
INTEL_G8B =\
exa_wm_src_affine.g8b \
+ exa_wm_src_sample_argb_ayuv.g8b \
exa_wm_src_sample_argb.g8b \
exa_wm_src_sample_nv12.g8b \
exa_wm_src_sample_planar.g8b\
diff --git a/src/render_program/exa_wm_src_sample_argb_ayuv.g8a
b/src/render_program/exa_wm_src_sample_argb_ayuv.g8a
new file mode 100644
index ..c0b84c2e
--- /dev/null
+++ b/src/render_program/exa_wm_src_sample_argb_ayuv.g8a
@@ -0,0 +1,76 @@
+/*
+ * Copyright © 2006 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *Wang Zhenyu
+ *Keith Packard
+ */
+
+/* Sample the src surface */
+
+include(`exa_wm.g4i')
+
+undefine(`src_msg')
+undefine(`src_msg_ind')
+
+define(`src_msg', `g65')
+define(`src_msg_ind', `65')
+
+/* prepare sampler read back gX register, which would be written back to
output */
+
+/* use simd16 sampler, param 0 is u, param 1 is v. */
+/* 'payload' loading, assuming tex coord start from g4 */
+
+/* load argb */
+mov (1) g0.8<1>UD 0xUD { align1 mask_disable };
+mov
[Intel-gfx] [PATCH xf86-video-intel v7 0/2] Added AYUV format support
sna/gen9+: Added AYUV format support for textured and sprite video adapters. Split out wm_kernel from the sna_composite_op flags Stanislav Lisovskiy (2): sna/gen9+: Split out wm_kernel from the sna_composite_op flags sna: Added AYUV format support for textured and sprite video adapters. src/render_program/Makefile.am| 2 + .../exa_wm_src_sample_argb_ayuv.g8a | 76 +++ .../exa_wm_src_sample_argb_ayuv.g8b | 8 ++ src/sna/gen9_render.c | 59 ++ src/sna/sna_render.h | 4 + src/sna/sna_video.c | 72 +- src/sna/sna_video.h | 20 + src/sna/sna_video_sprite.c| 20 - src/sna/sna_video_textured.c | 7 ++ 9 files changed, 250 insertions(+), 18 deletions(-) create mode 100644 src/render_program/exa_wm_src_sample_argb_ayuv.g8a create mode 100644 src/render_program/exa_wm_src_sample_argb_ayuv.g8b -- 2.17.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/2] drm/i915/icl: Drop spurious register read from icl_dbuf_slices_update
Register DBUF_CTL_S2 is read and it's value is not used. As
there is no explanation why we should prime the hardware with
read, remove it as spurious.
Fixes: aa9664ffe863 ("drm/i915/icl: Enable 2nd DBuf slice only when needed")
Cc: Mahesh Kumar
Cc: Rodrigo Vivi
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index f945db6ea420..770de2632530 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -3236,8 +3236,7 @@ static u8 intel_dbuf_max_slices(struct drm_i915_private
*dev_priv)
void icl_dbuf_slices_update(struct drm_i915_private *dev_priv,
u8 req_slices)
{
- u8 hw_enabled_slices = dev_priv->wm.skl_hw.ddb.enabled_slices;
- u32 val;
+ const u8 hw_enabled_slices = dev_priv->wm.skl_hw.ddb.enabled_slices;
bool ret;
if (req_slices > intel_dbuf_max_slices(dev_priv)) {
@@ -3248,7 +3247,6 @@ void icl_dbuf_slices_update(struct drm_i915_private
*dev_priv,
if (req_slices == hw_enabled_slices || req_slices == 0)
return;
- val = I915_READ(DBUF_CTL_S2);
if (req_slices > hw_enabled_slices)
ret = intel_dbuf_slice_set(dev_priv, DBUF_CTL_S2, true);
else
--
2.17.1
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[Intel-gfx] [PATCH 2/2] drm/i915: Request no slices if no active pipes
Skip the hardware dbuf slice update if we don't have active
pipes. With no active pipes, we don't have powerwell and thus
programming the dbuf slice counts leads to accessing
hardware without runtime pm ref.
Cc: Imre Deak
Cc: Ville Syrjälä
Cc: Rodrigo Vivi
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/intel_display.c| 32 +++--
drivers/gpu/drm/i915/intel_drv.h| 3 +--
drivers/gpu/drm/i915/intel_runtime_pm.c | 12 --
3 files changed, 30 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 05125c7c2aa1..0514b89611ac 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12644,23 +12644,23 @@ static void skl_update_crtcs(struct drm_atomic_state
*state)
struct intel_crtc *intel_crtc;
struct drm_crtc_state *old_crtc_state, *new_crtc_state;
struct intel_crtc_state *cstate;
- unsigned int updated = 0;
+ unsigned int updated = 0, active_count = 0;
+ u8 required_slices;
bool progress;
enum pipe pipe;
int i;
- u8 hw_enabled_slices = dev_priv->wm.skl_hw.ddb.enabled_slices;
- u8 required_slices = intel_state->wm_results.ddb.enabled_slices;
-
const struct skl_ddb_entry *entries[I915_MAX_PIPES] = {};
- for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i)
+ for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
/* ignore allocations for crtc's that have been turned off. */
- if (new_crtc_state->active)
+ if (new_crtc_state->active) {
+ active_count++;
entries[i] =
_intel_crtc_state(old_crtc_state)->wm.skl.ddb;
+ }
+ }
- /* If 2nd DBuf slice required, enable it here */
- if (INTEL_GEN(dev_priv) >= 11 && required_slices > hw_enabled_slices)
- icl_dbuf_slices_update(dev_priv, required_slices);
+ required_slices = active_count ?
intel_state->wm_results.ddb.enabled_slices : 0;
+ intel_dbuf_slices_update(dev_priv, required_slices);
/*
* Whenever the number of active pipes changes, we need to make sure we
@@ -12670,6 +12670,7 @@ static void skl_update_crtcs(struct drm_atomic_state
*state)
*/
do {
progress = false;
+ active_count = 0;
for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
bool vbl_wait = false;
@@ -12679,7 +12680,12 @@ static void skl_update_crtcs(struct drm_atomic_state
*state)
cstate = to_intel_crtc_state(new_crtc_state);
pipe = intel_crtc->pipe;
- if (updated & cmask || !cstate->base.active)
+ if (!cstate->base.active)
+ continue;
+
+ active_count++;
+
+ if (updated & cmask)
continue;
if (skl_ddb_allocation_overlaps(dev_priv,
@@ -12713,9 +12719,9 @@ static void skl_update_crtcs(struct drm_atomic_state
*state)
}
} while (progress);
- /* If 2nd DBuf slice is no more required disable it */
- if (INTEL_GEN(dev_priv) >= 11 && required_slices < hw_enabled_slices)
- icl_dbuf_slices_update(dev_priv, required_slices);
+
+ required_slices = active_count ?
intel_state->wm_results.ddb.enabled_slices : 0;
+ intel_dbuf_slices_update(dev_priv, required_slices);
}
static void intel_atomic_helper_free_state(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 21819a9bdcae..d643f8877097 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -2086,8 +2086,7 @@ bool intel_display_power_get_if_enabled(struct
drm_i915_private *dev_priv,
enum intel_display_power_domain domain);
void intel_display_power_put(struct drm_i915_private *dev_priv,
enum intel_display_power_domain domain);
-void icl_dbuf_slices_update(struct drm_i915_private *dev_priv,
- u8 req_slices);
+void intel_dbuf_slices_update(struct drm_i915_private *dev_priv, u8
req_slices);
static inline void
assert_rpm_device_not_suspended(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 770de2632530..3a271ac22fec 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -3233,8 +3233,8 @@ static u8 intel_dbuf_max_slices(struct drm_i915_private
*dev_priv)
return 2;
}
-void icl_dbuf_slices_update(struct drm_i915_private *dev_priv,
-
Re: [Intel-gfx] [PATCH] drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA
Quoting Mika Kuoppala (2018-11-09 13:56:52)
> This got duplicated on introducing icl workarounds.
> Fix by using the older definition and moving the wa bit
> definition there. No functional changes.
>
> Fixes: 908ae0517363 ("drm/i915/icl: WaDisCtxReload")
But worth backporting for no functional change? Maybe just References:
> Signed-off-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/i915_reg.h | 4 +---
> drivers/gpu/drm/i915/intel_workarounds.c | 4 ++--
> 2 files changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 158cf4716d03..68f7e8a42258 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2400,6 +2400,7 @@ enum i915_power_well_id {
>
> #define GEN8_GAMW_ECO_DEV_RW_IA _MMIO(0x4080)
> #define GAMW_ECO_ENABLE_64K_IPS_FIELD 0xF
> +#define GAMW_ECO_DEV_CTX_RELOAD_DISABLE (1 << 7)
>
> #define GAMT_CHKN_BIT_REG _MMIO(0x4ab8)
> #define GAMT_CHKN_DISABLE_L3_COH_PIPE(1 << 31)
> @@ -8708,9 +8709,6 @@ enum {
> #define GEN11_LSN_UNSLCVC_GAFS_HALF_CL2_MAXALLOC (1 << 9)
> #define GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC (1 << 7)
>
> -#define GAMW_ECO_DEV_RW_IA_REG _MMIO(0x4080)
> -#define GAMW_ECO_DEV_CTX_RELOAD_DISABLE (1 << 7)
> -
> #define GEN10_SAMPLER_MODE _MMIO(0xE18C)
>
> /* IVYBRIDGE DPF */
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c
> b/drivers/gpu/drm/i915/intel_workarounds.c
> index d7176213e3ce..37a7276926d9 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> @@ -867,8 +867,8 @@ static void icl_gt_workarounds_apply(struct
> drm_i915_private *dev_priv)
> /* Wa_220166154:icl
> * Formerly known as WaDisCtxReload
> */
> - I915_WRITE(GAMW_ECO_DEV_RW_IA_REG, I915_READ(GAMW_ECO_DEV_RW_IA_REG) |
> - GAMW_ECO_DEV_CTX_RELOAD_DISABLE);
> + I915_WRITE(GEN8_GAMW_ECO_DEV_RW_IA,
> I915_READ(GEN8_GAMW_ECO_DEV_RW_IA) |
> + GAMW_ECO_DEV_CTX_RELOAD_DISABLE);
What happened? I had this file all nicely aligned. And then icl polluted
it again. Please remember the visual grouping.
Reviewed-by: Chris Wilson
-Chris
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Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/ddi: Add more sanity check to the encoder HW readout
On Fri, Nov 09, 2018 at 03:44:47PM +0200, Imre Deak wrote: > On Fri, Nov 09, 2018 at 12:09:40AM +, Patchwork wrote: > > == Series Details == > > > > Series: series starting with [1/2] drm/i915/ddi: Add more sanity check to > > the encoder HW readout > > URL : https://patchwork.freedesktop.org/series/52187/ > > State : success Pushed to -dinq, thanks for the report, review and testing. > > > > == Summary == > > > > = CI Bug Log - changes from CI_DRM_5100_full -> Patchwork_10758_full = > > > > == Summary - WARNING == > > > > Minor unknown changes coming with Patchwork_10758_full need to be verified > > manually. > > > > If you think the reported changes have nothing to do with the changes > > introduced in Patchwork_10758_full, please notify your bug team to allow > > them > > to document this new failure mode, which will reduce false positives in > > CI. > > > > > > > > == Possible new issues == > > > > Here are the unknown changes that may have been introduced in > > Patchwork_10758_full: > > > > === IGT changes === > > > > Warnings > > > > igt@pm_rc6_residency@rc6-accuracy: > > shard-snb: PASS -> SKIP > > Independent platform, looks like > https://bugs.freedesktop.org/show_bug.cgi?id=108664 > > will add there a note about this skip. > > > > > > igt@tools_test@tools_test: > > shard-kbl: SKIP -> PASS > > > > > > == Known issues == > > > > Here are the changes found in Patchwork_10758_full that come from known > > issues: > > > > === IGT changes === > > > > Issues hit > > > > igt@gem_exec_suspend@basic-s3: > > shard-kbl: PASS -> FAIL (fdo#103375) > > > > igt@kms_color@pipe-b-legacy-gamma: > > shard-apl: PASS -> FAIL (fdo#104782) > > > > igt@kms_cursor_crc@cursor-128x128-random: > > shard-glk: PASS -> FAIL (fdo#103232) > > > > igt@kms_cursor_crc@cursor-128x128-suspend: > > shard-apl: PASS -> FAIL (fdo#103232, fdo#103191) +1 > > > > igt@kms_cursor_crc@cursor-256x256-suspend: > > shard-skl: PASS -> INCOMPLETE (fdo#104108) > > > > igt@kms_cursor_legacy@cursora-vs-flipa-toggle: > > shard-glk: PASS -> DMESG-WARN (fdo#105763, fdo#106538) > > > > igt@kms_draw_crc@draw-method-rgb565-mmap-wc-untiled: > > shard-skl: PASS -> FAIL (fdo#103184) > > > > igt@kms_flip@flip-vs-expired-vblank: > > shard-glk: PASS -> FAIL (fdo#105363, fdo#102887) > > > > igt@kms_flip@flip-vs-expired-vblank-interruptible: > > shard-glk: PASS -> FAIL (fdo#105363) > > > > igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: > > shard-apl: PASS -> FAIL (fdo#103167) > > > > igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt: > > shard-glk: PASS -> FAIL (fdo#103167) +4 > > > > igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-pgflip-blt: > > shard-apl: SKIP -> INCOMPLETE (fdo#103927) > > > > igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: > > shard-skl: PASS -> INCOMPLETE (fdo#104108, fdo#107773) > > > > igt@pm_rpm@legacy-planes-dpms: > > shard-skl: PASS -> INCOMPLETE (fdo#107807, fdo#105959) > > > > igt@pm_rpm@modeset-lpsp: > > shard-skl: PASS -> INCOMPLETE (fdo#107807) +1 > > > > > > Possible fixes > > > > igt@kms_busy@extended-modeset-hang-newfb-render-b: > > shard-kbl: DMESG-WARN (fdo#107956) -> PASS +1 > > > > igt@kms_cursor_crc@cursor-128x128-random: > > shard-apl: FAIL (fdo#103232) -> PASS +2 > > > > igt@kms_cursor_crc@cursor-64x64-random: > > shard-glk: FAIL (fdo#103232) -> PASS +1 > > > > igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size: > > shard-glk: DMESG-WARN (fdo#105763, fdo#106538) -> PASS > > > > igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff: > > shard-glk: FAIL (fdo#103167) -> PASS > > > > igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: > > shard-glk: INCOMPLETE (k.org#198133, fdo#103359) -> PASS > > > > igt@kms_plane_multiple@atomic-pipe-a-tiling-x: > > shard-glk: FAIL (fdo#103166) -> PASS > > > > igt@kms_setmode@basic: > > shard-kbl: FAIL (fdo#99912) -> PASS > > > > igt@kms_universal_plane@universal-plane-pipe-b-functional: > > shard-apl: FAIL (fdo#103166) -> PASS +2 > > > > igt@perf@polling: > > shard-hsw: FAIL (fdo#102252) -> PASS > > > > > > Warnings > > > > igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-cpu: > > shard-snb: DMESG-WARN (fdo#107469) -> INCOMPLETE (fdo#105411) > > > > > > fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 > > fdo#102887
[Intel-gfx] [PATCH] drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA
This got duplicated on introducing icl workarounds.
Fix by using the older definition and moving the wa bit
definition there. No functional changes.
Fixes: 908ae0517363 ("drm/i915/icl: WaDisCtxReload")
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_reg.h | 4 +---
drivers/gpu/drm/i915/intel_workarounds.c | 4 ++--
2 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 158cf4716d03..68f7e8a42258 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2400,6 +2400,7 @@ enum i915_power_well_id {
#define GEN8_GAMW_ECO_DEV_RW_IA _MMIO(0x4080)
#define GAMW_ECO_ENABLE_64K_IPS_FIELD 0xF
+#define GAMW_ECO_DEV_CTX_RELOAD_DISABLE (1 << 7)
#define GAMT_CHKN_BIT_REG _MMIO(0x4ab8)
#define GAMT_CHKN_DISABLE_L3_COH_PIPE(1 << 31)
@@ -8708,9 +8709,6 @@ enum {
#define GEN11_LSN_UNSLCVC_GAFS_HALF_CL2_MAXALLOC (1 << 9)
#define GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC (1 << 7)
-#define GAMW_ECO_DEV_RW_IA_REG _MMIO(0x4080)
-#define GAMW_ECO_DEV_CTX_RELOAD_DISABLE (1 << 7)
-
#define GEN10_SAMPLER_MODE _MMIO(0xE18C)
/* IVYBRIDGE DPF */
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c
b/drivers/gpu/drm/i915/intel_workarounds.c
index d7176213e3ce..37a7276926d9 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -867,8 +867,8 @@ static void icl_gt_workarounds_apply(struct
drm_i915_private *dev_priv)
/* Wa_220166154:icl
* Formerly known as WaDisCtxReload
*/
- I915_WRITE(GAMW_ECO_DEV_RW_IA_REG, I915_READ(GAMW_ECO_DEV_RW_IA_REG) |
- GAMW_ECO_DEV_CTX_RELOAD_DISABLE);
+ I915_WRITE(GEN8_GAMW_ECO_DEV_RW_IA, I915_READ(GEN8_GAMW_ECO_DEV_RW_IA) |
+ GAMW_ECO_DEV_CTX_RELOAD_DISABLE);
/* Wa_1405779004:icl (pre-prod) */
if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_A0))
--
2.17.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 09/14] drm/i915: Introduce crtc_state->update_planes bitmask
On Thu, Nov 08, 2018 at 03:22:27PM -0800, Matt Roper wrote:
> On Thu, Nov 01, 2018 at 05:06:00PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Keep track which planes need updating during the commit. For now this
> > is just (was_visible || is_visible) but I'll have need to update
>
> When gen11 nv12 is in use, it also contains was_slave || is_slave as
> well, right?
>
> > invisible planes later on for skl plane ddbs and for pre-skl pipe
> > gamma/csc control (which lives in the primary plane control register).
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/intel_atomic.c | 1 +
> > drivers/gpu/drm/i915/intel_atomic_plane.c | 8
> > drivers/gpu/drm/i915/intel_display.c | 5 -
> > drivers/gpu/drm/i915/intel_drv.h | 3 +++
> > 4 files changed, 12 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_atomic.c
> > b/drivers/gpu/drm/i915/intel_atomic.c
> > index a5a2c8fe58a7..8cb02f28d30c 100644
> > --- a/drivers/gpu/drm/i915/intel_atomic.c
> > +++ b/drivers/gpu/drm/i915/intel_atomic.c
> > @@ -184,6 +184,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
> > crtc_state->fifo_changed = false;
> > crtc_state->wm.need_postvbl_update = false;
> > crtc_state->fb_bits = 0;
> > + crtc_state->update_planes = 0;
> >
> > return _state->base;
> > }
> > diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c
> > b/drivers/gpu/drm/i915/intel_atomic_plane.c
> > index 7d3685075201..010269a12390 100644
> > --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
> > +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
> > @@ -137,6 +137,9 @@ int intel_plane_atomic_check_with_state(const struct
> > intel_crtc_state *old_crtc_
> > if (state->visible && state->fb->format->format == DRM_FORMAT_NV12)
> > crtc_state->nv12_planes |= BIT(intel_plane->id);
> >
> > + if (state->visible || old_plane_state->base.visible)
> > + crtc_state->update_planes |= BIT(intel_plane->id);
> > +
> > return intel_plane_atomic_calc_changes(old_crtc_state,
> >_state->base,
> >old_plane_state,
> > @@ -171,14 +174,11 @@ void intel_update_planes_on_crtc(struct
> > intel_atomic_state *old_state,
> > struct intel_crtc_state *old_crtc_state,
> > struct intel_crtc_state *new_crtc_state)
> > {
> > + u32 update_mask = new_crtc_state->update_planes;
> > struct intel_plane_state *new_plane_state;
> > struct intel_plane *plane;
> > - u32 update_mask;
> > int i;
> >
> > - update_mask = old_crtc_state->active_planes;
> > - update_mask |= new_crtc_state->active_planes;
> > -
> > for_each_new_intel_plane_in_state(old_state, plane, new_plane_state, i)
> > {
> > if (crtc->pipe != plane->pipe ||
> > !(update_mask & BIT(plane->id)))
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index 852b5897e80b..33d73915b73e 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -10797,8 +10797,10 @@ static int icl_check_nv12_planes(struct
> > intel_crtc_state *crtc_state)
> > continue;
> >
> > plane_state->linked_plane = NULL;
> > - if (plane_state->slave && !plane_state->base.visible)
> > + if (plane_state->slave && !plane_state->base.visible) {
> > crtc_state->active_planes &= ~BIT(plane->id);
> > + crtc_state->update_planes |= BIT(plane->id);
>
> Just to clarify, this is to ensure that we clear out the register
> programming of a plane that was an nv12 slave on the previous frame, but
> isn't any longer on the current frame, and ...
>
>
> > + }
> >
> > plane_state->slave = false;
> > }
> > @@ -10839,6 +10841,7 @@ static int icl_check_nv12_planes(struct
> > intel_crtc_state *crtc_state)
> > linked_state->slave = true;
> > linked_state->linked_plane = plane;
> > crtc_state->active_planes |= BIT(linked->id);
> > + crtc_state->update_planes |= BIT(linked->id);
>
> ... this is to ensure we setup the programming for any new slave planes?
Yes.
>
>
> Matt
>
> > DRM_DEBUG_KMS("Using %s as Y plane for %s\n",
> > linked->base.name, plane->base.name);
> > }
> >
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > b/drivers/gpu/drm/i915/intel_drv.h
> > index 5331bbed5e8c..7a55f5921d34 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -925,6 +925,9 @@ struct intel_crtc_state {
> > u8 active_planes;
> > u8 nv12_planes;
> >
> > + /* bitmask of planes that will be updated during the commit */
> > + u8 update_planes;
> > +
> > /* HDMI scrambling status */
> > bool hdmi_scrambling;
> >
Re: [Intel-gfx] [PATCH 07/14] drm/i915: Move single buffered plane register writes to the end
On Thu, Nov 08, 2018 at 02:06:52PM -0800, Matt Roper wrote: > On Thu, Nov 01, 2018 at 05:05:58PM +0200, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > The plane color correction registers are single buffered. So > > ideally we would write them at the start of vblank just after the > > double buffered plane registers have been latched. Since we have > > no convenient way to do that for now let's at least move the > > single buffered register writes to happen after the double > > buffered registers have been written. > > Should we move this all the way out of the vblank evasion? I realize > that vlv is only two registers total so it's not a big deal, but I know > Uma is working on the plane color management stuff for later platforms > where we have a bunch of registers to write, so maybe we should setup > the callsite now? I didn't want to pile on too much work in this series. For the plane color management we might need to think how to do this properly as otherwise it's may end up being too ugly to actually use. I also have a branch somewhere with fp16 scanout support, and on ivb that requires playing around with the plane gamma as well. So that could be another natural point when we might come up with a better mechanism for single buffered registers. Although I'm not sure we can land fp16 any time soon though since there is no userspace currently. I implemented it just so that I could test the higher precision pipe gamma modes. > > On a similar note, I notice our single-buffered pipe-level color > management registers are written before evasion right now...should we > move that to after the evasion as well? Yes. I have that actually implemented on a branch that reworks the pipe color management stuff quite a bit. I'm actually moving it to happen after the vblank waits in the sequence, but I didn't add any kind of proper vblank worker etc. so I expect it's still likely to tear :( But at least it's a bit closer to where it really should be. I'm planning to post that series after this stuff lands as there is a slight dependency on the update_planes stuff and whatnot. -- Ville Syrjälä Intel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with drm/i915: Initialise the obj->rcu head (rev2)
== Series Details == Series: series starting with drm/i915: Initialise the obj->rcu head (rev2) URL : https://patchwork.freedesktop.org/series/52215/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5109_full -> Patchwork_10789_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10789_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10789_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10789_full: === IGT changes === Warnings igt@kms_draw_crc@draw-method-xrgb-mmap-cpu-untiled: shard-snb: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_10789_full that come from known issues: === IGT changes === Issues hit igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) +3 igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: shard-hsw: PASS -> DMESG-WARN (fdo#107956) igt@kms_color@pipe-c-legacy-gamma: shard-apl: PASS -> FAIL (fdo#104782) igt@kms_cursor_crc@cursor-256x256-suspend: shard-apl: PASS -> FAIL (fdo#103191, fdo#103232) igt@kms_cursor_crc@cursor-256x85-onscreen: shard-glk: NOTRUN -> FAIL (fdo#103232) +1 igt@kms_cursor_crc@cursor-64x21-random: shard-apl: PASS -> FAIL (fdo#103232) +2 igt@kms_flip@2x-flip-vs-expired-vblank: shard-glk: PASS -> FAIL (fdo#105363) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: shard-apl: PASS -> FAIL (fdo#103167) +1 igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render: shard-glk: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff: shard-glk: NOTRUN -> FAIL (fdo#103167) +3 igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb: shard-glk: NOTRUN -> FAIL (fdo#108145) +4 igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-apl: PASS -> FAIL (fdo#103166) +1 igt@kms_plane_multiple@atomic-pipe-a-tiling-yf: shard-glk: NOTRUN -> FAIL (fdo#103166) +1 igt@prime_vgem@basic-fence-flip: shard-kbl: PASS -> FAIL (fdo#104008) Possible fixes igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: shard-kbl: DMESG-WARN (fdo#107956) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite: shard-apl: FAIL (fdo#103167) -> PASS +2 igt@kms_plane_multiple@atomic-pipe-b-tiling-y: shard-apl: FAIL (fdo#103166) -> PASS fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008 fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145 == Participating hosts (6 -> 5) == Missing(1): shard-skl == Build changes == * Linux: CI_DRM_5109 -> Patchwork_10789 CI_DRM_5109: fd007cc63a9d60ac2a6f966a3c790e710aa8ca94 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10789: 4a9b9fbd2a9a370107c4b7f2de4345662ef74ba3 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10789/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Check if primary mst is null (rev3)
== Series Details == Series: drm: Check if primary mst is null (rev3) URL : https://patchwork.freedesktop.org/series/52174/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5109_full -> Patchwork_10788_full = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10788_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10788_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10788_full: === IGT changes === Possible regressions igt@kms_flip@flip-vs-fences: shard-apl: PASS -> DMESG-WARN igt@perf_pmu@cpu-hotplug: shard-apl: PASS -> TIMEOUT Warnings igt@kms_atomic_transition@plane-use-after-nonblocking-unbind-fencing: shard-snb: PASS -> SKIP +4 igt@perf_pmu@rc6: shard-kbl: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_10788_full that come from known issues: === IGT changes === Issues hit igt@gem_pwrite_pread@display-pwrite-blt-gtt_mmap-performance: shard-apl: PASS -> INCOMPLETE (fdo#103927) igt@gem_softpin@noreloc-s3: shard-snb: PASS -> INCOMPLETE (fdo#105411) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) +2 igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: shard-kbl: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: shard-hsw: PASS -> DMESG-WARN (fdo#107956) igt@kms_cursor_crc@cursor-256x256-suspend: shard-apl: PASS -> FAIL (fdo#103232, fdo#103191) igt@kms_cursor_crc@cursor-256x85-onscreen: shard-glk: NOTRUN -> FAIL (fdo#103232) +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu: shard-apl: PASS -> FAIL (fdo#103167) +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen: shard-glk: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff: shard-glk: NOTRUN -> FAIL (fdo#103167) +3 igt@kms_plane@plane-position-covered-pipe-c-planes: shard-glk: NOTRUN -> FAIL (fdo#103166) +1 igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb: shard-glk: NOTRUN -> FAIL (fdo#108145) +6 igt@kms_plane_multiple@atomic-pipe-b-tiling-x: shard-apl: PASS -> FAIL (fdo#103166) igt@kms_setmode@basic: shard-kbl: PASS -> FAIL (fdo#99912) Possible fixes igt@gem_ppgtt@blt-vs-render-ctx0: shard-kbl: INCOMPLETE (fdo#106023, fdo#103665, fdo#106887) -> PASS igt@kms_busy@extended-pageflip-hang-newfb-render-a: shard-apl: DMESG-WARN (fdo#107956) -> PASS igt@kms_ccs@pipe-b-crc-sprite-planes-basic: shard-glk: FAIL (fdo#108145) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite: shard-apl: FAIL (fdo#103167) -> PASS +2 igt@kms_setmode@basic: shard-apl: FAIL (fdo#99912) -> PASS fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411 fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023 fdo#106887 https://bugs.freedesktop.org/show_bug.cgi?id=106887 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (6 -> 5) == Missing(1): shard-skl == Build changes == * Linux: CI_DRM_5109 -> Patchwork_10788 CI_DRM_5109: fd007cc63a9d60ac2a6f966a3c790e710aa8ca94 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10788: be7a48dc82d53cbb027ec5b29d33e590535f96a1 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10788/shards.html ___ Intel-gfx mailing list
[Intel-gfx] ✓ Fi.CI.IGT: success for drm: Check if primary mst is null (rev2)
== Series Details == Series: drm: Check if primary mst is null (rev2) URL : https://patchwork.freedesktop.org/series/52174/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5109_full -> Patchwork_10786_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10786_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10786_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10786_full: === IGT changes === Warnings igt@perf_pmu@rc6: shard-kbl: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_10786_full that come from known issues: === IGT changes === Issues hit igt@gem_cpu_reloc@full: shard-skl: PASS -> INCOMPLETE (fdo#108073) igt@gem_ctx_isolation@rcs0-s3: shard-skl: PASS -> INCOMPLETE (fdo#107773, fdo#104108) igt@gem_render_linear_blits@basic: shard-kbl: PASS -> INCOMPLETE (fdo#103665) igt@kms_available_modes_crc@available_mode_test_crc: shard-skl: NOTRUN -> FAIL (fdo#106641) igt@kms_busy@extended-modeset-hang-newfb-render-a: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) +3 igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: shard-hsw: PASS -> DMESG-WARN (fdo#107956) igt@kms_chv_cursor_fail@pipe-c-256x256-top-edge: shard-skl: PASS -> FAIL (fdo#104671) igt@kms_color@pipe-c-ctm-blue-to-red: shard-skl: PASS -> FAIL (fdo#107201) igt@kms_cursor_crc@cursor-256x256-suspend: shard-apl: PASS -> FAIL (fdo#103191, fdo#103232) igt@kms_cursor_crc@cursor-256x85-onscreen: shard-glk: NOTRUN -> FAIL (fdo#103232) +1 igt@kms_cursor_crc@cursor-64x64-sliding: shard-apl: PASS -> FAIL (fdo#103232) +1 igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move: shard-glk: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff: shard-glk: NOTRUN -> FAIL (fdo#103167) +2 igt@kms_frontbuffer_tracking@fbcpsr-stridechange: shard-skl: NOTRUN -> FAIL (fdo#105683) igt@kms_plane@plane-panning-bottom-right-pipe-b-planes: shard-skl: PASS -> FAIL (fdo#103166) igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb: shard-skl: NOTRUN -> FAIL (fdo#108145) igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb: shard-glk: NOTRUN -> FAIL (fdo#108145) +5 igt@kms_plane_multiple@atomic-pipe-b-tiling-y: shard-glk: NOTRUN -> FAIL (fdo#103166) +3 igt@kms_plane_multiple@atomic-pipe-c-tiling-y: shard-apl: PASS -> FAIL (fdo#103166) igt@kms_setmode@basic: shard-kbl: PASS -> FAIL (fdo#99912) igt@perf@short-reads: shard-skl: PASS -> FAIL (fdo#103183) igt@pm_rpm@debugfs-forcewake-user: shard-skl: PASS -> INCOMPLETE (fdo#107807) igt@pm_rpm@gem-pread: shard-skl: NOTRUN -> INCOMPLETE (fdo#107807) igt@pm_rpm@system-suspend-modeset: shard-skl: NOTRUN -> INCOMPLETE (fdo#107773, fdo#107807, fdo#104108) Possible fixes igt@kms_ccs@pipe-b-crc-sprite-planes-basic: shard-glk: FAIL (fdo#108145) -> PASS igt@kms_cursor_crc@cursor-256x256-onscreen: shard-skl: FAIL (fdo#103232) -> PASS igt@kms_cursor_crc@cursor-256x256-sliding: shard-apl: FAIL (fdo#103232) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: shard-apl: FAIL (fdo#103167) -> PASS igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: shard-skl: INCOMPLETE (fdo#107773, fdo#104108) -> PASS +2 igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: shard-skl: FAIL (fdo#107815) -> PASS igt@pm_rpm@dpms-mode-unset-lpsp: shard-skl: INCOMPLETE (fdo#107807) -> PASS fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103183 https://bugs.freedesktop.org/show_bug.cgi?id=103183 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671 fdo#105683
Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/ddi: Add more sanity check to the encoder HW readout
On Fri, Nov 09, 2018 at 12:09:40AM +, Patchwork wrote: > == Series Details == > > Series: series starting with [1/2] drm/i915/ddi: Add more sanity check to the > encoder HW readout > URL : https://patchwork.freedesktop.org/series/52187/ > State : success > > == Summary == > > = CI Bug Log - changes from CI_DRM_5100_full -> Patchwork_10758_full = > > == Summary - WARNING == > > Minor unknown changes coming with Patchwork_10758_full need to be verified > manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_10758_full, please notify your bug team to allow > them > to document this new failure mode, which will reduce false positives in CI. > > > > == Possible new issues == > > Here are the unknown changes that may have been introduced in > Patchwork_10758_full: > > === IGT changes === > > Warnings > > igt@pm_rc6_residency@rc6-accuracy: > shard-snb: PASS -> SKIP Independent platform, looks like https://bugs.freedesktop.org/show_bug.cgi?id=108664 will add there a note about this skip. > > igt@tools_test@tools_test: > shard-kbl: SKIP -> PASS > > > == Known issues == > > Here are the changes found in Patchwork_10758_full that come from known > issues: > > === IGT changes === > > Issues hit > > igt@gem_exec_suspend@basic-s3: > shard-kbl: PASS -> FAIL (fdo#103375) > > igt@kms_color@pipe-b-legacy-gamma: > shard-apl: PASS -> FAIL (fdo#104782) > > igt@kms_cursor_crc@cursor-128x128-random: > shard-glk: PASS -> FAIL (fdo#103232) > > igt@kms_cursor_crc@cursor-128x128-suspend: > shard-apl: PASS -> FAIL (fdo#103232, fdo#103191) +1 > > igt@kms_cursor_crc@cursor-256x256-suspend: > shard-skl: PASS -> INCOMPLETE (fdo#104108) > > igt@kms_cursor_legacy@cursora-vs-flipa-toggle: > shard-glk: PASS -> DMESG-WARN (fdo#105763, fdo#106538) > > igt@kms_draw_crc@draw-method-rgb565-mmap-wc-untiled: > shard-skl: PASS -> FAIL (fdo#103184) > > igt@kms_flip@flip-vs-expired-vblank: > shard-glk: PASS -> FAIL (fdo#105363, fdo#102887) > > igt@kms_flip@flip-vs-expired-vblank-interruptible: > shard-glk: PASS -> FAIL (fdo#105363) > > igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: > shard-apl: PASS -> FAIL (fdo#103167) > > igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt: > shard-glk: PASS -> FAIL (fdo#103167) +4 > > igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-pgflip-blt: > shard-apl: SKIP -> INCOMPLETE (fdo#103927) > > igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: > shard-skl: PASS -> INCOMPLETE (fdo#104108, fdo#107773) > > igt@pm_rpm@legacy-planes-dpms: > shard-skl: PASS -> INCOMPLETE (fdo#107807, fdo#105959) > > igt@pm_rpm@modeset-lpsp: > shard-skl: PASS -> INCOMPLETE (fdo#107807) +1 > > > Possible fixes > > igt@kms_busy@extended-modeset-hang-newfb-render-b: > shard-kbl: DMESG-WARN (fdo#107956) -> PASS +1 > > igt@kms_cursor_crc@cursor-128x128-random: > shard-apl: FAIL (fdo#103232) -> PASS +2 > > igt@kms_cursor_crc@cursor-64x64-random: > shard-glk: FAIL (fdo#103232) -> PASS +1 > > igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size: > shard-glk: DMESG-WARN (fdo#105763, fdo#106538) -> PASS > > igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff: > shard-glk: FAIL (fdo#103167) -> PASS > > igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: > shard-glk: INCOMPLETE (k.org#198133, fdo#103359) -> PASS > > igt@kms_plane_multiple@atomic-pipe-a-tiling-x: > shard-glk: FAIL (fdo#103166) -> PASS > > igt@kms_setmode@basic: > shard-kbl: FAIL (fdo#99912) -> PASS > > igt@kms_universal_plane@universal-plane-pipe-b-functional: > shard-apl: FAIL (fdo#103166) -> PASS +2 > > igt@perf@polling: > shard-hsw: FAIL (fdo#102252) -> PASS > > > Warnings > > igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-cpu: > shard-snb: DMESG-WARN (fdo#107469) -> INCOMPLETE (fdo#105411) > > > fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 > fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 > fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 > fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 > fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184 > fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 > fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 > fdo#103359
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/ddi: Add more sanity check to the encoder HW readout
== Series Details == Series: series starting with [1/2] drm/i915/ddi: Add more sanity check to the encoder HW readout URL : https://patchwork.freedesktop.org/series/52187/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5100 -> Patchwork_10758 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/52187/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10758 that come from known issues: === IGT changes === Issues hit igt@gem_ctx_create@basic-files: fi-bsw-kefka: PASS -> FAIL (fdo#108656) igt@gem_exec_nop@basic-parallel: fi-icl-u: PASS -> INCOMPLETE (fdo#108315) igt@gem_mmap_gtt@basic-small-bo-tiledx: fi-glk-dsi: PASS -> INCOMPLETE (fdo#103359, k.org#198133) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-byt-clapper: PASS -> FAIL (fdo#107362, fdo#103191) Possible fixes igt@drv_getparams_basic@basic-subslice-total: fi-cfl-8109u: DMESG-WARN (fdo#106107) -> PASS igt@drv_selftest@live_coherency: fi-gdg-551: DMESG-FAIL (fdo#107164) -> PASS igt@gem_exec_suspend@basic-s3: fi-cfl-8109u: INCOMPLETE (fdo#107187, fdo#108126) -> PASS igt@kms_chamelium@common-hpd-after-suspend: fi-skl-6700k2: WARN (fdo#108680) -> PASS igt@kms_frontbuffer_tracking@basic: fi-hsw-peppy: DMESG-WARN (fdo#102614) -> PASS fi-byt-clapper: FAIL (fdo#103167) -> PASS Warnings igt@drv_selftest@live_contexts: fi-icl-u2: DMESG-FAIL (fdo#108569) -> INCOMPLETE (fdo#108315) fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359 fdo#106107 https://bugs.freedesktop.org/show_bug.cgi?id=106107 fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164 fdo#107187 https://bugs.freedesktop.org/show_bug.cgi?id=107187 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#108126 https://bugs.freedesktop.org/show_bug.cgi?id=108126 fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569 fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656 fdo#108680 https://bugs.freedesktop.org/show_bug.cgi?id=108680 k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133 == Participating hosts (54 -> 46) == Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-ctg-p8600 fi-pnv-d510 == Build changes == * Linux: CI_DRM_5100 -> Patchwork_10758 CI_DRM_5100: c5f9a3064d90c86dab99d5aef011b87f6f8921dc @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4712: a3ede1b535ac8137f6949c468edd7054453d5dae @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10758: 60ace73cb0f8e814e6a6e34d6c9775d5fcf077a8 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 60ace73cb0f8 drm/i915/icl: Fix PLL mapping sanitization for DP ports ee7b2ea5708d drm/i915/ddi: Add more sanity check to the encoder HW readout == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10758/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH xf86-video-intel v6] sna: Added AYUV format support for textured and sprite video adapters.
On Fri, Nov 09, 2018 at 10:18:50AM +0200, Lisovskiy, Stanislav wrote: > On Thu, 2018-11-08 at 19:47 +0200, Ville Syrjälä wrote: > > On Fri, Nov 02, 2018 at 12:06:03PM +0200, Stanislav Lisovskiy wrote: > > > v2: Renamed DRM_FORMAT_XYUV to DRM_FORMAT_XYUV. > > > Added comment about AYUV byte ordering in Gstreamer. > > > > > > v3: Removed sna_composite_op flags related change to the separate > > > patch. > > > > > > v4: Fixed review comments, done code refactoring > > > > > > v5: Fixed following review comments: > > > - Fixed comment in shader code for ayuv kernel. > > > - Fixed naming to VIDEO_AYUV_BT601/BT709 for ayuv kernels. > > > - Removed duplicate gen9_kernel parameter, left from previous > > > patches > > > - Added colorspace handling for new AYUV kernel > > > - Fixed naming of sna_copy_packed_data_ayuv to > > > sna_copy_ayuv_data > > > - Started using standard bswap_32 function for byte swapping in > > > sna_copy_ayuv_data > > > - Removed redundant code in sna_copy_ayuv_data so that it looks > > > more neat > > > - Fixed XVIMAGE_AYUV structure initialization to contain proper > > > byte sequence for GST > > > - Fixed bogus comment about subsampling for DRM_FORMAT_XYUV > > > - Fixed AYUV advertisement for all platforms > > > - Removed unnecessary RGB888 declaration. > > > > > > v6: > > > - Fixed surface format not to use alpha as supposed > > > - Now doing byte swapping always during copy > > > - Changed hack, required for GST to work to be at one place > > > - Fixed invalid sampling values for XVIMAGE_AYUV > > > - Fixed sprite format checking order and images_ayuv > > > definition. > > > > > > Signed-off-by: Stanislav Lisovskiy > > > --- > > > src/render_program/Makefile.am| 2 + > > > .../exa_wm_src_sample_argb_ayuv.g8a | 76 > > > > > > .../exa_wm_src_sample_argb_ayuv.g8b | 8 ++ > > > src/sna/gen9_render.c | 24 - > > > src/sna/sna_render.h | 3 + > > > src/sna/sna_video.c | 89 > > > ++- > > > src/sna/sna_video.h | 20 + > > > src/sna/sna_video_sprite.c| 20 - > > > src/sna/sna_video_textured.c | 7 ++ > > > 9 files changed, 244 insertions(+), 5 deletions(-) > > > create mode 100644 > > > src/render_program/exa_wm_src_sample_argb_ayuv.g8a > > > create mode 100644 > > > src/render_program/exa_wm_src_sample_argb_ayuv.g8b > > > > > > diff --git a/src/render_program/Makefile.am > > > b/src/render_program/Makefile.am > > > index dc58138f..e35ffa52 100644 > > > --- a/src/render_program/Makefile.am > > > +++ b/src/render_program/Makefile.am > > > @@ -196,6 +196,7 @@ INTEL_G7B = \ > > > INTEL_G8A = \ > > > exa_wm_src_affine.g8a \ > > > exa_wm_src_sample_argb.g8a \ > > > + exa_wm_src_sample_argb_ayuv.g8a \ > > > exa_wm_src_sample_nv12.g8a \ > > > exa_wm_src_sample_planar.g8a\ > > > exa_wm_write.g8a\ > > > @@ -205,6 +206,7 @@ INTEL_G8A = \ > > > > > > INTEL_G8B = \ > > > exa_wm_src_affine.g8b \ > > > + exa_wm_src_sample_argb_ayuv.g8b \ > > > exa_wm_src_sample_argb.g8b \ > > > exa_wm_src_sample_nv12.g8b \ > > > exa_wm_src_sample_planar.g8b\ > > > diff --git a/src/render_program/exa_wm_src_sample_argb_ayuv.g8a > > > b/src/render_program/exa_wm_src_sample_argb_ayuv.g8a > > > new file mode 100644 > > > index ..c0b84c2e > > > --- /dev/null > > > +++ b/src/render_program/exa_wm_src_sample_argb_ayuv.g8a > > > @@ -0,0 +1,76 @@ > > > +/* > > > + * Copyright © 2006 Intel Corporation > > > + * > > > + * Permission is hereby granted, free of charge, to any person > > > obtaining a > > > + * copy of this software and associated documentation files (the > > > "Software"), > > > + * to deal in the Software without restriction, including without > > > limitation > > > + * the rights to use, copy, modify, merge, publish, distribute, > > > sublicense, > > > + * and/or sell copies of the Software, and to permit persons to > > > whom the > > > + * Software is furnished to do so, subject to the following > > > conditions: > > > + * > > > + * The above copyright notice and this permission notice > > > (including the next > > > + * paragraph) shall be included in all copies or substantial > > > portions of the > > > + * Software. > > > + * > > > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, > > > EXPRESS OR > > > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF > > > MERCHANTABILITY, > > > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO > > > EVENT SHALL > > > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, > > > DAMAGES OR OTHER > > > + * LIABILITY, WHETHER IN
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/ddi: Add more sanity check to the encoder HW readout
On 09/11/2018 14:40, Deak, Imre wrote: > On Wed, Nov 07, 2018 at 08:39:24PM +, Patchwork wrote: >> == Series Details == >> >> Series: series starting with [1/2] drm/i915/ddi: Add more sanity check to >> the encoder HW readout >> URL : https://patchwork.freedesktop.org/series/52187/ >> State : failure >> >> == Summary == >> >> = CI Bug Log - changes from CI_DRM_5100 -> Patchwork_10758 = >> >> == Summary - FAILURE == >> >> Serious unknown changes coming with Patchwork_10758 absolutely need to be >> verified manually. >> >> If you think the reported changes have nothing to do with the changes >> introduced in Patchwork_10758, please notify your bug team to allow them >> to document this new failure mode, which will reduce false positives in CI. >> >> External URL: >> https://patchwork.freedesktop.org/api/1.0/series/52187/revisions/1/mbox/ >> >> == Possible new issues == >> >> Here are the unknown changes that may have been introduced in >> Patchwork_10758: >> >> === IGT changes === >> >> Possible regressions >> >> igt@gem_exec_nop@basic-parallel: >> fi-icl-u: PASS -> INCOMPLETE > > https://bugs.freedesktop.org/show_bug.cgi?id=108564 > Filed and re-reporting queued. Thanks! >> >> >> == Known issues == >> >> Here are the changes found in Patchwork_10758 that come from known issues: >> >> === IGT changes === >> >> Issues hit >> >> igt@gem_ctx_create@basic-files: >> fi-bsw-kefka: PASS -> FAIL (fdo#108656) >> >> igt@gem_mmap_gtt@basic-small-bo-tiledx: >> fi-glk-dsi: PASS -> INCOMPLETE (fdo#103359, k.org#198133) >> >> igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: >> fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362) >> >> >> Possible fixes >> >> igt@drv_getparams_basic@basic-subslice-total: >> fi-cfl-8109u: DMESG-WARN (fdo#106107) -> PASS >> >> igt@drv_selftest@live_coherency: >> fi-gdg-551: DMESG-FAIL (fdo#107164) -> PASS >> >> igt@gem_exec_suspend@basic-s3: >> fi-cfl-8109u: INCOMPLETE (fdo#108126, fdo#107187) -> PASS >> >> igt@kms_chamelium@common-hpd-after-suspend: >> fi-skl-6700k2: WARN (fdo#108680) -> PASS >> >> igt@kms_frontbuffer_tracking@basic: >> fi-hsw-peppy: DMESG-WARN (fdo#102614) -> PASS >> fi-byt-clapper: FAIL (fdo#103167) -> PASS >> >> >> Warnings >> >> igt@drv_selftest@live_contexts: >> fi-icl-u2: DMESG-FAIL (fdo#108569) -> INCOMPLETE (fdo#108315) >> >> >> fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 >> fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 >> fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 >> fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359 >> fdo#106107 https://bugs.freedesktop.org/show_bug.cgi?id=106107 >> fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164 >> fdo#107187 https://bugs.freedesktop.org/show_bug.cgi?id=107187 >> fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 >> fdo#108126 https://bugs.freedesktop.org/show_bug.cgi?id=108126 >> fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 >> fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569 >> fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656 >> fdo#108680 https://bugs.freedesktop.org/show_bug.cgi?id=108680 >> k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133 >> >> >> == Participating hosts (54 -> 46) == >> >> Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks >> fi-bsw-cyan fi-snb-2520m fi-ctg-p8600 fi-pnv-d510 >> >> >> == Build changes == >> >> * Linux: CI_DRM_5100 -> Patchwork_10758 >> >> CI_DRM_5100: c5f9a3064d90c86dab99d5aef011b87f6f8921dc @ >> git://anongit.freedesktop.org/gfx-ci/linux >> IGT_4712: a3ede1b535ac8137f6949c468edd7054453d5dae @ >> git://anongit.freedesktop.org/xorg/app/intel-gpu-tools >> Patchwork_10758: 60ace73cb0f8e814e6a6e34d6c9775d5fcf077a8 @ >> git://anongit.freedesktop.org/gfx-ci/linux >> >> >> == Linux commits == >> >> 60ace73cb0f8 drm/i915/icl: Fix PLL mapping sanitization for DP ports >> ee7b2ea5708d drm/i915/ddi: Add more sanity check to the encoder HW readout >> >> == Logs == >> >> For more details see: >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10758/issues.html > - Intel Finland Oy Registered Address: PL 281, 00181 Helsinki Business Identity Code: 0357606 - 4 Domiciled in Helsinki This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. ___ Intel-gfx mailing list
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/ddi: Add more sanity check to the encoder HW readout
On Wed, Nov 07, 2018 at 08:39:24PM +, Patchwork wrote: > == Series Details == > > Series: series starting with [1/2] drm/i915/ddi: Add more sanity check to the > encoder HW readout > URL : https://patchwork.freedesktop.org/series/52187/ > State : failure > > == Summary == > > = CI Bug Log - changes from CI_DRM_5100 -> Patchwork_10758 = > > == Summary - FAILURE == > > Serious unknown changes coming with Patchwork_10758 absolutely need to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_10758, please notify your bug team to allow them > to document this new failure mode, which will reduce false positives in CI. > > External URL: > https://patchwork.freedesktop.org/api/1.0/series/52187/revisions/1/mbox/ > > == Possible new issues == > > Here are the unknown changes that may have been introduced in > Patchwork_10758: > > === IGT changes === > > Possible regressions > > igt@gem_exec_nop@basic-parallel: > fi-icl-u: PASS -> INCOMPLETE https://bugs.freedesktop.org/show_bug.cgi?id=108564 > > > == Known issues == > > Here are the changes found in Patchwork_10758 that come from known issues: > > === IGT changes === > > Issues hit > > igt@gem_ctx_create@basic-files: > fi-bsw-kefka: PASS -> FAIL (fdo#108656) > > igt@gem_mmap_gtt@basic-small-bo-tiledx: > fi-glk-dsi: PASS -> INCOMPLETE (fdo#103359, k.org#198133) > > igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: > fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362) > > > Possible fixes > > igt@drv_getparams_basic@basic-subslice-total: > fi-cfl-8109u: DMESG-WARN (fdo#106107) -> PASS > > igt@drv_selftest@live_coherency: > fi-gdg-551: DMESG-FAIL (fdo#107164) -> PASS > > igt@gem_exec_suspend@basic-s3: > fi-cfl-8109u: INCOMPLETE (fdo#108126, fdo#107187) -> PASS > > igt@kms_chamelium@common-hpd-after-suspend: > fi-skl-6700k2: WARN (fdo#108680) -> PASS > > igt@kms_frontbuffer_tracking@basic: > fi-hsw-peppy: DMESG-WARN (fdo#102614) -> PASS > fi-byt-clapper: FAIL (fdo#103167) -> PASS > > > Warnings > > igt@drv_selftest@live_contexts: > fi-icl-u2: DMESG-FAIL (fdo#108569) -> INCOMPLETE (fdo#108315) > > > fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 > fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 > fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 > fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359 > fdo#106107 https://bugs.freedesktop.org/show_bug.cgi?id=106107 > fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164 > fdo#107187 https://bugs.freedesktop.org/show_bug.cgi?id=107187 > fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 > fdo#108126 https://bugs.freedesktop.org/show_bug.cgi?id=108126 > fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 > fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569 > fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656 > fdo#108680 https://bugs.freedesktop.org/show_bug.cgi?id=108680 > k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133 > > > == Participating hosts (54 -> 46) == > > Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks > fi-bsw-cyan fi-snb-2520m fi-ctg-p8600 fi-pnv-d510 > > > == Build changes == > > * Linux: CI_DRM_5100 -> Patchwork_10758 > > CI_DRM_5100: c5f9a3064d90c86dab99d5aef011b87f6f8921dc @ > git://anongit.freedesktop.org/gfx-ci/linux > IGT_4712: a3ede1b535ac8137f6949c468edd7054453d5dae @ > git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > Patchwork_10758: 60ace73cb0f8e814e6a6e34d6c9775d5fcf077a8 @ > git://anongit.freedesktop.org/gfx-ci/linux > > > == Linux commits == > > 60ace73cb0f8 drm/i915/icl: Fix PLL mapping sanitization for DP ports > ee7b2ea5708d drm/i915/ddi: Add more sanity check to the encoder HW readout > > == Logs == > > For more details see: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10758/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Check if primary mst is null (rev3)
== Series Details == Series: drm: Check if primary mst is null (rev3) URL : https://patchwork.freedesktop.org/series/52174/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5109_full -> Patchwork_10788_full = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10788_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10788_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10788_full: === IGT changes === Possible regressions igt@kms_flip@flip-vs-fences: shard-apl: PASS -> DMESG-WARN igt@perf_pmu@cpu-hotplug: shard-apl: PASS -> TIMEOUT Warnings igt@kms_atomic_transition@plane-use-after-nonblocking-unbind-fencing: shard-snb: PASS -> SKIP +4 igt@perf_pmu@rc6: shard-kbl: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_10788_full that come from known issues: === IGT changes === Issues hit igt@gem_pwrite_pread@display-pwrite-blt-gtt_mmap-performance: shard-apl: PASS -> INCOMPLETE (fdo#103927) igt@gem_softpin@noreloc-s3: shard-snb: PASS -> INCOMPLETE (fdo#105411) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) +2 igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: shard-kbl: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: shard-hsw: PASS -> DMESG-WARN (fdo#107956) igt@kms_cursor_crc@cursor-256x256-suspend: shard-apl: PASS -> FAIL (fdo#103232, fdo#103191) igt@kms_cursor_crc@cursor-256x85-onscreen: shard-glk: NOTRUN -> FAIL (fdo#103232) +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu: shard-apl: PASS -> FAIL (fdo#103167) +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen: shard-glk: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff: shard-glk: NOTRUN -> FAIL (fdo#103167) +3 igt@kms_plane@plane-position-covered-pipe-c-planes: shard-glk: NOTRUN -> FAIL (fdo#103166) +1 igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb: shard-glk: NOTRUN -> FAIL (fdo#108145) +6 igt@kms_plane_multiple@atomic-pipe-b-tiling-x: shard-apl: PASS -> FAIL (fdo#103166) igt@kms_setmode@basic: shard-kbl: PASS -> FAIL (fdo#99912) Possible fixes igt@gem_ppgtt@blt-vs-render-ctx0: shard-kbl: INCOMPLETE (fdo#103665, fdo#106023, fdo#106887) -> PASS igt@kms_busy@extended-pageflip-hang-newfb-render-a: shard-apl: DMESG-WARN (fdo#107956) -> PASS igt@kms_ccs@pipe-b-crc-sprite-planes-basic: shard-glk: FAIL (fdo#108145) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite: shard-apl: FAIL (fdo#103167) -> PASS +2 igt@kms_setmode@basic: shard-apl: FAIL (fdo#99912) -> PASS fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411 fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023 fdo#106887 https://bugs.freedesktop.org/show_bug.cgi?id=106887 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (6 -> 5) == Missing(1): shard-skl == Build changes == * Linux: CI_DRM_5109 -> Patchwork_10788 CI_DRM_5109: fd007cc63a9d60ac2a6f966a3c790e710aa8ca94 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10788: be7a48dc82d53cbb027ec5b29d33e590535f96a1 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10788/shards.html ___ Intel-gfx mailing list
Re: [Intel-gfx] [PATCH 2/3] drm/i915: Return immediately if trylock fails for direct-reclaim
Quoting Tvrtko Ursulin (2018-11-09 07:30:34)
>
> On 08/11/2018 16:48, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-11-08 16:23:08)
> >>
> >> On 08/11/2018 08:17, Chris Wilson wrote:
> >>> Ignore trying to shrink from i915 if we fail to acquire the struct_mutex
> >>> in the shrinker while performing direct-reclaim. The trade-off being
> >>> (much) lower latency for non-i915 clients at an increased risk of being
> >>> unable to obtain a page from direct-reclaim without hitting the
> >>> oom-notifier. The proviso being that we still keep trying to hard
> >>> obtain the lock for oom so that we can reap under heavy memory pressure.
> >>>
> >>> Signed-off-by: Chris Wilson
> >>> Cc: Tvrtko Ursulin
> >>> ---
> >>>drivers/gpu/drm/i915/i915_gem_shrinker.c | 24 +++-
> >>>1 file changed, 11 insertions(+), 13 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/i915/i915_gem_shrinker.c
> >>> b/drivers/gpu/drm/i915/i915_gem_shrinker.c
> >>> index ea90d3a0d511..d461f458f4af 100644
> >>> --- a/drivers/gpu/drm/i915/i915_gem_shrinker.c
> >>> +++ b/drivers/gpu/drm/i915/i915_gem_shrinker.c
> >>> @@ -36,7 +36,9 @@
> >>>#include "i915_drv.h"
> >>>#include "i915_trace.h"
> >>>
> >>> -static bool shrinker_lock(struct drm_i915_private *i915, bool *unlock)
> >>> +static bool shrinker_lock(struct drm_i915_private *i915,
> >>> + unsigned int flags,
> >>> + bool *unlock)
> >>>{
> >>>switch (mutex_trylock_recursive(>drm.struct_mutex)) {
> >>>case MUTEX_TRYLOCK_RECURSIVE:
> >>> @@ -45,15 +47,11 @@ static bool shrinker_lock(struct drm_i915_private
> >>> *i915, bool *unlock)
> >>>
> >>>case MUTEX_TRYLOCK_FAILED:
> >>>*unlock = false;
> >>> - preempt_disable();
> >>> - do {
> >>> - cpu_relax();
> >>> - if (mutex_trylock(>drm.struct_mutex)) {
> >>> - *unlock = true;
> >>> - break;
> >>> - }
> >>> - } while (!need_resched());
> >>> - preempt_enable();
> >>> + if (flags & I915_SHRINK_ACTIVE) {
> >>
> >> So until I915_SHRINK_ACTIVE, which is the last ditch attempt to shrink
> >> in the normal case (direct reclaim?) or oom, we bail out on the first
> >> sign of struct mutex contention. Doesn't this make our shrinker much
> >> less effective at runtime and why is that OK?
> >
> > As I said, it's a tradeoff between blocking others for _several_
> > _seconds_ and making no progress and returning immediately and making no
> > progress. My argument is along the lines of if direct-reclaim is running
> > in another process and something else is engaged in the driver hopefully
> > the driver will be cleaning up as it goes along or else what remains is
> > active and won't be reaped anyway. If direct reclaim is failing, the
> > delay before trying the oom path is insignificant.
>
> What was the rationale behind busy looping there btw?
Emulating the optimistic spin for mutex (my patches to expose it from
kernel/locking were kept hidden for public decency). My thinking was the
exact opposite to this patch, that direct reclaim was of paramount
importance and spending the time to try and ensure we grabbed the
struct_mutex to search for some pages to free was preferable.
It's just on the basis of looking at the actual syslatency and realising
the cause is this spinner, I want to swing the axe in other direction.
(There's probably a compromise, but honestly I'd prefer to sell the
struct_mutex free version of the shrinker first :)
> Compared to
> perhaps an alternative of micro-sleeps and trying a few times? I know it
> would be opposite from what this patch is trying to achieve, I Just
> don't had a good judgment on what makes most sense for the shrinker. Is
> it better to perhaps try a little bit harder instead of giving up
> immediately, but try a little bit harder in a softer way? Or that ends
> up blocking the callers and has the same effect of making no progress?
Exactly. We can definitely measure the impact of the spinner on
unrelated processes, but detecting the premature allocation failure is
harder (we wait for more dmesg-warns). The compromise that I've tried to
reach here is that if direct-reclaim isn't enough, then we should still
try hard to grab the struct_mutex. (That leaves __GFP_RETRY_MAYFAIL
vulnerable to not shrinking i915, but a worthwhile compromise as it's
allowed to fail?)
> >> Or in other words, for what use cases, tests or benchmark was the
> >> existing approach of busy looping a problem?
> >
> > Do something like 'find / -exec cat' while running i915 and see how long
> > you have to wait for a khungtaskd :|
>
> I couldn't reproduce anything strange with this. Assuming you meant
> something like -exec cat { } \; >dev/null.
>
> Either case I think explanations like this should go into the commit
>
Re: [Intel-gfx] [PATCH 2/2] drm/i915: Track rcu_head for our idle worker
Chris Wilson writes:
> While our little rcu worker might be able to be replaced now by the
> dedicated rcu_work, in the meantime we should mark up the rcu_head for
> correct debugobjects tracking.
>
> Signed-off-by: Chris Wilson
I got distracted on looking how the epoch works.
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/i915_gem.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 24f126ccf21e..5537f4030717 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3557,6 +3557,8 @@ static void __sleep_rcu(struct rcu_head *rcu)
> struct sleep_rcu_work *s = container_of(rcu, typeof(*s), rcu);
> struct drm_i915_private *i915 = s->i915;
>
> + destroy_rcu_head(>rcu);
> +
> if (same_epoch(i915, s->epoch)) {
> INIT_WORK(>work, __sleep_work);
> queue_work(i915->wq, >work);
> @@ -3673,6 +3675,7 @@ i915_gem_idle_work_handler(struct work_struct *work)
> if (same_epoch(dev_priv, epoch)) {
> struct sleep_rcu_work *s = kmalloc(sizeof(*s), GFP_KERNEL);
> if (s) {
> + init_rcu_head(>rcu);
> s->i915 = dev_priv;
> s->epoch = epoch;
> call_rcu(>rcu, __sleep_rcu);
> --
> 2.19.1
>
> ___
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> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [Intel-gfx] [PATCH] drm/i915/query: fix subslice length
On 09/11/2018 00:40, Daniele Ceraolo Spurio wrote: We dump the info as an array of u8, so we want to know the length in number of bytes. Current code is still safe because the variable we use BITS_PER_TYPE on is a u8. Cc: Lionel Landwerlin Cc: Tvrtko Ursulin Signed-off-by: Daniele Ceraolo Spurio Reviewed-by: Lionel Landwerlin --- drivers/gpu/drm/i915/i915_query.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c index 5821002cad42..6fc4b8eeab42 100644 --- a/drivers/gpu/drm/i915/i915_query.c +++ b/drivers/gpu/drm/i915/i915_query.c @@ -27,8 +27,7 @@ static int query_topology_info(struct drm_i915_private *dev_priv, slice_length = sizeof(sseu->slice_mask); subslice_length = sseu->max_slices * - DIV_ROUND_UP(sseu->max_subslices, -BITS_PER_TYPE(sseu->subslice_mask[0])); + DIV_ROUND_UP(sseu->max_subslices, BITS_PER_BYTE); eu_length = sseu->max_slices * sseu->max_subslices * DIV_ROUND_UP(sseu->max_eus_per_subslice, BITS_PER_BYTE); ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/query: fix subslice length
== Series Details ==
Series: drm/i915/query: fix subslice length
URL : https://patchwork.freedesktop.org/series/52270/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5108_full -> Patchwork_10784_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10784_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10784_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in
Patchwork_10784_full:
=== IGT changes ===
Warnings
{igt@kms_lease@lease_invalid_connector}:
shard-snb: SKIP -> PASS +1
igt@perf_pmu@rc6:
shard-kbl: SKIP -> PASS
== Known issues ==
Here are the changes found in Patchwork_10784_full that come from known
issues:
=== IGT changes ===
Issues hit
igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
shard-apl: PASS -> DMESG-WARN (fdo#107956)
igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
shard-glk: PASS -> FAIL (fdo#108145)
igt@kms_chv_cursor_fail@pipe-c-64x64-right-edge:
shard-kbl: PASS -> DMESG-WARN (fdo#105345)
igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
shard-glk: NOTRUN -> FAIL (fdo#106509, fdo#105454)
igt@kms_draw_crc@draw-method-xrgb2101010-mmap-gtt-xtiled:
shard-skl: PASS -> FAIL (fdo#103184)
igt@kms_fbcon_fbt@psr-suspend:
shard-skl: NOTRUN -> FAIL (fdo#107882)
igt@kms_flip@plain-flip-ts-check:
shard-skl: PASS -> FAIL (fdo#100368)
igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
shard-skl: NOTRUN -> FAIL (fdo#103167) +3
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
shard-glk: PASS -> FAIL (fdo#103167)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
shard-apl: PASS -> FAIL (fdo#103167)
igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render:
shard-skl: NOTRUN -> FAIL (fdo#105682)
igt@kms_plane@pixel-format-pipe-c-planes:
shard-skl: NOTRUN -> DMESG-WARN (fdo#106885)
igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
shard-skl: PASS -> FAIL (fdo#107815)
igt@kms_rotation_crc@primary-rotation-90:
shard-skl: NOTRUN -> FAIL (fdo#103925, fdo#107815)
igt@kms_setmode@basic:
shard-apl: PASS -> FAIL (fdo#99912)
shard-glk: NOTRUN -> FAIL (fdo#99912)
shard-kbl: PASS -> FAIL (fdo#99912)
igt@kms_vblank@pipe-c-ts-continuation-modeset-rpm:
shard-kbl: PASS -> DMESG-WARN (fdo#105345, fdo#103313)
igt@pm_rpm@gem-pread:
shard-skl: PASS -> INCOMPLETE (fdo#107807) +1
Possible fixes
igt@kms_busy@extended-pageflip-hang-newfb-render-a:
shard-glk: DMESG-WARN (fdo#107956) -> PASS
igt@kms_chv_cursor_fail@pipe-c-256x256-top-edge:
shard-skl: FAIL (fdo#104671) -> PASS
igt@kms_color@pipe-c-ctm-blue-to-red:
shard-skl: FAIL (fdo#107201) -> PASS
igt@kms_cursor_crc@cursor-128x128-suspend:
shard-skl: INCOMPLETE (fdo#104108) -> PASS
igt@kms_cursor_crc@cursor-256x256-suspend:
shard-apl: FAIL (fdo#103191, fdo#103232) -> PASS
igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render:
shard-glk: FAIL (fdo#103167) -> PASS
igt@kms_plane@pixel-format-pipe-b-planes:
shard-apl: FAIL (fdo#103166) -> PASS
igt@perf@polling:
shard-hsw: FAIL (fdo#102252) -> PASS
igt@pm_rpm@basic-rte:
shard-skl: INCOMPLETE (fdo#107807) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671
fdo#105345 https://bugs.freedesktop.org/show_bug.cgi?id=105345
fdo#105454 https://bugs.freedesktop.org/show_bug.cgi?id=105454
fdo#105682
Re: [Intel-gfx] [PATCH] drm/i915: Initialise the obj->rcu head
Quoting Mika Kuoppala (2018-11-09 10:32:30) > Chris Wilson writes: > > > Make the rcu_head known to the system, in particular for debugobjects. > > And having declared it for debugobjects, we need to tidy up afterwards. > > > > v2: mark the obj->rcu as being destroy when we reuse its location for > > the freed list. > > > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108691 > > Signed-off-by: Chris Wilson > > Reviewed-by: Mika Kuoppala Merged the first as it will close a couple of bugs, care to check over the second? :) -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Initialise the obj->rcu head
Chris Wilson writes: > Make the rcu_head known to the system, in particular for debugobjects. > And having declared it for debugobjects, we need to tidy up afterwards. > > v2: mark the obj->rcu as being destroy when we reuse its location for > the freed list. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108691 > Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/i915_gem.c | 9 + > 1 file changed, 9 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index dc120b5d8e05..1c9a41ea6834 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -4739,6 +4739,8 @@ void i915_gem_object_init(struct drm_i915_gem_object > *obj, > INIT_LIST_HEAD(>lut_list); > INIT_LIST_HEAD(>batch_pool_link); > > + init_rcu_head(>rcu); > + > obj->ops = ops; > > reservation_object_init(>__builtin_resv); > @@ -5005,6 +5007,13 @@ static void __i915_gem_free_object_rcu(struct rcu_head > *head) > container_of(head, typeof(*obj), rcu); > struct drm_i915_private *i915 = to_i915(obj->base.dev); > > + /* > + * We reuse obj->rcu for the freed list, so we had better not treat > + * is like a rcu_head from this point forwards. And we expect all > + * objects to be freed via this path. > + */ > + destroy_rcu_head(>rcu); > + > /* >* Since we require blocking on struct_mutex to unbind the freed >* object from the GPU before releasing resources back to the > -- > 2.19.1 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for Add XYUV format support (rev10)
== Series Details == Series: Add XYUV format support (rev10) URL : https://patchwork.freedesktop.org/series/48007/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5109 -> Patchwork_10790 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10790 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10790, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/48007/revisions/10/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10790: === IGT changes === Possible regressions igt@drv_selftest@live_hangcheck: fi-bwr-2160:PASS -> DMESG-FAIL igt@drv_selftest@live_hugepages: fi-skl-6700k2: PASS -> INCOMPLETE Warnings igt@kms_chamelium@common-hpd-after-suspend: fi-skl-6700k2: WARN (fdo#108680) -> TIMEOUT == Known issues == Here are the changes found in Patchwork_10790 that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_execlists: fi-apl-guc: PASS -> INCOMPLETE (fdo#103927, fdo#106693) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-byt-clapper: PASS -> FAIL (fdo#107362, fdo#103191) Possible fixes igt@drv_selftest@live_contexts: fi-bsw-n3050: DMESG-FAIL (fdo#108626) -> PASS igt@gem_exec_suspend@basic-s3: fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#106693 https://bugs.freedesktop.org/show_bug.cgi?id=106693 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#108626 https://bugs.freedesktop.org/show_bug.cgi?id=108626 fdo#108680 https://bugs.freedesktop.org/show_bug.cgi?id=108680 == Participating hosts (53 -> 46) == Additional (1): fi-pnv-d510 Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-ctg-p8600 fi-icl-u == Build changes == * Linux: CI_DRM_5109 -> Patchwork_10790 CI_DRM_5109: fd007cc63a9d60ac2a6f966a3c790e710aa8ca94 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10790: 314594adeb74eed6f89957ef942137d89d87bbc4 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 314594adeb74 drm/i915: Adding YUV444 packed format support for skl+ 6fceb8451e96 drm: Introduce new DRM_FORMAT_XYUV == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10790/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add XYUV format support (rev10)
== Series Details ==
Series: Add XYUV format support (rev10)
URL : https://patchwork.freedesktop.org/series/48007/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6fceb8451e96 drm: Introduce new DRM_FORMAT_XYUV
-:36: WARNING:LONG_LINE: line over 100 characters
#36: FILE: drivers/gpu/drm/drm_fourcc.c:240:
+ { .format = DRM_FORMAT_XYUV,.depth = 0,
.num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
-:48: WARNING:LONG_LINE_COMMENT: line over 100 characters
#48: FILE: include/uapi/drm/drm_fourcc.h:154:
+#define DRM_FORMAT_XYUVfourcc_code('X', 'Y', 'U', 'V') /*
[31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
total: 0 errors, 2 warnings, 0 checks, 14 lines checked
314594adeb74 drm/i915: Adding YUV444 packed format support for skl+
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with drm/i915: Initialise the obj->rcu head (rev2)
== Series Details == Series: series starting with drm/i915: Initialise the obj->rcu head (rev2) URL : https://patchwork.freedesktop.org/series/52215/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5109 -> Patchwork_10789 = == Summary - WARNING == Minor unknown changes coming with Patchwork_10789 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10789, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/52215/revisions/2/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10789: === IGT changes === Warnings igt@prime_vgem@basic-fence-flip: fi-ivb-3520m: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_10789 that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_hangcheck: fi-icl-u2: PASS -> INCOMPLETE (fdo#108315) igt@gem_exec_suspend@basic-s4-devices: fi-blb-e6850: NOTRUN -> INCOMPLETE (fdo#107718) igt@kms_frontbuffer_tracking@basic: fi-icl-u2: PASS -> FAIL (fdo#103167) Possible fixes igt@drv_selftest@live_contexts: fi-bsw-n3050: DMESG-FAIL (fdo#108626) -> PASS igt@gem_ctx_create@basic-files: fi-icl-u2: DMESG-WARN (fdo#107724) -> PASS igt@gem_exec_suspend@basic-s3: fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS igt@kms_chamelium@common-hpd-after-suspend: fi-skl-6700k2: WARN (fdo#108680) -> PASS igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS Warnings igt@drv_selftest@live_contexts: fi-icl-u2: DMESG-FAIL (fdo#108569) -> INCOMPLETE (fdo#108315) fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724 fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569 fdo#108626 https://bugs.freedesktop.org/show_bug.cgi?id=108626 fdo#108680 https://bugs.freedesktop.org/show_bug.cgi?id=108680 == Participating hosts (53 -> 46) == Additional (1): fi-pnv-d510 Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-ctg-p8600 fi-icl-u == Build changes == * Linux: CI_DRM_5109 -> Patchwork_10789 CI_DRM_5109: fd007cc63a9d60ac2a6f966a3c790e710aa8ca94 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10789: 4a9b9fbd2a9a370107c4b7f2de4345662ef74ba3 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 4a9b9fbd2a9a drm/i915: Track rcu_head for our idle worker 31751eadbb09 drm/i915: Initialise the obj->rcu head == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10789/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v12 2/2] drm/i915: Adding YUV444 packed format support for skl+
PLANE_CTL_FORMAT_AYUV is already supported, according to hardware
specification.
v2: Edited commit message, removed redundant whitespaces.
v3: Fixed fallthrough logic for the format switch cases.
v4: Yet again fixed fallthrough logic, to reuse code from other case
labels.
v5: Started to use XYUV instead of AYUV, as we don't use alpha.
v6: Removed unneeded initializer for new XYUV format.
v7: Added scaling support for DRM_FORMAT_XYUV
v8: Edited commit message to be more clear about skl+, renamed
PLANE_CTL_FORMAT_AYUV to PLANE_CTL_FORMAT_XYUV as this format
doesn't support per-pixel alpha. Fixed minor code issues.
v9: Moved DRM format check to proper place in intel_framebuffer_init.
v10: Added missing XYUV format to sprite planes for skl+.
v11: Changed DRM_FORMAT_XYUV to be DRM_FORMAT_XYUV.
v12: Fixed rebase conflicts
Reviewed-by: Ville Syrjälä
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/i915_reg.h | 2 +-
drivers/gpu/drm/i915/intel_display.c | 12
drivers/gpu/drm/i915/intel_sprite.c | 3 +++
3 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 158cf4716d03..5d1facecda33 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6502,7 +6502,7 @@ enum {
#define PLANE_CTL_FORMAT_XRGB_2101010(2 << 24)
#define PLANE_CTL_FORMAT_XRGB_ (4 << 24)
#define PLANE_CTL_FORMAT_XRGB_16161616F (6 << 24)
-#define PLANE_CTL_FORMAT_AYUV(8 << 24)
+#define PLANE_CTL_FORMAT_XYUV(8 << 24)
#define PLANE_CTL_FORMAT_INDEXED (12 << 24)
#define PLANE_CTL_FORMAT_RGB_565 (14 << 24)
#define ICL_PLANE_CTL_FORMAT_MASK(0x1f << 23)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 05125c7c2aa1..3af1ef26fdb7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2617,6 +2617,8 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool
alpha)
return DRM_FORMAT_RGB565;
case PLANE_CTL_FORMAT_NV12:
return DRM_FORMAT_NV12;
+ case PLANE_CTL_FORMAT_XYUV:
+ return DRM_FORMAT_XYUV;
default:
case PLANE_CTL_FORMAT_XRGB_:
if (rgb_order) {
@@ -3493,6 +3495,8 @@ static u32 skl_plane_ctl_format(uint32_t pixel_format)
return PLANE_CTL_FORMAT_XRGB_2101010;
case DRM_FORMAT_XBGR2101010:
return PLANE_CTL_ORDER_RGBX | PLANE_CTL_FORMAT_XRGB_2101010;
+ case DRM_FORMAT_XYUV:
+ return PLANE_CTL_FORMAT_XYUV;
case DRM_FORMAT_YUYV:
return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YUYV;
case DRM_FORMAT_YVYU:
@@ -4964,6 +4968,7 @@ static int skl_update_scaler_plane(struct
intel_crtc_state *crtc_state,
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
case DRM_FORMAT_NV12:
+ case DRM_FORMAT_XYUV:
break;
default:
DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format
0x%x\n",
@@ -14513,6 +14518,13 @@ static int intel_framebuffer_init(struct
intel_framebuffer *intel_fb,
goto err;
}
break;
+ case DRM_FORMAT_XYUV:
+ if (INTEL_GEN(dev_priv) < 9) {
+ DRM_DEBUG_KMS("unsupported pixel format: %s\n",
+
drm_get_format_name(mode_cmd->pixel_format, _name));
+ goto err;
+ }
+ break;
case DRM_FORMAT_YUYV:
case DRM_FORMAT_UYVY:
case DRM_FORMAT_YVYU:
diff --git a/drivers/gpu/drm/i915/intel_sprite.c
b/drivers/gpu/drm/i915/intel_sprite.c
index 1293182dbcb0..69188a8b899b 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1725,6 +1725,7 @@ static const uint32_t skl_plane_formats[] = {
DRM_FORMAT_YVYU,
DRM_FORMAT_UYVY,
DRM_FORMAT_VYUY,
+ DRM_FORMAT_XYUV,
};
static const uint32_t skl_planar_formats[] = {
@@ -1741,6 +1742,7 @@ static const uint32_t skl_planar_formats[] = {
DRM_FORMAT_UYVY,
DRM_FORMAT_VYUY,
DRM_FORMAT_NV12,
+ DRM_FORMAT_XYUV,
};
static const uint64_t skl_plane_format_modifiers_noccs[] = {
@@ -1882,6 +1884,7 @@ static bool skl_plane_format_mod_supported(struct
drm_plane *_plane,
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
case DRM_FORMAT_NV12:
+ case DRM_FORMAT_XYUV:
if (modifier == I915_FORMAT_MOD_Yf_TILED)
return true;
/* fall through */
--
2.17.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
[Intel-gfx] [PATCH v12 1/2] drm: Introduce new DRM_FORMAT_XYUV
v5: This is YUV444 packed format same as AYUV, but without alpha,
as supported by i915.
v6: Removed unneeded initializer for new XYUV format.
v7: Added is_yuv field initialization according to latest
drm_fourcc format structure initialization changes.
v8: Edited commit message to be more clear about skl+, renamed
PLANE_CTL_FORMAT_AYUV to PLANE_CTL_FORMAT_XYUV as this format
doesn't support per-pixel alpha. Fixed minor code issues.
v9: Moved DRM format check to proper place in intel_framebuffer_init.
v10: Changed DRM_FORMAT_XYUV to be DRM_FORMAT_XYUV
v11: Fixed rebase conflict, caused by added new formats to drm-tip
meanwhile.
Reviewed-by: Alexandru Gheorghe
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/drm_fourcc.c | 1 +
include/uapi/drm/drm_fourcc.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
index f523948c82b1..94d358eb0b8d 100644
--- a/drivers/gpu/drm/drm_fourcc.c
+++ b/drivers/gpu/drm/drm_fourcc.c
@@ -237,6 +237,7 @@ const struct drm_format_info *__drm_format_info(u32 format)
{ .format = DRM_FORMAT_X0L2,.depth = 0,
.num_planes = 1,
.char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 },
.block_h = { 2, 0, 0 },
.hsub = 2, .vsub = 2, .is_yuv = true },
+ { .format = DRM_FORMAT_XYUV,.depth = 0,
.num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
};
unsigned int i;
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index e7e48f1f4a74..0b44260a5ee9 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -151,6 +151,7 @@ extern "C" {
#define DRM_FORMAT_VYUYfourcc_code('V', 'Y', 'U', 'Y') /*
[31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
#define DRM_FORMAT_AYUVfourcc_code('A', 'Y', 'U', 'V') /*
[31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
+#define DRM_FORMAT_XYUVfourcc_code('X', 'Y', 'U', 'V') /*
[31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
/*
* packed YCbCr420 2x2 tiled formats
--
2.17.1
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v12 0/2] Add XYUV format support
Introduced new XYUV scan-in format for framebuffer and added support for it to i915(SkyLake+). Stanislav Lisovskiy (2): drm: Introduce new DRM_FORMAT_XYUV drm/i915: Adding YUV444 packed format support for skl+ drivers/gpu/drm/drm_fourcc.c | 1 + drivers/gpu/drm/i915/i915_reg.h | 2 +- drivers/gpu/drm/i915/intel_display.c | 12 drivers/gpu/drm/i915/intel_sprite.c | 3 +++ include/uapi/drm/drm_fourcc.h| 1 + 5 files changed, 18 insertions(+), 1 deletion(-) -- 2.17.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/dp_mst: Improve VCPI helpers, use in nouveau (rev5)
== Series Details ==
Series: drm/dp_mst: Improve VCPI helpers, use in nouveau (rev5)
URL : https://patchwork.freedesktop.org/series/51412/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5107_full -> Patchwork_10783_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10783_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10783_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in
Patchwork_10783_full:
=== IGT changes ===
Warnings
{igt@kms_lease@lease_invalid_connector}:
shard-snb: SKIP -> PASS +1
igt@perf_pmu@rc6:
shard-kbl: SKIP -> PASS
== Known issues ==
Here are the changes found in Patchwork_10783_full that come from known
issues:
=== IGT changes ===
Issues hit
igt@drv_suspend@shrink:
shard-skl: NOTRUN -> INCOMPLETE (fdo#106886)
igt@gem_cpu_reloc@full:
shard-skl: PASS -> INCOMPLETE (fdo#108073)
igt@gem_exec_schedule@pi-ringfull-blt:
shard-skl: NOTRUN -> FAIL (fdo#103158) +1
igt@gem_exec_schedule@pi-ringfull-bsd:
shard-apl: NOTRUN -> FAIL (fdo#103158)
igt@gem_exec_whisper@normal:
shard-skl: PASS -> TIMEOUT (fdo#108592)
igt@gem_ppgtt@blt-vs-render-ctxn:
shard-skl: NOTRUN -> TIMEOUT (fdo#108039)
igt@kms_atomic_transition@1x-modeset-transitions-nonblocking:
shard-skl: NOTRUN -> FAIL (fdo#108228, fdo#108470)
igt@kms_busy@extended-modeset-hang-newfb-render-c:
shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +2
igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
shard-glk: NOTRUN -> DMESG-WARN (fdo#107956)
igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
shard-glk: PASS -> FAIL (fdo#108145)
igt@kms_chv_cursor_fail@pipe-c-256x256-top-edge:
shard-skl: NOTRUN -> FAIL (fdo#104671)
igt@kms_color@pipe-c-ctm-blue-to-red:
shard-skl: NOTRUN -> FAIL (fdo#107201)
igt@kms_cursor_crc@cursor-64x21-sliding:
shard-skl: NOTRUN -> FAIL (fdo#103232) +1
igt@kms_draw_crc@draw-method-xrgb2101010-mmap-gtt-xtiled:
shard-skl: PASS -> FAIL (fdo#103184)
igt@kms_fbcon_fbt@psr:
shard-skl: NOTRUN -> FAIL (fdo#107882)
igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
shard-skl: NOTRUN -> FAIL (fdo#105682) +1
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
shard-apl: PASS -> FAIL (fdo#103167)
igt@kms_frontbuffer_tracking@fbc-stridechange:
shard-skl: NOTRUN -> FAIL (fdo#105683)
igt@kms_frontbuffer_tracking@fbcpsr-1p-rte:
shard-skl: PASS -> FAIL (fdo#105682)
igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-msflip-blt:
shard-skl: PASS -> FAIL (fdo#103167) +1
igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite:
shard-skl: NOTRUN -> FAIL (fdo#103167) +3
igt@kms_plane@pixel-format-pipe-b-planes:
shard-skl: NOTRUN -> DMESG-WARN (fdo#106885) +2
igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
shard-skl: PASS -> INCOMPLETE (fdo#104108)
igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
shard-skl: NOTRUN -> FAIL (fdo#108145) +5
igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
shard-skl: PASS -> FAIL (fdo#108145, fdo#107815)
igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
shard-glk: NOTRUN -> FAIL (fdo#108145) +1
igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
shard-skl: NOTRUN -> FAIL (fdo#108145, fdo#107815)
igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
shard-apl: PASS -> FAIL (fdo#103166) +1
igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
shard-glk: PASS -> FAIL (fdo#103166)
igt@kms_rotation_crc@primary-rotation-90:
shard-skl: NOTRUN -> FAIL (fdo#103925, fdo#107815)
igt@kms_setmode@basic:
shard-hsw: PASS -> FAIL (fdo#99912)
igt@kms_vblank@pipe-a-query-busy:
shard-snb: NOTRUN -> INCOMPLETE (fdo#105411)
igt@pm_rpm@i2c:
shard-skl: PASS -> INCOMPLETE (fdo#107807)
Possible fixes
igt@gem_exec_reuse@baggage:
shard-apl: DMESG-WARN (fdo#108690) -> PASS
igt@gem_wait@write-busy-bsd:
shard-snb: INCOMPLETE (fdo#105411) -> PASS
igt@kms_cursor_crc@cursor-256x256-sliding:
shard-apl: FAIL (fdo#103232) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt:
