[Intel-gfx] [PATCH] drm/i915/dsi: Do not read the transcoder register.

2019-11-18 Thread Vandita Kulkarni
As per the Bspec, port mapping is fixed for mipi dsi. v2: Reuse the existing function (Jani) Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/intel_display.c | 17 +++-- 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel

[Intel-gfx] [PATCH i-g-t] i915/pm_rps: install SIGTERM handler for loader_helper

2019-11-18 Thread Liu, Chuansheng
The issue we hit is the GPU keeps very high load after running the subtest min-max-config-loaded. Some background of the issue: Currently the rps is not fully enabled yet on TGL, and running the subtest min-max-config-loaded will hit below assertion: == (i915_pm_rps:1261) CRITICAL: Test assertion

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tgl: Add DKL PHY vswing table for HDMI

2019-11-18 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Add DKL PHY vswing table for HDMI URL : https://patchwork.freedesktop.org/series/69639/ State : success == Summary == CI Bug Log - changes from CI_DRM_7365_full -> Patchwork_15319_full Summary

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/ehl: Update voltage level checks

2019-11-18 Thread Matt Roper
On Tue, Nov 19, 2019 at 04:37:49AM +, Patchwork wrote: > == Series Details == > > Series: drm/i915/ehl: Update voltage level checks > URL : https://patchwork.freedesktop.org/series/69634/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_7365_full -> Patchwork_15317_

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/ehl: Update voltage level checks

2019-11-18 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Update voltage level checks URL : https://patchwork.freedesktop.org/series/69634/ State : success == Summary == CI Bug Log - changes from CI_DRM_7365_full -> Patchwork_15317_full Summary ---

Re: [Intel-gfx] [PATCH V13 4/6] mdev: introduce mediated virtio bus

2019-11-18 Thread Randy Dunlap
Hi, On 11/18/19 2:59 AM, Jason Wang wrote: > diff --git a/drivers/mdev/Kconfig b/drivers/mdev/Kconfig > index 4561f2d4178f..cd84d4670552 100644 > --- a/drivers/mdev/Kconfig > +++ b/drivers/mdev/Kconfig > @@ -17,3 +17,13 @@ config VFIO_MDEV > more details. > > If you don't know wh

Re: [Intel-gfx] [PATCH V13 3/6] mdev: move to drivers/

2019-11-18 Thread Randy Dunlap
On 11/18/19 2:59 AM, Jason Wang wrote: > diff --git a/drivers/mdev/Kconfig b/drivers/mdev/Kconfig > new file mode 100644 > index ..4561f2d4178f > --- /dev/null > +++ b/drivers/mdev/Kconfig > @@ -0,0 +1,19 @@ > + > +config MDEV > + tristate "Mediated device driver framework" > +

Re: [Intel-gfx] [PATCH V13 1/6] mdev: make mdev bus agnostic

2019-11-18 Thread Randy Dunlap
On 11/18/19 2:59 AM, Jason Wang wrote: > diff --git a/drivers/vfio/mdev/Kconfig b/drivers/vfio/mdev/Kconfig > index 5da27f2100f9..2e07ca915a96 100644 > --- a/drivers/vfio/mdev/Kconfig > +++ b/drivers/vfio/mdev/Kconfig > @@ -1,15 +1,24 @@ > -# SPDX-License-Identifier: GPL-2.0-only > > -config VFIO

Re: [Intel-gfx] [PATCH V13 6/6] docs: sample driver to demonstrate how to implement virtio-mdev framework

2019-11-18 Thread Jason Wang
On 2019/11/18 下午11:45, Cornelia Huck wrote: On Mon, 18 Nov 2019 18:59:23 +0800 Jason Wang wrote: [Note: I have not looked into the reworked architecture of this *at all* so far; just something that I noted...] This sample driver creates mdev device that simulate virtio net device over virtio

Re: [Intel-gfx] [PATCH V13 6/6] docs: sample driver to demonstrate how to implement virtio-mdev framework

2019-11-18 Thread Jason Wang
On 2019/11/18 下午11:17, Greg KH wrote: On Mon, Nov 18, 2019 at 06:59:23PM +0800, Jason Wang wrote: +static void mvnet_device_release(struct device *dev) +{ + dev_dbg(dev, "mvnet: released\n"); +} We used to have documentation in the kernel source tree that said that whenever anyone did th

Re: [Intel-gfx] [PATCH V13 4/6] mdev: introduce mediated virtio bus

2019-11-18 Thread Jason Wang
On 2019/11/19 上午4:28, Jason Gunthorpe wrote: On Mon, Nov 18, 2019 at 03:27:13PM -0500, Michael S. Tsirkin wrote: On Mon, Nov 18, 2019 at 01:41:00PM +, Jason Gunthorpe wrote: On Mon, Nov 18, 2019 at 06:59:21PM +0800, Jason Wang wrote: +struct bus_type mdev_virtio_bus_type; + +struct mdev_v

Re: [Intel-gfx] [PATCH V13 4/6] mdev: introduce mediated virtio bus

2019-11-18 Thread Jason Wang
On 2019/11/18 下午9:41, Jason Gunthorpe wrote: On Mon, Nov 18, 2019 at 06:59:21PM +0800, Jason Wang wrote: +struct bus_type mdev_virtio_bus_type; + +struct mdev_virtio_device { + struct mdev_device mdev; + const struct mdev_virtio_ops *ops; + u16 class_id; +}; This seems to sha

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/5] drm/i915/guc: Drop leftover preemption code

2019-11-18 Thread Daniele Ceraolo Spurio
On 11/18/19 5:05 PM, Patchwork wrote: == Series Details == Series: series starting with [CI,1/5] drm/i915/guc: Drop leftover preemption code URL : https://patchwork.freedesktop.org/series/69650/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7367 -> Patchwork_15323 ===

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Unlock engine-pm after queuing the kernel context switch

2019-11-18 Thread Patchwork
== Series Details == Series: drm/i915/gt: Unlock engine-pm after queuing the kernel context switch URL : https://patchwork.freedesktop.org/series/69632/ State : success == Summary == CI Bug Log - changes from CI_DRM_7364_full -> Patchwork_15315_full

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/5] drm/i915/guc: Drop leftover preemption code

2019-11-18 Thread Patchwork
== Series Details == Series: series starting with [CI,1/5] drm/i915/guc: Drop leftover preemption code URL : https://patchwork.freedesktop.org/series/69650/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7367 -> Patchwork_15323 =

[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [CI,1/5] drm/i915/guc: Drop leftover preemption code

2019-11-18 Thread Patchwork
== Series Details == Series: series starting with [CI,1/5] drm/i915/guc: Drop leftover preemption code URL : https://patchwork.freedesktop.org/series/69650/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:1: warnin

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/5] drm/i915/guc: Drop leftover preemption code

2019-11-18 Thread Patchwork
== Series Details == Series: series starting with [CI,1/5] drm/i915/guc: Drop leftover preemption code URL : https://patchwork.freedesktop.org/series/69650/ State : warning == Summary == $ dim checkpatch origin/drm-tip eb4028870663 drm/i915/guc: Drop leftover preemption code 194b7f455dd3 drm/

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/19] drm/i915/selftests: Force bonded submission to overlap

2019-11-18 Thread Patchwork
== Series Details == Series: series starting with [01/19] drm/i915/selftests: Force bonded submission to overlap URL : https://patchwork.freedesktop.org/series/69647/ State : success == Summary == CI Bug Log - changes from CI_DRM_7367 -> Patchwork_15322 ===

[Intel-gfx] [CI 2/5] drm/i915/guc: add a helper to allocate and map guc vma

2019-11-18 Thread Daniele Ceraolo Spurio
We already have a couple of use-cases in the code and another one will come in one of the later patches in the series. Signed-off-by: Daniele Ceraolo Spurio Cc: Michal Wajdeczko Cc: John Harrison Cc: Matthew Brost Reviewed-by: Chris Wilson --- drivers/gpu/drm/i915/gt/uc/intel_guc.c|

[Intel-gfx] [CI 3/5] drm/i915/guc: kill doorbell code and selftests

2019-11-18 Thread Daniele Ceraolo Spurio
Instead of relying on the workqueue, the upcoming reworked GuC submission flow will offer the host driver indipendent control over the execution status of each context submitted to GuC. As part of this, the doorbell usage model has been reworked, with each doorbell being paired to a single lrc and

[Intel-gfx] [CI 1/5] drm/i915/guc: Drop leftover preemption code

2019-11-18 Thread Daniele Ceraolo Spurio
Remove unused enums and ctx_save_restore_disabled() function, leftover from the legacy preemption removal. Signed-off-by: Daniele Ceraolo Spurio Cc: Michal Wajdeczko Cc: John Harrison Cc: Matthew Brost Reviewed-by: Chris Wilson --- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 22 -

[Intel-gfx] [CI 4/5] drm/i915/guc: kill the GuC client

2019-11-18 Thread Daniele Ceraolo Spurio
We now only use 1 client without any plan to add more. The client is also only holding information about the WQ and the process desc, so we can just move those in the intel_guc structure and always use stage_id 0. v2: fix comment (John) Signed-off-by: Daniele Ceraolo Spurio Cc: Michal Wajdeczko

[Intel-gfx] [CI 5/5] HAX: force enable_guc=2

2019-11-18 Thread Daniele Ceraolo Spurio
From: Anusha Srivatsa Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 31b88f297fbc..acda9f2a1207 100644 --- a/drivers/gpu/drm/

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/19] drm/i915/selftests: Force bonded submission to overlap

2019-11-18 Thread Patchwork
== Series Details == Series: series starting with [01/19] drm/i915/selftests: Force bonded submission to overlap URL : https://patchwork.freedesktop.org/series/69647/ State : warning == Summary == $ dim checkpatch origin/drm-tip aeceb9b58767 drm/i915/selftests: Force bonded submission to over

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/2] drm/i915/perf: Allow non-privileged access when OA buffer is not sampled

2019-11-18 Thread Patchwork
== Series Details == Series: series starting with [v3,1/2] drm/i915/perf: Allow non-privileged access when OA buffer is not sampled URL : https://patchwork.freedesktop.org/series/69645/ State : success == Summary == CI Bug Log - changes from CI_DRM_7367 -> Patchwork_15321

[Intel-gfx] [PATCH 03/19] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests

2019-11-18 Thread Chris Wilson
The general concept was that intel_timeline.active_count was locked by the intel_timeline.mutex. The exception was for power management, where the engine->kernel_context->timeline could be manipulated under the global wakeref.mutex. This was quite solid, as we always manipulated the timeline only

[Intel-gfx] [PATCH 04/19] drm/i915/gt: Unlock engine-pm after queuing the kernel context switch

2019-11-18 Thread Chris Wilson
In commit a79ca656b648 ("drm/i915: Push the wakeref->count deferral to the backend"), I erroneously concluded that we last modify the engine inside __i915_request_commit() meaning that we could enable concurrent submission for userspace as we enqueued this request. However, this falls into a trap w

[Intel-gfx] [PATCH 15/19] drm/i915/gt: Flush the requests after wedging on suspend

2019-11-18 Thread Chris Wilson
Retire all requests if we resort to wedged the driver on suspend. They will now be idle, so we might as we free them before shutting down. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt_pm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm

[Intel-gfx] [PATCH 06/19] drm/i915/gt: Schedule request retirement when submission idles

2019-11-18 Thread Chris Wilson
The major drawback of commit 7e34f4e4aad3 ("drm/i915/gen8+: Add RC6 CTX corruption WA") is that it disables RC6 while Skylake (and friends) is active, and we do not consider the GPU idle until all outstanding requests have been retired and the engine switched over to the kernel context. If userspac

[Intel-gfx] [PATCH 18/19] drm/i915/selftests: Exercise rc6 handling

2019-11-18 Thread Chris Wilson
Reading from CTX_INFO upsets rc6, requiring us to detect and prevent possible rc6 context corruption. Poke at the bear! Signed-off-by: Chris Wilson Cc: Imre Deak Cc: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_rc6.c | 4 + drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 13 ++

[Intel-gfx] [PATCH 10/19] drm/i915: Protect the obj->vma.list during iteration

2019-11-18 Thread Chris Wilson
Take the obj->vma.lock to prevent modifications to the list as we iterate, to avoid the dreaded the NULL pointer. <1>[ 347.820823] BUG: kernel NULL pointer dereference, address: 0150 <1>[ 347.820856] #PF: supervisor read access in kernel mode <1>[ 347.820874] #PF: error_code(0x

[Intel-gfx] [PATCH 11/19] drm/i915: Wait until the intel_wakeref idle callback is complete

2019-11-18 Thread Chris Wilson
When waiting for idle, serialise with any ongoing callback so that it will have completed before completing the wait. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_wakeref.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_wa

[Intel-gfx] [PATCH 09/19] drm/i915/gt: Only wait for register chipset flush if active

2019-11-18 Thread Chris Wilson
Only serialise with the chipset using an mmio if the chipset is currently active. We expect that any writes into the chipset range will simply be forgotten until it wakes up. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[Intel-gfx] [PATCH 17/19] drm/i915/selftests: Be explicit in ERR_PTR handling

2019-11-18 Thread Chris Wilson
When setting up a full GGTT, we expect the next insert to fail with -ENOSPC. Simplify the use of ERR_PTR to not confuse either the reader or smatch. Reported-by: Dan Carpenter References: f40a7b7558ef ("drm/i915: Initial selftests for exercising eviction") Signed-off-by: Chris Wilson --- driver

[Intel-gfx] [PATCH 01/19] drm/i915/selftests: Force bonded submission to overlap

2019-11-18 Thread Chris Wilson
Bonded request submission is designed to allow requests to execute in parallel as laid out by the user. If the master request is already finished before its bonded pair is submitted, the pair were not destined to run in parallel and we lose the information about the master engine to dictate selecti

[Intel-gfx] [PATCH 02/19] drm/i915/gem: Manually dump the debug trace on GEM_BUG_ON

2019-11-18 Thread Chris Wilson
Since igt now defaults to not enabling ftrace-on-oops, we need to manually invoke GEM_TRACE_DUMP() to see the debug log prior to a GEM_BUG_ON panicking. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i91

[Intel-gfx] [PATCH 07/19] drm/i915: Mark up the calling context for intel_wakeref_put()

2019-11-18 Thread Chris Wilson
Previously, we assumed we could use mutex_trylock() within an atomic context, falling back to a working if contended. However, such trickery is illegal inside interrupt context, and so we need to always use a worker under such circumstances. As we normally are in process context, we can typically u

[Intel-gfx] [PATCH 08/19] drm/i915/gem: Merge GGTT vma flush into a single loop

2019-11-18 Thread Chris Wilson
We only need the one loop to find the dirty vma flush them, and their chipset. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 12 +++- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.

[Intel-gfx] [PATCH 16/19] drm/i915/selftests: Flush the active callbacks

2019-11-18 Thread Chris Wilson
Before checking the current i915_active state for the asynchronous work we submitted, flush any ongoing callback. This ensures that our sampling is robust and does not sporadically fail due to bad timing as the work is running on another cpu. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/

[Intel-gfx] [PATCH 12/19] drm/i915/gt: Declare timeline.lock to be irq-free

2019-11-18 Thread Chris Wilson
Now that we never allow the intel_wakeref callbacks to be invoked from interrupt context, we do not need the irqsafe spinlock for the timeline. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 9 - drivers/gpu/drm/i915/gt/intel_reset.c | 9 -

[Intel-gfx] [PATCH 13/19] drm/i915/gt: Move new timelines to the end of active_list

2019-11-18 Thread Chris Wilson
When adding a new active timeline, place it at the end of the list. This allows for intel_gt_retire_requests() to pick up the newcomer more quickly and hopefully complete the retirement sooner. References: 7936a22dd466 ("drm/i915/gt: Wait for new requests in intel_gt_retire_requests()") Signed-of

[Intel-gfx] [PATCH 14/19] drm/i915/gt: Schedule next retirement worker first

2019-11-18 Thread Chris Wilson
As we may park the gt during request retirement, we may then cancel the retirement worker only to then program the delayed worker once more. If we schedule the next delayed retirement worker first, if we then park the gt, the work remain cancelled [until we unpark]. Signed-off-by: Chris Wilson -

[Intel-gfx] [PATCH 05/19] drm/i915/gt: Make intel_ring_unpin() safe for concurrent pint

2019-11-18 Thread Chris Wilson
In order to avoid some nasty mutex inversions, commit 09c5ab384f6f ("drm/i915: Keep rings pinned while the context is active") allowed the intel_ring unpinning to be run concurrently with the next context pinning it. Thus each step in intel_ring_unpin() needed to be atomic and ordered in a nice oni

[Intel-gfx] [PATCH 19/19] drm/i915/gt: Track engine round-trip times

2019-11-18 Thread Chris Wilson
Knowing the round trip time of an engine is useful for tracking the health of the system as well as providing a metric for the baseline responsiveness of the engine. We can use the latter metric for automatically tuning our waits in selftests and when idling so we don't confuse a slower system with

[Intel-gfx] Fast soft-rc6

2019-11-18 Thread Chris Wilson
In my very simple testing of scrolling through firefox, this brings up back into line with HW rc6 energy usage, a substantial improvement over current -tip. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/

[Intel-gfx] [PATCH v3 1/2] drm/i915/perf: Allow non-privileged access when OA buffer is not sampled

2019-11-18 Thread Umesh Nerlige Ramappa
SAMPLE_OA_REPORT enables sampling of OA reports from the OA buffer. Since reports from OA buffer had system wide visibility, collecting samples from the OA buffer was a privileged operation on previous platforms. Prior to TGL, it was also necessary to sample the OA buffer to normalize reports from

[Intel-gfx] [PATCH v3 2/2] drm/i915/perf: Configure OAR for specific context

2019-11-18 Thread Umesh Nerlige Ramappa
Gen12 supports saving/restoring render counters per context. Apply OAR configuration only for the context that is passed in to perf. v2: - Fix OACTXCONTROL value to only stop/resume counters. - Remove gen12_update_reg_state_unlocked as power state is already applied by the caller. v3: (Lionel)

Re: [Intel-gfx] [PATCH 3/4] drm/i915/guc: kill doorbell code and selftests

2019-11-18 Thread Daniele Ceraolo Spurio
On 11/14/19 3:56 PM, John Harrison wrote: On 11/6/2019 14:25, Daniele Ceraolo Spurio wrote: Instead of relying on the workqueue, the upcoming reworked GuC submission flow will offer the host driver indipendent control over independent the execution status of each context submitted to GuC. A

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915/bios: do not discard address space (rev2)

2019-11-18 Thread Lucas De Marchi
On Mon, Nov 18, 2019 at 1:03 AM Patchwork wrote: > > == Series Details == > > Series: series starting with [1/3] drm/i915/bios: do not discard address > space (rev2) > URL : https://patchwork.freedesktop.org/series/69567/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/mst: Check uapi enable not intel one during mst atomic check

2019-11-18 Thread Souza, Jose
On Sat, 2019-11-16 at 00:38 +, Patchwork wrote: > == Series Details == > > Series: drm/i915/mst: Check uapi enable not intel one during mst > atomic check > URL : https://patchwork.freedesktop.org/series/69557/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_7357 -

Re: [Intel-gfx] [PATCH V13 4/6] mdev: introduce mediated virtio bus

2019-11-18 Thread Jason Gunthorpe
On Mon, Nov 18, 2019 at 03:27:13PM -0500, Michael S. Tsirkin wrote: > On Mon, Nov 18, 2019 at 01:41:00PM +, Jason Gunthorpe wrote: > > On Mon, Nov 18, 2019 at 06:59:21PM +0800, Jason Wang wrote: > > > +struct bus_type mdev_virtio_bus_type; > > > + > > > +struct mdev_virtio_device { > > > + stru

Re: [Intel-gfx] [PATCH] drm/i915/gt: Schedule request retirement when submission idles

2019-11-18 Thread kbuild test robot
Hi Chris, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on next-20191118] [cannot apply to v5.4-rc8] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/18] drm/i915/selftests: Force bonded submission to overlap

2019-11-18 Thread Patchwork
== Series Details == Series: series starting with [01/18] drm/i915/selftests: Force bonded submission to overlap URL : https://patchwork.freedesktop.org/series/69641/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7365 -> Patchwork_15320 ===

Re: [Intel-gfx] [PATCH] drm/i915/tgl: Add DKL PHY vswing table for HDMI

2019-11-18 Thread Souza, Jose
On Mon, 2019-11-18 at 10:02 -0800, Matt Roper wrote: > The bspec initially provided a single DKL PHY vswing table for both > HDMI > and DP, but was recently updated to include an independent table for > HDMI. > Thanks, I had that in my TODO list to finish TC legacy. Reviewed-by: José Roberto de

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/18] drm/i915/selftests: Force bonded submission to overlap

2019-11-18 Thread Patchwork
== Series Details == Series: series starting with [01/18] drm/i915/selftests: Force bonded submission to overlap URL : https://patchwork.freedesktop.org/series/69641/ State : warning == Summary == $ dim checkpatch origin/drm-tip d809583ae655 drm/i915/selftests: Force bonded submission to over

Re: [Intel-gfx] [PATCH V13 4/6] mdev: introduce mediated virtio bus

2019-11-18 Thread Michael S. Tsirkin
On Mon, Nov 18, 2019 at 01:41:00PM +, Jason Gunthorpe wrote: > On Mon, Nov 18, 2019 at 06:59:21PM +0800, Jason Wang wrote: > > +struct bus_type mdev_virtio_bus_type; > > + > > +struct mdev_virtio_device { > > + struct mdev_device mdev; > > + const struct mdev_virtio_ops *ops; > > + u16 cl

Re: [Intel-gfx] [PATCH v7] drm/i915: Enable second dbuf slice for ICL and TGL

2019-11-18 Thread Lisovskiy, Stanislav
Hi, > > > > > > > > > > - /* If 2nd DBuf slice is no more required disable it */ > > > > > - if (INTEL_GEN(dev_priv) >= 11 && required_slices < > > > > > hw_enabled_slices) > > > > > - icl_dbuf_slices_update(dev_priv, > > > > > required_slices); > > > > > + /* > > > > > +

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Add DKL PHY vswing table for HDMI

2019-11-18 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Add DKL PHY vswing table for HDMI URL : https://patchwork.freedesktop.org/series/69639/ State : success == Summary == CI Bug Log - changes from CI_DRM_7365 -> Patchwork_15319 Summary --- **S

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Cleanups around .crtc_enable/disable() (rev3)

2019-11-18 Thread Patchwork
== Series Details == Series: drm/i915: Cleanups around .crtc_enable/disable() (rev3) URL : https://patchwork.freedesktop.org/series/69352/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7365 -> Patchwork_15318 Summary --

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gem: Manually dump the debug trace on GEM_BUG_ON

2019-11-18 Thread Patchwork
== Series Details == Series: drm/i915/gem: Manually dump the debug trace on GEM_BUG_ON URL : https://patchwork.freedesktop.org/series/69617/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7361_full -> Patchwork_15312_full Su

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ehl: Update voltage level checks

2019-11-18 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Update voltage level checks URL : https://patchwork.freedesktop.org/series/69634/ State : success == Summary == CI Bug Log - changes from CI_DRM_7365 -> Patchwork_15317 Summary --- **SUCCESS

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/ehl: Update voltage level checks

2019-11-18 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Update voltage level checks URL : https://patchwork.freedesktop.org/series/69634/ State : warning == Summary == $ dim checkpatch origin/drm-tip cebf374f288e drm/i915/ehl: Update voltage level checks -:10: WARNING:TYPO_SPELLING: 'accomodate' may be mis

[Intel-gfx] ✗ Fi.CI.BAT: failure for i915: Expose panel power cycle delay to i915_panel_timings

2019-11-18 Thread Patchwork
== Series Details == Series: i915: Expose panel power cycle delay to i915_panel_timings URL : https://patchwork.freedesktop.org/series/69633/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7365 -> Patchwork_15316 Summary ---

Re: [Intel-gfx] [PATCH] drm/i915/ehl: Update voltage level checks

2019-11-18 Thread Souza, Jose
On Mon, 2019-11-18 at 08:50 -0800, Matt Roper wrote: > On Mon, Nov 18, 2019 at 08:44:12AM -0800, Matt Roper wrote: > > The bspec was recently updated with new cdclk -> voltage level > > tables to > > accomodate the new 324/326.4 cdclk values. > > > > Bspec: 21809 > > Cc: José Roberto de Souza > >

[Intel-gfx] [PATCH 08/18] drm/i915/gt: Only wait for register chipset flush if active

2019-11-18 Thread Chris Wilson
Only serialise with the chipset using an mmio if the chipset is currently active. We expect that any writes into the chipset range will simply be forgotten until it wakes up. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[Intel-gfx] [PATCH 09/18] drm/i915: Protect the obj->vma.list during iteration

2019-11-18 Thread Chris Wilson
Take the obj->vma.lock to prevent modifications to the list as we iterate, to avoid the dreaded the NULL pointer. <1>[ 347.820823] BUG: kernel NULL pointer dereference, address: 0150 <1>[ 347.820856] #PF: supervisor read access in kernel mode <1>[ 347.820874] #PF: error_code(0x

[Intel-gfx] [PATCH 02/18] drm/i915/gem: Manually dump the debug trace on GEM_BUG_ON

2019-11-18 Thread Chris Wilson
Since igt now defaults to not enabling ftrace-on-oops, we need to manually invoke GEM_TRACE_DUMP() to see the debug log prior to a GEM_BUG_ON panicking. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i91

[Intel-gfx] [PATCH 11/18] drm/i915/gt: Declare timeline.lock to be irq-free

2019-11-18 Thread Chris Wilson
Now that we never allow the intel_wakeref callbacks to be invoked from interrupt context, we do not need the irqsafe spinlock for the timeline. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 9 - drivers/gpu/drm/i915/gt/intel_reset.c | 9 -

[Intel-gfx] [PATCH 05/18] drm/i915/gt: Schedule request retirement when submission idles

2019-11-18 Thread Chris Wilson
The major drawback of commit 7e34f4e4aad3 ("drm/i915/gen8+: Add RC6 CTX corruption WA") is that it disables RC6 while Skylake (and friends) is active, and we do not consider the GPU idle until all outstanding requests have been retired and the engine switched over to the kernel context. If userspac

[Intel-gfx] [PATCH 17/18] drm/i915/selftests: Exercise rc6 handling

2019-11-18 Thread Chris Wilson
Reading from CTX_INFO upsets rc6, requiring us to detect and prevent possible rc6 context corruption. Poke at the bear! Signed-off-by: Chris Wilson Cc: Imre Deak Cc: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_rc6.c | 4 + drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 13 ++

[Intel-gfx] [PATCH 12/18] drm/i915/gt: Move new timelines to the end of active_list

2019-11-18 Thread Chris Wilson
When adding a new active timeline, place it at the end of the list. This allows for intel_gt_retire_requests() to pick up the newcomer more quickly and hopefully complete the retirement sooner. References: 7936a22dd466 ("drm/i915/gt: Wait for new requests in intel_gt_retire_requests()") Signed-of

[Intel-gfx] [PATCH 10/18] drm/i915: Wait until the intel_wakeref idle callback is complete

2019-11-18 Thread Chris Wilson
When waiting for idle, serialise with any ongoing callback so that it will have completed before completing the wait. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_wakeref.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_wa

[Intel-gfx] [PATCH 06/18] drm/i915: Mark up the calling context for intel_wakeref_put()

2019-11-18 Thread Chris Wilson
Previously, we assumed we could use mutex_trylock() within an atomic context, falling back to a working if contended. However, such trickery is illegal inside interrupt context, and so we need to always use a worker under such circumstances. As we normally are in process context, we can typically u

[Intel-gfx] [PATCH 14/18] drm/i915/gt: Flush the requests after wedging on suspend

2019-11-18 Thread Chris Wilson
Retire all requests if we resort to wedged the driver on suspend. They will now be idle, so we might as we free them before shutting down. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt_pm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm

[Intel-gfx] [PATCH 16/18] drm/i915/selftests: Be explicit in ERR_PTR handling

2019-11-18 Thread Chris Wilson
When setting up a full GGTT, we expect the next insert to fail with -ENOSPC. Simplify the use of ERR_PTR to not confuse either the reader or smatch. Reported-by: Dan Carpenter References: f40a7b7558ef ("drm/i915: Initial selftests for exercising eviction") Signed-off-by: Chris Wilson --- driver

[Intel-gfx] [PATCH 01/18] drm/i915/selftests: Force bonded submission to overlap

2019-11-18 Thread Chris Wilson
Bonded request submission is designed to allow requests to execute in parallel as laid out by the user. If the master request is already finished before its bonded pair is submitted, the pair were not destined to run in parallel and we lose the information about the master engine to dictate selecti

[Intel-gfx] [PATCH 04/18] drm/i915/gt: Unlock engine-pm after queuing the kernel context switch

2019-11-18 Thread Chris Wilson
In commit a79ca656b648 ("drm/i915: Push the wakeref->count deferral to the backend"), I erroneously concluded that we last modify the engine inside __i915_request_commit() meaning that we could enable concurrent submission for userspace as we enqueued this request. However, this falls into a trap w

[Intel-gfx] [PATCH 07/18] drm/i915/gem: Merge GGTT vma flush into a single loop

2019-11-18 Thread Chris Wilson
We only need the one loop to find the dirty vma flush them, and their chipset. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 12 +++- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.

[Intel-gfx] [PATCH 03/18] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests

2019-11-18 Thread Chris Wilson
The general concept was that intel_timeline.active_count was locked by the intel_timeline.mutex. The exception was for power management, where the engine->kernel_context->timeline could be manipulated under the global wakeref.mutex. This was quite solid, as we always manipulated the timeline only

[Intel-gfx] [PATCH 13/18] drm/i915/gt: Schedule next retirement worker first

2019-11-18 Thread Chris Wilson
As we may park the gt during request retirement, we may then cancel the retirement worker only to then program the delayed worker once more. If we schedule the next delayed retirement worker first, if we then park the gt, the work remain cancelled [until we unpark]. Signed-off-by: Chris Wilson -

[Intel-gfx] [PATCH 15/18] drm/i915/selftests: Flush the active callbacks

2019-11-18 Thread Chris Wilson
Before checking the current i915_active state for the asynchronous work we submitted, flush any ongoing callback. This ensures that our sampling is robust and does not sporadically fail due to bad timing as the work is running on another cpu. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/

[Intel-gfx] [PATCH 18/18] drm/i915/gt: Track engine round-trip times

2019-11-18 Thread Chris Wilson
Knowing the round trip time of an engine is useful for tracking the health of the system as well as providing a metric for the baseline responsiveness of the engine. We can use the latter metric for automatically tuning our waits in selftests and when idling so we don't confuse a slower system with

Re: [Intel-gfx] [RFC 6/7] drm/i915/dp: Update the pattern as per request

2019-11-18 Thread Animesh Manna
On 11/18/2019 12:11 PM, Manasi Navare wrote: On Fri, Nov 15, 2019 at 08:55:48PM +0530, Animesh Manna wrote: set pattern in DP_COMP_CTL. It would be nice to have some brief description here on context of setting a PHY pattern for PHY compliance and that this will be called during pre enable in

Re: [Intel-gfx] [RFC 4/7] drm/i915/dp: Notify testapp using uevent and debugfs entry

2019-11-18 Thread Animesh Manna
On 11/18/2019 10:36 AM, Manasi Navare wrote: On Sun, Nov 17, 2019 at 08:58:45PM -0800, Manasi Navare wrote: On Fri, Nov 15, 2019 at 08:55:46PM +0530, Animesh Manna wrote: To align with link compliance design existing intel_dp_compliance tool will be used to get the phy request in userspace th

[Intel-gfx] ✓ Fi.CI.IGT: success for Retire dma_buf_k(un)map

2019-11-18 Thread Patchwork
== Series Details == Series: Retire dma_buf_k(un)map URL : https://patchwork.freedesktop.org/series/69616/ State : success == Summary == CI Bug Log - changes from CI_DRM_7361_full -> Patchwork_15311_full Summary --- **WARNING** Mi

Re: [Intel-gfx] [PATCH 3/3] drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed

2019-11-18 Thread Souza, Jose
On Sun, 2019-11-17 at 18:23 +0530, Anshuamn Gupta wrote: > On 2019-10-31 at 17:14:22 -0700, José Roberto de Souza wrote: > > A recent change in BSpec allow us to change EXTLINE while > > transcoder > > is enabled so this allow us to change it even when doing the first > > fastset after taking over

Re: [Intel-gfx] [RFC 1/7] drm/dp: get/set phy compliance pattern

2019-11-18 Thread Animesh Manna
On 11/18/2019 9:34 AM, Manasi Navare wrote: On Fri, Nov 15, 2019 at 08:55:43PM +0530, Animesh Manna wrote: During phy complaince auto test mode source need to read ^^ typo Please also send this patch to dri-devel M-L Thanks Manasi for review. I have sent to dri-devel also afte

Re: [Intel-gfx] [PATCH v7] drm/i915: Enable second dbuf slice for ICL and TGL

2019-11-18 Thread Ville Syrjälä
On Mon, Nov 18, 2019 at 05:17:51PM +, Lisovskiy, Stanislav wrote: > On Mon, 2019-11-18 at 17:27 +0200, Ville Syrjälä wrote: > > On Mon, Nov 18, 2019 at 09:19:18AM +, Lisovskiy, Stanislav wrote: > > > On Fri, 2019-11-15 at 22:19 +0200, Ville Syrjälä wrote: > > > > On Thu, Nov 14, 2019 at 02:

Re: [Intel-gfx] Failed cherry-picks on drm-intel-fixes

2019-11-18 Thread Chris Wilson
Quoting Rodrigo Vivi (2019-11-18 17:39:55) > Hi Chris, > > 2 fixes failed on this cherry-pick round. > > 8eb4704b124c ("drm/i915: Protect request peeking with RCU") https://cgit.freedesktop.org/~ickle/linux-2.6/commit/?h=dif&id=7e27238e149ce4f00d9cd801fe3aa0ea55e986a2 > 3cac195875ef ("drm/i915:

[Intel-gfx] [PATCH] drm/i915/tgl: Add DKL PHY vswing table for HDMI

2019-11-18 Thread Matt Roper
The bspec initially provided a single DKL PHY vswing table for both HDMI and DP, but was recently updated to include an independent table for HDMI. Bspec: 49292 Fixes: 978c3e539be2 ("drm/i915/tgl: Add dkl phy programming sequences") Cc: Clinton A Taylor Cc: Lucas De Marchi Signed-off-by: Matt Ro

Re: [Intel-gfx] [PATCH 2/2] drm/i915/perf: Configure OAR for specific context

2019-11-18 Thread Umesh Nerlige Ramappa
On Mon, Nov 18, 2019 at 03:42:28PM +0200, Lionel Landwerlin wrote: On 14/11/2019 21:21, Umesh Nerlige Ramappa wrote: Gen12 supports saving/restoring render counters per context. Apply OAR configuration only for the context that is passed in to perf. v2: - Fix OACTXCONTROL value to only stop/res

Re: [Intel-gfx] Failed cherry-picks on drm-intel-fixes

2019-11-18 Thread Chris Wilson
Quoting Rodrigo Vivi (2019-11-18 17:39:55) > Hi Chris, > > 2 fixes failed on this cherry-pick round. > > 8eb4704b124c ("drm/i915: Protect request peeking with RCU") > 3cac195875ef ("drm/i915: Leave the aliasing-ppgtt size alone") > > The second is strange because git complain about the > empty c

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Unlock engine-pm after queuing the kernel context switch

2019-11-18 Thread Patchwork
== Series Details == Series: drm/i915/gt: Unlock engine-pm after queuing the kernel context switch URL : https://patchwork.freedesktop.org/series/69632/ State : success == Summary == CI Bug Log - changes from CI_DRM_7364 -> Patchwork_15315

Re: [Intel-gfx] [PATCH 10/15] drm/vmwgfx: Delete mmaping functions

2019-11-18 Thread Daniel Vetter
On Mon, Nov 18, 2019 at 6:25 PM Thomas Hellstrom wrote: > > On Mon, 2019-11-18 at 11:35 +0100, Daniel Vetter wrote: > > No need for stubs, dma-buf.c takes care of that. > > > > Aside, not having a ->release callback smelled like refcounting leak > > somewhere. It will also score you a WARN_ON back

Re: [Intel-gfx] [PATCH 02/11] drm/i915: Remove hw.mode

2019-11-18 Thread Ville Syrjälä
On Thu, Nov 14, 2019 at 05:05:13PM +0100, Maarten Lankhorst wrote: > The members in hw.mode can be used from adjusted_mode as well, > use that when available. > > Some places that use hw.mode can be converted to use adjusted_mode > as well. > > Signed-off-by: Maarten Lankhorst > --- > drivers/g

[Intel-gfx] Failed cherry-picks on drm-intel-fixes

2019-11-18 Thread Rodrigo Vivi
Hi Chris, 2 fixes failed on this cherry-pick round. 8eb4704b124c ("drm/i915: Protect request peeking with RCU") 3cac195875ef ("drm/i915: Leave the aliasing-ppgtt size alone") The second is strange because git complain about the empty commit. Anyway, if any is needed could you please provide tho

Re: [Intel-gfx] [PATCH 10/15] drm/vmwgfx: Delete mmaping functions

2019-11-18 Thread Thomas Hellstrom
On Mon, 2019-11-18 at 11:35 +0100, Daniel Vetter wrote: > No need for stubs, dma-buf.c takes care of that. > > Aside, not having a ->release callback smelled like refcounting leak > somewhere. It will also score you a WARN_ON backtrace in dma-buf.c on > every export. But then I found that ttm_devi

Re: [Intel-gfx] [PATCH 6/8] drm/xen: Simplify fb_create

2019-11-18 Thread Oleksandr Andrushchenko
On 11/15/19 11:21 AM, Daniel Vetter wrote: > The current code is a pretty good wtf moment, since we drop the > reference before we use it. It's not a big deal, because a) we only > use the pointer, so doesn't blow up and the real reason b) fb->obj[0] > already holds a full reference for us. > > Mig

Re: [Intel-gfx] [PATCH 12/15] drm/tee_shm: Drop dma_buf_k(unmap) support

2019-11-18 Thread Jens Wiklander
On Mon, Nov 18, 2019 at 11:35:33AM +0100, Daniel Vetter wrote: > There's no in-tree users anymore. > > Signed-off-by: Daniel Vetter > Cc: Arnd Bergmann > Cc: Greg Kroah-Hartman > Cc: Jens Wiklander > Cc: tee-...@lists.linaro.org > -- > Ack for merging this through drm trees very much appreciat

Re: [Intel-gfx] [PATCH V13 4/6] mdev: introduce mediated virtio bus

2019-11-18 Thread Jason Gunthorpe
On Mon, Nov 18, 2019 at 06:59:21PM +0800, Jason Wang wrote: > +struct bus_type mdev_virtio_bus_type; > + > +struct mdev_virtio_device { > + struct mdev_device mdev; > + const struct mdev_virtio_ops *ops; > + u16 class_id; > +}; This seems to share nothing with mdev (ie mdev-vfio), why

  1   2   >