== Series Details ==
Series: drm/i915/dsi: Lookup the i2c bus from ACPI NS only if CONFIG_ACPI=y (v2)
URL : https://patchwork.freedesktop.org/series/72030/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7746_full -> Patchwork_16102_full
On Fri, 17 Jan 2020, Jani Nikula wrote:
>On Fri, 17 Jan 2020, Lee Shawn C wrote:
>> While mode setting, driver would calculate mode rate based on
>> resolution and bpp. And choose the best bpp that did not exceed DP
>> bandwidtd.
>>
>> But LSPCON had more restriction due to it convert DP to
On Fri, 17 Jan 2020, Lee Shawn C wrote:
> While mode setting, driver would calculate mode rate based on
> resolution and bpp. And choose the best bpp that did not exceed
> DP bandwidtd.
>
> But LSPCON had more restriction due to it convert DP to HDMI.
> Driver should respect HDMI's bandwidth
== Series Details ==
Series: drm/i915: Check require bandwidth did not exceed LSPCON limitation
URL : https://patchwork.freedesktop.org/series/72157/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7758 -> Patchwork_16143
== Series Details ==
Series: drm/i915: Check require bandwidth did not exceed LSPCON limitation
URL : https://patchwork.freedesktop.org/series/72157/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK include/generated/compile.h
== Series Details ==
Series: Security mitigation for Intel Gen7 HWs
URL : https://patchwork.freedesktop.org/series/72028/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7746_full -> Patchwork_16101_full
Summary
---
While mode setting, driver would calculate mode rate based on
resolution and bpp. And choose the best bpp that did not exceed
DP bandwidtd.
But LSPCON had more restriction due to it convert DP to HDMI.
Driver should respect HDMI's bandwidth limitation if LSPCON
was active. This change would
== Series Details ==
Series: drm/i915: Restrict legacy color key ioctl to pre-gen12
URL : https://patchwork.freedesktop.org/series/72026/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7746_full -> Patchwork_16100_full
== Series Details ==
Series: Security mitigation for Intel Gen7 and Gen7.5
URL : https://patchwork.freedesktop.org/series/72022/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7746_full -> Patchwork_16099_full
Summary
== Series Details ==
Series: series starting with [1/4] drm/mst: Don't do atomic checks over
disabled managers
URL : https://patchwork.freedesktop.org/series/72152/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK
== Series Details ==
Series: series starting with [1/4] drm/mst: Don't do atomic checks over
disabled managers
URL : https://patchwork.freedesktop.org/series/72152/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7758 -> Patchwork_16142
== Series Details ==
Series: Security mitigation for Intel Gen7 HWs (rev3)
URL : https://patchwork.freedesktop.org/series/72028/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel:
== Series Details ==
Series: Security mitigation for Intel Gen7 HWs (rev3)
URL : https://patchwork.freedesktop.org/series/72028/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7758 -> Patchwork_16141
Summary
---
When a main MST port is disconnected drivers should call
drm_dp_mst_topology_mgr_set_mst() disabling the MST manager, this
function will set manager mst_primary to NULL and it will cause the
crash bellow on the next atomic check when trying to access
mst_primary->port.
As there is no use in
TGL timeouts when disabling MST transcoder and fifo underruns over MST
transcoders are fixed when setting TRANS_DDI_MODE_SELECT to 0(HDMI
mode) during the disable sequence.
Although BSpec disable sequence don't require this step it is a
harmless change and it is also done by Windows driver.
Removing this lose code block and removing unnecessary bracket.
Cc: Lyude Paul
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/drm_dp_mst_topology.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
This is a eDP function and it will always returns true for non-eDP
ports.
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_dp.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index
== Series Details ==
Series: Security mitigation for Intel Gen7 HWs (rev3)
URL : https://patchwork.freedesktop.org/series/72028/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b4f95c3d55d7 drm/i915: Add mechanism to submit a context WA on ring submission
cf6f7615d09a
== Series Details ==
Series: drm/i915: intel_hpd_init(): Fix suspend/resume reprobing
URL : https://patchwork.freedesktop.org/series/2263/
State : failure
== Summary ==
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hubp.o
CC [M]
== Series Details ==
Series: drm/i915/tgl: Add Wa_1409825376 to tgl (rev5)
URL : https://patchwork.freedesktop.org/series/71853/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7742_full -> Patchwork_16098_full
Summary
From: Prathap Kumar Valsan
NOTE:
This series is in active development and is not intended to be merged to
mainline in its current form. The intent of the RFC is simply to outline
the strategy for the mitigation, as a focus for active discussion, and
to openly share progress. There has
NOTE:
This series is in active development and is not intended to be merged to
mainline in its current form. The intent of the RFC is simply to outline
the strategy for the mitigation, as a focus for active discussion, and
to openly share progress. There has been only minimal attention
From: Mika Kuoppala
NOTE:
This series is in active development and is not intended to be merged to
mainline in its current form. The intent of the RFC is simply to outline
the strategy for the mitigation, as a focus for active discussion, and
to openly share progress. There has been
== Series Details ==
Series: drm/i915/tgl: Add Wa_1606054188;tgl
URL : https://patchwork.freedesktop.org/series/72148/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7758 -> Patchwork_16140
Summary
---
**SUCCESS**
== Series Details ==
Series: drm/i915/tgl: Add Wa_1606054188;tgl
URL : https://patchwork.freedesktop.org/series/72148/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage
On Tiger Lake we do not support source keying in the pixel formats P010,
P012, P016.
Bspec: 52890
Cc: Matt Roper
Signed-off-by: Matt Atwood
---
drivers/gpu/drm/i915/display/intel_sprite.c | 13 +
1 file changed, 13 insertions(+)
diff --git
== Series Details ==
Series: drm/i915: eDP DPCD aux backlight fixes (rev6)
URL : https://patchwork.freedesktop.org/series/69914/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel:
== Series Details ==
Series: drm/i915: eDP DPCD aux backlight fixes (rev6)
URL : https://patchwork.freedesktop.org/series/69914/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7758 -> Patchwork_16139
Summary
---
On 1/16/20 2:49 PM, Michal Wajdeczko wrote:
- if (USES_GUC_SUBMISSION(dev_priv)) {
+ if (intel_uc_uses_guc_submission(_priv->gt.uc)) {
nit: that old macro was helpful exactly in cases where only dev_priv
is known and component might have no idea where to find uc
maybe we should have
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/userptr: add user_size limit
check
URL : https://patchwork.freedesktop.org/series/72141/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/userptr: add user_size limit
check
URL : https://patchwork.freedesktop.org/series/72141/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7758 -> Patchwork_16138
-if (USES_GUC_SUBMISSION(dev_priv)) {
+if (intel_uc_uses_guc_submission(_priv->gt.uc)) {
nit: that old macro was helpful exactly in cases where only dev_priv
is known and component might have no idea where to find uc
maybe we should have helper like:
#define to_intel_uc(i915)
== Series Details ==
Series: drm/i915/selftests: Add a mock i915_vma to the mock_ring (rev2)
URL : https://patchwork.freedesktop.org/series/72005/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7740_full -> Patchwork_16096_full
On 1/15/20 6:08 AM, Michal Wajdeczko wrote:
As we now have "ct" available almost in all functions we can
start using dev variants of logs also for debug.
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
Cc: Daniele Ceraolo Spurio
Reviewed-by: Daniele Ceraolo Spurio
Daniele
---
== Series Details ==
Series: series starting with [1/2] drm/i915/userptr: add user_size limit check
URL : https://patchwork.freedesktop.org/series/72135/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK
== Series Details ==
Series: series starting with [1/2] drm/i915/userptr: add user_size limit check
URL : https://patchwork.freedesktop.org/series/72135/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7758 -> Patchwork_16137
== Series Details ==
Series: drm/i915: Make use of drm_gem_object_release
URL : https://patchwork.freedesktop.org/series/72134/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel:
== Series Details ==
Series: drm/i915: Make use of drm_gem_object_release
URL : https://patchwork.freedesktop.org/series/72134/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7758 -> Patchwork_16136
Summary
---
On 1/16/2020 11:30 AM, Chris Wilson wrote:
> Quoting Brian Welty (2020-01-16 19:20:47)
>> As i915 is using drm_gem_private_object_init, it is best to
>> use the inverse function for cleanup: drm_gem_object_release.
>> This removes need for a shmem_release and phys_release.
>>
>> Signed-off-by:
== Series Details ==
Series: drm/i915/gt: Undo partial gt-pm enabling on error paths
URL : https://patchwork.freedesktop.org/series/72010/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7740_full -> Patchwork_16095_full
Quoting Matthew Auld (2020-01-16 20:31:50)
> If we create a rather large userptr object(e.g 1ULL << 32) we might
> shift past the type-width of num_pages: (int)num_pages << PAGE_SHIFT,
> resulting in a totally bogus sg_table, which fortunately will eventually
> manifest as:
>
>
Quoting Matthew Auld (2020-01-16 20:31:49)
> Don't allow a mismatch between obj->base.size/vma->size and the actual
> number of pages for the backing store, which is limited to INT_MAX
> pages.
>
> Signed-off-by: Matthew Auld
> Cc: Chris Wilson
> ---
>
Turns out we actually already have some companies, such as Lenovo,
shipping machines with AMOLED screens that don't allow controlling the
backlight through the usual PWM interface and only allow controlling it
through the standard EDP DPCD interface. One example of one of these
laptops is the X1
Despite the fact that the VBT appears to have a field for specifying
that a system is equipped with a panel that supports standard VESA
backlight controls over the DP AUX channel, so far every system we've
spotted DPCD backlight control support on doesn't actually set this
field correctly and all
I recently got a ThinkPad X1 Extreme 2nd Generation for fixing some
issues on, and noticed that out of the box the backlight doesn't work.
Along the way of fixing that, I found a few issues with how i915 handles
DPCD AUX backlight control and fixed them. Now I've got working
backlight controls,
Max backlight value for the panel was being calculated using byte
count i.e. 0x if 2 bytes are supported for backlight brightness
and 0xff if 1 byte is supported. However, EDP_PWMGEN_BIT_COUNT
determines the number of active control bits used for the brightness
setting. Thus, even if the panel
Currently we always determine the initial panel brightness level by
simply reading the value from DP_EDP_BACKLIGHT_BRIGHTNESS_MSB/LSB. This
seems wrong though, because if the panel is not currently in DPCD
control mode there's not really any reason why there would be any
brightness value
For eDP panels, it appears it's expected that so long as the panel is in
DPCD control mode that the brightness value is never set to 0. Instead,
if the desired effect is to set the panel's backlight to 0 we're
expected to simply turn off the backlight through the
DP_EDP_DISPLAY_CONTROL_REGISTER.
On 1/16/20 11:49 AM, Michal Wajdeczko wrote:
On Wed, 15 Jan 2020 02:31:38 +0100, Daniele Ceraolo Spurio
wrote:
use intel_uc_uses_guc_submission() directly instead, to be consistent in
the way we check what we want to do with the GuC.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Michal
== Series Details ==
Series: series starting with [rebased,1/3] drm/i915/dc3co: Do the full
calculation of DC3CO exit only once
URL : https://patchwork.freedesktop.org/series/72132/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK
== Series Details ==
Series: series starting with [rebased,1/3] drm/i915/dc3co: Do the full
calculation of DC3CO exit only once
URL : https://patchwork.freedesktop.org/series/72132/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7757 -> Patchwork_16135
Don't allow a mismatch between obj->base.size/vma->size and the actual
number of pages for the backing store, which is limited to INT_MAX
pages.
Signed-off-by: Matthew Auld
Cc: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 12
1 file changed, 12 insertions(+)
If we create a rather large userptr object(e.g 1ULL << 32) we might
shift past the type-width of num_pages: (int)num_pages << PAGE_SHIFT,
resulting in a totally bogus sg_table, which fortunately will eventually
manifest as:
gen8_ppgtt_insert_huge:463 GEM_BUG_ON(iter->sg->length < page_size)
On 1/16/20 11:42 AM, Michal Wajdeczko wrote:
On Wed, 15 Jan 2020 02:31:37 +0100, Daniele Ceraolo Spurio
wrote:
use intel_uc_uses_guc() directly instead, to be consistent in the way we
check what we want to do with the GuC.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Michal Wajdeczko
Cc:
On Wed, 15 Jan 2020 02:31:38 +0100, Daniele Ceraolo Spurio
wrote:
use intel_uc_uses_guc_submission() directly instead, to be consistent in
the way we check what we want to do with the GuC.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Michal Wajdeczko
Cc: John Harrison
Cc: Matthew Brost
On Wed, 15 Jan 2020 02:31:37 +0100, Daniele Ceraolo Spurio
wrote:
use intel_uc_uses_guc() directly instead, to be consistent in the way we
check what we want to do with the GuC.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Michal Wajdeczko
Cc: John Harrison
Cc: Matthew Brost
---
== Series Details ==
Series: series starting with [CI,1/3] drm/i915: Keep track of request among the
scheduling lists
URL : https://patchwork.freedesktop.org/series/72131/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7757 -> Patchwork_16134
== Series Details ==
Series: series starting with [CI,1/3] drm/i915: Keep track of request among the
scheduling lists
URL : https://patchwork.freedesktop.org/series/72131/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK
Quoting Matthew Auld (2020-01-16 19:28:09)
> diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> index 077b8f7cf6cb..0d7820c49f5b 100644
> --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> @@ -379,6 +379,7 @@
Quoting Matthew Auld (2020-01-16 19:28:09)
> If we create a rather large userptr object(e.g 1ULL << 32) we might
> shift past the type-width of num_pages: (int)num_pages << PAGE_SHIFT,
> resulting in a totally bogus sg_table, which fortunately will eventually
> manifest as:
>
>
Quoting Matthew Auld (2020-01-16 19:28:08)
> Don't allow a mismatch between obj->base.size/vma->size and the actual
> number of pages for the backing store, which is limited to INT_MAX
> pages.
>
> Signed-off-by: Matthew Auld
> Cc: Chris Wilson
> ---
>
Quoting Brian Welty (2020-01-16 19:20:47)
> As i915 is using drm_gem_private_object_init, it is best to
> use the inverse function for cleanup: drm_gem_object_release.
> This removes need for a shmem_release and phys_release.
>
> Signed-off-by: Brian Welty
> ---
> Chris, the cleanup sequence in
Don't allow a mismatch between obj->base.size/vma->size and the actual
number of pages for the backing store, which is limited to INT_MAX
pages.
Signed-off-by: Matthew Auld
Cc: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 12
1 file changed, 12 insertions(+)
If we create a rather large userptr object(e.g 1ULL << 32) we might
shift past the type-width of num_pages: (int)num_pages << PAGE_SHIFT,
resulting in a totally bogus sg_table, which fortunately will eventually
manifest as:
gen8_ppgtt_insert_huge:463 GEM_BUG_ON(iter->sg->length < page_size)
On 1/16/20 11:13 AM, Michal Wajdeczko wrote:
On Thu, 16 Jan 2020 19:46:35 +0100, Daniele Ceraolo Spurio
wrote:
On 1/15/20 6:08 AM, Michal Wajdeczko wrote:
We should never BUG_ON on any corruption in CTB descriptor as
data there can be also modified by the GuC. Instead we can
use flag
On 1/15/20 6:08 AM, Michal Wajdeczko wrote:
Since we only have one RECV buffer we don't need to explicitly pass
it to the read function.
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
Cc: Daniele Ceraolo Spurio
Reviewed-by: Daniele Ceraolo Spurio
Daniele
---
As i915 is using drm_gem_private_object_init, it is best to
use the inverse function for cleanup: drm_gem_object_release.
This removes need for a shmem_release and phys_release.
Signed-off-by: Brian Welty
---
Chris, the cleanup sequence in drm_gem_object_release() vs the replaced
i915 code is
On Thu, 16 Jan 2020 19:53:08 +0100, Daniele Ceraolo Spurio
wrote:
On 1/15/20 6:08 AM, Michal Wajdeczko wrote:
Since we only have one SEND buffer we don't need to explicitly pass
it to the write function.
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
Cc: Daniele Ceraolo Spurio
---
On Thu, 16 Jan 2020 19:46:35 +0100, Daniele Ceraolo Spurio
wrote:
On 1/15/20 6:08 AM, Michal Wajdeczko wrote:
We should never BUG_ON on any corruption in CTB descriptor as
data there can be also modified by the GuC. Instead we can
use flag "is_in_error" to indicate that we will not
Quoting Akeem G Abodunrin (2020-01-14 17:45:48)
> diff --git a/drivers/gpu/drm/i915/gt/gen7_renderclear.h
> b/drivers/gpu/drm/i915/gt/gen7_renderclear.h
> new file mode 100644
> index ..4b88dd8d0fd4
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/gt/gen7_renderclear.h
> @@ -0,0 +1,16 @@
This will calculaet the DC3CO exit delay only once per full modeset.
Cc: Imre Deak
Cc: Anshuman Gupta
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git
A recent change in BSpec allow us to change EXTLINE while transcoder
is enabled so this allow us to change it even when doing the first
fastset after taking over previous hardware state set by BIOS.
BIOS don't enable PSR, so if sink supports PSR it will be enabled on
the first fastset, so moving
DC3C0 could have already exit so no need to always sleep, so lets
read the register with the state.
Cc: Imre Deak
Cc: Anshuman Gupta
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 1/15/20 6:08 AM, Michal Wajdeczko wrote:
Since we only have one SEND buffer we don't need to explicitly pass
it to the write function.
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
Cc: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 13 +++--
1 file
Currently, we skip error capture upon forced preemption. We apply forced
preemption when there is a higher priority request that should be
running but is being blocked, and we skip inline error capture so that
the preemption request is not further delayed by a user controlled
capture -- extending
If we keep track of when the i915_request.sched.link is on the HW
runlist, or in the priority queue we can simplify our interactions with
the request (such as during rescheduling). This also simplifies the next
patch where we introduce a new in-between list, for requests that are
ready but neither
In order to support out-of-line error capture, we need to remove the
active request from HW and put it to one side while a worker compresses
and stores all the details associated with that request. (As that
compression may take an arbitrary user-controlled amount of time, we
want to let the engine
On 1/15/20 6:08 AM, Michal Wajdeczko wrote:
We should never BUG_ON on any corruption in CTB descriptor as
data there can be also modified by the GuC. Instead we can
use flag "is_in_error" to indicate that we will not process
any further messages over this CTB (until reset). While here
move
Quoting Tvrtko Ursulin (2020-01-16 18:14:24)
>
> On 16/01/2020 17:48, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2020-01-16 17:22:10)
> >>
> >> On 15/01/2020 08:33, Chris Wilson wrote:
> >>> + /*
> >>> + * We need to _quickly_ capture the engine state before we reset.
> >>> + *
On Thu, 2020-01-16 at 04:18 +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/psr: Share the computation of idle frames
> URL : https://patchwork.freedesktop.org/series/71981/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_7736_full ->
On Thu, 2020-01-16 at 12:56 +0200, Ville Syrjälä wrote:
> On Thu, Jan 16, 2020 at 12:05:43AM +, Souza, Jose wrote:
> > On Wed, 2020-01-15 at 21:08 +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > The post-fastset "does anyone still need a full modeset?" for
> > > port sync
On 16/01/2020 17:48, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2020-01-16 17:22:10)
On 15/01/2020 08:33, Chris Wilson wrote:
Currently, we skip error capture upon forced preemption. We apply forced
preemption when there is a higher priority request that should be
running but is being
Quoting Tvrtko Ursulin (2020-01-16 17:22:10)
>
> On 15/01/2020 08:33, Chris Wilson wrote:
> > Currently, we skip error capture upon forced preemption. We apply forced
> > preemption when there is a higher priority request that should be
> > running but is being blocked, and we skip inline error
On Thu, Jan 16, 2020 at 12:23:45AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: add Wa_14010594013: icl,ehl (rev2)
> URL : https://patchwork.freedesktop.org/series/71858/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_7735_full ->
== Series Details ==
Series: drm/i915: eDP DPCD aux backlight fixes (rev5)
URL : https://patchwork.freedesktop.org/series/69914/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7739_full -> Patchwork_16093_full
Summary
== Series Details ==
Series: Security mitigation for Intel Gen7 HWs (rev2)
URL : https://patchwork.freedesktop.org/series/72028/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7755 -> Patchwork_16133
Summary
---
== Series Details ==
Series: Security mitigation for Intel Gen7 HWs (rev2)
URL : https://patchwork.freedesktop.org/series/72028/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel:
On Thu, Jan 16, 2020 at 11:22:13AM +0200, Stanislav Lisovskiy wrote:
> Now start using parameterized DBUF_CTL instead
> of hardcoded, this would allow shorter access
> functions when reading or storing entire state.
>
> Tried to implement it in a MMIO_PIPE manner, however
> DBUF_CTL1 address is
On 15/01/2020 09:02, Chris Wilson wrote:
If we keep track of when the i915_request.sched.link is on the HW
runlist, or in the priority queue we can simplify our interactions with
the request (such as during rescheduling). This also simplifies the next
patch where we introduce a new in-between
On 15/01/2020 08:33, Chris Wilson wrote:
Currently, we skip error capture upon forced preemption. We apply forced
preemption when there is a higher priority request that should be
running but is being blocked, and we skip inline error capture so that
the preemption request is not further
On 15/01/2020 11:10, Chris Wilson wrote:
In order to support out-of-line error capture, we need to remove the
active request from HW and put it to one side while a worker compresses
and stores all the details associated with that request. (As that
compression may take an arbitrary
== Series Details ==
Series: Security mitigation for Intel Gen7 HWs (rev2)
URL : https://patchwork.freedesktop.org/series/72028/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
92c14eedb4e1 drm/i915: Add mechanism to submit a context WA on ring submission
6b4f188b8e71
On Tue, Jan 14, 2020 at 09:45:48AM -0800, Akeem G Abodunrin wrote:
> From: Prathap Kumar Valsan
>
> On gen7 and gen7.5 devices, there could be leftover data residuals in
> EU/L3 from the retiring context. This patch introduces workaround to clear
> that residual contexts, by submitting a batch
== Series Details ==
Series: Security mitigation for Intel Gen7 and Gen7.5 (rev2)
URL : https://patchwork.freedesktop.org/series/72022/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel:
== Series Details ==
Series: Security mitigation for Intel Gen7 and Gen7.5 (rev2)
URL : https://patchwork.freedesktop.org/series/72022/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7755 -> Patchwork_16132
Summary
---
Mika Kuoppala writes:
>Subject: Re: [PATCH 1/2] drm/i915: Add mechanism to submit a context WA
>on ring submission
I forgot to add RFC into patch subject. This should carry
the RFC status as it is v2 on a RFC patch.
This patch squashes Chris Wilson's ctx switch optimization
and the development
== Series Details ==
Series: Security mitigation for Intel Gen7 and Gen7.5 (rev2)
URL : https://patchwork.freedesktop.org/series/72022/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
663d827f4819 drm/i915: Add mechanism to submit a context WA on ring submission
046cc6053cc2
Hi Dave and Daniel,
I'm delighted to present another -misc-fixes pull. Dock users rejoice, MST
keeps getting better!
Please pull!
drm-misc-fixes-2020-01-16:
virtio: maintain obj reservation lock when submitting cmds (Gerd)
rockchip: increase link rate var size to accommodate rates (Tobias)
== Series Details ==
Series: drm/i915/display: conversion to new logging macros.
URL : https://patchwork.freedesktop.org/series/72112/
State : failure
== Summary ==
Applying: drm/i915/display: conversion to new logging macros part 1
Applying: drm/i915/display: conversion to new logging macros
This patch adds framework to submit an arbitrary batchbuffer on each
context switch to clear residual state for render engine on Gen7/7.5
devices.
The idea of always emitting the context and vm setup around each request
is primary to make reset recovery easy, and not require rewriting the
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