== Series Details ==
Series: series starting with [1/2] drm/i915/hdmi: remove unused
intel_hdmi_hdcp2_protocol() (rev2)
URL : https://patchwork.freedesktop.org/series/76200/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8334_full -> Patchwork_17390_full
On Mon, Apr 20, 2020 at 01:09:05PM -0700, Souza, Jose wrote:
> On Wed, 2020-04-15 at 16:34 -0700, Matt Roper wrote:
> > AUX power wells sometimes need additional handling besides just
> > programming the specific power well registers:
> > * Type-C PHY's also require additional Type-C register
== Series Details ==
Series: drm/i915/selftests: Fix i915_address_space refcnt leak
URL : https://patchwork.freedesktop.org/series/76209/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8333_full -> Patchwork_17388_full
[rmk Cc'd]
On Fri, Apr 03, 2020 at 09:52:05PM +0100, Al Viro wrote:
> I can do a 5.7-rc1-based branch with that; depending upon what we end
> up doing for arm and s390 we can always change the calling conventions
> come next cycle ;-/
>
> My impressions after digging through arm side of things:
On 4/21/20 00:21, Ville Syrjälä wrote:
> On Mon, Apr 20, 2020 at 04:22:07PM +0800, Liwei Song wrote:
>> Import the kernel's i915_pciids.h, up to:
>>
>> commit 8717c6b7414ffb890672276dccc284c23078ac0e
>> Author: Lee Shawn C
>> Date: Tue Dec 10 23:04:15 2019 +0800
>>
>> drm/i915/cml:
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:he drm-misc
tree with the drm-misc-fixes tree
drivers/gpu/drm/tidss/tidss_encoder.c
between commit:
9da67433f64e ("drm/tidss: fix crash related to accessing freed memory")
from the drm-misc-fixes tree and commit:
== Series Details ==
Series: series starting with [CI,1/2] drm/dsc: use rc_model_size from DSC
config for PPS
URL : https://patchwork.freedesktop.org/series/76202/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8331_full -> Patchwork_17386_full
== Series Details ==
Series: drm/i915/gt: Prefer soft-rc6 over RPS DOWN_TIMEOUT
URL : https://patchwork.freedesktop.org/series/76216/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK
The RPS DOWN_TIMEOUT interrupt is signaled after a period of rc6, and
upon receipt of that interrupt we reprogram the GPU clocks down to the
next idle notch [to help convserve power during rc6]. However, on
execlists, we benefit from soft-rc6 immediately parking the GPU and
setting idle
== Series Details ==
Series: drm/i915/tgl: Wa_14011059788 (rev4)
URL : https://patchwork.freedesktop.org/series/75990/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8335 -> Patchwork_17393
Summary
---
**SUCCESS**
== Series Details ==
Series: drm/i915/selftests: Show the pstate limits on any failure to reset min
URL : https://patchwork.freedesktop.org/series/76214/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8335 -> Patchwork_17392
On Mon, 2020-04-20 at 23:06 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Sort out some of the mess between intel_ddi.c intel_dp.c by
> introducing a .set_link_train() vfunc.
>
Reviewed-by: José Roberto de Souza
> Signed-off-by: Ville Syrjälä
> ---
>
== Series Details ==
Series: drm/i915/audio: fix compressed_bpp check
URL : https://patchwork.freedesktop.org/series/76196/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8329_full -> Patchwork_17384_full
Summary
---
Stan, I have re-reported the results.
-Original Message-
From: Lisovskiy, Stanislav
Sent: Tuesday, April 21, 2020 12:05 AM
To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana
Subject: Re: ✗ Fi.CI.IGT: failure for SAGV support for Gen12+ (rev26)
Seems to be unrelated to SAGV,
== Series Details ==
Series: SAGV support for Gen12+ (rev26)
URL : https://patchwork.freedesktop.org/series/75129/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8328_full -> Patchwork_17381_full
Summary
---
== Series Details ==
Series: series starting with [1/4] drm/i915: Introduce .set_link_train() vfunc
URL : https://patchwork.freedesktop.org/series/76213/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8334 -> Patchwork_17391
Seems to be unrelated to SAGV, as it can't break module_reload only..
Best Regards,
Lisovskiy Stanislav
Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo
From: Patchwork
Sent: Monday, April 20, 2020 8:16:39 PM
To: Lisovskiy,
== Series Details ==
Series: drm/i915/display: Fixed kernel taint in audio codec init
URL : https://patchwork.freedesktop.org/series/76195/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8329_full -> Patchwork_17383_full
== Series Details ==
Series: series starting with [1/2] drm/i915/hdmi: remove unused
intel_hdmi_hdcp2_protocol() (rev2)
URL : https://patchwork.freedesktop.org/series/76200/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8334 -> Patchwork_17390
We want to see the pstate limits whenever we fail to set the minimum
frequency as that may help for debugging.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_rps.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/selftest_rps.c
== Series Details ==
Series: series starting with [CI,1/6] drm/i915/selftests: Verify frequency
scaling with RPS
URL : https://patchwork.freedesktop.org/series/76210/
State : failure
== Summary ==
Applying: drm/i915/selftests: Verify frequency scaling with RPS
Using index info to reconstruct
On Wed, 2020-04-15 at 16:34 -0700, Matt Roper wrote:
> AUX power wells sometimes need additional handling besides just
> programming the specific power well registers:
> * Type-C PHY's also require additional Type-C register programming
> * ICL combo PHY's require additional workarounds
> * TGL
From: Ville Syrjälä
Split some overly long lines.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index
From: Ville Syrjälä
Relocate a binch of DDI specific code from intel_dp.c to intel_ddi.c
by introducing a .set_idle_link_train() vfunc.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 29 +++
.../drm/i915/display/intel_display_types.h| 1 +
From: Ville Syrjälä
Sort out some of the mess between intel_ddi.c intel_dp.c by
introducing a .set_signal_levels() vfunc.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 81 +++---
.../drm/i915/display/intel_display_types.h| 1 +
From: Ville Syrjälä
Sort out some of the mess between intel_ddi.c intel_dp.c by
introducing a .set_link_train() vfunc.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 42 +
.../drm/i915/display/intel_display_types.h| 1 +
== Series Details ==
Series: drm/i915/selftests: Fix i915_address_space refcnt leak
URL : https://patchwork.freedesktop.org/series/76209/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8333 -> Patchwork_17388
Summary
Quoting Xiyu Yang (2020-04-20 06:41:54)
> igt_ppgtt_pin_update() invokes i915_gem_context_get_vm_rcu(), which
> returns a reference of the i915_address_space object to "vm" with
> increased refcount.
>
> When igt_ppgtt_pin_update() returns, "vm" becomes invalid, so the
> refcount should be
== Series Details ==
Series: series starting with [CI,1/6] drm/i915/selftests: Verify frequency
scaling with RPS
URL : https://patchwork.freedesktop.org/series/76207/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8332 -> Patchwork_17387
On Fri, Apr 17, 2020 at 08:51:35PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjala (2020-04-17 14:47:19)
> > From: Ville Syrjälä
> >
> > Push the TRANS_DDI_FUNC_CTL into the encoder enable hook. The disable
> > is already there, and as a followup will enable us to pass the encoder
> > all the
On Fri, Apr 17, 2020 at 02:51:39PM -0400, Lyude Paul wrote:
> Reviewed-by: Lyude Paul
>
Thanks. Series pushed to dinq.
> On Fri, 2020-04-17 at 18:27 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Make intel_dp_check_mst_status() somewhat legible by humans.
> >
> > Note that the
On Mon, Apr 20, 2020 at 05:45:01PM +0300, Jani Nikula wrote:
> On Fri, 17 Apr 2020, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > No reason that I can see why we should enable TRANS_DDI_FUNC_CTL
> > before we set up the watermarks of confogiure the mbus stuff.
> > In fact reordering these
== Series Details ==
Series: series starting with [CI,1/6] drm/i915/selftests: Verify frequency
scaling with RPS
URL : https://patchwork.freedesktop.org/series/76207/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
18dc228e78a3 drm/i915/selftests: Verify frequency scaling with
== Series Details ==
Series: series starting with [1/2] drm/i915/gem: Remove object_is_locked
assertion from unpin_from_display_plane
URL : https://patchwork.freedesktop.org/series/76194/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8328_full -> Patchwork_17382_full
Em seg, 2020-04-20 às 15:17 +0530, Karthik B S escreveu:
> Enable asynchronous flips in i915 for gen9+ platforms.
>
> v2: -Async flip enablement should be a stand alone patch (Paulo)
... and at the very end of the series.
If someone is bisecting the Kernel for some problem unrelated to async
Em seg, 2020-04-20 às 15:17 +0530, Karthik B S escreveu:
> Support added only for async flips on primary plane.
> If flip is requested on any other plane, reject it.
>
> Make sure there is no change in fbc, offset and framebuffer modifiers
> when async flip is requested.
>
> If any of these are
== Series Details ==
Series: series starting with [CI,1/2] drm/dsc: use rc_model_size from DSC
config for PPS
URL : https://patchwork.freedesktop.org/series/76202/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8331 -> Patchwork_17386
One of the core tenents of reclocking the GPU is that its throughput
scales with the clock frequency. We can observe this by incrementing a
loop counter on the GPU, and compare the different execution rates at
the notional RPS frequencies.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
After having testing all the RPS controls individually, we need to take
a step back and check how our RPS worker integrates them to perform
dynamic GPU reclocking. So do that by submitting a spinner and wait and
see what happens.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
Check that the GPU does respond to our RPS frequency requests by setting
our desired frequency.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 1 +
drivers/gpu/drm/i915/gt/selftest_rps.c | 214 ---
Split the frequency measurement into two modes, so that we can judge the
impact of the llc setup on top of the pure CS frequency scaling.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 3 +-
drivers/gpu/drm/i915/gt/selftest_rps.c | 157
If we encounter an error while scaling, read back the frequency tables
from the pcu.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/selftest_rps.c | 39 ++
1 file changed, 39 insertions(+)
diff --git
If we can not manipulate the frequency with RPS, then comparing min/max
power consumption is pointless / misleading. We will leave the warning
about not being able to control the frequency selection via RPS to other
tests so as not to confuse this more specialised check.
Signed-off-by: Chris
igt_ppgtt_pin_update() invokes i915_gem_context_get_vm_rcu(), which
returns a reference of the i915_address_space object to "vm" with
increased refcount.
When igt_ppgtt_pin_update() returns, "vm" becomes invalid, so the
refcount should be decreased to keep refcount balanced.
The reference
== Series Details ==
Series: series starting with [1/2] drm/i915/hdmi: remove unused
intel_hdmi_hdcp2_protocol()
URL : https://patchwork.freedesktop.org/series/76200/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8331 -> Patchwork_17385
== Series Details ==
Series: SAGV support for Gen12+ (rev26)
URL : https://patchwork.freedesktop.org/series/75129/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8328_full -> Patchwork_17381_full
Summary
---
On Mon, Apr 20, 2020 at 05:04:37PM +0300, Jani Nikula wrote:
> Unused, hiding from the compiler warnings behind the inline keyword.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_hdmi.c | 6 --
> 1 file changed, 6 deletions(-)
>
>
On Mon, Apr 20, 2020 at 05:04:38PM +0300, Jani Nikula wrote:
> Remove a number of inlines from .c files, and let the compiler decide
> what's best. There's more to do, but need to start somewhere, and need
> to start setting the example.
>
> Signed-off-by: Jani Nikula
> ---
>
On Mon, Apr 20, 2020 at 12:02:39PM +0300, Joonas Lahtinen wrote:
> I think the the patch should be dropped for now before the issue is
> properly addressed. Either by backporting the mainline fixes or if
> those are too big and there indeed is a smaller alternative patch
> that is properly
From: Alexey Budankov
Open access to monitoring for CAP_PERFMON privileged process. Providing
the access under CAP_PERFMON capability singly, without the rest of
CAP_SYS_ADMIN credentials, excludes chances to misuse the credentials
and makes operation more secure.
CAP_PERFMON implements the
Chris,
Could you please look at this in earnest? This is a real bug that crashes my
laptop without any kind of provocation. It is undeniably a bug in i915, and I've
clearly described it in my patch. If you dont like the patch, I'm open to any
suggestions you have for an alternative solution. My
From: Alexey Budankov
Open access to bpf_trace monitoring for CAP_PERFMON privileged process.
Providing the access under CAP_PERFMON capability singly, without the
rest of CAP_SYS_ADMIN credentials, excludes chances to misuse the
credentials and makes operation more secure.
CAP_PERFMON
From: Alexey Budankov
Open access to monitoring via kprobes and uprobes and eBPF tracing for
CAP_PERFMON privileged process. Providing the access under CAP_PERFMON
capability singly, without the rest of CAP_SYS_ADMIN credentials,
excludes chances to misuse the credentials and makes operation
From: Alexey Budankov
Open access to monitoring of kernel code, CPUs, tracepoints and
namespaces data for a CAP_PERFMON privileged process. Providing the
access under CAP_PERFMON capability singly, without the rest of
CAP_SYS_ADMIN credentials, excludes chances to misuse the credentials
and
From: Alexey Budankov
Open access to monitoring for CAP_PERFMON privileged process. Providing
the access under CAP_PERFMON capability singly, without the rest of
CAP_SYS_ADMIN credentials, excludes chances to misuse the credentials
and makes operation more secure.
CAP_PERFMON implements the
On Mon, Apr 20, 2020 at 11:21:42AM +0300, Joonas Lahtinen wrote:
> So it seems that the patch got pulled into v5.6 and has been backported
> to v5.5 but not v5.4.
You're right, that's my mistake.
> In doing that zeroing of ring->vaddr is removed so the test to do mdelay(1)
> and "ring->vaddr =
From: Alexey Budankov
Open access to monitoring for CAP_PERFMON privileged process. Providing
the access under CAP_PERFMON capability singly, without the rest of
CAP_SYS_ADMIN credentials, excludes chances to misuse the credentials
and makes operation more secure.
CAP_PERFMON implements the
From: Alexey Budankov
Open access to i915_perf monitoring for CAP_PERFMON privileged process.
Providing the access under CAP_PERFMON capability singly, without the
rest of CAP_SYS_ADMIN credentials, excludes chances to misuse the
credentials and makes operation more secure.
CAP_PERFMON
From: Alexey Budankov
Update perf-security.rst documentation file with the information
related to usage of CAP_PERFMON capability to secure performance
monitoring and observability operations in system.
Committer notes:
While testing 'perf top' under cap_perfmon I noticed that it needs
some
From: Alexey Budankov
Update the kernel.rst documentation file with the information related to
usage of CAP_PERFMON capability to secure performance monitoring and
observability operations in system.
Signed-off-by: Alexey Budankov
Cc: Alexei Starovoitov
Cc: Andi Kleen
Cc: Igor Lubashev
Cc:
From: Alexey Budankov
Extend error messages to mention CAP_PERFMON capability as an option to
substitute CAP_SYS_ADMIN capability for secure system performance
monitoring and observability operations. Make
perf_event_paranoid_check() and __cmd_ftrace() to be aware of
CAP_PERFMON capability.
From: Alexey Budankov
Open access to monitoring for CAP_PERFMON privileged process. Providing
the access under CAP_PERFMON capability singly, without the rest of
CAP_SYS_ADMIN credentials, excludes chances to misuse the credentials
and makes operation more secure.
CAP_PERFMON implements the
From: Alexey Budankov
Introduce the CAP_PERFMON capability designed to secure system
performance monitoring and observability operations so that CAP_PERFMON
can assist CAP_SYS_ADMIN capability in its governing role for
performance monitoring and observability subsystems.
CAP_PERFMON hardens
Chris Wilson writes:
> Split the frequency measurement into two modes, so that we can judge the
> impact of the llc setup on top of the pure CS frequency scaling.
>
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 3 +-
> drivers/gpu/drm/i915/gt/selftest_rps.c
== Series Details ==
Series: drm/i915/gt: Poison residual state [HWSP] across resume. (rev3)
URL : https://patchwork.freedesktop.org/series/76100/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8328_full -> Patchwork_17380_full
Chris Wilson writes:
> Check that the GPU does respond to our RPS frequency requests by setting
> our desired frequency.
>
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 1 +
> drivers/gpu/drm/i915/gt/selftest_rps.c | 196 ---
>
== Series Details ==
Series: drm/i915: store HW tagging information into tracepoints (rev4)
URL : https://patchwork.freedesktop.org/series/75849/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8328_full -> Patchwork_17379_full
After having testing all the RPS controls individually, we need to take
a step back and check how our RPS worker integrates them to perform
dynamic GPU reclocking. So do that by submitting a spinner and wait and
see what happens.
Signed-off-by: Chris Wilson
---
Check that the GPU does respond to our RPS frequency requests by setting
our desired frequency.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 1 +
drivers/gpu/drm/i915/gt/selftest_rps.c | 196 ---
drivers/gpu/drm/i915/gt/selftest_rps.h |
One of the core tenents of reclocking the GPU is that its throughput
scales with the clock frequency. We can observe this by incrementing a
loop counter on the GPU, and compare the different execution rates at
the notional RPS frequencies.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
If we can not manipulate the frequency with RPS, then comparing min/max
power consumption is pointless / misleading. We will leave the warning
about not being able to control the frequency selection via RPS to other
tests so as not to confuse this more specialised check.
Signed-off-by: Chris
If we encounter an error while scaling, read back the frequency tables
from the pcu.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_rps.c | 39 ++
1 file changed, 39 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/selftest_rps.c
Split the frequency measurement into two modes, so that we can judge the
impact of the llc setup on top of the pure CS frequency scaling.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 3 +-
drivers/gpu/drm/i915/gt/selftest_rps.c | 157 ++-
On Mon, Apr 20, 2020 at 04:22:07PM +0800, Liwei Song wrote:
> Import the kernel's i915_pciids.h, up to:
>
> commit 8717c6b7414ffb890672276dccc284c23078ac0e
> Author: Lee Shawn C
> Date: Tue Dec 10 23:04:15 2019 +0800
>
> drm/i915/cml: Separate U series pci id from origianl list.
>
>
== Series Details ==
Series: series starting with [1/4] drm/i915/selftests: Verify frequency scaling
with RPS
URL : https://patchwork.freedesktop.org/series/76184/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8327_full -> Patchwork_17376_full
== Series Details ==
Series: drm/i915/audio: fix compressed_bpp check
URL : https://patchwork.freedesktop.org/series/76196/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8329 -> Patchwork_17384
Summary
---
== Series Details ==
Series: Asynchronous flip implementation for i915 (rev2)
URL : https://patchwork.freedesktop.org/series/74386/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8327_full -> Patchwork_17378_full
Summary
On Mon, 20 Apr 2020 at 13:54, Chris Wilson wrote:
>
> Avoid flushing the submission queue (of others) under the client's
> timeline lock, but instead move it to the end so that we may catch more.
>
> References: https://gitlab.freedesktop.org/drm/intel/-/issues/1066
> Signed-off-by: Chris Wilson
== Series Details ==
Series: drm/i915/display: Fixed kernel taint in audio codec init
URL : https://patchwork.freedesktop.org/series/76195/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8329 -> Patchwork_17383
Summary
On Mon, 20 Apr 2020 at 13:54, Chris Wilson wrote:
>
> Since moving the obj->vma.list to a spin_lock, and the vm->bound_list to
> its vm->mutex, along with tracking shrinkable status under its own
> spinlock, we no long require the object to be locked by the caller.
>
> This is fortunate as it
On Fri, 17 Apr 2020, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> No reason that I can see why we should enable TRANS_DDI_FUNC_CTL
> before we set up the watermarks of confogiure the mbus stuff.
> In fact reordering these seems to match the bspec sequence better,
> and cricually will allow us
== Series Details ==
Series: series starting with [01/24] perf/core: Only copy-to-user after
completely unlocking all locks, v3.
URL : https://patchwork.freedesktop.org/series/76096/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8319_full -> Patchwork_17349_full
The rc_model_size is specified in the DSC config, and the hardware
programming should respect that instead of hard coding a value of 8192.
Regardless, the rc_model_size in DSC config is currently hard coded to
the same value, so this should have no impact, other than allowing the
use of other
The PPS is supposed to reflect the DSC config instead of hard coding the
rc_model_size. Make it so.
Currently all users of drm_dsc_pps_payload_pack() hard code the size to
8192 also in the DSC config, so this change should have no impact, other
than allowing the drivers to use other sizes as
tree: git://anongit.freedesktop.org/drm-intel topic/core-for-CI
head: d0435a9b45070b945578c093dcd363b6b73a502c
commit: 198db0fc276cdf8e1bb66a4a03473dbea1400d18 [18/20] Revert "drm/i915:
Don't select BROKEN"
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-7 (Ubuntu
== Series Details ==
Series: series starting with [1/2] drm/i915/gem: Remove object_is_locked
assertion from unpin_from_display_plane
URL : https://patchwork.freedesktop.org/series/76194/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8328 -> Patchwork_17382
Remove a number of inlines from .c files, and let the compiler decide
what's best. There's more to do, but need to start somewhere, and need
to start setting the example.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/icl_dsi.c| 8 +++
Unused, hiding from the compiler warnings behind the inline keyword.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index
== Series Details ==
Series: series starting with [1/2] drm/i915/gem: Remove object_is_locked
assertion from unpin_from_display_plane
URL : https://patchwork.freedesktop.org/series/76194/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5b3ba577946c drm/i915/gem: Remove
== Series Details ==
Series: SAGV support for Gen12+ (rev26)
URL : https://patchwork.freedesktop.org/series/75129/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8328 -> Patchwork_17381
Summary
---
**SUCCESS**
No
Hi
Am 15.04.20 um 09:39 schrieb Daniel Vetter:
> Add a new macro helper to combine the usual init sequence in drivers,
> consisting of a kzalloc + devm_drm_dev_init + drmm_add_final_kfree
> triplet. This allows us to remove the rather unsightly
> drmm_add_final_kfree from all currently merged
> -Original Message-
> From: Shankar, Uma
> Sent: Monday, April 20, 2020 7:04 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Vehmanen, Kai ; Gupta, Anshuman
> ; jani.nik...@linux.intel.com; chris-wilson.co.uk;
> Shankar, Uma
> Subject: [PATCH] drm/i915/display: Fixed kernel taint in
> -Original Message-
> From: Jani Nikula
> Sent: Monday, April 20, 2020 6:47 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani ; Gupta, Anshuman
> ; Shankar, Uma
> Subject: [PATCH] drm/i915/audio: fix compressed_bpp check
>
> The early check for compressed_bpp being zero is
The early check for compressed_bpp being zero is too early, as it is hit
also when DSC is not enabled. Move the checks down to where the values
are actually needed. This is a paranoid check for a situation that
should not happen, so we don't really care about handling it gracefully
apart from not
Hi,
On 4/15/20 7:44 PM, Daniel Vetter wrote:
On Wed, Apr 15, 2020 at 05:03:55PM +0200, Hans de Goede wrote:
Hi,
On 4/15/20 9:39 AM, Daniel Vetter wrote:
Allows us to drop the cleanup code on the floor.
Sam noticed in his review:
With this change we avoid calling pci_disable_device()
twise
Quoting Mika Kuoppala (2020-04-20 13:54:21)
> Chris Wilson writes:
>
> > Quoting Mika Kuoppala (2020-04-20 11:54:38)
> >> Further, intel_runtime_pm_get is missing.
> >
> > For what? We acquire the wakeref via the request on the engine.
> >
> > We don't talk to intel_runtime_pm directly,
This patch fixes a kernel taint on non DSC DP monitors.
Fixes: 48b8b04c7 ("drm/i915/display: Enable DP Display Audio WA")
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1750
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_audio.c | 5 +++--
1 file changed, 3
Chris Wilson writes:
> Quoting Mika Kuoppala (2020-04-20 11:54:38)
>> Chris Wilson writes:
>>
>> > One of the core tenents of reclocking the GPU is that its throughput
>> > scales with the clock frequency. We can observe this by incrementing a
>> > loop counter on the GPU, and compare the
Since moving the obj->vma.list to a spin_lock, and the vm->bound_list to
its vm->mutex, along with tracking shrinkable status under its own
spinlock, we no long require the object to be locked by the caller.
This is fortunate as it appears we can be called with the lock along an
error path in
Avoid flushing the submission queue (of others) under the client's
timeline lock, but instead move it to the end so that we may catch more.
References: https://gitlab.freedesktop.org/drm/intel/-/issues/1066
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 5 -
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