Re: [Intel-gfx] [RFC PATCH] drm/ttm: Add a private member to the struct ttm_resource

2021-09-10 Thread Thomas Hellström
On Fri, 2021-09-10 at 19:03 +0200, Christian König wrote: > Am 10.09.21 um 17:30 schrieb Thomas Hellström: > > On Fri, 2021-09-10 at 16:40 +0200, Christian König wrote: > > > > > > Am 10.09.21 um 15:15 schrieb Thomas Hellström: > > > > Both the provider (resource manager) and the consumer (the TTM

[Intel-gfx] Intel UHD resolutions

2021-09-10 Thread Randy Dunlap
Hi, I would like to use QHD resolution (2560x1440) with my shiny new computer and display. That resolution works if I boot Windows 10 (cough). What do I need to do to use that resolution in Linux? I first tried openSUSE 15.3 (kernel 5.3.18-59.19-default) then I build a v5.14 kernel and tried th

[Intel-gfx] [PATCH] drm/i915: fix odd_ptr_err.cocci warnings

2021-09-10 Thread kernel test robot
wrong. Generated by: scripts/coccinelle/tests/odd_ptr_err.cocci CC: Maarten Lankhorst Reported-by: kernel test robot Signed-off-by: kernel test robot --- url: https://github.com/0day-ci/linux/commits/Maarten-Lankhorst/drm-i915-Add-ww-context-to-intel_dpt_pin/20210910-162231 base: git

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915/runtime_pm: Consolidate runtime_pm functions (rev2)

2021-09-10 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/runtime_pm: Consolidate runtime_pm functions (rev2) URL : https://patchwork.freedesktop.org/series/94563/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10571_full -> Patchwork_21018_full

Re: [Intel-gfx] [PATCH 3/4] drm/i915: rename debugfs_gt_pm files

2021-09-10 Thread Yokoyama, Caz
On Fri, 2021-09-10 at 14:52 -0700, Lucas De Marchi wrote: > On Fri, Sep 10, 2021 at 09:14:37PM +, Yokoyama, Caz wrote: > > On Fri, 2021-09-10 at 10:52 -0700, Lucas De Marchi wrote: > > > On Wed, Sep 08, 2021 at 05:49:40PM -0700, Lucas De Marchi wrote: > > > > We shouldn't be using debugfs_ name

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for querying hw info that UMDs need (rev2)

2021-09-10 Thread Patchwork
== Series Details == Series: Add support for querying hw info that UMDs need (rev2) URL : https://patchwork.freedesktop.org/series/94305/ State : warning == Summary == $ dim checkpatch origin/drm-tip 635d7bee7010 drm/i915/guc: Add fetch of hwconfig table -:97: WARNING:FILE_PATH_CHANGES: added,

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/runtime_pm: Consolidate runtime_pm functions (rev2)

2021-09-10 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/runtime_pm: Consolidate runtime_pm functions (rev2) URL : https://patchwork.freedesktop.org/series/94563/ State : success == Summary == CI Bug Log - changes from CI_DRM_10571 -> Patchwork_21018 ==

Re: [Intel-gfx] [PATCH v9 15/17] drm/i915/pxp: add pxp debugfs

2021-09-10 Thread Teres Alexis, Alan Previn
Reviewed-by: Alan Previn ..alan On Fri, 2021-09-10 at 08:36 -0700, Daniele Ceraolo Spurio wrote: > 2 debugfs files, one to query the current status of the pxp session and one > to trigger an invalidation for testing. > > v2: rename debugfs, fix date (Alan) > > Signed-off-by: Daniele Ceraolo S

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915/runtime_pm: Consolidate runtime_pm functions (rev2)

2021-09-10 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/runtime_pm: Consolidate runtime_pm functions (rev2) URL : https://patchwork.freedesktop.org/series/94563/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't

Re: [Intel-gfx] [PATCH 3/4] drm/i915: rename debugfs_gt_pm files

2021-09-10 Thread Lucas De Marchi
On Fri, Sep 10, 2021 at 09:14:37PM +, Yokoyama, Caz wrote: On Fri, 2021-09-10 at 10:52 -0700, Lucas De Marchi wrote: On Wed, Sep 08, 2021 at 05:49:40PM -0700, Lucas De Marchi wrote: > We shouldn't be using debugfs_ namespace for this functionality. > Rename > debugfs_gt_pm.[ch] to intel_gt_p

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Clean up GuC CI failures, simplify locking, and kernel DOC (rev11)

2021-09-10 Thread Matthew Brost
On Thu, Sep 09, 2021 at 07:13:44PM +, Patchwork wrote: > Patch Details > > Series: Clean up GuC CI failures, simplify locking, and kernel DOC (rev11) > URL: https://patchwork.freedesktop.org/series/93704/ > State: failure > Details: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_210

Re: [Intel-gfx] [PATCH 3/4] drm/i915: rename debugfs_gt_pm files

2021-09-10 Thread Yokoyama, Caz
On Fri, 2021-09-10 at 10:52 -0700, Lucas De Marchi wrote: > On Wed, Sep 08, 2021 at 05:49:40PM -0700, Lucas De Marchi wrote: > > We shouldn't be using debugfs_ namespace for this functionality. > > Rename > > debugfs_gt_pm.[ch] to intel_gt_pm_debugfs.[ch] and then make > > functions, defines and st

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for i915: Simplify mmio handling & add new DG2 shadow table (rev2)

2021-09-10 Thread Matt Roper
On Fri, Sep 10, 2021 at 08:56:20PM +, Patchwork wrote: > == Series Details == > > Series: i915: Simplify mmio handling & add new DG2 shadow table (rev2) > URL : https://patchwork.freedesktop.org/series/94534/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_10570 ->

Re: [Intel-gfx] [RFC PATCH] drm/ttm: Add a private member to the struct ttm_resource

2021-09-10 Thread Christian König
Am 10.09.21 um 17:30 schrieb Thomas Hellström: On Fri, 2021-09-10 at 16:40 +0200, Christian König wrote: Am 10.09.21 um 15:15 schrieb Thomas Hellström: Both the provider (resource manager) and the consumer (the TTM driver) want to subclass struct ttm_resource. Since this is left for the resour

[Intel-gfx] ✗ Fi.CI.BAT: failure for i915: Simplify mmio handling & add new DG2 shadow table (rev2)

2021-09-10 Thread Patchwork
== Series Details == Series: i915: Simplify mmio handling & add new DG2 shadow table (rev2) URL : https://patchwork.freedesktop.org/series/94534/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10570 -> Patchwork_21017 Summar

Re: [Intel-gfx] [PATCH 23/27] drm/i915/guc: Implement no mid batch preemption for multi-lrc

2021-09-10 Thread Matthew Brost
On Fri, Sep 10, 2021 at 12:25:43PM +0100, Tvrtko Ursulin wrote: > > On 20/08/2021 23:44, Matthew Brost wrote: > > For some users of multi-lrc, e.g. split frame, it isn't safe to preempt > > mid BB. To safely enable preemption at the BB boundary, a handshake > > between to parent and child is neede

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915: Simplify mmio handling & add new DG2 shadow table (rev2)

2021-09-10 Thread Patchwork
== Series Details == Series: i915: Simplify mmio handling & add new DG2 shadow table (rev2) URL : https://patchwork.freedesktop.org/series/94534/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +dr

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Simplify mmio handling & add new DG2 shadow table (rev2)

2021-09-10 Thread Patchwork
== Series Details == Series: i915: Simplify mmio handling & add new DG2 shadow table (rev2) URL : https://patchwork.freedesktop.org/series/94534/ State : warning == Summary == $ dim checkpatch origin/drm-tip 728596c7a8e0 drm/i915/uncore: Convert gen6/gen7 read operations to fwtable b8d30ae4eb0

Re: [Intel-gfx] [PATCH 05/27] drm/i915: Add GT PM unpark worker

2021-09-10 Thread Matthew Brost
On Fri, Sep 10, 2021 at 09:36:17AM +0100, Tvrtko Ursulin wrote: > > On 20/08/2021 23:44, Matthew Brost wrote: > > Sometimes it is desirable to queue work up for later if the GT PM isn't > > held and run that work on next GT PM unpark. > > Sounds maybe plausible, but it depends how much work can h

[Intel-gfx] [PATCH v2 5/6] drm/i915/uncore: Drop gen11 mmio read handlers

2021-09-10 Thread Matt Roper
Consolidate down to just a single 'fwtable' implementation. For reads we don't need to worry about shadow tables. Also, the NEEDS_FORCE_WAKE() check we previously had in the fwtable implementation can be dropped --- if a register is outside that range on one of the old platforms, then it won't be

[Intel-gfx] [PATCH v2 6/6] drm/i915/dg2: Add DG2-specific shadow register table

2021-09-10 Thread Matt Roper
We thought the DG2 table of shadowed registers would be the same as the gen12/xehp table, but it turns out that there are a few minor differences that require us to define a new DG2-specific table: * One register is removed (0xC4D4) * One register is added (0xC4E0) Signed-off-by: Matt Roper ---

[Intel-gfx] [PATCH v2 2/6] drm/i915/uncore: Associate shadow table with uncore

2021-09-10 Thread Matt Roper
Store a reference to a platform's shadow table inside the uncore, the same as we do with the forcewake table. This will allow us to use a single set of functions that operate on the shadow table reference rather than generating lots of nearly-identical functions via macros that differ only in term

[Intel-gfx] [PATCH v2 4/6] drm/i915/uncore: Drop gen11/gen12 mmio write handlers

2021-09-10 Thread Matt Roper
Now that the reference to the shadow table is stored within the uncore, we don't need to generate separate fwtable, gen11_fwtable, and gen12_fwtable variants of the register write functions; a single 'fwtable' implementation will work for all of those platforms now. While consolidating the functio

[Intel-gfx] [PATCH v2 1/6] drm/i915/uncore: Convert gen6/gen7 read operations to fwtable

2021-09-10 Thread Matt Roper
On gen6-gen8 (except vlv/chv) we don't use a forcewake lookup table; we simply check whether the register offset is < 0x4, and return FORCEWAKE_RENDER if it is. To prepare for upcoming refactoring, let's define a single-entry forcewake table from [0x0, 0x3] and switch these platforms over

[Intel-gfx] [PATCH v2 3/6] drm/i915/uncore: Replace gen8 write functions with general fwtable

2021-09-10 Thread Matt Roper
Now that we have both a standard forcewake table (albeit a single-entry table) and the shadow table stored in the uncore, we can drop the gen8-specific write handlers in favor of the general fwtable version. Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/intel_uncore.c | 13 + 1

[Intel-gfx] [PATCH v2 0/6] i915: Simplify mmio handling & add new DG2 shadow table

2021-09-10 Thread Matt Roper
Our uncore MMIO functions for reading/writing registers have become very complicated over time. There's significant macro magic used to generate several nearly-identical functions that only really differ in terms of which platform-specific shadow register table they should check on write operation

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915/runtime_pm: Consolidate runtime_pm functions

2021-09-10 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/runtime_pm: Consolidate runtime_pm functions URL : https://patchwork.freedesktop.org/series/94563/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10570_full -> Patchwork_21016_full ===

Re: [Intel-gfx] [PATCH 08/27] drm/i915: Add logical engine mapping

2021-09-10 Thread Matthew Brost
On Fri, Sep 10, 2021 at 12:12:42PM +0100, Tvrtko Ursulin wrote: > > On 20/08/2021 23:44, Matthew Brost wrote: > > Add logical engine mapping. This is required for split-frame, as > > workloads need to be placed on engines in a logically contiguous manner. > > > > v2: > > (Daniel Vetter) > >

Re: [Intel-gfx] [PATCH v9 05/17] drm/i915/pxp: Implement funcs to create the TEE channel

2021-09-10 Thread Rodrigo Vivi
On Fri, Sep 10, 2021 at 08:36:15AM -0700, Daniele Ceraolo Spurio wrote: > From: "Huang, Sean Z" > > Implement the funcs to create the TEE channel, so kernel can > send the TEE commands directly to TEE for creating the arbitrary > (default) session. > > v2: fix locking, don't pollute dev_priv (Ch

Re: [Intel-gfx] [PATCH v9 10/17] drm/i915/pxp: interfaces for using protected objects

2021-09-10 Thread Rodrigo Vivi
On Fri, Sep 10, 2021 at 08:36:20AM -0700, Daniele Ceraolo Spurio wrote: > This api allow user mode to create protected buffers and to mark > contexts as making use of such objects. Only when using contexts > marked in such a way is the execution guaranteed to work as expected. > > Contexts can onl

Re: [Intel-gfx] [PATCH v9 16/17] drm/i915/pxp: add PXP documentation

2021-09-10 Thread Rodrigo Vivi
On Fri, Sep 10, 2021 at 08:36:26AM -0700, Daniele Ceraolo Spurio wrote: > Now that all the pieces are in place we can add a description of how the > feature works. Also modify the comments in struct intel_pxp into > kerneldoc. > > v2: improve doc (Rodrigo) > > Signed-off-by: Daniele Ceraolo Spuri

Re: [Intel-gfx] [RFC PATCH] drm/ttm: Add a private member to the struct ttm_resource

2021-09-10 Thread Christian König
Am 10.09.21 um 15:15 schrieb Thomas Hellström: Both the provider (resource manager) and the consumer (the TTM driver) want to subclass struct ttm_resource. Since this is left for the resource manager, we need to provide a private pointer for the TTM driver. Provide a struct ttm_resource_priva

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/runtime_pm: Consolidate runtime_pm functions

2021-09-10 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/runtime_pm: Consolidate runtime_pm functions URL : https://patchwork.freedesktop.org/series/94563/ State : success == Summary == CI Bug Log - changes from CI_DRM_10570 -> Patchwork_21016 =

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Introduce Intel PXP (rev7)

2021-09-10 Thread Patchwork
== Series Details == Series: drm/i915: Introduce Intel PXP (rev7) URL : https://patchwork.freedesktop.org/series/90503/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10570_full -> Patchwork_21015_full Summary --- **F

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915/runtime_pm: Consolidate runtime_pm functions

2021-09-10 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/runtime_pm: Consolidate runtime_pm functions URL : https://patchwork.freedesktop.org/series/94563/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be chec

Re: [Intel-gfx] [PATCH v2] kernel/locking: Add context to ww_mutex_trylock.

2021-09-10 Thread Mark Brown
On Thu, Sep 09, 2021 at 11:32:18AM +0200, Maarten Lankhorst wrote: > This is also useful in regulator_lock_nested, which may avoid dropping > regulator_nesting_mutex in the uncontended path, so use it there. Acked-by: Mark Brown signature.asc Description: PGP signature

Re: [Intel-gfx] [PATCH 3/4] drm/i915: rename debugfs_gt_pm files

2021-09-10 Thread Lucas De Marchi
On Wed, Sep 08, 2021 at 05:49:40PM -0700, Lucas De Marchi wrote: We shouldn't be using debugfs_ namespace for this functionality. Rename debugfs_gt_pm.[ch] to intel_gt_pm_debugfs.[ch] and then make functions, defines and structs follow suit. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i9

[Intel-gfx] [PATCH 2/3] drm/i915: Disallow D3Cold.

2021-09-10 Thread Rodrigo Vivi
During runtime or s2idle suspend and resume cases on discrete cards, if D3Cold is really achieved, we will blow everything up and freeze the machine because we are not yet handling the pci states properly. On Integrated it simply doesn't matter because D3hot is the maximum that we will get anyway,

[Intel-gfx] [PATCH 1/3] drm/i915/runtime_pm: Consolidate runtime_pm functions

2021-09-10 Thread Rodrigo Vivi
No functional changes. Just revamping the functions with s/dev_priv/i915 and consolidating along with other runtime_pm functions. v2: avoid the extra redirection (Imre) Cc: Imre Deak Cc: Tilak Tangudu Signed-off-by: Rodrigo Vivi Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/i915_drv.c

[Intel-gfx] [PATCH 3/3] drm/i915: Enable runtime pm autosuspend by default

2021-09-10 Thread Rodrigo Vivi
Let's enable runtime pm autosuspend by default everywhere. But at this time let's not touch the autosuspend_delay time, what caused some regression on our previous attempt. v2: CI on some gen9 platforms was not clean. But it came pretty clean on newer generations. For now, let's pick gen1

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: program audio CDCLK-TS for keepalives

2021-09-10 Thread Patchwork
== Series Details == Series: drm/i915/display: program audio CDCLK-TS for keepalives URL : https://patchwork.freedesktop.org/series/94551/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10570_full -> Patchwork_21013_full Sum

Re: [Intel-gfx] [PATCH v2 5/9] vfio/mdev: Consolidate all the device_api sysfs into the core code

2021-09-10 Thread Jason Gunthorpe
On Fri, Sep 10, 2021 at 01:10:46PM +0100, Christoph Hellwig wrote: > On Thu, Sep 09, 2021 at 04:38:45PM -0300, Jason Gunthorpe wrote: > > Every driver just emits a static string, simply feed it through the ops > > and provide a standard sysfs show function. > > Looks sensible. But can you make th

Re: [Intel-gfx] [PATCH v2] kernel/locking: Add context to ww_mutex_trylock.

2021-09-10 Thread Peter Zijlstra
On Fri, Sep 10, 2021 at 05:02:54PM +0200, Peter Zijlstra wrote: > That doesn't look right, how's this for you? Full patch for the robots here: https://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git/commit/?h=locking/core&id=826e7b8826f0af185bb93249600533c33fd69a95

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Introduce Intel PXP (rev7)

2021-09-10 Thread Patchwork
== Series Details == Series: drm/i915: Introduce Intel PXP (rev7) URL : https://patchwork.freedesktop.org/series/90503/ State : success == Summary == CI Bug Log - changes from CI_DRM_10570 -> Patchwork_21015 Summary --- **SUCCESS**

Re: [Intel-gfx] [PATCH 2/5] drm/i915/display/adlp: Add new PSR2 workarounds

2021-09-10 Thread Souza, Jose
On Fri, 2021-09-10 at 16:38 +0300, Gwan-gyeong Mun wrote: > > On 9/10/21 2:07 AM, José Roberto de Souza wrote: > > Wa_16014451276 fixes the starting coordinate for PSR2 selective > > updates. CHICKEN_TRANS definition of the workaround bit has a wrong > > name based on workaround definition and HSD

[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Introduce Intel PXP (rev7)

2021-09-10 Thread Patchwork
== Series Details == Series: drm/i915: Introduce Intel PXP (rev7) URL : https://patchwork.freedesktop.org/series/90503/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./include/uapi/drm/i915_drm.h:1904: warning: This comment starts with '/**', but isn't a kernel-do

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Introduce Intel PXP (rev7)

2021-09-10 Thread Patchwork
== Series Details == Series: drm/i915: Introduce Intel PXP (rev7) URL : https://patchwork.freedesktop.org/series/90503/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/gt/in

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Introduce Intel PXP (rev7)

2021-09-10 Thread Patchwork
== Series Details == Series: drm/i915: Introduce Intel PXP (rev7) URL : https://patchwork.freedesktop.org/series/90503/ State : warning == Summary == $ dim checkpatch origin/drm-tip 78a14c39c962 drm/i915/pxp: Define PXP component interface -:31: WARNING:FILE_PATH_CHANGES: added, moved or delet

Re: [Intel-gfx] [PATCH v2 5/9] vfio/mdev: Consolidate all the device_api sysfs into the core code

2021-09-10 Thread Alex Williamson
On Fri, 10 Sep 2021 10:38:50 -0300 Jason Gunthorpe wrote: > On Fri, Sep 10, 2021 at 01:10:46PM +0100, Christoph Hellwig wrote: > > On Thu, Sep 09, 2021 at 04:38:45PM -0300, Jason Gunthorpe wrote: > > > Every driver just emits a static string, simply feed it through the ops > > > and provide a s

[Intel-gfx] [PATCH v9 12/17] drm/i915/pxp: Enable PXP power management

2021-09-10 Thread Daniele Ceraolo Spurio
From: "Huang, Sean Z" During the power event S3+ sleep/resume, hardware will lose all the encryption keys for every hardware session, even though the session state might still be marked as alive after resume. Therefore, we should consider the session as dead on suspend and invalidate all the obje

[Intel-gfx] [PATCH v9 14/17] drm/i915/pxp: black pixels on pxp disabled

2021-09-10 Thread Daniele Ceraolo Spurio
From: Anshuman Gupta When protected sufaces has flipped and pxp session is disabled, display black pixels by using plane color CTM correction. v2: - Display black pixels in async flip too. v3: - Removed the black pixels logic for async flip. [Ville] - Used plane state to force black pixels. [Vi

[Intel-gfx] [PATCH v9 15/17] drm/i915/pxp: add pxp debugfs

2021-09-10 Thread Daniele Ceraolo Spurio
2 debugfs files, one to query the current status of the pxp session and one to trigger an invalidation for testing. v2: rename debugfs, fix date (Alan) Signed-off-by: Daniele Ceraolo Spurio Reviewed-by : Alan Previn --- drivers/gpu/drm/i915/Makefile| 1 + drivers/gpu/drm/i915/

[Intel-gfx] [PATCH v9 17/17] drm/i915/pxp: enable PXP for integrated Gen12

2021-09-10 Thread Daniele Ceraolo Spurio
Note that discrete cards can support PXP as well, but we haven't tested on those yet so keeping it disabled for now. Signed-off-by: Daniele Ceraolo Spurio Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_pci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i91

[Intel-gfx] [PATCH v9 07/17] drm/i915/pxp: Create the arbitrary session after boot

2021-09-10 Thread Daniele Ceraolo Spurio
From: "Huang, Sean Z" Create the arbitrary session, with the fixed session id 0xf, after system boot, for the case that application allocates the protected buffer without establishing any protection session. Because the hardware requires at least one alive session for protected buffer creation. T

[Intel-gfx] [PATCH v9 08/17] drm/i915/pxp: Implement arb session teardown

2021-09-10 Thread Daniele Ceraolo Spurio
From: "Huang, Sean Z" Teardown is triggered when the display topology changes and no long meets the secure playback requirement, and hardware trashes all the encryption keys for display. Additionally, we want to emit a teardown operation to make sure we're clean on boot and resume v2: emit in th

[Intel-gfx] [PATCH v9 16/17] drm/i915/pxp: add PXP documentation

2021-09-10 Thread Daniele Ceraolo Spurio
Now that all the pieces are in place we can add a description of how the feature works. Also modify the comments in struct intel_pxp into kerneldoc. v2: improve doc (Rodrigo) Signed-off-by: Daniele Ceraolo Spurio Cc: Daniel Vetter Cc: Rodrigo Vivi --- Documentation/gpu/i915.rst

[Intel-gfx] [PATCH v9 11/17] drm/i915/pxp: start the arb session on demand

2021-09-10 Thread Daniele Ceraolo Spurio
Now that we can handle destruction and re-creation of the arb session, we can postpone the start of the session to the first submission that requires it, to avoid keeping it running with no user. Signed-off-by: Daniele Ceraolo Spurio Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/gem/i915_g

[Intel-gfx] [PATCH v9 13/17] drm/i915/pxp: Add plane decryption support

2021-09-10 Thread Daniele Ceraolo Spurio
From: Anshuman Gupta Add support to enable/disable PLANE_SURF Decryption Request bit. It requires only to enable plane decryption support when following condition met. 1. PXP session is enabled. 2. Buffer object is protected. v2: - Used gen fb obj user_flags instead gem_object_metadata. [Krishna

[Intel-gfx] [PATCH v9 09/17] drm/i915/pxp: Implement PXP irq handler

2021-09-10 Thread Daniele Ceraolo Spurio
From: "Huang, Sean Z" The HW will generate a teardown interrupt when session termination is required, which requires i915 to submit a terminating batch. Once the HW is done with the termination it will generate another interrupt, at which point it is safe to re-create the session. Since the term

[Intel-gfx] [PATCH v9 10/17] drm/i915/pxp: interfaces for using protected objects

2021-09-10 Thread Daniele Ceraolo Spurio
This api allow user mode to create protected buffers and to mark contexts as making use of such objects. Only when using contexts marked in such a way is the execution guaranteed to work as expected. Contexts can only be marked as using protected content at creation time (i.e. the parameter is imm

[Intel-gfx] [PATCH v9 05/17] drm/i915/pxp: Implement funcs to create the TEE channel

2021-09-10 Thread Daniele Ceraolo Spurio
From: "Huang, Sean Z" Implement the funcs to create the TEE channel, so kernel can send the TEE commands directly to TEE for creating the arbitrary (default) session. v2: fix locking, don't pollute dev_priv (Chris) v3: wait for mei PXP component to be bound. v4: drop the wait, as the component

[Intel-gfx] [PATCH v9 03/17] drm/i915/pxp: define PXP device flag and kconfig

2021-09-10 Thread Daniele Ceraolo Spurio
Ahead of the PXP implementation, define the relevant define flag and kconfig option. v2: flip kconfig default to N. Some machines have IFWIs that do not support PXP, so we need it to be an opt-in until we add support to query the caps from the mei device. Signed-off-by: Daniele Ceraolo Spurio Re

Re: [Intel-gfx] [PATCH] drm/i915/display: program audio CDCLK-TS for keepalives

2021-09-10 Thread Jani Nikula
On Fri, 10 Sep 2021, Kai Vehmanen wrote: > XE_LPD display adds support for display audio codec keepalive feature. > This feature works also when display codec is in D3 state and the audio > link is off (BCLK off). To enable this functionality, display driver > must update the AUD_TS_CDCLK_M/N regi

[Intel-gfx] [PATCH v9 06/17] drm/i915/pxp: set KCR reg init

2021-09-10 Thread Daniele Ceraolo Spurio
The setting is required by hardware to allow us doing further protection operation such as sending commands to GPU or TEE. The register needs to be re-programmed on resume, so for simplicitly we bundle the programming with the component binding, which is automatically called on resume. Further HW

[Intel-gfx] [PATCH v9 04/17] drm/i915/pxp: allocate a vcs context for pxp usage

2021-09-10 Thread Daniele Ceraolo Spurio
The context is required to send the session termination commands to the VCS, which will be implemented in a follow-up patch. We can also use the presence of the context as a check of pxp initialization completion. v2: use perma-pinned context (Chris) v3: rename pinned_context functions (Chris) v4:

[Intel-gfx] [PATCH v9 01/17] drm/i915/pxp: Define PXP component interface

2021-09-10 Thread Daniele Ceraolo Spurio
This will be used for communication between the i915 driver and the mei one. Defining it in a stand-alone patch to avoid circualr dependedencies between the patches modifying the 2 drivers. Split out from an original patch from Huang, Sean Z v2: rename the component struct (Rodrigo) Signed-off-

[Intel-gfx] [PATCH v9 02/17] mei: pxp: export pavp client to me client bus

2021-09-10 Thread Daniele Ceraolo Spurio
From: Vitaly Lubart Export PAVP client to work with i915 driver, for binding it uses kernel component framework. v2:drop debug prints, refactor match code to match mei_hdcp (Tomas) Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Signed-off-by: Daniele Ceraolo Spurio Reviewed-by: Ro

[Intel-gfx] [PATCH v9 00/17] drm/i915: Introduce Intel PXP

2021-09-10 Thread Daniele Ceraolo Spurio
PXP (Protected Xe Path) is an i915 component, available on GEN12i and newer platforms, that helps to establish the hardware protected session and manage the status of the alive software session, as well as its life cycle. changes from v8: - comments/docs improvements - remove rpm put race (pxp_inv

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: program audio CDCLK-TS for keepalives

2021-09-10 Thread Patchwork
== Series Details == Series: drm/i915/display: program audio CDCLK-TS for keepalives URL : https://patchwork.freedesktop.org/series/94551/ State : success == Summary == CI Bug Log - changes from CI_DRM_10570 -> Patchwork_21013 Summary -

[Intel-gfx] ✗ Fi.CI.BUILD: failure for kernel/locking: Add context to ww_mutex_trylock. (rev3)

2021-09-10 Thread Patchwork
== Series Details == Series: kernel/locking: Add context to ww_mutex_trylock. (rev3) URL : https://patchwork.freedesktop.org/series/94437/ State : failure == Summary == Applying: kernel/locking: Add context to ww_mutex_trylock. error: sha1 information is lacking or useless (kernel/locking/mute

Re: [Intel-gfx] [RFC PATCH] drm/ttm: Add a private member to the struct ttm_resource

2021-09-10 Thread Thomas Hellström
On Fri, 2021-09-10 at 16:40 +0200, Christian König wrote: > > > Am 10.09.21 um 15:15 schrieb Thomas Hellström: > > Both the provider (resource manager) and the consumer (the TTM > > driver) > > want to subclass struct ttm_resource. Since this is left for the > > resource > > manager, we need to p

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/ttm: Add a private member to the struct ttm_resource

2021-09-10 Thread Patchwork
== Series Details == Series: drm/ttm: Add a private member to the struct ttm_resource URL : https://patchwork.freedesktop.org/series/94550/ State : success == Summary == CI Bug Log - changes from CI_DRM_10569_full -> Patchwork_21012_full Su

Re: [Intel-gfx] [PATCH 0/6] i915: Simplify mmio handling & add new DG2 shadow table

2021-09-10 Thread Matt Roper
On Fri, Sep 10, 2021 at 04:03:50PM +0100, Tvrtko Ursulin wrote: > > On 10/09/2021 15:24, Matt Roper wrote: > > On Fri, Sep 10, 2021 at 02:03:44PM +0100, Tvrtko Ursulin wrote: > > > > > > On 10/09/2021 06:33, Matt Roper wrote: > > > > Our uncore MMIO functions for reading/writing registers have be

Re: [Intel-gfx] [PATCH v2] kernel/locking: Add context to ww_mutex_trylock.

2021-09-10 Thread Peter Zijlstra
On Thu, Sep 09, 2021 at 11:32:18AM +0200, Maarten Lankhorst wrote: > diff --git a/kernel/locking/mutex.c b/kernel/locking/mutex.c > index d456579d0952..791c28005eef 100644 > --- a/kernel/locking/mutex.c > +++ b/kernel/locking/mutex.c > @@ -736,6 +736,44 @@ __ww_mutex_lock(struct mutex *lock, unsign

Re: [Intel-gfx] [PATCH 0/6] i915: Simplify mmio handling & add new DG2 shadow table

2021-09-10 Thread Tvrtko Ursulin
On 10/09/2021 15:24, Matt Roper wrote: On Fri, Sep 10, 2021 at 02:03:44PM +0100, Tvrtko Ursulin wrote: On 10/09/2021 06:33, Matt Roper wrote: Our uncore MMIO functions for reading/writing registers have become very complicated over time. There's significant macro magic used to generate seve

Re: [Intel-gfx] [PATCH 0/6] i915: Simplify mmio handling & add new DG2 shadow table

2021-09-10 Thread Matt Roper
On Fri, Sep 10, 2021 at 02:03:44PM +0100, Tvrtko Ursulin wrote: > > On 10/09/2021 06:33, Matt Roper wrote: > > Our uncore MMIO functions for reading/writing registers have become very > > complicated over time. There's significant macro magic used to generate > > several nearly-identical function

[Intel-gfx] [PATCH 0/1] lib, stackdepot: Add helper to print stack entries into buffer.

2021-09-10 Thread Imran Khan
This change is in response to discussion at [1]. The patch has been created on top of my earlier changes [2] and [3]. If needed I can resend all of these patches together, though my earlier patches have been Acked. [1] https://lore.kernel.org/lkml/e6f6fb85-1d83-425b-9e36-b5784cc9e...@suse.cz/ [2]

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/ttm: Add a private member to the struct ttm_resource

2021-09-10 Thread Patchwork
== Series Details == Series: drm/ttm: Add a private member to the struct ttm_resource URL : https://patchwork.freedesktop.org/series/94550/ State : success == Summary == CI Bug Log - changes from CI_DRM_10569 -> Patchwork_21012 Summary

Re: [Intel-gfx] [PATCH 1/5] drm/i915/display/adlp: Fix PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR calculation

2021-09-10 Thread Gwan-gyeong Mun
Looks good to me. Reviewed-by: Gwan-gyeong Mun On 9/10/21 2:07 AM, José Roberto de Souza wrote: As the SU_REGION_START begins at 0, the SU_REGION_END should be number of lines - 1. BSpec: 50424 Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_

Re: [Intel-gfx] [PATCH 2/5] drm/i915/display/adlp: Add new PSR2 workarounds

2021-09-10 Thread Gwan-gyeong Mun
On 9/10/21 2:07 AM, José Roberto de Souza wrote: Wa_16014451276 fixes the starting coordinate for PSR2 selective updates. CHICKEN_TRANS definition of the workaround bit has a wrong name based on workaround definition and HSD. Wa_14014971508 allows the screen to continue to be updated when com

Re: [Intel-gfx] [PATCH v5] drm/i915: Use Transparent Hugepages when IOMMU is enabled

2021-09-10 Thread Tvrtko Ursulin
On 09/09/2021 17:17, Rodrigo Vivi wrote: On Thu, Sep 09, 2021 at 12:44:48PM +0100, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Usage of Transparent Hugepages was disabled in 9987da4b5dcf ("drm/i915: Disable THP until we have a GPU read BW W/A"), but since it appears majority of performance re

Re: [Intel-gfx] [PATCH 5/5] drm/i915/display: Workaround cursor left overs with PSR2 selective fetch enabled

2021-09-10 Thread Gwan-gyeong Mun
Reviewed-by: Gwan-gyeong Mun On 9/10/21 2:07 AM, José Roberto de Souza wrote: Not sure why but when moving the cursor fast it causes some artifacts of the cursor to be left in the cursor path, adding some pixels above the cursor to the damaged area fixes the issue, so leaving this as a workarou

Re: [Intel-gfx] [PATCH v2 3/6] drm/i915 Implement LMEM backup and restore for suspend / resume

2021-09-10 Thread Thomas Hellström
On 9/6/21 6:55 PM, Thomas Hellström wrote: Just evict unpinned objects to system. For pinned LMEM objects, make a backup system object and blit the contents to that. Backup is performed in three steps, 1: Opportunistically evict evictable objects using the gpu blitter. 2: After gt idle, evict

Re: [Intel-gfx] [PATCH 3/5] drm/i915/display: Wait at least 2 frames before selective update

2021-09-10 Thread Gwan-gyeong Mun
Reviewed-by: Gwan-gyeong Mun On 9/10/21 2:07 AM, José Roberto de Souza wrote: BSpec states that the minimum number of frames before selective update is 2, so making sure this minimum limit is fulfilled. BSpec: 50422 Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza --- drivers/gpu/d

[Intel-gfx] [PATCH] drm/i915/display: program audio CDCLK-TS for keepalives

2021-09-10 Thread Kai Vehmanen
XE_LPD display adds support for display audio codec keepalive feature. This feature works also when display codec is in D3 state and the audio link is off (BCLK off). To enable this functionality, display driver must update the AUD_TS_CDCLK_M/N registers whenever CDCLK is changed. Actual timestamps

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/ttm: Add a private member to the struct ttm_resource

2021-09-10 Thread Patchwork
== Series Details == Series: drm/ttm: Add a private member to the struct ttm_resource URL : https://patchwork.freedesktop.org/series/94550/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6fac6006f050 drm/ttm: Add a private member to the struct ttm_resource -:83: WARNING:SPACING:

[Intel-gfx] [RFC PATCH] drm/ttm: Add a private member to the struct ttm_resource

2021-09-10 Thread Thomas Hellström
Both the provider (resource manager) and the consumer (the TTM driver) want to subclass struct ttm_resource. Since this is left for the resource manager, we need to provide a private pointer for the TTM driver. Provide a struct ttm_resource_private for the driver to subclass for data with the same

Re: [Intel-gfx] [PATCH 0/6] i915: Simplify mmio handling & add new DG2 shadow table

2021-09-10 Thread Tvrtko Ursulin
On 10/09/2021 06:33, Matt Roper wrote: Our uncore MMIO functions for reading/writing registers have become very complicated over time. There's significant macro magic used to generate several nearly-identical functions that only really differ in terms of which platform-specific shadow register

Re: [Intel-gfx] [PATCH 1/6] drm/i915/uncore: Convert gen6/gen7 read operations to fwtable

2021-09-10 Thread Tvrtko Ursulin
On 10/09/2021 06:33, Matt Roper wrote: On gen6-gen8 (except vlv/chv) we don't use a forcewake lookup table; we simply check whether the register offset is < 0x4, and return FORCEWAKE_RENDER if it is. To prepare for upcoming refactoring, let's define a single-entry forcewake table from [0x

Re: [Intel-gfx] [PATCH 5/6] drm/i915/uncore: Drop gen11 mmio read handlers

2021-09-10 Thread Tvrtko Ursulin
On 10/09/2021 06:33, Matt Roper wrote: Consolidate down to just a single 'fwtable' implementation. For reads we don't need to worry about shadow tables. Also, the NEEDS_FORCE_WAKE() check we previously had in the fwtable implementation can be dropped --- if a register is outside that range on

Re: [Intel-gfx] [PATCH v2 6/9] vfio/mdev: Add mdev available instance checking to the core

2021-09-10 Thread Christoph Hellwig
On Thu, Sep 09, 2021 at 04:38:46PM -0300, Jason Gunthorpe wrote: > Many of the mdev drivers use a simple counter for keeping track of the > available instances. Move this code to the core code and store the counter > in the mdev_type. Implement it using correct locking, fixing mdpy. > > Drivers pr

Re: [Intel-gfx] [PATCH v2 5/9] vfio/mdev: Consolidate all the device_api sysfs into the core code

2021-09-10 Thread Christoph Hellwig
On Thu, Sep 09, 2021 at 04:38:45PM -0300, Jason Gunthorpe wrote: > Every driver just emits a static string, simply feed it through the ops > and provide a standard sysfs show function. Looks sensible. But can you make the attribute optional and add a comment marking it deprecated? Because it rea

Re: [Intel-gfx] [PATCH v2 2/9] vfio/ccw: Pass vfio_ccw_private not mdev_device to various functions

2021-09-10 Thread Christoph Hellwig
Looks good, Reviewed-by: Christoph Hellwig

Re: [Intel-gfx] [PATCH RESEND] drm/i915: Mark GPU wedging on driver unregister unrecoverable

2021-09-10 Thread Michał Winiarski
On 03.09.2021 16:28, Janusz Krzysztofik wrote: GPU wedged flag now set on driver unregister to prevent from further using the GPU can be then cleared unintentionally when calling __intel_gt_unset_wedged() still before the flag is finally marked unrecoverable. We need to have it marked unrecovera

Re: [Intel-gfx] [PATCH v2 1/9] vfio/ccw: Use functions for alloc/free of the vfio_ccw_private

2021-09-10 Thread Christoph Hellwig
On Thu, Sep 09, 2021 at 04:38:41PM -0300, Jason Gunthorpe wrote: > + > + private = kzalloc(sizeof(*private), GFP_KERNEL | GFP_DMA); > + if (!private) > + return ERR_PTR(-ENOMEM); Nit: there is no need to add GFP_KERNEL when using GFP_DMA. Also a question to the s390 maintainer

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Add ww context to intel_dpt_pin

2021-09-10 Thread Patchwork
== Series Details == Series: drm/i915: Add ww context to intel_dpt_pin URL : https://patchwork.freedesktop.org/series/94537/ State : success == Summary == CI Bug Log - changes from CI_DRM_10569_full -> Patchwork_21011_full Summary ---

Re: [Intel-gfx] [PATCH 23/27] drm/i915/guc: Implement no mid batch preemption for multi-lrc

2021-09-10 Thread Tvrtko Ursulin
On 20/08/2021 23:44, Matthew Brost wrote: For some users of multi-lrc, e.g. split frame, it isn't safe to preempt mid BB. To safely enable preemption at the BB boundary, a handshake between to parent and child is needed. This is implemented via custom emit_bb_start & emit_fini_breadcrumb functi

Re: [Intel-gfx] [PATCH 08/27] drm/i915: Add logical engine mapping

2021-09-10 Thread Tvrtko Ursulin
On 20/08/2021 23:44, Matthew Brost wrote: Add logical engine mapping. This is required for split-frame, as workloads need to be placed on engines in a logically contiguous manner. v2: (Daniel Vetter) - Add kernel doc for new fields Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH v8 16/17] drm/i915/pxp: add PXP documentation

2021-09-10 Thread Daniele Ceraolo Spurio
On 9/9/2021 2:25 PM, Rodrigo Vivi wrote: On Thu, Sep 09, 2021 at 05:29:14AM -0700, Daniele Ceraolo Spurio wrote: Now that all the pieces are in place we can add a description of how the feature works. Also modify the comments in struct intel_pxp into kerneldoc. Signed-off-by: Daniele Ceraolo

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add ww context to intel_dpt_pin

2021-09-10 Thread Patchwork
== Series Details == Series: drm/i915: Add ww context to intel_dpt_pin URL : https://patchwork.freedesktop.org/series/94537/ State : success == Summary == CI Bug Log - changes from CI_DRM_10569 -> Patchwork_21011 Summary --- **SUCCES

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