== Series Details ==
Series: drm/i915/display: Fix the dsc check while selecting min_cdclk
URL : https://patchwork.freedesktop.org/series/94683/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10586 -> Patchwork_21053
Summary
The right parameter that selects second dsc engine is dsc_split.
Hence use dsc_split instead of slice_count while selecting the
cdclk in order to accommodate 1ppc limitaion of vdsc.
Fixes: fe01883fdcef ("drm/i915: Get proper min cdclk if vDSC enabled")
Suggested-by: Jani Nikula
Signed-off-by: Van
On Mon, Jul 26, 2021 at 05:28:12PM -0700, john.c.harri...@intel.com wrote:
> From: Rodrigo Vivi
>
> Newer platforms have an embedded table giving details about that
> platform's hardware configuration. This table can be retrieved from
> the KMD via the query API. So add a test for it as both an e
On Fri, Sep 03, 2021 at 02:51:49PM +0530, Ayaz A Siddiqui wrote:
> Now there are lots of Command and registers that require mocs index
> programming.
> So propagating mocs_index from mocs to gt so that it can be
> used directly without having platform-specific checks.
>
> V2:
> Changed 'i915_mocs_
== Series Details ==
Series: drm/i915: Update memory bandwidth parameters (rev2)
URL : https://patchwork.freedesktop.org/series/94620/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10586_full -> Patchwork_21051_full
Summary
== Series Details ==
Series: drm/i915/guc/slpc: remove unneeded clflush calls (rev2)
URL : https://patchwork.freedesktop.org/series/94668/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10586_full -> Patchwork_21050_full
Sum
== Series Details ==
Series: i915/display: split and constify vtable (rev5)
URL : https://patchwork.freedesktop.org/series/94459/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10586 -> Patchwork_21052
Summary
---
**F
On Tue, Sep 14, 2021 at 3:31 PM Jani Nikula wrote:
>
> On Tue, 14 Sep 2021, Lyude Paul wrote:
> > On Tue, 2021-09-14 at 12:09 +0300, Jani Nikula wrote:
> >> On Mon, 13 Sep 2021, Vasily Khoruzhick wrote:
> >> > Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
> >> > control
== Series Details ==
Series: i915/display: split and constify vtable (rev5)
URL : https://patchwork.freedesktop.org/series/94459/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e37b65685b48 drm/i915/uncore: split the fw get function into separate vfunc
870e9ca20427 drm/i915/pm:
== Series Details ==
Series: drm/i915: Update memory bandwidth parameters (rev2)
URL : https://patchwork.freedesktop.org/series/94620/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10586 -> Patchwork_21051
Summary
---
== Series Details ==
Series: drm/i915/guc/slpc: remove unneeded clflush calls (rev2)
URL : https://patchwork.freedesktop.org/series/94668/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10586 -> Patchwork_21050
Summary
-
On Fri, Sep 10, 2021 at 10:52:57AM -0700, Lucas De Marchi wrote:
> On Wed, Sep 08, 2021 at 05:49:40PM -0700, Lucas De Marchi wrote:
> > We shouldn't be using debugfs_ namespace for this functionality. Rename
> > debugfs_gt_pm.[ch] to intel_gt_pm_debugfs.[ch] and then make
> > functions, defines and
== Series Details ==
Series: Update to DMC v2.12 for ADLP
URL : https://patchwork.freedesktop.org/series/94675/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10585_full -> Patchwork_21049_full
Summary
---
**FAILURE**
On Tue, Sep 14, 2021 at 04:25:08PM +0200, Daniel Vetter wrote:
> On Mon, Sep 13, 2021 at 10:09:54PM -0700, Matthew Brost wrote:
> > An error capture allocates memory, memory allocations depend on resets,
> > and resets need to flush the G2H handlers to seal several races. If the
> > error capture i
On Tue, 2021-09-14 at 16:30 -0700, José Roberto de Souza wrote:
> On Tue, 2021-09-14 at 11:20 +0300, Ville Syrjälä wrote:
> > On Mon, Sep 13, 2021 at 04:28:35PM +, Souza, Jose wrote:
> > > On Mon, 2021-09-13 at 17:44 +0300, Ville Syrjala wrote:
> > > > From: Ville Syrjälä
> > > >
> > > > Disa
== Series Details ==
Series: drm/i915/guc/slpc: remove unneeded clflush calls (rev2)
URL : https://patchwork.freedesktop.org/series/94668/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
eeef49b011c8 drm/i915/guc/slpc: remove unneeded clflush calls
-:6: WARNING:TYPO_SPELLING: 'wr
On Tue, Sep 14, 2021 at 04:29:21PM +0200, Daniel Vetter wrote:
> On Mon, Sep 13, 2021 at 10:09:56PM -0700, Matthew Brost wrote:
> > From: John Harrison
> >
> > When i915 receives a context reset notification from GuC, it triggers
> > an error capture before resetting any outstanding requsts of th
On Tue, 2021-09-14 at 11:20 +0300, Ville Syrjälä wrote:
> On Mon, Sep 13, 2021 at 04:28:35PM +, Souza, Jose wrote:
> > On Mon, 2021-09-13 at 17:44 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Disabling planes in the middle of the modeset seuqnece does not make
> > > sense
On 9/14/2021 07:29, Daniel Vetter wrote:
On Mon, Sep 13, 2021 at 10:09:56PM -0700, Matthew Brost wrote:
From: John Harrison
When i915 receives a context reset notification from GuC, it triggers
an error capture before resetting any outstanding requsts of that
context. Unfortunately, the error
== Series Details ==
Series: Update to DMC v2.12 for ADLP
URL : https://patchwork.freedesktop.org/series/94675/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10585 -> Patchwork_21049
Summary
---
**SUCCESS**
No reg
On Tue, 14 Sep 2021, Lyude Paul wrote:
> On Tue, 2021-09-14 at 12:09 +0300, Jani Nikula wrote:
>> On Mon, 13 Sep 2021, Vasily Khoruzhick wrote:
>> > Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
>> > control brightness, apparently needs a delay before setting brightness
On Wed, Sep 08, 2021 at 03:47:43AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Add MOCS tables for XeHP SDV and DG2 (rev3)
> URL : https://patchwork.freedesktop.org/series/94344/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_10557_full -> Pat
== Series Details ==
Series: series starting with [v2,1/5] drm/i915/display/adlp: Fix
PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR calculation
URL : https://patchwork.freedesktop.org/series/94674/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10585 -> Patchwork_21048
=
On Tue, Sep 14, 2021 at 03:07:44PM -0700, Radhakrishna Sripada wrote:
> Earlier while calculating derated bw we would use 90% of the calculated
> bw. Starting ADL-P we use a non standard derating. Updating the formulae
> to reflect the same.
>
> Bspec: 64631
>
> v2: Use the new derating value onl
Earlier while calculating derated bw we would use 90% of the calculated
bw. Starting ADL-P we use a non standard derating. Updating the formulae
to reflect the same.
Bspec: 64631
v2: Use the new derating value only for ADL-P(MattR)
Fixes: 4d32fe2f14a7 ("drm/i915/adl_p: Update memory bandwidth pa
On Tue, Sep 14, 2021 at 05:50:25PM +0200, Cornelia Huck wrote:
> On Fri, Sep 10 2021, Christoph Hellwig wrote:
>
> > On Thu, Sep 09, 2021 at 04:38:41PM -0300, Jason Gunthorpe wrote:
> >> +
> >> + private = kzalloc(sizeof(*private), GFP_KERNEL | GFP_DMA);
> >> + if (!private)
> >> + ret
The release notes mentions that this version-
1. Fix for unblock indication to punit.
2. Robustness fix for DC6/6v abort scenarios.
Cc: Imre Deak >
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_dmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/
linux-firmware: add frimware for mediatek bluetooth chip (MT7922) (2021-09-13
11:35:49 -0400)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-firmware adlp_dmc_2_12
for you to fetch changes up to 09ab718bfa2b32a2186dd8f9e39e0cc9a9df7170:
i915: Update ADLP DM
Wa_16014451276 fixes the starting coordinate for PSR2 selective
updates. CHICKEN_TRANS definition of the workaround bit has a wrong
name based on workaround definition and HSD.
Wa_14014971508 allows the screen to continue to be updated when
coming back from DC5/DC6 and SF_SINGLE_FULL_FRAME bit is
drm_atomic_helper_damage_iter_init() + drm_atomic_for_each_plane_damage()
returns the full plane area in case no damaged area was set by
userspace or it was discarted by driver.
This is important to fix the rendering of userspace applications that
does frontbuffer rendering and notify driver about
Not sure why but when moving the cursor fast it causes some artifacts
of the cursor to be left in the cursor path, adding some pixels above
the cursor to the damaged area fixes the issue, so leaving this as a
workaround until proper fix is found.
This is reproducile on TGL and ADL-P.
Cc: Gwan-gye
BSpec states that the minimum number of frames before selective update
is 2, so making sure this minimum limit is fulfilled.
BSpec: 50422
Reviewed-by: Gwan-gyeong Mun
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
1 file changed, 1
As the SU_REGION_START begins at 0, the SU_REGION_END should be number
of lines - 1.
BSpec: 50424
Reviewed-by: Gwan-gyeong Mun
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Tue, Sep 14, 2021 at 10:05:03PM +0200, Daniel Vetter wrote:
> On Tue, Sep 14, 2021 at 08:36:56AM -0700, Matthew Brost wrote:
> > On Tue, Sep 14, 2021 at 03:04:59PM +1000, Dave Airlie wrote:
> > > On Tue, 14 Sept 2021 at 14:55, Matthew Brost
> > > wrote:
> > > >
> > > > From: Venkata Sandeep Dh
== Series Details ==
Series: drm/i915: Suspend / resume backup- and restore of LMEM. (rev4)
URL : https://patchwork.freedesktop.org/series/94278/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10584_full -> Patchwork_21046_full
==
On Tue, 2021-09-14 at 12:09 +0300, Jani Nikula wrote:
> On Mon, 13 Sep 2021, Vasily Khoruzhick wrote:
> > Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
> > control brightness, apparently needs a delay before setting brightness
> > after power on. Without this delay the pa
On Mon, Sep 13, 2021 at 10:42:54AM -0700, Radhakrishna Sripada wrote:
> Earlier while calculating derated bw we would use 90% of the calculated
> bw. Starting ADL-P we use a non standard derating. Updating the formulae
> to reflect the same.
>
> Bspec: 64631
>
> Fixes: 4d32fe2f14a7 ("drm/i915/adl
== Series Details ==
Series: drm/i915/guc/slpc: remove unneeded clflush calls
URL : https://patchwork.freedesktop.org/series/94668/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10584 -> Patchwork_21047
Summary
---
*
== Series Details ==
Series: drm/i915/guc/slpc: remove unneeded clflush calls
URL : https://patchwork.freedesktop.org/series/94668/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a021bf892e8d drm/i915/guc/slpc: remove unneeded clflush calls
-:6: WARNING:TYPO_SPELLING: 'writting'
== Series Details ==
Series: drm/i915: Suspend / resume backup- and restore of LMEM. (rev4)
URL : https://patchwork.freedesktop.org/series/94278/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10584 -> Patchwork_21046
Summar
On Tue, Sep 14, 2021 at 08:36:56AM -0700, Matthew Brost wrote:
> On Tue, Sep 14, 2021 at 03:04:59PM +1000, Dave Airlie wrote:
> > On Tue, 14 Sept 2021 at 14:55, Matthew Brost
> > wrote:
> > >
> > > From: Venkata Sandeep Dhanalakota
> > >
> > > Defining vma on stack can cause stack overflow, if
>
On Mon, Sep 13, 2021 at 02:17:42PM -0700, Matthew Brost wrote:
> On Mon, Sep 13, 2021 at 02:10:16PM -0700, john.c.harri...@intel.com wrote:
> > From: John Harrison
> >
> > When i915 receives a context reset notification from GuC, it triggers
> > an error capture before resetting any outstanding r
The clflush calls here aren't doing anything since we are not writting
something and flushing the cache lines to be visible to GuC. Here the
intention seems to be to make sure whatever GuC has written is visible
to the CPU before we read them. However a clflush from the CPU side is
the wrong instru
== Series Details ==
Series: drm/i915: Suspend / resume backup- and restore of LMEM. (rev4)
URL : https://patchwork.freedesktop.org/series/94278/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c4b15f1489b7 drm/i915/ttm: Implement a function to copy the contents of two
TTM-based
We really only need memcpy restore for objects that affect the
operability of the migrate context. That is, primarily the page-table
objects of the migrate VM.
Add an object flag, I915_BO_ALLOC_PM_EARLY for objects that need early
restores using memcpy and a way to assign LMEM page-table object fl
Pinned context images are now reset during resume. Don't back them up,
and assuming that rings can be assumed empty at suspend, don't back them
up either.
Introduce a new object flag, I915_BO_ALLOC_PM_VOLATILE meaning that an
object is allowed to lose its content on suspend.
v3:
- Slight document
Pinned contexts, like the migrate contexts need reset after resume
since their context image may have been lost. Also the GuC needs to
register pinned contexts.
Add a list to struct intel_engine_cs where we add all pinned contexts on
creation, and traverse that list at resume time to reset the pin
Just evict unpinned objects to system. For pinned LMEM objects,
make a backup system object and blit the contents to that.
Backup is performed in three steps,
1: Opportunistically evict evictable objects using the gpu blitter.
2: After gt idle, evict evictable objects using the gpu blitter. This w
An upcoming common pattern is to traverse the region object list and
perform certain actions on all objects in a region. It's a little tricky
to get the list locking right, in particular since a gem object may
change region unless it's pinned or the object lock is held.
Define a function that does
When backing up or restoring contents of pinned objects at suspend /
resume time we need to allocate a new object as the backup. Add a function
to facilitate copies between the two. Some data needs to be copied before
the migration context is ready for operation, so make sure we can
disable acceler
Implement backup and restore of LMEM during suspend / resume.
What complicates things a bit is handling of pinned LMEM memory during
suspend and the fact that we might be dealing with unmappable LMEM in
the future, which makes us want to restrict the number of pinned objects that
need memcpy resume
== Series Details ==
Series: i915/display: split and constify vtable (rev4)
URL : https://patchwork.freedesktop.org/series/94459/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10584 -> Patchwork_21045
Summary
---
**F
On Fri, Sep 10, 2021 at 08:36:22AM -0700, Daniele Ceraolo Spurio wrote:
> From: "Huang, Sean Z"
>
> During the power event S3+ sleep/resume, hardware will lose all the
> encryption keys for every hardware session, even though the
> session state might still be marked as alive after resume. Theref
== Series Details ==
Series: i915/display: split and constify vtable (rev4)
URL : https://patchwork.freedesktop.org/series/94459/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5757b633382c drm/i915/uncore: split the fw get function into separate vfunc
09e6590ba72b drm/i915/pm:
From: Dave Airlie
Use a nop table for the cases where CxSR doesn't init properly.
v2: use a nop table (Jani)
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 34 -
drivers/gpu/drm/i915/i915_drv.h
From: Dave Airlie
There was some excess comments and an unused vtbl ptr.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/
From: Dave Airlie
I used a macro to avoid making any really silly mistakes here.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/intel_pm.c | 78 +++--
2 files changed
From: Dave Airlie
Make nice clear tables instead of having things in two places.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 81
drivers/gpu/drm/i915/i915_drv.h | 2 +-
2
From: Dave Airlie
Most the dpll vtable into read-only memory.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 6 +--
drivers/gpu/drm/i915/display/intel_dpll.c| 48
drivers/gpu/drm/i915
From: Dave Airlie
This is a bit of a twisty one since each platform is slightly
different, so might take some more review care.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 300 ++---
drivers/g
From: Dave Airlie
Move the functions into read-only tables.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_audio.c | 43 ++
drivers/gpu/drm/i915/i915_drv.h| 2 +-
2 files changed, 28 inser
From: Dave Airlie
This clarifies quite well what functions get used on what platforms
instead of having to decipher the old tree.
v2: fixed IVB mistake (Jani)
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_color.c | 138
From: Dave Airlie
Use a macro to avoid mistakes, this type of macro is only used
in a couple of places.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_hotplug.c | 4 +--
drivers/gpu/drm/i915/i915_drv.h | 2
From: Dave Airlie
Put the vtable into ro memory.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_fdi.c | 20
drivers/gpu/drm/i915/i915_drv.h | 2 +-
2 files changed, 17 insertions(+), 5 delet
From: Dave Airlie
this single function might be possible to merge later, but
for now it's simple to just split it out.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 6 +++---
drivers/gpu/drm/i915/display/int
From: Dave Airlie
It may make sense to merge this with display again later,
however the fdi use of the vtable is limited to only a
few generations.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_fdi.c | 8
drive
From: Dave Airlie
This provide a service from irq to display, so make it separate
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_hotplug.c | 4 ++--
drivers/gpu/drm/i915/i915_drv.h | 9 -
drivers/gp
From: Dave Airlie
This moves all the cdclk related functions into their own vtable.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 142 ++---
drivers/gpu/drm/i915/i915_drv.h| 8 +-
From: Dave Airlie
These are only used internally in the audio code
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_audio.c | 24 +++---
drivers/gpu/drm/i915/i915_drv.h| 19 +++--
2 f
From: Dave Airlie
These are only used internally in the color module
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_color.c | 64 +++---
drivers/gpu/drm/i915/i915_drv.h| 39 +++--
2 fil
From: Dave Airlie
These are the watermark api between display and pm.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 35 -
drivers/gpu/drm/i915/i915_drv.h | 24
driver
From: Dave Airlie
This function is only used inside intel_pm.c
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 9 ++-
drivers/gpu/drm/i915/intel_pm.c | 48 -
2 files changed, 32 insertio
From: Dave Airlie
This adds wrappers around all the vtable callers so they are in
one place.
Suggested by Jani.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cdclk.c| 47 +++
drivers/gpu/drm/i915/dis
From: Dave Airlie
This wraps the fdi link training vfunc to make it clearer.
Suggested by Jani.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_fdi.c | 8
From: Dave Airlie
This moves one wrapper from the pm->display side, and creates
wrappers for all the others, this should simplify things later.
One thing to note is that the code checks the existance of some
of these ptrs, so the wrappers are a bit complicated by that.
Suggested by Jani.
v2: f
From: Dave Airlie
The crtc was never being used here.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 10 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/intel_pm.c
From: Dave Airlie
The i845_update_wm code was always calling the i845 variant,
and the i9xx_update_wm had only a choice between i830 and i9xx
paths, hardly worth the vfunc overhead.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_d
From: Dave Airlie
constify it while here. drop the put function since it was never
overloaded and always has done the same thing, no point in
indirecting it for show.
Reviewed-by: Jani Nikula
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_uncore.c | 70 +
This is Dave's series [1] with patch 2 (drm/i915/uncore: constify the
register vtables.) dropped because it conflicts between drm-intel-next
and drm-intel-gt-next. I want to get proper CI results on this before
merging. We can do the leftover patch afterwards. Everything else is
unmodified.
BR,
Ja
On Fri, 10 Sep 2021, Dave Airlie wrote:
> From: Dave Airlie
>
> These are the watermark api between display and pm.
>
> Signed-off-by: Dave Airlie
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 35 -
> drivers/gpu/drm/i915/i915_drv.h
== Series Details ==
Series: Move vfio_ccw to the new mdev API (rev3)
URL : https://patchwork.freedesktop.org/series/94520/
State : failure
== Summary ==
Patch is empty.
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
On Tue, Sep 14, 2021 at 09:34:08AM +0100, Tvrtko Ursulin wrote:
>
> On 13/09/2021 17:50, Matthew Brost wrote:
> > On Mon, Sep 13, 2021 at 10:24:43AM +0100, Tvrtko Ursulin wrote:
> > >
> > > On 10/09/2021 20:49, Matthew Brost wrote:
> > > > On Fri, Sep 10, 2021 at 12:12:42PM +0100, Tvrtko Ursulin
Appears to match latest BSPEC
Reviewed-by: Clint Taylor
-Clint
On 9/3/21 5:35 PM, Matt Roper wrote:
From: Lucas De Marchi
Like DG1, XeHP SDV doesn't have LLC/eDRAM control values due to being a
dgfx card. XeHP SDV adds 2 more bits: L3_GLBGO to "push the Go point to
memory for L3 destined t
On Mon, Sep 13, 2021 at 04:31:54PM -0400, Eric Farman wrote:
> > I rebased it and fixed it up here:
> >
> > https://github.com/jgunthorpe/linux/tree/vfio_ccw
> >
> > Can you try again?
>
> That does address the crash, but then why is it processing a BROKEN
> event? Seems problematic.
The stuff
On Tue, 14 Sept 2021 at 10:03, Christian König wrote:
>
> Am 14.09.21 um 10:50 schrieb Matthew Auld:
> > Add new flag to indicate special shmem based tt, which can directly
> > handle swapping itself, and should be visible to some shrinker.
> >
> > As part of this we should skip the ttm_pages_allo
On Fri, 10 Sep 2021, Dave Airlie wrote:
> From: Dave Airlie
>
> This wraps the fdi link training vfunc to make it clearer.
>
> Suggested by Jani.
>
> Signed-off-by: Dave Airlie
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> drivers/gpu/drm/i915/displ
On Fri, 10 Sep 2021, Dave Airlie wrote:
> From: Dave Airlie
>
> This adds wrappers around all the vtable callers so they are in
> one place.
>
> Suggested by Jani.
>
> Signed-off-by: Dave Airlie
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c| 47
On Fri, 10 Sep 2021, Dave Airlie wrote:
> From: Dave Airlie
>
> This moves one wrapper from the pm->display side, and creates
> wrappers for all the others, this should simplify things later.
>
> One thing to note is that the code checks the existance of some
> of these ptrs, so the wrappers are
On Mon, 13 Sep 2021, Nathan Chancellor wrote:
> On Tue, Aug 24, 2021 at 03:54:24PM -0700, Nathan Chancellor wrote:
>> Commit 46e2068081e9 ("drm/i915: Disable some extra clang warnings")
>> disabled -Wsometimes-uninitialized as noisy but there have been a few
>> fixes to clang that make the false p
== Series Details ==
Series: Do error capture async, flush G2H processing on reset (rev3)
URL : https://patchwork.freedesktop.org/series/94642/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10583 -> Patchwork_21043
Summary
== Series Details ==
Series: Do error capture async, flush G2H processing on reset (rev3)
URL : https://patchwork.freedesktop.org/series/94642/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+dr
== Series Details ==
Series: Enable GuC submission by default on DG1 (rev6)
URL : https://patchwork.freedesktop.org/series/93325/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10583 -> Patchwork_21042
Summary
---
**F
== Series Details ==
Series: Enable GuC submission by default on DG1 (rev6)
URL : https://patchwork.freedesktop.org/series/93325/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/
On Fri, Sep 10 2021, Christoph Hellwig wrote:
> On Thu, Sep 09, 2021 at 04:38:41PM -0300, Jason Gunthorpe wrote:
>> +
>> +private = kzalloc(sizeof(*private), GFP_KERNEL | GFP_DMA);
>> +if (!private)
>> +return ERR_PTR(-ENOMEM);
>
> Nit: there is no need to add GFP_KERNEL when
On Tue, Sep 14, 2021 at 03:04:59PM +1000, Dave Airlie wrote:
> On Tue, 14 Sept 2021 at 14:55, Matthew Brost wrote:
> >
> > From: Venkata Sandeep Dhanalakota
> >
> > Defining vma on stack can cause stack overflow, if
> > vma gets populated with new fields.
>
> Is there some higher level locking s
On 9/14/21 4:07 PM, Daniel Vetter wrote:
On Tue, Sep 14, 2021 at 12:38:00PM +0200, Thomas Hellström wrote:
On Tue, 2021-09-14 at 10:53 +0200, Christian König wrote:
Am 14.09.21 um 10:27 schrieb Thomas Hellström:
On Tue, 2021-09-14 at 09:40 +0200, Christian König wrote:
Am 13.09.21 um 14:41
On Tue, 14 Sep 2021, "Kulkarni, Vandita" wrote:
>> -Original Message-
>> From: Nikula, Jani
>> Sent: Tuesday, September 14, 2021 7:33 PM
>> To: Lisovskiy, Stanislav
>> Cc: Ville Syrjälä ; Kulkarni, Vandita
>> ; intel-gfx@lists.freedesktop.org; Navare,
>> Manasi D
>> Subject: Re: [Intel-
On Tue, 14 Sep 2021, Lucas De Marchi wrote:
> On Tue, Sep 14, 2021 at 12:16:13PM +0300, Jani Nikula wrote:
>>On Wed, 08 Sep 2021, Lucas De Marchi wrote:
>>> We shouldn't be using debugfs_ namespace for this functionality. Rename
>>> debugfs_gt.[ch] to intel_gt_debugfs.[ch] and then make functions
On Tue, Sep 14, 2021 at 12:16:13PM +0300, Jani Nikula wrote:
On Wed, 08 Sep 2021, Lucas De Marchi wrote:
We shouldn't be using debugfs_ namespace for this functionality. Rename
debugfs_gt.[ch] to intel_gt_debugfs.[ch] and then make functions,
defines and structs follow suit.
While at it and si
> -Original Message-
> From: Nikula, Jani
> Sent: Tuesday, September 14, 2021 7:33 PM
> To: Lisovskiy, Stanislav
> Cc: Ville Syrjälä ; Kulkarni, Vandita
> ; intel-gfx@lists.freedesktop.org; Navare,
> Manasi D
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Enable second VDSC
> engin
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