Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: clear plane color ctl setting when turn full plane off (rev3)

Hi Lakshmi, Can you trigger a re-run just to confirm as recommended by Suresh. Regards, Uma Shankar From: Kurmi, Suresh Kumar Sent: Friday, July 29, 2022 9:29 AM To: Vudum, Lakshminarayana ; Lee, Shawn C ; intel-gfx@lists.freedesktop.org; Naramasetti, LaxminarayanaX Cc: Shankar, Uma

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: clear plane color ctl setting when turn full plane off (rev3)

IGT_6598 is very old, we should trigger the re-run with the latest CI IGT version since ADL-M and RKL has been very stable BAT machine. -Suresh From: Vudum, Lakshminarayana Sent: Thursday, July 28, 2022 9:08 PM To: Lee, Shawn C ; intel-gfx@lists.freedesktop.org; Kurmi, Suresh Kumar ;

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dg2: Add Wa_1509727124

== Series Details == Series: drm/i915/dg2: Add Wa_1509727124 URL : https://patchwork.freedesktop.org/series/106822/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11946_full -> Patchwork_106822v1_full Summary ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dg2: Add support for DC5 state (rev2)

== Series Details == Series: drm/i915/dg2: Add support for DC5 state (rev2) URL : https://patchwork.freedesktop.org/series/106816/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11946_full -> Patchwork_106816v2_full Summary

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Random assortment of (mostly) GuC related patches (rev4)

On 7/28/2022 12:40, Patchwork wrote: Project List - Patchwork *Patch Details* *Series:* Random assortment of (mostly) GuC related patches (rev4) *URL:* https://patchwork.freedesktop.org/series/106272/ *State:*failure *Details:*

Re: [Intel-gfx] [PATCH 6/6] drm/i915/guc: Don't abort on CTB_UNUSED status

On 7/28/2022 17:00, Ceraolo Spurio, Daniele wrote: On 7/27/2022 7:42 PM, john.c.harri...@intel.com wrote: From: John Harrison When the KMD sends a CLIENT_RESET request to GuC (as part of the suspend sequence), GuC will mark the CTB buffer as 'UNUSED'. If the KMD then checked the CTB queue, it

Re: [Intel-gfx] [PATCH 6/6] drm/i915/guc: Don't abort on CTB_UNUSED status

On 7/27/2022 7:42 PM, john.c.harri...@intel.com wrote: From: John Harrison When the KMD sends a CLIENT_RESET request to GuC (as part of the suspend sequence), GuC will mark the CTB buffer as 'UNUSED'. If the KMD then checked the CTB queue, it would see a non-zero status value and report the

[Intel-gfx] ✓ Fi.CI.BAT: success for Move DG2 to GuC v70.4.1

== Series Details == Series: Move DG2 to GuC v70.4.1 URL : https://patchwork.freedesktop.org/series/106827/ State : success == Summary == CI Bug Log - changes from CI_DRM_11946 -> Patchwork_106827v1 Summary --- **SUCCESS** No

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dg2: Add support for DC5 state

== Series Details == Series: drm/i915/dg2: Add support for DC5 state URL : https://patchwork.freedesktop.org/series/106816/ State : success == Summary == CI Bug Log - changes from CI_DRM_11946_full -> Patchwork_106816v1_full Summary

[Intel-gfx] [PATCH 1/1] drm/i915/dg2: Update DG2 to GuC v70.4.1

From: John Harrison New release of GuC with a bunch of fixes specific to DG2. Some of these require follow up i915 changes to enable. Signed-off-by: John Harrison --- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Intel-gfx] [PATCH 0/1] Move DG2 to GuC v70.4.1

From: John Harrison The latest GuC release contains a bunch of fixes for DG2. Start using it. Note that some of these fixes require i915 side support which will follow in separate patches. Signed-off-by: John Harrison John Harrison (1): drm/i915/dg2: Update DG2 to GuC v70.4.1

Re: [Intel-gfx] susetting the remaining swioltb couplin in DRM

Actually, seems like I do have a question. I see that you mention that we could stop passing use_dma_alloc=true to ttm_device_init() or use dma_alloc_noncoherent(). I'm not an expert on this nouveau's mm, but after skimming it seems like if we can simply check whether or not we need all

Re: [Intel-gfx] [PATCH 06/23] drm/i915/mtl: Add PCH support

> -Original Message- > From: Sripada, Radhakrishna > Sent: Wednesday, July 27, 2022 6:34 PM > To: intel-gfx@lists.freedesktop.org > Cc: Srivatsa, Anusha > Subject: [PATCH 06/23] drm/i915/mtl: Add PCH support > > Add support for Meteorpoint(MTP) PCH used with Meteorlake. > > Cc: Matt

Re: [Intel-gfx] [PATCH v4 16/41] dyndbg: add drm.debug style bitmap support

On Fri, Jul 22, 2022 at 2:33 PM Jason Baron wrote: > > > > On 7/20/22 11:32, Jim Cromie wrote: > > Add kernel_param_ops and callbacks to apply a class-map to a > > sysfs-node, which then can control classes defined in that class-map. > > This supports uses like: > > > > echo 0x3 >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dg2: Add Wa_1509727124

== Series Details == Series: drm/i915/dg2: Add Wa_1509727124 URL : https://patchwork.freedesktop.org/series/106822/ State : success == Summary == CI Bug Log - changes from CI_DRM_11946 -> Patchwork_106822v1 Summary --- **SUCCESS**

Re: [Intel-gfx] susetting the remaining swioltb couplin in DRM

Hi! Sorry about the slow reply to this, been busy with a bunch of other pressing nouveau work lately. Anyway, the steps look pretty simple here so I can see if I can write up a patch shortly :) On Mon, 2022-07-11 at 10:26 +0200, Christoph Hellwig wrote: > Hi i915 and nouveau maintainers, > >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dg2: Add support for DC5 state (rev2)

== Series Details == Series: drm/i915/dg2: Add support for DC5 state (rev2) URL : https://patchwork.freedesktop.org/series/106816/ State : success == Summary == CI Bug Log - changes from CI_DRM_11946 -> Patchwork_106816v2 Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v3,1/6] drm/ttm: Add new callbacks to ttm res mgr

== Series Details == Series: series starting with [v3,1/6] drm/ttm: Add new callbacks to ttm res mgr URL : https://patchwork.freedesktop.org/series/106814/ State : success == Summary == CI Bug Log - changes from CI_DRM_11946_full -> Patchwork_106814v1_full

Re: [Intel-gfx] [Intel-gfx 2/2] drm/i915/guc: Add delay to disable scheduling after pin count goes to zero

On 6/27/2022 22:51, Alan Previn wrote: From: Matthew Brost Add a delay, configurable via debugs (default 100ms), to disable debugs -> debugfs Default is now 34ms? scheduling of a context after the pin count goes to zero. Disable scheduling is somewhat costly operation so the idea is a

Re: [Intel-gfx] [Intel-gfx 1/2] drm/i915/selftests: Use correct selfest calls for live tests

On 6/27/2022 22:51, Alan Previn wrote: From: Matthew Brost This will help in an upcoming patch where the live selftest wrappers are extended to do more. Signed-off-by: Matthew Brost Alan, you need to add your s-o-b as you are posting the patch and thereby assuming at least some level of

[Intel-gfx] ✗ Fi.CI.BAT: failure for Random assortment of (mostly) GuC related patches (rev4)

== Series Details == Series: Random assortment of (mostly) GuC related patches (rev4) URL : https://patchwork.freedesktop.org/series/106272/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11946 -> Patchwork_106272v4 Summary

Re: [Intel-gfx] [PATCH 6/6] drm/i915/guc: Don't abort on CTB_UNUSED status

On 7/28/2022 12:06, Michal Wajdeczko wrote: On 28.07.2022 04:42, john.c.harri...@intel.com wrote: From: John Harrison When the KMD sends a CLIENT_RESET request to GuC (as part of the suspend sequence), GuC will mark the CTB buffer as 'UNUSED'. If the hmm, GuC shouldn't do that on

Re: [Intel-gfx] [PATCH] drm/i915/dg2: Add support for DC5 state

On Thu, 2022-07-28 at 09:26 -0700, Anusha Srivatsa wrote: > With the latest DMC in place, enabling DC5 on DG2. > > Cc: Imre Deak > Signed-off-by: Anusha Srivatsa Reviewed-by: Madhumitha Tolakanahalli Pradeep > --- >  drivers/gpu/drm/i915/display/intel_display_power.c |

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Random assortment of (mostly) GuC related patches (rev4)

== Series Details == Series: Random assortment of (mostly) GuC related patches (rev4) URL : https://patchwork.freedesktop.org/series/106272/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Random assortment of (mostly) GuC related patches (rev4)

== Series Details == Series: Random assortment of (mostly) GuC related patches (rev4) URL : https://patchwork.freedesktop.org/series/106272/ State : warning == Summary == Error: dim checkpatch failed 0e8fa422631e drm/i915/guc: Route semaphores to GuC for Gen12+ b28b595d33d1 drm/i915/guc: Fix

Re: [Intel-gfx] [PATCH 6/6] drm/i915/guc: Don't abort on CTB_UNUSED status

On 28.07.2022 04:42, john.c.harri...@intel.com wrote: > From: John Harrison > > When the KMD sends a CLIENT_RESET request to GuC (as part of the > suspend sequence), GuC will mark the CTB buffer as 'UNUSED'. If the hmm, GuC shouldn't do that on CLIENT_RESET, GuC shall only mark CTB as UNUSED

[Intel-gfx] [PATCH] drm/i915/dg2: Add Wa_1509727124

Bspec: 46052 Cc: Matt Roper Signed-off-by: Harish Chegondi --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 + drivers/gpu/drm/i915/gt/intel_workarounds.c | 8 2 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h

[Intel-gfx] [CI] drm/i915/dg2: Add support for DC5 state

With the latest DMC in place, enabling DC5 on DG2. Cc: Imre Deak Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/display/intel_display_power.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c

Re: [Intel-gfx] [PATCH 3/6] drm/i915/guc: Add selftest for a hung GuC

On 7/28/2022 11:26, john.c.harri...@intel.com wrote: From: Rahul Kumar Singh Add a test to check that the hangcheck will recover from a submission hang in the GuC. Signed-off-by: Rahul Kumar Singh Signed-off-by: John Harrison Reviewed-by: John Harrison ---

[Intel-gfx] [PATCH 3/6] drm/i915/guc: Add selftest for a hung GuC

From: Rahul Kumar Singh Add a test to check that the hangcheck will recover from a submission hang in the GuC. Signed-off-by: Rahul Kumar Singh Signed-off-by: John Harrison --- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 1 + .../drm/i915/gt/uc/selftest_guc_hangcheck.c | 159

Re: [Intel-gfx] [PATCH 3/6] drm/i915/guc: Add selftest for a hung GuC

On 7/27/2022 19:42, john.c.harri...@intel.com wrote: From: Rahul Kumar Singh Add a test to check that the hangcheck will recover from a submission hang in the GuC. Signed-off-by: Rahul Kumar Singh Signed-off-by: John Harrison --- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 1 +

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dg2: Add support for DC5 state

== Series Details == Series: drm/i915/dg2: Add support for DC5 state URL : https://patchwork.freedesktop.org/series/106816/ State : success == Summary == CI Bug Log - changes from CI_DRM_11946 -> Patchwork_106816v1 Summary ---

[Intel-gfx] [PATCH] drm/i915/dg2: Add support for DC5 state

With the latest DMC in place, enabling DC5 on DG2. Cc: Imre Deak Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/display/intel_display_power.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: stop using swiotlb (rev6)

On 28/07/2022 16:54, Robert Beckett wrote: On 28/07/2022 15:03, Tvrtko Ursulin wrote: On 28/07/2022 09:01, Patchwork wrote: [snip]     Possible regressions   * igt@gem_mmap_offset@clear:   o shard-iclb: PASS

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: stop using swiotlb (rev6)

On 28/07/2022 15:03, Tvrtko Ursulin wrote: On 28/07/2022 09:01, Patchwork wrote: [snip]     Possible regressions   * igt@gem_mmap_offset@clear:   o shard-iclb: PASS  

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: clear plane color ctl setting when turn full plane off (rev3)

From: Vudum, Lakshminarayana Sent: Thursday, July 28, 2022 8:36 AM To: 20220722070343.10654-1-shawn.c@intel.com; intel-gfx@lists.freedesktop.org; Kurmi, Suresh Kumar ; Naramasetti, LaxminarayanaX Cc: Shankar, Uma Subject: RE: ✗ Fi.CI.BAT: failure for drm/i915: clear plane color ctl

Re: [Intel-gfx] [PATCH v3 6/6] drm/ttm: Switch to using the new res callback

On 28/07/2022 15:33, Arunpravin Paneer Selvam wrote: Apply new intersect and compatible callback instead of having a generic placement range verfications. v2: Added a separate callback for compatiblilty checks (Christian) Signed-off-by: Christian König Signed-off-by: Arunpravin Paneer

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: clear plane color ctl setting when turn full plane off (rev3)

Shawn, I see from our CI that we haven’t seen FIFO underruns lately on ADL-M and RKL. I see your series is using IGT_6598 and CI is using IGT_6603. Not sure, how old is the one used in the series and how much it makes difference. @Kurmi, Suresh

Re: [Intel-gfx] [PATCH v3 4/6] drm/i915: Implement intersect/compatible functions

On 28/07/2022 15:33, Arunpravin Paneer Selvam wrote: Implemented a new intersect and compatible callback function fetching start offset from drm buddy allocator. v2: move the bits that are specific to buddy_man (Matthew) Signed-off-by: Christian König Signed-off-by: Arunpravin Paneer Selvam

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/6] drm/ttm: Add new callbacks to ttm res mgr

== Series Details == Series: series starting with [v3,1/6] drm/ttm: Add new callbacks to ttm res mgr URL : https://patchwork.freedesktop.org/series/106814/ State : success == Summary == CI Bug Log - changes from CI_DRM_11946 -> Patchwork_106814v1

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: clear plane color ctl setting when turn full plane off (rev3)

Hi Lakshmi, Below issues are not related to the patch. Re-run these test cases with this patch and get pass result on my local machine. Best regards, Shawn From: Patchwork Sent: Wednesday, July 27, 2022 4:54 PM To: Lee, Shawn C Cc: intel-gfx@lists.freedesktop.org Subject: ✗ Fi.CI.BAT:

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v3,1/6] drm/ttm: Add new callbacks to ttm res mgr

== Series Details == Series: series starting with [v3,1/6] drm/ttm: Add new callbacks to ttm res mgr URL : https://patchwork.freedesktop.org/series/106814/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.BUILD: failure for Move TLB invalidation code for its own file and document it

== Series Details == Series: Move TLB invalidation code for its own file and document it URL : https://patchwork.freedesktop.org/series/106805/ State : failure == Summary == Error: patch https://patchwork.freedesktop.org/api/1.0/series/106805/revisions/1/mbox/ not applied Applying:

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/d12+: Disable DMC handlers during loading/disabling the firmware

> -Original Message- > From: Intel-gfx On Behalf Of Imre > Deak > Sent: Thursday, July 28, 2022 1:45 PM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH v2 1/2] drm/i915/d12+: Disable DMC handlers during > loading/disabling the firmware > > Disable the DMC event

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: stop using swiotlb (rev6)

On 28/07/2022 09:01, Patchwork wrote: [snip] Possible regressions * igt@gem_mmap_offset@clear: o shard-iclb: PASS -> INCOMPLETE

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915/d12+: Disable DMC handlers during loading/disabling the firmware (rev3)

On Thu, Jul 28, 2022 at 12:37:48PM +, Patchwork wrote: > == Series Details == > > Series: series starting with [v2,1/2] drm/i915/d12+: Disable DMC handlers > during loading/disabling the firmware (rev3) > URL : https://patchwork.freedesktop.org/series/106767/ > State : success Thanks for

Re: [Intel-gfx] [PATCH 1/1] drm/i915/dmc: Update DG2 DMC firmware to v2.07

On Wed, Jul 27, 2022 at 11:29:19AM -0700, Madhumitha Tolakanahalli Pradeep wrote: > The release notes mention that DMC v2.07 has a workaround > for MMIO hang issue when DC States are enabled. > > Signed-off-by: Madhumitha Tolakanahalli Pradeep > Thanks for the patch pushed to drm-intel-next.

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915/d12+: Disable DMC handlers during loading/disabling the firmware (rev3)

== Series Details == Series: series starting with [v2,1/2] drm/i915/d12+: Disable DMC handlers during loading/disabling the firmware (rev3) URL : https://patchwork.freedesktop.org/series/106767/ State : success == Summary == CI Bug Log - changes from CI_DRM_11946_full ->

Re: [Intel-gfx] [PATCH v3 0/6] drm/i915: reduce TLB performance regressions

Hi Andi, On Thu, 28 Jul 2022 14:08:11 +0200 Andi Shyti wrote: > Hi Mauro, > > Pushed in drm-intel-gt-next. Thank you! I submitted two additional patches moving the TLB code into its own file, and adding the documentation for it, as agreed during patch 5/6 review:

[Intel-gfx] [PATCH 0/2] Move TLB invalidation code for its own file and document it

There are more things to be added to TLB invalidation. Before doing that, move the code to its own file, and add the relevant documentation. Chris Wilson (1): drm/i915/gt: Move TLB invalidation to its own file Mauro Carvalho Chehab (1): drm/i915/gt: document TLB cache invalidation functions

[Intel-gfx] [PATCH 1/2] drm/i915/gt: Move TLB invalidation to its own file

From: Chris Wilson Prepare for supporting more TLB invalidation scenarios by moving the current MMIO invalidation to its own file. Signed-off-by: Chris Wilson Cc: Fei Yang Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C

[Intel-gfx] [PATCH 2/2] drm/i915/gt: document TLB cache invalidation functions

Add a description for the TLB cache invalidation algorithm and for the related kAPI functions. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 0/2] at:

Re: [Intel-gfx] [PATCH v3 0/6] drm/i915: reduce TLB performance regressions

Hi Mauro, Pushed in drm-intel-gt-next. Thanks, Andi On Wed, Jul 27, 2022 at 02:29:50PM +0200, Mauro Carvalho Chehab wrote: > Doing TLB invalidation cause performance regressions, like: > [424.370996] i915 :00:02.0: [drm] *ERROR* rcs0 TLB invalidation did > not complete in 4ms! > >

Re: [Intel-gfx] [PATCH 1/2] drm/i915/d12+: Disable DMC handlers during loading/disabling the firmware

> -Original Message- > From: Intel-gfx On Behalf Of Imre > Deak > Sent: Wednesday, July 27, 2022 10:15 PM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 1/2] drm/i915/d12+: Disable DMC handlers during > loading/disabling the firmware > > Disable the DMC event

Re: [Intel-gfx] [PATCH 2/2] drm/i915/d13: Add Wa_16015201720 disabling clock gating for PIPEDMC-A/B

> -Original Message- > From: Intel-gfx On Behalf Of Imre > Deak > Sent: Wednesday, July 27, 2022 10:15 PM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 2/2] drm/i915/d13: Add Wa_16015201720 disabling > clock > gating for PIPEDMC-A/B > > Add a workaround making

[Intel-gfx] ✓ Fi.CI.IGT: success for Random assortment of (mostly) GuC related patches (rev3)

== Series Details == Series: Random assortment of (mostly) GuC related patches (rev3) URL : https://patchwork.freedesktop.org/series/106272/ State : success == Summary == CI Bug Log - changes from CI_DRM_11946_full -> Patchwork_106272v3_full

Re: [Intel-gfx] [PATCH v2 06/21] drm/i915/gt: Batch TLB invalidations

On 28/07/2022 07:32, Mauro Carvalho Chehab wrote: On Wed, 27 Jul 2022 13:56:50 +0100 Tvrtko Ursulin wrote: Because vma_invalidate_tlb() basically stores a TLB seqno, but the actual invalidation is deferred to when the pages are unset, at __i915_gem_object_unset_pages(). So, what happens

Re: [Intel-gfx] [PATCH] drm/i915/ttm: don't leak the ccs state

> -Original Message- > From: Auld, Matthew > Sent: Thursday, July 28, 2022 1:38 PM > To: C, Ramalingam ; intel-gfx@lists.freedesktop.org > Cc: dri-de...@lists.freedesktop.org; Thomas Hellström > > Subject: Re: [PATCH] drm/i915/ttm: don't leak the ccs state > > On 28/07/2022 00:16, C,

[Intel-gfx] ✗ Fi.CI.IGT: failure for Fixes and improvements to GuC logging and error capture

== Series Details == Series: Fixes and improvements to GuC logging and error capture URL : https://patchwork.freedesktop.org/series/106789/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11946_full -> Patchwork_106789v1_full

[Intel-gfx] ✗ Fi.CI.BAT: failure for Bump DG2 DMC firmware to v2.07 (rev3)

== Series Details == Series: Bump DG2 DMC firmware to v2.07 (rev3) URL : https://patchwork.freedesktop.org/series/106773/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11946 -> Patchwork_106773v3 Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Don't send policy update for child contexts.

== Series Details == Series: drm/i915/guc: Don't send policy update for child contexts. URL : https://patchwork.freedesktop.org/series/106783/ State : success == Summary == CI Bug Log - changes from CI_DRM_11946_full -> Patchwork_106783v1_full

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/d12+: Disable DMC handlers during loading/disabling the firmware (rev3)

== Series Details == Series: series starting with [v2,1/2] drm/i915/d12+: Disable DMC handlers during loading/disabling the firmware (rev3) URL : https://patchwork.freedesktop.org/series/106767/ State : success == Summary == CI Bug Log - changes from CI_DRM_11946 -> Patchwork_106767v3

[Intel-gfx] ✗ Fi.CI.IGT: failure for Bump DG2 DMC firmware to v2.07 (rev2)

== Series Details == Series: Bump DG2 DMC firmware to v2.07 (rev2) URL : https://patchwork.freedesktop.org/series/106773/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11946_full -> Patchwork_106773v2_full Summary ---

[Intel-gfx] [PULL] drm-intel-fixes

Hi Dave, Daniel, Just one fix this time round to further improve reliability of resets on execlists platforms in some edge cases. Not sure if there is scope to do one more fixes pull before 5.19 is out so just in case. If it doesn't get pulled we'll send it to stable after release. Regards,

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/2] drm/i915/d12+: Disable DMC handlers during loading/disabling the firmware (rev3)

== Series Details == Series: series starting with [v2,1/2] drm/i915/d12+: Disable DMC handlers during loading/disabling the firmware (rev3) URL : https://patchwork.freedesktop.org/series/106767/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used,

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Suppress oom warning for shmemfs object allocation failure (rev4)

== Series Details == Series: drm/i915: Suppress oom warning for shmemfs object allocation failure (rev4) URL : https://patchwork.freedesktop.org/series/106528/ State : success == Summary == CI Bug Log - changes from CI_DRM_11946_full -> Patchwork_106528v4_full

[Intel-gfx] [PATCH v2 1/2] drm/i915/d12+: Disable DMC handlers during loading/disabling the firmware

Disable the DMC event handlers before loading the firmware and after uninitializing the display, to make sure the firmware is inactive. This matches the Bspec "Sequences for Display C5 and C6" page for GEN12+. Add a TODO comment for doing the same on pre-GEN12 platforms. v2: - Add a macro for

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: disable pci resize on 32-bit machine (rev2)

== Series Details == Series: drm/i915: disable pci resize on 32-bit machine (rev2) URL : https://patchwork.freedesktop.org/series/106708/ State : success == Summary == CI Bug Log - changes from CI_DRM_11946_full -> Patchwork_106708v2_full

Re: [Intel-gfx] [PATCH] drm/i915/ttm: don't leak the ccs state

On 28/07/2022 00:16, C, Ramalingam wrote: -Original Message- From: Auld, Matthew Sent: Wednesday, July 27, 2022 10:14 PM To: intel-gfx@lists.freedesktop.org Cc: dri-de...@lists.freedesktop.org; Thomas Hellström ; C, Ramalingam Subject: [PATCH] drm/i915/ttm: don't leak the ccs state

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: stop using swiotlb (rev6)

== Series Details == Series: drm/i915: stop using swiotlb (rev6) URL : https://patchwork.freedesktop.org/series/106589/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11946_full -> Patchwork_106589v6_full Summary ---

[Intel-gfx] ✗ Fi.CI.BUILD: failure for Fix performance regressions with TLB and add GuC support (rev4)

== Series Details == Series: Fix performance regressions with TLB and add GuC support (rev4) URL : https://patchwork.freedesktop.org/series/106293/ State : failure == Summary == Error: patch https://patchwork.freedesktop.org/api/1.0/series/106293/revisions/4/mbox/ not applied Applying:

Re: [Intel-gfx] [PATCH v2] drm/i915: disable pci resize on 32-bit machine

On 7/27/2022 10:32 PM, Andi Shyti wrote: Hi Nirmoy, On Wed, Jul 27, 2022 at 07:33:06PM +0200, Nirmoy Das wrote: PCI bar resize only works with 64 bit BAR so disable this on 32-bit machine and resolve below compilation error: drivers/gpu/drm/i915/gt/intel_region_lmem.c:94:23: error: result

Re: [Intel-gfx] [RFC PATCH v3 04/19] KVM: x86: mmu: allow to enable write tracking externally

On Mon, 2022-07-25 at 16:08 +, Sean Christopherson wrote: > On Wed, Jul 20, 2022, Maxim Levitsky wrote: > > On Sun, 2022-05-22 at 13:22 +0300, Maxim Levitsky wrote: > > > On Thu, 2022-05-19 at 16:37 +, Sean Christopherson wrote: > > > > On Wed, Apr 27, 2022, Maxim Levitsky wrote: > > > > >

Re: [Intel-gfx] [PATCH v2 06/21] drm/i915/gt: Batch TLB invalidations

On Thu, 28 Jul 2022 08:32:32 +0200 Mauro Carvalho Chehab wrote: > On Wed, 27 Jul 2022 13:56:50 +0100 > Tvrtko Ursulin wrote: > > > > Because vma_invalidate_tlb() basically stores a TLB seqno, but the > > > actual invalidation is deferred to when the pages are unset, at > > >

Re: [Intel-gfx] [PATCH v2 06/21] drm/i915/gt: Batch TLB invalidations

On Wed, 27 Jul 2022 13:56:50 +0100 Tvrtko Ursulin wrote: > > Because vma_invalidate_tlb() basically stores a TLB seqno, but the > > actual invalidation is deferred to when the pages are unset, at > > __i915_gem_object_unset_pages(). > > > > So, what happens is: > > > > - on VMA sync mode, the

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/d12+: Disable DMC handlers during loading/disabling the firmware (rev2)

== Series Details == Series: series starting with [1/2] drm/i915/d12+: Disable DMC handlers during loading/disabling the firmware (rev2) URL : https://patchwork.freedesktop.org/series/106767/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11946 -> Patchwork_106767v2

[Intel-gfx] [drm-tip:drm-tip 4/8] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_plane.c:1565:27: error: 'drm_primary_helper_destroy' undeclared here (not in a function); did you mean 'drm_

-randconfig-r003-20220728 (https://download.01.org/0day-ci/archive/20220728/202207281420.mnf0xrnj-...@intel.com/config) compiler: alpha-linux-gcc (GCC) 12.1.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross