== Series Details ==
Series: drm/i915/gvt: KVM: KVMGT fixes and page-track cleanups (rev3)
URL : https://patchwork.freedesktop.org/series/112196/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/112196/revisions/3/mbox/ not
applied
Applying:
On Thu, Jan 05, 2023 at 05:40:32PM +, Sean Christopherson wrote:
> On Thu, Jan 05, 2023, Yan Zhao wrote:
> > On Tue, Jan 03, 2023 at 09:13:54PM +, Sean Christopherson wrote:
> > > On Wed, Dec 28, 2022, Yan Zhao wrote:
> > > > On Fri, Dec 23, 2022 at 12:57:15AM +, Sean Christopherson
Hi Lakshmi,
Below failure is not related to the patch, but due to existing issue :
https://gitlab.freedesktop.org/drm/intel/-/issues/6179
Possible regressions
* igt@gem_exec_suspend@basic-s3@smem:
o fi-rkl-11600: NOTRUN -> INCOMPLETE
> > On 04/01/2023 09:53, Jani Nikula wrote:
> > > On Mon, 02 Jan 2023, Suraj Kandpal wrote:
> > > > Need to fill wired cmd in structures at a single place as they
> > > > remain same for both gsc and mei.
> > >
> > > I'm still opposed to adding this stuff to i915 and exporting the
> > > symbols.
On 1/5/23 6:34 PM, Jason Gunthorpe wrote:
> On Thu, Jan 05, 2023 at 03:09:30PM -0700, Alex Williamson wrote:
>> On Thu, 19 May 2022 14:33:11 -0400
>> Matthew Rosato wrote:
>>
>>> Rather than relying on a notifier for associating the KVM with
>>> the group, let's assume that the association has
On 1/5/23 7:32 PM, Jason Gunthorpe wrote:
> On Thu, Jan 05, 2023 at 07:16:37PM -0500, Matthew Rosato wrote:
>
>> Yeah, this is also what I was thinking, replace the direct
>> kvm_put_kvm calls with, say, schedule_delayed_work in each driver,
>> where the delayed task just does the kvm_put_kvm
== Series Details ==
Series: drm/i915/mtl: Add initial gt workarounds (rev2)
URL : https://patchwork.freedesktop.org/series/111994/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12550 -> Patchwork_111994v2
Summary
---
On Thu, Jan 05, 2023 at 07:16:37PM -0500, Matthew Rosato wrote:
> Yeah, this is also what I was thinking, replace the direct
> kvm_put_kvm calls with, say, schedule_delayed_work in each driver,
> where the delayed task just does the kvm_put_kvm (along with a brief
> comment explaining why we
== Series Details ==
Series: drm/i915/mtl: Add initial gt workarounds (rev2)
URL : https://patchwork.freedesktop.org/series/111994/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Thu, Jan 05, 2023 at 01:06:37PM +, Tvrtko Ursulin wrote:
>
> On 04/01/2023 17:41, Matt Roper wrote:
> > On Wed, Jan 04, 2023 at 10:08:29AM +, Tvrtko Ursulin wrote:
> > >
> > > On 03/01/2023 19:57, Matt Roper wrote:
> > > > On Mon, Dec 19, 2022 at 05:10:02PM +0100, Andrzej Hajda wrote:
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/gpu/drm/tests/drm_format_helper_test.c
between commit:
a52a5451f43b ("kunit: Use KUNIT_EXPECT_MEMEQ macro")
from Linus' tree and commits:
f21d62c9ce3d ("drm/format-helper: Store RGB565 in little-endian
From: Matt Roper
This patch introduces initial gt workarounds for the MTL platform.
v2: drop redundant/stale comments specifying wa platforms affected
(Lucas).
v3: drop additional redundant stale comments (MattR)
Bspec: 66622
Signed-off-by: Matt Roper
Signed-off-by: Matt Atwood
---
On Tue, Jan 03, 2023 at 04:18:27PM -0800, Matt Roper wrote:
> On Thu, Dec 15, 2022 at 03:30:55PM -0800, Matt Atwood wrote:
> > From: Matt Roper
> >
> > This patch introduces initial gt workarounds for the MTL platform.
> >
> > v2: drop redundant/stale comments specifying wa platforms affected
>
On Thu, Jan 05, 2023 at 03:09:30PM -0700, Alex Williamson wrote:
> On Thu, 19 May 2022 14:33:11 -0400
> Matthew Rosato wrote:
>
> > Rather than relying on a notifier for associating the KVM with
> > the group, let's assume that the association has already been
> > made prior to device_open. The
On Thu, Jan 05, 2023 at 10:37:01AM -0300, Gustavo Sousa wrote:
> CHICKEN_RASTER_{1,2} got overlooked with the move done in a9e69428b1b4
> ("drm/i915: Define MCR registers explicitly"). Registers from the SVG
> unit became multicast as of Xe_HP graphics.
>
> BSpec: 66534
> Fixes: a9e69428b1b4
== Series Details ==
Series: drm/i915: Update docs in intel_wakeref.h
URL : https://patchwork.freedesktop.org/series/112454/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12550 -> Patchwork_112454v1
Summary
---
On Thu, 19 May 2022 14:33:11 -0400
Matthew Rosato wrote:
> Rather than relying on a notifier for associating the KVM with
> the group, let's assume that the association has already been
> made prior to device_open. The first time a device is opened
> associate the group KVM with the device.
>
Hi all,
The following commits also exist in Linus Torvald's tree as different
commits (but the same patches):
a189b2ee938f ("fbdev: Make fb_modesetting_disabled() static inline")
7aa3d63e1ad5 ("Revert "drm/fb-helper: Remove damage worker"")
8b83e1a45538 ("Revert "drm/fb-helper: Schedule
On Tue, Jan 03, 2023 at 01:02:15PM +, Tvrtko Ursulin wrote:
>
> On 02/01/2023 07:30, Boris Brezillon wrote:
> > On Fri, 30 Dec 2022 12:55:08 +0100
> > Boris Brezillon wrote:
> >
> > > On Fri, 30 Dec 2022 11:20:42 +0100
> > > Boris Brezillon wrote:
> > >
> > > > Hello Matthew,
> > > >
> >
On Tue, Jan 03, 2023 at 12:21:08PM +, Tvrtko Ursulin wrote:
>
> On 22/12/2022 22:21, Matthew Brost wrote:
> > Hello,
> >
> > This is a submission for Xe, a new driver for Intel GPUs that supports both
> > integrated and discrete platforms starting with Tiger Lake (first platform
> > with
>
On Thu, 05 Jan 2023 12:38:43 -0800, Nirmoy Das wrote:
>
> Fix docs for __intel_wakeref_put() and intel_wakeref_get() to
> reflect current behaviour.
Reviewed-by: Ashutosh Dixit
> Signed-off-by: Nirmoy Das
> ---
> drivers/gpu/drm/i915/intel_wakeref.h | 21 ++---
> 1 file
Fix docs for __intel_wakeref_put() and intel_wakeref_get() to
reflect current behaviour.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/intel_wakeref.h | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_wakeref.h
On Thu, Jan 05, 2023 at 02:10:40PM +0100, Andrzej Hajda wrote:
> The helper makes the code more compact and readable.
>
> Signed-off-by: Andrzej Hajda
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 165 ++
> 1 file changed, 53 insertions(+),
On Thu, Jan 05, 2023 at 02:10:39PM +0100, Andrzej Hajda wrote:
> The helper makes the code more compact and readable.
>
> Signed-off-by: Andrzej Hajda
> ---
> .../drm/i915/display/intel_display_power.c| 49 ---
> .../i915/display/intel_display_power_well.c | 82 ++-
On Thu, Jan 05, 2023 at 02:10:38PM +0100, Andrzej Hajda wrote:
> The helper makes the code more compact and readable.
>
> Signed-off-by: Andrzej Hajda
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 22 ---
>
Hi Dave and Daniel,
Only GVT related fixes for this round.
I have another fix queued for i915_vma_unbind_async from Nirmoy that will
target stable 5.18, but I figured it out late so I didn't run CI on that yet.
So I'm holding this for now. Maybe and extra PR tomorrow or it will
wait for the next
Hi Andi and Ashutosh,
On 1/5/2023 6:47 PM, Andi Shyti wrote:
*
- * Note that @fn is allowed to fail, in which case the runtime-pm wakeref
- * is retained and an error reported.
+ * Note that intel_wakeref_ops->put() is allowed to fail, in which case the
+ * runtime-pm wakeref is retained.
On Mon, Jan 02, 2023 at 08:30:19AM +0100, Boris Brezillon wrote:
> On Fri, 30 Dec 2022 12:55:08 +0100
> Boris Brezillon wrote:
>
> > On Fri, 30 Dec 2022 11:20:42 +0100
> > Boris Brezillon wrote:
> >
> > > Hello Matthew,
> > >
> > > On Thu, 22 Dec 2022 14:21:11 -0800
> > > Matthew Brost
On Wed, Jan 04, 2023 at 01:55:46PM -0500, Rodrigo Vivi wrote:
> There are new cases where we want to block i915 probe, such
> as when experimenting or developing the new Xe driver.
>
> But also, with the new hybrid cards, users or developers might
> want to use i915 only on integrated and fully
On Thu, Jan 05, 2023, Yan Zhao wrote:
> On Tue, Jan 03, 2023 at 09:19:01PM +, Sean Christopherson wrote:
> > On Wed, Dec 28, 2022, Yan Zhao wrote:
> > > On Fri, Dec 23, 2022 at 12:57:38AM +, Sean Christopherson wrote:
> > > > +bool kvm_page_track_is_valid_gfn(struct kvm *kvm, gfn_t gfn)
>
Hi,
On Thu, Jan 05, 2023 at 08:29:26AM -0800, Dixit, Ashutosh wrote:
> On Thu, 05 Jan 2023 07:38:31 -0800, Nirmoy Das wrote:
> >
>
> Hi Nirmoy,
>
> > Fix the __intel_wakeref_put() doc to reflect current behaviour.
> >
> > Fixes: c7302f204490 ("drm/i915: Defer final intel_wakeref_put to process
== Series Details ==
Series: drm/i915/fbdev: Implement fb_dirty for intel custom fb helper (rev3)
URL : https://patchwork.freedesktop.org/series/111433/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12548 -> Patchwork_111433v3
On Thu, Jan 05, 2023, Yan Zhao wrote:
> On Tue, Jan 03, 2023 at 09:13:54PM +, Sean Christopherson wrote:
> > On Wed, Dec 28, 2022, Yan Zhao wrote:
> > > On Fri, Dec 23, 2022 at 12:57:15AM +, Sean Christopherson wrote:
> > > > Honor KVM's max allowed page size when determining whether or
== Series Details ==
Series: Defeature Interlace modes for Display >= 12 (rev3)
URL : https://patchwork.freedesktop.org/series/109773/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12548 -> Patchwork_109773v3
Summary
On Thu, Dec 29, 2022 at 10:54:50AM +0100, Andrzej Hajda wrote:
> Forgive me late response - Holidays,
>
> On 22.12.2022 18:21, Andrew Morton wrote:
> > On Thu, 22 Dec 2022 12:46:16 +0100 Andrzej Hajda
> > wrote:
> >
> > > Hi all,
> > >
> > > I hope there will be place for such tiny helper in
On Thu, 05 Jan 2023 07:38:31 -0800, Nirmoy Das wrote:
>
Hi Nirmoy,
> Fix the __intel_wakeref_put() doc to reflect current behaviour.
>
> Fixes: c7302f204490 ("drm/i915: Defer final intel_wakeref_put to process
> context")
Seems to be d91e657876a9?
> Signed-off-by: Nirmoy Das
> ---
>
== Series Details ==
Series: drm/i915/psr: Implement Wa_14015648006
URL : https://patchwork.freedesktop.org/series/112430/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12548 -> Patchwork_112430v1
Summary
---
On 05/01/2023 15:52, Andi Shyti wrote:
Hi Rob,
On Tue, Jan 03, 2023 at 03:49:46PM -0800, Rob Clark wrote:
From: Rob Clark
gem_context_register() makes the context visible to userspace, and which
point a separate thread can trigger the I915_GEM_CONTEXT_DESTROY ioctl.
So we need to ensure
Hi Rob,
On Tue, Jan 03, 2023 at 03:49:46PM -0800, Rob Clark wrote:
> From: Rob Clark
>
> gem_context_register() makes the context visible to userspace, and which
> point a separate thread can trigger the I915_GEM_CONTEXT_DESTROY ioctl.
> So we need to ensure that nothing uses the ctx ptr after
Fix the __intel_wakeref_put() doc to reflect current behaviour.
Fixes: c7302f204490 ("drm/i915: Defer final intel_wakeref_put to process
context")
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/intel_wakeref.h | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Friday, December 16, 2022 6:08 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 11/13] drm/i915/dsb: Add mode DSB opcodes
>
> From: Ville Syrjälä
>
> Add all the know DSB instruction
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Friday, December 16, 2022 6:08 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 10/13] drm/i915/dsb: Allow the caller to pass in
> the DSB buffer size
>
> From: Ville Syrjälä
>
> The
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Friday, December 16, 2022 6:08 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 08/13] drm/i915/dsb: Handle the indexed vs. not
> inside the DSB code
>
> From: Ville Syrjälä
>
> The DSB
On Thu, Jan 05, 2023 at 02:41:43PM +, David Laight wrote:
> From: Daniel Vetter
> > Sent: 05 January 2023 14:13
> ...
> > > > So here we are, with Andrzej looking to add the common helper. And the
> > > > same concerns crop up. What should it be called to make it clear that
> > > > it's not
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Friday, December 16, 2022 6:08 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 09/13] drm/i915/dsb: Introduce
> intel_dsb_align_tail()
>
> From: Ville Syrjälä
>
> Move the DSB tail
From: Daniel Vetter
> Sent: 05 January 2023 14:13
...
> > > So here we are, with Andrzej looking to add the common helper. And the
> > > same concerns crop up. What should it be called to make it clear that
> > > it's not atomic? Is that possible?
> >
> > old_value = read_write(variable,
On Thu, 05 Jan 2023, Mika Kahola wrote:
> From: Radhakrishna Sripada
>
> XELPDP has C10 and C20 phys from Synopsys to drive displays. Each phy
> has a dedicated PIPE 5.2 Message bus for configuration. This message
> bus is used to configure the phy internal registers.
>
> XELPDP has C10 phys to
On 05/01/2023 13:34, David Laight wrote:
From: Jani Nikula
Sent: 05 January 2023 13:28
On Thu, 05 Jan 2023, Daniel Vetter wrote:
On Mon, Dec 12, 2022 at 09:38:12AM +, David Laight wrote:
From: Andrzej Hajda
Sent: 09 December 2022 15:49
The pattern of setting variable with new value
On Thu, Jan 05, 2023 at 01:34:33PM +, David Laight wrote:
> From: Jani Nikula
> > Sent: 05 January 2023 13:28
> >
> > On Thu, 05 Jan 2023, Daniel Vetter wrote:
> > > On Mon, Dec 12, 2022 at 09:38:12AM +, David Laight wrote:
> > >> From: Andrzej Hajda
> > >> > Sent: 09 December 2022
From: Jani Nikula
> Sent: 05 January 2023 13:28
>
> On Thu, 05 Jan 2023, Daniel Vetter wrote:
> > On Mon, Dec 12, 2022 at 09:38:12AM +, David Laight wrote:
> >> From: Andrzej Hajda
> >> > Sent: 09 December 2022 15:49
> >> >
> >> > The pattern of setting variable with new value and returning
CHICKEN_RASTER_{1,2} got overlooked with the move done in a9e69428b1b4
("drm/i915: Define MCR registers explicitly"). Registers from the SVG
unit became multicast as of Xe_HP graphics.
BSpec: 66534
Fixes: a9e69428b1b4 ("drm/i915: Define MCR registers explicitly").
Signed-off-by: Gustavo Sousa
Okay to sum it up below with some final notes..
On 04/01/2023 19:34, Matt Roper wrote:
On Wed, Jan 04, 2023 at 09:58:13AM +, Tvrtko Ursulin wrote:
On 23/12/2022 18:28, Lucas De Marchi wrote:
On Fri, Dec 23, 2022 at 09:02:35AM +, Tvrtko Ursulin wrote:
On 22/12/2022 15:55, Lucas De
On Thu, 05 Jan 2023, Daniel Vetter wrote:
> On Mon, Dec 12, 2022 at 09:38:12AM +, David Laight wrote:
>> From: Andrzej Hajda
>> > Sent: 09 December 2022 15:49
>> >
>> > The pattern of setting variable with new value and returning old
>> > one is very common in kernel. Usually atomicity of
The helper makes the code more compact and readable.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/display/g4x_dp.c | 12
drivers/gpu/drm/i915/display/intel_drrs.c | 12 +++-
drivers/gpu/drm/i915/display/intel_dvo.c | 7 ++-
The helper makes the code more compact and readable.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/display/intel_ddi.c | 49 +++---
drivers/gpu/drm/i915/display/intel_fdi.c | 3 +-
drivers/gpu/drm/i915/display/intel_gmbus.c | 30 +++--
3 files changed, 22
The helper makes the code more compact and readable.
Signed-off-by: Andrzej Hajda
---
.../gpu/drm/i915/display/intel_backlight.c| 59 +++
drivers/gpu/drm/i915/display/intel_pps.c | 14 ++---
drivers/gpu/drm/i915/display/intel_psr.c | 40 -
3 files
The helper makes the code more compact and readable.
Signed-off-by: Andrzej Hajda
---
.../drm/i915/display/intel_display_power.c| 49 ---
.../i915/display/intel_display_power_well.c | 82 ++-
2 files changed, 39 insertions(+), 92 deletions(-)
diff --git
The helper makes the code more compact and readable.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/display/g4x_hdmi.c | 8 ++---
drivers/gpu/drm/i915/display/intel_hdcp.c | 15 -
drivers/gpu/drm/i915/display/intel_hdmi.c | 40 +++
3 files changed, 22
The helper makes the code more compact and readable.
Signed-off-by: Andrzej Hajda
---
.../gpu/drm/i915/display/intel_pch_display.c | 41 +--
.../gpu/drm/i915/display/intel_pch_refclk.c | 10 +
2 files changed, 13 insertions(+), 38 deletions(-)
diff --git
The helper makes the code more compact and readable.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 165 ++
1 file changed, 53 insertions(+), 112 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
The helper makes the code more compact and readable.
Signed-off-by: Andrzej Hajda
---
.../gpu/drm/i915/display/intel_combo_phy.c| 43 +---
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 51 ++-
2 files changed, 29 insertions(+), 65 deletions(-)
diff --git
The helper makes the code more compact and readable.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/display/intel_display.c | 22 ---
.../drm/i915/display/intel_modeset_setup.c| 17 ++
2 files changed, 16 insertions(+), 23 deletions(-)
diff --git
On Thu, Jan 05, 2023 at 08:15:28AM +0800, Zhenyu Wang wrote:
> On 2023.01.04 06:34:28 -0500, Rodrigo Vivi wrote:
> > On Wed, Jan 04, 2023 at 04:05:13PM +0800, Zhenyu Wang wrote:
> > >
> > > Hi,
> > >
> > > Here's accumulated current gvt-fixes. Several of them handle
> > > for error or destroy
On 04/01/2023 17:41, Matt Roper wrote:
On Wed, Jan 04, 2023 at 10:08:29AM +, Tvrtko Ursulin wrote:
On 03/01/2023 19:57, Matt Roper wrote:
On Mon, Dec 19, 2022 at 05:10:02PM +0100, Andrzej Hajda wrote:
On 19.12.2022 11:13, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
As the logic for
On Mon, Dec 12, 2022 at 09:38:12AM +, David Laight wrote:
> From: Andrzej Hajda
> > Sent: 09 December 2022 15:49
> >
> > The pattern of setting variable with new value and returning old
> > one is very common in kernel. Usually atomicity of the operation
> > is not required, so xchg seems to
From: Anusha Srivatsa
Unlike previous platforms that used PORT_TX_DFLEXDPSP
for max_lane calculation, MTL uses only PORT_TX_DFLEXPA1
from which the max_lanes has to be calculated.
Bspec: 50235, 65380
Cc: Mika Kahola
Cc: Imre Deak
Cc: Matt Roper
Signed-off-by: Anusha Srivatsa
Signed-off-by:
From: Imre Deak
The HPD live status for MTL has to be read from different set of
registers. MTL deserves a new function for this purpose
and cannot reuse the existing HPD live status detection
Signed-off-by: Anusha Srivatsa
Signed-off-by: Imre Deak
Signed-off-by: Mika Kahola
---
Add register writes to enable powering up Type-C subsystem i.e. TCSS.
For MeteorLake we need to request TCSS to power up and check the TCSS
power state after 500 us.
In addition, for PICA we need to set/clear the Type-C PHY ownnership
bit when Type-C device is connected/disconnected.
v2: Call
From: Gustavo Sousa
Xe_LPD+ defines interrupt bits for only DDI ports in the DE Port
Interrupt registers. The bits for Type-C ports are defined in the PICA
interrupt registers.
BSpec: 50064
Signed-off-by: Gustavo Sousa
Link:
PICA is used for DP alt mode and TBT modes. Hotplug interruption is routed
from PICA chip to south display engine and from there to north display
engine. This patch adds functionality to enable hotplug detection for
all Type-C ports (4 ports available).
Differently from HPD in south display, PICA
Finally, we can enable TC ports for Meteorlake.
Signed-off-by: Mika Kahola
Link:
https://patchwork.freedesktop.org/patch/msgid/20221014124740.774835-17-mika.kah...@intel.com
---
drivers/gpu/drm/i915/display/intel_display.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
Readout hw state for Thunderbolt.
Signed-off-by: Mika Kahola
Link:
https://patchwork.freedesktop.org/patch/msgid/20221014124740.774835-16-mika.kah...@intel.com
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 27
drivers/gpu/drm/i915/display/intel_cx0_phy.h | 2 +-
DP1.4 and DP20 voltage swing sequence for C20 phy.
Bspec: 65449, 67636, 67610
v2: DP2.0 Tx Eq tables has been updated in BSpec.
Update also the driver code as per BSpec 65449
Signed-off-by: Mika Kahola
Signed-off-by: Radhakrishna Sripada
Link:
Enabling and disabling sequence for Thunderbolt PLL.
Signed-off-by: Mika Kahola
Link:
https://patchwork.freedesktop.org/patch/msgid/20221014124740.774835-15-mika.kah...@intel.com
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 137 ++-
Use MPLLA for DP2.0 rates 20G and 20G, when ssc is enabled.
Signed-off-by: Mika Kahola
Link:
https://patchwork.freedesktop.org/patch/msgid/20221014124740.774835-14-mika.kah...@intel.com
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 8 ++--
1 file changed, 6 insertions(+), 2
Add C20 HDMI state calculations and put HDMI table definitions
in use.
Signed-off-by: Mika Kahola
Link:
https://patchwork.freedesktop.org/patch/msgid/20221014124740.774835-12-mika.kah...@intel.com
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 10 ++
1 file changed, 10
Create a table for C20 DP1.4, DP2.0 and HDMI2.1 rates.
The PLL settings are based on table, not for algorithmic alternative.
For DP 1.4 only MPLLB is in use.
Once register settings are done, we read back C20 HW state.
BSpec: 64568
v2: Update rbr, hbr1, hbr2, and hbr3 pll configurations 4 and 5
Calculate port clock with C20 phy.
Signed-off-by: Mika Kahola
Link:
https://patchwork.freedesktop.org/patch/msgid/20221014124740.774835-11-mika.kah...@intel.com
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 32 ++--
drivers/gpu/drm/i915/display/intel_cx0_phy.h | 2 ++
C20 phy PLL programming sequence for DP, DP2.0, HDMI2.x non-FRL and
HDMI2.x FRL. This enables C20 MPLLA and MPLLB programming sequence. add
4 lane support for c20.
Signed-off-by: José Roberto de Souza
Signed-off-by: Mika Kahola
Signed-off-by: Bhanuprakash Modem
Signed-off-by: Imre Deak
Link:
Display14 introduces a new way to instruct the PUnit with
power and bandwidth requirements of DE. Add the functionality
to program the registers and handle waits using interrupts.
The current wait time for timeouts is programmed for 10 msecs to
factor in the worst case scenarios. Changes made to
From: Radhakrishna Sripada
C10 phys uses direct mapping internally for voltage and pre-emphasis levels.
Program the levels directly to the fields in the VDR Registers.
Bspec: 65449
v2: From table "C10: Tx EQ settings for DP 1.4x" it shows level 1
and preemphasis 1 instead of two times of
From: Radhakrishna Sripada
Like DG2, we still don't have a proper algorithm that can be used
for calculating PHY settings, but we do have tables of register
values for a handful of the more common link rates. Some support is
better than none, so let's go ahead and add/use these tables when we
From: Radhakrishna Sripada
XELPDP has C10 and C20 phys from Synopsys to drive displays. Each phy
has a dedicated PIPE 5.2 Message bus for configuration. This message
bus is used to configure the phy internal registers.
XELPDP has C10 phys to drive output to the EDP and the native output
from
Create a separate file to store registers for PICA chips
C10 and C20.
v2: Rename file (Jani)
Signed-off-by: Radhakrishna Sripada
Signed-off-by: Mika Kahola
---
.../gpu/drm/i915/display/intel_cx0_phy_regs.h | 136 ++
1 file changed, 136 insertions(+)
create mode 100644
Add DP rates for Meteorlake.
Signed-off-by: Radhakrishna Sripada
Signed-off-by: Mika Kahola
Link:
https://patchwork.freedesktop.org/patch/msgid/20221014124740.774835-3-mika.kah...@intel.com
---
drivers/gpu/drm/i915/display/intel_dp.c | 15 ++-
1 file changed, 14 insertions(+), 1
From: Clint Taylor
Initialize c10 combo phy ports. TODO Type-C ports.
Cc: Radhakrishna Sripada
Signed-off-by: Clint Taylor
Link:
https://patchwork.freedesktop.org/patch/msgid/20221014124740.774835-2-mika.kah...@intel.com
---
drivers/gpu/drm/i915/display/intel_display.c | 6 +-
1 file
PHY programming support for PICA C10 and C20 Type-C chips.
v2: Move intel_cx0_reg_defs.h to intel_cx0_phy_regs.h (Jani)
Move pmdemand as part of intel_display structure
PLL table updates
Signed-off-by: Mika Kahola
Anusha Srivatsa (1):
drm/i915/mtl: Pin assignment for TypeC
Clint
On Thu, 05 Jan 2023, Ankit Nautiyal wrote:
> Defeature Display Interlace support.
> Support for interlace modes is removed from Gen 12 onwards.
> Pruning the interlace modes for HDMI for Display >=12.
> Bspec: 50490
>
> v2: Add check for both DP and HDMI. (Ville)
> Get rid of redundant check for
On Mon, Dec 05, 2022 at 09:10:05AM -0700, Jim Cromie wrote:
> Cited commit uses stale macro name, fix this, and explain better.
>
> When DRM_USE_DYNAMIC_DEBUG=y, DYNDBG_CLASSMAP_DEFINE() maps DRM_UT_*
> onto BITs in drm.debug. This still uses enum drm_debug_category, but
> it is somewhat
Defeature Display Interlace support.
Support for interlace modes is removed from Gen 12 onwards.
Pruning the interlace modes for HDMI for Display >=12.
Bspec: 50490
v2: Add check for both DP and HDMI. (Ville)
Get rid of redundant check for interlace mode in modevalid. (Ville)
v3: Simplify the
== Series Details ==
Series: drm/i915: Fix potential context UAFs (rev2)
URL : https://patchwork.freedesktop.org/series/112383/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12546 -> Patchwork_112383v2
Summary
---
On Mon, 17 Oct 2022, Ankit Nautiyal wrote:
> Since the DP/HDMI connector do not set connector->doublescan_allowed,
> the doublescan modes will get automatically filtered during
> drm_helper_probe_single_connector_modes().
>
> Therefore check for double scan modes is not required and is dropped
>
On Mon, 17 Oct 2022, Ankit Nautiyal wrote:
> Defeature Display Interlace support.
> Support for interlace modes is removed from Gen 12 onwards.
> Pruning the interlace modes for HDMI for Display >=12.
> Bspec: 50490
>
> v2: Add check for both DP and HDMI. (Ville)
> Get rid of redundant check for
On Thu, Jan 05, 2023 at 08:49:09AM +0100, Maxime Ripard wrote:
> Hi Dave, Daniel,
>
> Here's this week drm-misc-fixes PR
>
> Maxime
>
> drm-misc-fixes-2023-01-05:
> Several fixes to fix the error path of dma_buf_export, add a missing
> structure declaration resulting in a compiler warning, fix
On 1/5/2023 10:56 AM, Matthew Auld wrote:
On Fri, 23 Dec 2022 at 09:20, Nirmoy Das wrote:
A nested dma_resv_reserve_fences(1) will not reserve slot from the
2nd call onwards and folowing dma_resv_add_fence() might hit the
"BUG_ON(fobj->num_fences >= fobj->max_fences)" check.
I915 hit above
On Fri, 23 Dec 2022 at 09:20, Nirmoy Das wrote:
>
> A nested dma_resv_reserve_fences(1) will not reserve slot from the
> 2nd call onwards and folowing dma_resv_add_fence() might hit the
> "BUG_ON(fobj->num_fences >= fobj->max_fences)" check.
>
> I915 hit above nested dma_resv case in
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
Reviewed-by: Arnd Bergmann
---
v2: squashed all arch patches into one
v3: fixed alpha/xchg_local, thx to l...@intel.com
v4: adjusted indentation (Heiko)
---
arch/alpha/include/asm/cmpxchg.h | 10 +-
> Hi Julia, thanks for helping here.
>
> So, my question is why this
>
> make coccicheck M=drivers/gpu/drm/i915/ MODE=context
> COCCI=./scripts/coccinelle/api/debugfs/debugfs_simple_attr.cocci
>
> didn't catch this chunck:
>
> - debugfs_create_file("i915_fbc_false_color", 0644,
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