Hi Andi,
After applying these two patches, deadlock is being detected in the call
stack below. Please review whether the patch to update the
intel_context_migrate_copy() part affected the deadlock.
== Series Details ==
Series: Enable HDCP2.x via GSC CS (rev11)
URL : https://patchwork.freedesktop.org/series/111876/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12820 -> Patchwork_111876v11
Summary
---
On 3/6/2023 6:30 PM, Ville Syrjälä wrote:
On Mon, Mar 06, 2023 at 05:22:19PM +0100, Das, Nirmoy wrote:
On 3/6/2023 3:21 PM, Ville Syrjälä wrote:
On Mon, Mar 06, 2023 at 11:28:48AM +0100, Nirmoy Das wrote:
Framebuffer is exposed to userspace so set I915_BO_ALLOC_USER
flag for it. This also
== Series Details ==
Series: Enable HDCP2.x via GSC CS (rev11)
URL : https://patchwork.freedesktop.org/series/111876/
State : warning
== Summary ==
Error: dim checkpatch failed
043608ed6704 drm/i915/gsc: Create GSC request submission mechanism
Traceback (most recent call last):
File
MTL uses GSC command streamer i.e gsc cs to send HDCP/PXP commands
to GSC f/w. It requires to keep hdcp display driver
agnostic to content protection f/w (ME/GSC fw) in the form of
i915_hdcp_fw_ops generic ops.
Adding HDCP GSC CS interface by leveraging the i915_hdcp_fw_ops generic
ops instead of
Add function that takes care of sending command to gsc cs. We start
of with allocation of memory for our command intel_hdcp_gsc_message that
contains gsc cs memory header as directed in specs followed by the
actual payload hdcp message that we want to send.
Spec states that we need to poll pending
It requires to move intel specific HDCP API structures to
i915_hdcp_interface.h from driver/misc/mei/hdcp/mei_hdcp.h
so that any content protection fw interfaces can use these
structures.
Cc: Tomas Winkler
Cc: Rodrigo Vivi
Cc: Uma Shankar
Cc: Ankit Nautiyal
Signed-off-by: Anshuman Gupta
From: Anshuman Gupta
pre MTL we interact with mei interface to talk to
firmware and enable CP but going forward we will talk to gsc cs
because of which we are making all names for HDCP helpers and
structures generic as either mei or gsc cs maybe used.
Change the
As now we have more then one type of content protection
secrity firmware.
%s/_mei_/_
--v3
-Changing names to drop cp_fw to make naming more agnostic[Jani]
--v4
-remove header reference in intel_display_core.h [Uma]
-fix commit message and prefix drm [Uma]
Cc: Tomas Winkler
Cc: Rodrigo Vivi
HDCP and PXP will require a common function to allow it to
submit commands to the gsc cs. Also adding the gsc mtl header
that needs to be added on to the existing payloads of HDCP
and PXP.
--v4
-Seprate gsc load and heci cmd submission into different
functions in different files for better
These patches enable HDCP2.x on machines MTL and above.
>From MTL onwards CSME is spilt into GSC and CSC and now
we use GSC CS instead of MEI to talk to firmware to start
HDCP authentication
--v2
-Fixing some checkpatch changes which I forgot before sending
out the series
--v3
-Drop cp and fw to
> -Original Message-
> From: Shankar, Uma
> Sent: Tuesday, March 7, 2023 12:15 PM
> To: Kandpal, Suraj ; intel-
> g...@lists.freedesktop.org
> Cc: Nautiyal, Ankit K ; Winkler, Tomas
> ; Vivi, Rodrigo ; Gupta,
> Anshuman
> Subject: RE: [PATCH v10 6/6] drm/i915/mtl: Add HDCP GSC
> -Original Message-
> From: Shankar, Uma
> Sent: Tuesday, March 7, 2023 12:10 PM
> To: Kandpal, Suraj ; intel-
> g...@lists.freedesktop.org
> Cc: Nautiyal, Ankit K ; Gupta, Anshuman
> ; Winkler, Tomas ;
> Vivi, Rodrigo
> Subject: RE: [PATCH v10 2/6] drm/i915/hdcp: Keep hdcp agonstic
> -Original Message-
> From: Shankar, Uma
> Sent: Monday, March 6, 2023 6:05 PM
> To: Kandpal, Suraj ; intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K ; Winkler, Tomas
> ; Vivi, Rodrigo ; Gupta,
> Anshuman
> Subject: RE: [PATCH v10 6/6] drm/i915/mtl: Add HDCP GSC interface
>
>
> -Original Message-
> From: Kandpal, Suraj
> Sent: Monday, March 6, 2023 6:20 PM
> To: Shankar, Uma ; intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K ; Gupta, Anshuman
> ; Winkler, Tomas ; Vivi,
> Rodrigo
> Subject: RE: [PATCH v10 2/6] drm/i915/hdcp: Keep hdcp agonstic naming
> From: Liu, Yi L
> Sent: Friday, March 3, 2023 2:58 PM
>
> > What should we return here anyhow if an access was created?
>
> iommufd_access->obj.id. should be fine. Is it?
>
Thinking more I'm not sure whether it's a good idea to fill the
dev_id field with an access object id and then later
On Mon, Mar 6, 2023 at 11:50 AM Timur Tabi wrote:
>
> On Sun, Sep 4, 2022 at 4:48 PM Jim Cromie wrote:
> >
> > These 2 macros used drm_debug_enabled() on DRM_UT_{DRIVER,ATOMIC}
> > respectively, replace those with drm_dbg_##cat invocations.
> >
> > this results in new class'd prdbg callsites:
>
== Series Details ==
Series: drm/i915/xelp: Implement Wa_1606376872
URL : https://patchwork.freedesktop.org/series/114745/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12820 -> Patchwork_114745v1
Summary
---
Wa_1606376872 applies to all Xe_LP IPs.
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 +++
drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 +-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> From: Tian, Kevin
> Sent: Tuesday, March 7, 2023 10:31 AM
>
> > From: Jason Gunthorpe
> > Sent: Monday, March 6, 2023 9:17 PM
> >
> > On Fri, Mar 03, 2023 at 09:55:42AM -0700, Alex Williamson wrote:
> >
> > > I can't think of a reason DPDK couldn't use hot-reset. If we want to
> > > make it
> From: Jason Gunthorpe
> Sent: Monday, March 6, 2023 9:17 PM
>
> On Fri, Mar 03, 2023 at 09:55:42AM -0700, Alex Williamson wrote:
>
> > I can't think of a reason DPDK couldn't use hot-reset. If we want to
> > make it a policy, it should be enforced by code, but creating that
> > policy based
On 3/6/2023 4:24 PM, Matt Roper wrote:
On Mon, Mar 06, 2023 at 04:14:49PM -0800, Sripada, Radhakrishna wrote:
+Daniele,
Hi Matt,
-Original Message-
From: Roper, Matthew D
Sent: Monday, March 6, 2023 2:55 PM
To: Sripada, Radhakrishna
Cc: intel-gfx@lists.freedesktop.org; De
On Mon, Mar 06, 2023 at 04:14:49PM -0800, Sripada, Radhakrishna wrote:
> +Daniele,
>
> Hi Matt,
>
> > -Original Message-
> > From: Roper, Matthew D
> > Sent: Monday, March 6, 2023 2:55 PM
> > To: Sripada, Radhakrishna
> > Cc: intel-gfx@lists.freedesktop.org; De Marchi, Lucas
> > ;
+Daniele,
Hi Matt,
> -Original Message-
> From: Roper, Matthew D
> Sent: Monday, March 6, 2023 2:55 PM
> To: Sripada, Radhakrishna
> Cc: intel-gfx@lists.freedesktop.org; De Marchi, Lucas
> ; Zanoni, Paulo R
> Subject: Re: [Intel-gfx] [PATCH v3 3/5] drm/i915/mtl: make IRQ reset and
>
On Mon, Mar 06, 2023 at 03:17:50PM -0800, Matt Roper wrote:
On Mon, Mar 06, 2023 at 12:49:54PM -0800, Lucas De Marchi wrote:
dg1_ctx_workarounds_init() is DG1-only, while
gen12_ctx_workarounds_init() is shared with other platforms. Move the
workaround to the former so there is no additional
== Series Details ==
Series: drm/i915/sseu: fix max_subslices array-index-out-of-bounds access (rev4)
URL : https://patchwork.freedesktop.org/series/114199/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12794_full -> Patchwork_114199v4_full
== Series Details ==
Series: Add generic memory shrinker to VirtIO-GPU and Panfrost DRM drivers
URL : https://patchwork.freedesktop.org/series/114671/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12811_full -> Patchwork_114671v1_full
On Mon, Mar 06, 2023 at 12:49:54PM -0800, Lucas De Marchi wrote:
> dg1_ctx_workarounds_init() is DG1-only, while
> gen12_ctx_workarounds_init() is shared with other platforms. Move the
> workaround to the former so there is no additional platform check
> needed.
>
> Signed-off-by: Lucas De Marchi
On Mon, Mar 06, 2023 at 12:49:53PM -0800, Lucas De Marchi wrote:
> Use gt_tuning_settings() for the recommended tunings rather than the one
> for workarounds.
>
> Signed-off-by: Lucas De Marchi
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 11 +++
> 1
On Mon, Mar 06, 2023 at 12:49:52PM -0800, Lucas De Marchi wrote:
> dg1_gt_workarounds_init() is only ever called for DG1, so there is no
> point checking it again.
>
> Signed-off-by: Lucas De Marchi
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 12 +++-
== Series Details ==
Series: series starting with [1/3] drm/i915: Remove redundant check for DG1
URL : https://patchwork.freedesktop.org/series/114735/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12818 -> Patchwork_114735v1
Hi all,
Today's linux-next merge of the drm-intel tree got a conflict in:
drivers/gpu/drm/i915/i915_driver.c
between commit:
2293a73ad4f3 ("drm/i915: Remove unused variable")
from Linus' tree and commit:
e5e43d3363d7 ("drm/i915/display: Pass drm_i915_private as param to i915
funcs")
== Series Details ==
Series: drm/i915/mtl: Extend Wa_14017073508 in suspend/resume flow
URL : https://patchwork.freedesktop.org/series/114657/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12810_full -> Patchwork_114657v1_full
On Wed, Mar 01, 2023 at 12:10:51PM -0800, Radhakrishna Sripada wrote:
> Irq reset and post install are to be made multi-gt aware for the
> interrupts to work for the media tile on Meteorlake. Iterate through
> all the gts to process irq reset for each gt.
I think I mentioned on the previous
== Series Details ==
Series: drm/i915/pmu: Freq sampling: Fix requested freq fallback
URL : https://patchwork.freedesktop.org/series/114643/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12810_full -> Patchwork_114643v1_full
On Wed, Mar 01, 2023 at 12:10:49PM -0800, Radhakrishna Sripada wrote:
> The commit 2357f2b271ad ("drm/i915/mtl: Initial display workarounds")
> extended the workaround Wa_16015201720 to MTL. However the registers
> that the original WA implemented moved for MTL.
>
> Implement the workaround with
== Series Details ==
Series: drm/i915: Check HPD during eDP probe (rev5)
URL : https://patchwork.freedesktop.org/series/114577/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12810_full -> Patchwork_114577v5_full
Summary
On 2/17/2023 2:33 PM, john.c.harri...@intel.com wrote:
From: John Harrison
The CI results for the 'fast request' patch set (enables error return
codes for fire-and-forget H2G messages) hit an issue with the KMD
sending context submission requests on an invalid context. That was
caused by a
On 2/17/2023 2:33 PM, john.c.harri...@intel.com wrote:
From: John Harrison
The stats worker thread management was mis-matched between
enable/disable call sites. Fix those up. Also, abstract the
cancel/enable code into a helper function rather than replicating in
multiple places.
v2: Rename
== Series Details ==
Series: drm/i915: Bump VBT version for expected child dev size check
URL : https://patchwork.freedesktop.org/series/114721/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12818 -> Patchwork_114721v1
== Series Details ==
Series: drm/i915/gvt: Make use of idr_find and idr_for_each_entry in dmabuf
(rev2)
URL : https://patchwork.freedesktop.org/series/114717/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12818 -> Patchwork_114717v2
On Mon, Mar 06, 2023 at 09:23:50PM +0100, Maarten Lankhorst wrote:
> Hey,
>
> On 2023-03-06 16:23, Souza, Jose wrote:
> > On Mon, 2023-03-06 at 15:16 +0100, Maarten Lankhorst wrote:
> >> As a fallback if we decide not to merge the frontbuffer tracking, allow
> >> i915 to keep its own
Use gt_tuning_settings() for the recommended tunings rather than the one
for workarounds.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
dg1_gt_workarounds_init() is only ever called for DG1, so there is no
point checking it again.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git
dg1_ctx_workarounds_init() is DG1-only, while
gen12_ctx_workarounds_init() is shared with other platforms. Move the
workaround to the former so there is no additional platform check
needed.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 9 +++--
1 file
== Series Details ==
Series: drm/i915/dsi: fix DSS CTL register offsets for TGL+ (rev2)
URL : https://patchwork.freedesktop.org/series/114522/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12807_full -> Patchwork_114522v2_full
Hey,
On 2023-03-06 16:23, Souza, Jose wrote:
On Mon, 2023-03-06 at 15:16 +0100, Maarten Lankhorst wrote:
As a fallback if we decide not to merge the frontbuffer tracking, allow
i915 to keep its own implementation, and do the right thing in Xe.
The frontbuffer tracking for Xe is still done
On Mon, Mar 06, 2023 at 08:33:04AM +, Gupta, Anshuman wrote:
>
>
> > -Original Message-
> > From: Nilawar, Badal
> > Sent: Saturday, March 4, 2023 9:48 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Gupta, Anshuman ; Ewins, Jon
> > ; Belgaumkar, Vinay ;
> > Vivi, Rodrigo
> >
== Series Details ==
Series: drm/xe/display: Do not use i915 frontbuffer tracking implementation
URL : https://patchwork.freedesktop.org/series/114714/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/114714/revisions/1/mbox/ not
applied
Applying:
On Mon, Mar 06, 2023 at 03:23:08PM +, Souza, Jose wrote:
> On Mon, 2023-03-06 at 15:16 +0100, Maarten Lankhorst wrote:
> > As a fallback if we decide not to merge the frontbuffer tracking, allow
> > i915 to keep its own implementation, and do the right thing in Xe.
> >
> > The frontbuffer
== Series Details ==
Series: drm/ttm: Change the meaning of the fields in the ttm_place structure
from pfn to bytes
URL : https://patchwork.freedesktop.org/series/114706/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/114706/revisions/1/mbox/ not
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage
URL : https://patchwork.freedesktop.org/series/114608/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12805_full -> Patchwork_114608v1_full
Summary
On Thu, 02 Mar 2023, Ville Syrjälä wrote:
> On Thu, Mar 02, 2023 at 06:49:36PM +0200, Jani Nikula wrote:
>> Split out the RPS parts so they can be conditionally compiled out later.
>>
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: Ville Syrjälä
Thanks, pushed to din.
BR,
Jani.
>
>> ---
>>
On Mon, 27 Feb 2023, Stanislav Lisovskiy wrote:
> Display to communicate display pipe count/CDCLK/voltage configuration
> to Pcode for more accurate power accounting for gen >= 12.
> Existing sequence is only sending the voltage value to the Pcode.
> Adding new sequence with current cdclk
== Series Details ==
Series: drm/i915/sseu: fix max_subslices array-index-out-of-bounds access (rev4)
URL : https://patchwork.freedesktop.org/series/114199/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12794_full -> Patchwork_114199v4_full
== Series Details ==
Series: Enable YCbCr420 format for VDSC (rev2)
URL : https://patchwork.freedesktop.org/series/114246/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12805_full -> Patchwork_114246v2_full
Summary
---
On Thu, 02 Mar 2023, Rodrigo Vivi wrote:
> On Wed, Mar 01, 2023 at 03:54:18PM +0200, Jani Nikula wrote:
>> As intel_pm.[ch] used to contain much more, intel_pm.h was included in a
>> lot of places. Many of them are now unnecessary. Remove.
>>
>> Signed-off-by: Jani Nikula
>
> trusting the
On Mon, Mar 06, 2023 at 05:22:19PM +0100, Das, Nirmoy wrote:
>
> On 3/6/2023 3:21 PM, Ville Syrjälä wrote:
> > On Mon, Mar 06, 2023 at 11:28:48AM +0100, Nirmoy Das wrote:
> >> Framebuffer is exposed to userspace so set I915_BO_ALLOC_USER
> >> flag for it. This also make sure that ttm allocates
On Mon, 06 Mar 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> The most modern VBT I've observed in the wild is version 250.
> The child dev size hasn't changed since version 216, so bump
> the version number in the expected child dev size check.
>
> Signed-off-by: Ville Syrjälä
On Thu, 02 Mar 2023, Imre Deak wrote:
> On Wed, Mar 01, 2023 at 02:29:44PM +0200, Jani Nikula wrote:
>> Follow the contemporary convention for struct drm_i915_private * naming.
>>
>> Cc: Imre Deak
>> Signed-off-by: Jani Nikula
>
> Looks ok to me, on the patchset:
> Reviewed-by: Imre Deak
== Series Details ==
Series: drm/i915/debugfs: move IPS debugfs to hsw_ips.c (rev2)
URL : https://patchwork.freedesktop.org/series/114578/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12815 -> Patchwork_114578v2
Summary
From: Ville Syrjälä
The pipe needs a certain amount of time during vblank to prefill
sufficiently. If the vblank is too short the relevant watermark
level must be disabled.
Start implementing the necessary calculations to check this.
Scaler and DSC prefill are left out for now as handling those
== Series Details ==
Series: drm/i915: Set wedged if enable guc communication failed (rev2)
URL : https://patchwork.freedesktop.org/series/114366/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12803_full -> Patchwork_114366v2_full
From: Chris Wilson
There may be a disconnect between the GT used by the engine and the GT
used for the VM, requiring us to hold a wakeref on both while the GPU is
active with this request.
Signed-off-by: Chris Wilson
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/gt/intel_context.h
Beside reusing existing code, the main advantage of ref_tracker is
tracking per instance of wakeref. It allows also to catch double
put.
On the other side we lose information about the first acquire and
the last release, but the advantages outweigh it.
v2: Call ref_tracker_dir_exit() only at
From: Chris Wilson
Extract the callstack tracking of intel_runtime_pm.c into its own
utility so that that we can reuse it for other online debugging of
scoped wakerefs.
Signed-off-by: Chris Wilson
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/Kconfig.debug | 9 ++
From: Chris Wilson
Track every intel_gt_pm_get() until its corresponding release in
intel_gt_pm_put() by returning a cookie to the caller for acquire that
must be passed by on rleased. When there is an imbalance, we can see who
either tried to free a stale wakeref, or who forgot to free theirs.
Wakeref has dedicated type. Assumption it will be int
compatible forever is incorrect.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
These structs will be used by other subsystems.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 14 +++---
drivers/gpu/drm/i915/intel_runtime_pm.h | 10 +-
drivers/gpu/drm/i915/intel_wakeref.h | 4 ++--
Library can handle allocation failures. To avoid allocation warnings
__GFP_NOWARN has been added everywhere. Moreover GFP_ATOMIC has been
replaced with GFP_NOWAIT in case of stack allocation on tracker free
call.
Signed-off-by: Andrzej Hajda
---
lib/ref_tracker.c | 5 +++--
1 file changed, 3
In case one wants to show stats via debugfs.
Signed-off-by: Andrzej Hajda
---
include/linux/ref_tracker.h | 8 +++
lib/ref_tracker.c | 56 ++---
2 files changed, 56 insertions(+), 8 deletions(-)
diff --git a/include/linux/ref_tracker.h
To improve readability of ref_tracker printing following changes
have been performed:
- reports are printed per stack_handle - log is more compact,
- added display name for ref_tracker_dir,
- stack trace is printed indented, in the same printk call,
- total number of references is printed every
To have reliable detection of leaks, caller must be able to check under the same
lock both: tracked counter and the leaks. dir.lock is natural candidate for such
lock and unlocked print helper can be called with this lock taken.
As a bonus we can reuse this helper in ref_tracker_dir_exit.
This is revived patchset improving ref_tracker library and converting
i915 internal tracker to ref_tracker.
The old thread ended without consensus about small kernel allocations,
which are performed under spinlock.
I have tried to solve the problem by splitting the calls, but it results
in
On Mon, 06 Mar 2023, Ville Syrjälä wrote:
> On Wed, Mar 01, 2023 at 05:19:49PM +0200, Jani Nikula wrote:
>> Relatively few places need the DSC and DSS register definitions. Move
>> them to intel_vdsc_regs.h.
>>
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: Ville Syrjälä
Thanks, pushed to
On Wed, 01 Mar 2023, Ville Syrjälä wrote:
> On Wed, Mar 01, 2023 at 05:14:09PM +0200, Jani Nikula wrote:
>> On TGL+ the DSS control registers are at different offsets, and there's
>> one per pipe. Fix the offsets to fix dual link DSI for TGL+.
>>
>> There would be helpers for this in the DSC
On 3/6/2023 3:21 PM, Ville Syrjälä wrote:
On Mon, Mar 06, 2023 at 11:28:48AM +0100, Nirmoy Das wrote:
Framebuffer is exposed to userspace so set I915_BO_ALLOC_USER
flag for it. This also make sure that ttm allocates offset
for lmem objects.
I have no idea what that means.
Sorry for poor
On 3/6/2023 3:26 PM, Ville Syrjälä wrote:
On Mon, Mar 06, 2023 at 11:28:49AM +0100, Nirmoy Das wrote:
Move gem obj mmap code to i915_gem_object_mmap() so that
this can be used by others.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 20 ++---
== Series Details ==
Series: drm/i915/sseu: fix max_subslices array-index-out-of-bounds access (rev4)
URL : https://patchwork.freedesktop.org/series/114199/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12794_full -> Patchwork_114199v4_full
From: Ville Syrjälä
The most modern VBT I've observed in the wild is version 250.
The child dev size hasn't changed since version 216, so bump
the version number in the expected child dev size check.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
1 file
From: Ville Syrjälä
Pull the scanline_offset calculation into its own function. Might
have further use for this later with DSB scanline waits.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_vblank.c | 89 +++--
1 file changed, 48 insertions(+), 41
From: Ville Syrjälä
Move intel_crtc_update_active_timings() into intel_vblank.c
where it more properly belongs.
Also do the s/dev_priv/i915/ modernization rename while at it.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 84 --
From: Ville Syrjälä
Add some (probably overkill) locking to protect the vblank
timestamping constants updates during seamless M/N fastsets.
As everything should be naturally aligned I think the individual
pieces should probably end up updating atomically enough. So this
is only really meant to
From: Ville Syrjälä
When we change the M/N values seamlessly during a fastset we should
also update the vblank timestamping stuff to make sure the vblank
timestamp corrections/guesstimations come out exact.
Note that only crtc_clock and framedur_ns can actually end up
changing here during
On Mon, 2023-03-06 at 15:16 +0100, Maarten Lankhorst wrote:
> As a fallback if we decide not to merge the frontbuffer tracking, allow
> i915 to keep its own implementation, and do the right thing in Xe.
>
> The frontbuffer tracking for Xe is still done per-fb, while i915 can
> keep doing the
> -Original Message-
> From: Andi Shyti
> Sent: Friday, March 3, 2023 7:24 PM
> To: Sripada, Radhakrishna
> Cc: Andi Shyti ; intel-gfx@lists.freedesktop.org;
> dri-
> de...@lists.freedesktop.org; Tvrtko Ursulin ;
> Andi Shyti ; Patelczyk, Maciej
> ; Wajdeczko, Michal
>
> Subject: Re:
On Wed, Mar 01, 2023 at 05:19:49PM +0200, Jani Nikula wrote:
> Relatively few places need the DSC and DSS register definitions. Move
> them to intel_vdsc_regs.h.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c| 1 +
>
This patch uses the already existing IDR mechanism to simplify
and improve the dmabuf code.
Using 'vgpu.object_idr' directly instead of 'dmabuf_obj_list_head'
or 'dmabuf.list', because the dmabuf_obj can be found by 'idr_find'
or 'idr_for_each_entry'.
Signed-off-by: Cai Huoqing
---
v1->v2:
> -Original Message-
> From: Nicolin Chen [mailto:nicol...@nvidia.com]
> Sent: 01 March 2023 02:29
> To: Xu, Terrence
> Cc: Liu, Yi L ; Jason Gunthorpe ;
> alex.william...@redhat.com; Tian, Kevin ;
> j...@8bytes.org; robin.mur...@arm.com; coh...@redhat.com;
> eric.au...@redhat.com;
> -Original Message-
> From: Nicolin Chen [mailto:nicol...@nvidia.com]
> Sent: 02 March 2023 23:51
> To: Shameerali Kolothum Thodi
> Cc: Xu, Terrence ; Liu, Yi L ;
> Jason Gunthorpe ; alex.william...@redhat.com; Tian,
> Kevin ; j...@8bytes.org; robin.mur...@arm.com;
>
On Fri, Mar 03, 2023 at 03:06:18PM +0700, Bagas Sanjaya wrote:
> Can you please try v6.1?
It's reproducible in v6.1.9. I finally can reliably reproduce it, it
only happens when I start a VM with qemu.
Specifically adding this device to the qemu instance:
And that
On 03 3月 23 15:12:16, Zhenyu Wang wrote:
> On 2023.03.02 19:53:18 +0800, Cai Huoqing wrote:
> > This patch uses the already existing IDR mechanism to simplify
> > and improve the dmabuf code.
> >
> > Using 'vgpu.object_idr' directly instead of 'dmabuf_obj_list_head'
> > or 'dmabuf.list', because
Hey,
I can push this to drm-misc-next, I don't think a drm maintainer ack is
needed, as long as we have the acks from the amd folk for merging
through drm-misc-next.
~Maarten
On 2023-02-27 09:11, Thomas Hellström wrote:
Daniel, Dave
Ack to merge this to drm through drm-misc-next?
/Thomas
On Mon, Mar 06, 2023 at 12:54:59PM +0200, Jani Nikula wrote:
> Please file a bug at fdo gitlab:
>
> https://gitlab.freedesktop.org/drm/intel/wikis/How-to-file-i915-bugs
OK, I posted it here https://gitlab.freedesktop.org/drm/intel/-/issues/8274
Thanks,
--
Ammar Faizi
P.S:
I had to create a
This patch uses the already existing IDR mechanism to simplify
and improve the dmabuf code.
Using 'vgpu.object_idr' directly instead of 'dmabuf_obj_list_head'
or 'dmabuf.list', because the dmabuf_obj can be found by 'idr_find'
or 'idr_for_each_entry'.
Signed-off-by: Cai Huoqing
---
On 02 3月 23 19:53:18, Cai Huoqing wrote:
> This patch uses the already existing IDR mechanism to simplify
> and improve the dmabuf code.
>
> Using 'vgpu.object_idr' directly instead of 'dmabuf_obj_list_head'
> or 'dmabuf.list', because the dmabuf_obj can be found by 'idr_find'
> or
On Mon, Mar 06, 2023 at 11:28:50AM +0100, Nirmoy Das wrote:
> If stolen memory allocation fails for fbdev, the driver will
> fallback to system memory. Calculation of smem_start is wrong
> for such framebuffer objs if the platform comes with no gmadr or
> no aperture. Solve this by adding fb_mmap
== Series Details ==
Series: drm/i915/rps: split out display rps parts to a separate file
URL : https://patchwork.freedesktop.org/series/114581/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12801_full -> Patchwork_114581v1_full
On Mon, Mar 06, 2023 at 11:28:49AM +0100, Nirmoy Das wrote:
> Move gem obj mmap code to i915_gem_object_mmap() so that
> this can be used by others.
>
> Signed-off-by: Nirmoy Das
> ---
> drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 20 ++---
>
On Mon, Mar 06, 2023 at 11:28:48AM +0100, Nirmoy Das wrote:
> Framebuffer is exposed to userspace so set I915_BO_ALLOC_USER
> flag for it. This also make sure that ttm allocates offset
> for lmem objects.
I have no idea what that means.
>
> Signed-off-by: Nirmoy Das
> ---
>
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