== Series Details ==
Series: drm/i915/selftest/gsc: Ensure GSC Proxy init completes before selftests
URL : https://patchwork.freedesktop.org/series/117713/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13143_full -> Patchwork_117713v1_full
On Fri, 12 May 2023 18:55:44 -0700, Umesh Nerlige Ramappa wrote:
>
> From: Tvrtko Ursulin
>
> Reserve some bits in the counter config namespace which will carry the
> tile id and prepare the code to handle this.
>
> No per tile counters have been added yet.
>
> v2:
> - Fix checkpatch issues
> -
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/mtl: Extend Wa_16014892111 to
MTL A-step
URL : https://patchwork.freedesktop.org/series/117717/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13143 -> Patchwork_117717v1
== Series Details ==
Series: drm/i915/guc/slpc: Disable rps_boost debugfs
URL : https://patchwork.freedesktop.org/series/117711/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13143_full -> Patchwork_117711v1_full
Summary
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/mtl: Extend Wa_16014892111 to
MTL A-step
URL : https://patchwork.freedesktop.org/series/117717/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
== Series Details ==
Series: Add MTL PMU support for multi-gt (rev3)
URL : https://patchwork.freedesktop.org/series/115836/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13143 -> Patchwork_115836v3
Summary
---
== Series Details ==
Series: Add MTL PMU support for multi-gt (rev3)
URL : https://patchwork.freedesktop.org/series/115836/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Add MTL PMU support for multi-gt (rev3)
URL : https://patchwork.freedesktop.org/series/115836/
State : warning
== Summary ==
Error: dim checkpatch failed
676522fb00c9 drm/i915/pmu: Support PMU for all engines
61ea4272bfb6 drm/i915/pmu: Skip sampling engines with
On Fri, 12 May 2023 18:55:43 -0700, Umesh Nerlige Ramappa wrote:
>
> From: Tvrtko Ursulin
>
> We do not want to have timers per tile and waste CPU cycles and energy via
> multiple wake-up sources, for a relatively un-important task of PMU
> sampling, so keeping a single timer works well. But we
The dg2 workaround which is used for performance tuning
is needed for Meteorlake A-step.
v2: Limit the WA for A-step
Bspec: 68331
Cc: Haridhar Kalvala
Cc: Matt Roper
Cc: Gustavo Sousa
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 4 +++-
1 file changed, 3
MTL reuses the tuning parameters for DG2. Extend the dg2
performance tuning parameters to MTL.
v2: Add DRAW_WATERMARK tuning parameter.
Bspec: 68331
Cc: Haridhar Kalvala
Cc: Matt Roper
Cc: Gustavo Sousa
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 8
== Series Details ==
Series: drm/i915/hwmon: Silence UBSAN uninitialized bool variable warning (rev2)
URL : https://patchwork.freedesktop.org/series/117591/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13143_full -> Patchwork_117591v2_full
== Series Details ==
Series: drm/i915/gvt: KVM: KVMGT fixes and page-track cleanups (rev8)
URL : https://patchwork.freedesktop.org/series/112196/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13143 -> Patchwork_112196v8
From: Tvrtko Ursulin
Reserve some bits in the counter config namespace which will carry the
tile id and prepare the code to handle this.
No per tile counters have been added yet.
v2:
- Fix checkpatch issues
- Use 4 bits for gt id in non-engine counters. Drop FIXME.
- Set MAX GTs to 4. Drop
With MTL, frequency and rc6 counters are specific to a gt. Export these
counters via gt-specific events to the user space.
v2: Review comments (Ashutosh, Tvrtko)
Signed-off-by: Umesh Nerlige Ramappa
Tvrtko Ursulin (6):
drm/i915/pmu: Support PMU for all engines
drm/i915/pmu: Skip sampling
From: Tvrtko Ursulin
Trivial prep work for full multi-tile enablement later.
Signed-off-by: Tvrtko Ursulin
Signed-off-by: Vinay Belgaumkar
Reviewed-by: Umesh Nerlige Ramappa
Signed-off-by: Umesh Nerlige Ramappa
---
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 4 ++--
From: Tvrtko Ursulin
Given how the metrics are already exported, we also need to run sampling
over engines from all GTs.
Problem of GT frequencies is left for later.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Umesh Nerlige Ramappa
Signed-off-by: Umesh Nerlige Ramappa
---
From: Tvrtko Ursulin
Start exporting frequency and RC6 counters from all tiles.
Existing counters keep their names and config values and new one use the
namespace added in the previous patch, with the "-gtN" added to their
names.
Interrupts counter is an odd one off. Because it is the global
From: Tvrtko Ursulin
As we have more and more engines do not waste time sampling the ones no-
one is monitoring.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Umesh Nerlige Ramappa
Signed-off-by: Umesh Nerlige Ramappa
---
drivers/gpu/drm/i915/i915_pmu.c | 3 +++
1 file changed, 3 insertions(+)
From: Tvrtko Ursulin
We do not want to have timers per tile and waste CPU cycles and energy via
multiple wake-up sources, for a relatively un-important task of PMU
sampling, so keeping a single timer works well. But we also do not want
the first GT which goes idle to turn off the timer.
Add
== Series Details ==
Series: drm/i915/gvt: KVM: KVMGT fixes and page-track cleanups (rev8)
URL : https://patchwork.freedesktop.org/series/112196/
State : warning
== Summary ==
Error: dim checkpatch failed
7ddfeb73c37a drm/i915/gvt: Verify pfn is "valid" before dereferencing "struct
page"
== Series Details ==
Series: drm/i915/selftest/gsc: Ensure GSC Proxy init completes before selftests
URL : https://patchwork.freedesktop.org/series/117713/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13143 -> Patchwork_117713v1
== Series Details ==
Series: drm/i915/selftest/gsc: Ensure GSC Proxy init completes before selftests
URL : https://patchwork.freedesktop.org/series/117713/
State : warning
== Summary ==
Error: dim checkpatch failed
b97349ae2b23 drm/i915/selftest/gsc: Ensure GSC Proxy init completes before
On Fri, 12 May 2023 13:57:59 -0700, Umesh Nerlige Ramappa wrote:
>
> On Fri, May 12, 2023 at 11:56:18AM +0100, Tvrtko Ursulin wrote:
> >
> > On 12/05/2023 02:08, Dixit, Ashutosh wrote:
> >> On Fri, 05 May 2023 17:58:15 -0700, Umesh Nerlige Ramappa wrote:
> >>>
> >>> From: Tvrtko Ursulin
> >>>
>
== Series Details ==
Series: drm/i915/tc: Add a workaround for an IOM/TCSS firmware hang issue
(rev13)
URL : https://patchwork.freedesktop.org/series/117004/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13143_full -> Patchwork_117004v13_full
== Series Details ==
Series: drm/i915/guc/slpc: Disable rps_boost debugfs
URL : https://patchwork.freedesktop.org/series/117711/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13143 -> Patchwork_117711v1
Summary
---
On Fri, 2023-04-28 at 11:58 -0700, Ceraolo Spurio, Daniele wrote:
> Before we add the second step of the MTL HuC auth (via GSC), we need to
> have the ability to differentiate between them. To do so, the huc
> authentication check is duplicated for GuC and GSC auth, with meu
> binaries being
== Series Details ==
Series: drm/i915/guc/slpc: Disable rps_boost debugfs
URL : https://patchwork.freedesktop.org/series/117711/
State : warning
== Summary ==
Error: dim checkpatch failed
0cd47cc8985c drm/i915/guc/slpc: Disable rps_boost debugfs
-:11: WARNING:COMMIT_LOG_USE_LINK: Unknown link
On Fri, 12 May 2023 16:56:03 -0700, Vinay Belgaumkar wrote:
>
Hi Vinay,
> rps_boost debugfs shows host turbo related info. This is not valid
> when SLPC is enabled.
A couple of thoughts about this. It appears people are know only about
rps_boost_info and don't know about guc_slpc_info? So:
a.
On Tue, 2023-05-02 at 08:27 -0700, Ceraolo Spurio, Daniele wrote:
> The new binaries that support the 2-step authentication have contain the
> legacy-style binary, which we can use for loading the HuC via DMA. To
> find out where this is located in the image, we need to parse the meu
> manifest of
Get/put references to KVM when a page-track notifier is (un)registered
instead of relying on the caller to do so. Forcing the caller to do the
bookkeeping is unnecessary and adds one more thing for users to get
wrong, e.g. see commit 9ed1fdee9ee3 ("drm/i915/gvt: Get reference to KVM
iff
Bug the VM if something attempts to write-track a gfn, but write-tracking
isn't enabled. The VM is doomed (and KVM has an egregious bug) if KVM or
KVMGT wants to shadow guest page tables but can't because write-tracking
isn't enabled.
Signed-off-by: Sean Christopherson
---
Drop "support" for multiple page-track modes, as there is no evidence
that array-based and refcounted metadata is the optimal solution for
other modes, nor is there any evidence that other use cases, e.g. for
access-tracking, will be a good fit for the page-track machinery in
general.
E.g. one
Open code gpa_to_gfn() in kvmgt_page_track_write() and drop KVMGT's
dependency on kvm_host.h, i.e. include only kvm_page_track.h. KVMGT
assumes "gfn == gpa >> PAGE_SHIFT" all over the place, including a few
lines below in the same function with the same gpa, i.e. there's no
reason to use KVM's
Refactor KVM's exported/external page-track, a.k.a. write-track, APIs
to take only the gfn and do the required memslot lookup in KVM proper.
Forcing users of the APIs to get the memslot unnecessarily bleeds
KVM internals into KVMGT and complicates usage of the APIs.
No functional change intended.
Disable the page-track notifier code at compile time if there are no
external users, i.e. if CONFIG_KVM_EXTERNAL_WRITE_TRACKING=n. KVM itself
now hooks emulated writes directly instead of relying on the page-track
mechanism.
Provide a stub for "struct kvm_page_track_notifier_node" so that
When adding/removing gfns to/from write-tracking, assert that mmu_lock
is held for write, and that either slots_lock or kvm->srcu is held.
mmu_lock must be held for write to protect gfn_write_track's refcount,
and SRCU or slots_lock must be held to protect the memslot itself.
Tested-by: Yan Zhao
Bury the declaration of the page-track helpers that are intended only for
internal KVM use in a "private" header. In addition to guarding against
unwanted usage of the internal-only helpers, dropping their definitions
avoids exposing other structures that should be KVM-internal, e.g. for
Rename the page-track APIs to capture that they're all about tracking
writes, now that the facade of supporting multiple modes is gone.
Opportunstically replace "slot" with "gfn" in anticipation of removing
the @slot param from the external APIs.
No functional change intended.
Signed-off-by:
From: Yan Zhao
Add a new page-track hook, track_remove_region(), that is called when a
memslot DELETE operation is about to be committed. The "remove" hook
will be used by KVMGT and will effectively replace the existing
track_flush_slot() altogether now that KVM itself doesn't rely on the
Disallow moving memslots if the VM has external page-track users, i.e. if
KVMGT is being used to expose a virtual GPU to the guest, as KVMGT doesn't
correctly handle moving memory regions.
Note, this is potential ABI breakage! E.g. userspace could move regions
that aren't shadowed by KVMGT
From: Yan Zhao
Remove ->track_remove_slot(), there are no longer any users and it's
unlikely a "flush" hook will ever be the correct API to provide to an
external page-track user.
Cc: Zhenyu Wang
Suggested-by: Sean Christopherson
Signed-off-by: Yan Zhao
Signed-off-by: Sean Christopherson
From: Yan Zhao
Switch from the poorly named and flawed ->track_flush_slot() to the newly
introduced ->track_remove_region(). From KVMGT's perspective, the two
hooks are functionally equivalent, the only difference being that
->track_remove_region() is called only when KVM is 100% certain the
When handling a slot "flush", don't call back into KVM to drop write
protection for gfns in the slot. Now that KVM rejects attempts to move
memory slots while KVMGT is attached, the only time a slot is "flushed"
is when it's being removed, i.e. the memslot and all its write-tracking
metadata is
Don't use the generic page-track mechanism to handle writes to guest PTEs
in KVM's MMU. KVM's MMU needs access to information that should not be
exposed to external page-track users, e.g. KVM needs (for some definitions
of "need") the vCPU to query the current paging mode, whereas external
users,
Drop @vcpu from KVM's ->track_write() hook provided for external users of
the page-track APIs now that KVM itself doesn't use the page-track
mechanism.
Reviewed-by: Yan Zhao
Signed-off-by: Sean Christopherson
---
arch/x86/include/asm/kvm_page_track.h | 5 ++---
arch/x86/kvm/mmu/page_track.c
Drop intel_vgpu_reset_gtt() as it no longer has any callers. In addition
to eliminating dead code, this eliminates the last possible scenario where
__kvmgt_protect_table_find() can be reached without holding vgpu_lock.
Requiring vgpu_lock to be held when calling __kvmgt_protect_table_find()
will
Call kvm_mmu_zap_all_fast() directly when flushing a memslot instead of
bouncing through the page-track mechanism. KVM (unfortunately) needs to
zap and flush all page tables on memslot DELETE/MOVE irrespective of
whether KVM is shadowing guest page tables.
This will allow changing KVM to
Use vgpu_lock instead of KVM's mmu_lock to protect accesses to the hash
table used to track which gfns are write-protected when shadowing the
guest's GTT, and hoist the acquisition of vgpu_lock from
intel_vgpu_page_track_handler() out to its sole caller,
kvmgt_page_track_write().
This fixes a bug
Move x86's implementation of kvm_arch_flush_shadow_{all,memslot}() into
mmu.c, and make kvm_mmu_zap_all() static as it was globally visible only
for kvm_arch_flush_shadow_all(). This will allow refactoring
kvm_arch_flush_shadow_memslot() to call kvm_mmu_zap_all() directly without
having to expose
Now that gvt_pin_guest_page() explicitly verifies the pinned PFN is a
transparent hugepage page, don't use KVM's gfn_to_pfn() to pre-check if a
2MiB GTT entry is possible and instead just try to map the GFN with a 2MiB
entry. Using KVM to query pfn that is ultimately managed through VFIO is
odd,
Use an "unsigned long" instead of an "int" when iterating over the gfns
in a memslot. The number of pages in the memslot is tracked as an
"unsigned long", e.g. KVMGT could theoretically break if a KVM memslot
larger than 16TiB were deleted (2^32 * 4KiB).
Reviewed-by: Yan Zhao
Signed-off-by:
Bail from ppgtt_populate_shadow_entry() if an unexpected GTT entry type
is encountered instead of subtly falling through to the common "direct
shadow" path. Eliminating the default/error path's reliance on the common
handling will allow hoisting intel_gvt_dma_map_guest_page() into the case
Move the check that a vGPU is attacked from is_2MB_gtt_possible() to its
sole caller, ppgtt_populate_shadow_entry(). All of the paths in
ppgtt_populate_shadow_entry() eventually check for attachment by way of
intel_gvt_dma_map_guest_page(), but explicitly checking can avoid
unnecessary work and
Put the struct page reference acquired by gfn_to_pfn(), KVM's API is that
the caller is ultimately responsible for dropping any reference.
Note, kvm_release_pfn_clean() ensures the pfn is actually a refcounted
struct page before trying to put any references.
Fixes: b901b252b6cf ("drm/i915/gvt:
When shadowing a GTT entry with a 2M page, verify that the pfns are
contiguous, not just that the struct page pointers are contiguous. The
memory map is virtual contiguous if "CONFIG_FLATMEM=y ||
CONFIG_SPARSEMEM_VMEMMAP=y", but not for "CONFIG_SPARSEMEM=y &&
CONFIG_SPARSEMEM_VMEMMAP=n", so
From: Yan Zhao
Currently intel_gvt_is_valid_gfn() is called in two places:
(1) shadowing guest GGTT entry
(2) shadowing guest PPGTT leaf entry,
which was introduced in commit cc753fbe1ac4
("drm/i915/gvt: validate gfn before set shadow page entry").
However, now it's not necessary to call this
Check that the pfn found by gfn_to_pfn() is actually backed by "struct
page" memory prior to retrieving and dereferencing the page. KVM
supports backing guest memory with VM_PFNMAP, VM_IO, etc., and so
there is no guarantee the pfn returned by gfn_to_pfn() has an associated
"struct page".
Fixes:
Fix a variety of found-by-inspection bugs in KVMGT, and overhaul KVM's
page-track APIs to provide a leaner and cleaner interface. The motivation
for this series is to (significantly) reduce the number of KVM APIs that
KVMGT uses, with a long-term goal of making all kvm_host.h headers
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation (rev8)
URL : https://patchwork.freedesktop.org/series/116870/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13143 -> Patchwork_116870v8
Summary
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: e922ba281a8d84f640d8c8e18a385d032c19e185 Add linux-next specific
files for 20230512
Warning reports:
https://lore.kernel.org/oe-kbuild-all/202305130809.sjnm01fl-...@intel.com
Warning
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation (rev8)
URL : https://patchwork.freedesktop.org/series/116870/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: series starting with [1/4] drm/i915/dpll: drop a useless
I915_STATE_WARN_ON() (rev2)
URL : https://patchwork.freedesktop.org/series/117685/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13143_full -> Patchwork_117685v2_full
On MTL, if the GSC Proxy init flows haven't completed, submissions to the
GSC engine will fail. Those init flows are dependent on the mei's
gsc_proxy component that is loaded in parallel with i915 and a
worker that could potentially start after i915 driver init is done.
That said, all subsytems
rps_boost debugfs shows host turbo related info. This is not valid
when SLPC is enabled. guc_slpc_info already shows the number of boosts.
Add num_waiters there as well and disable rps_boost when SLPC is
enabled.
Bug: https://gitlab.freedesktop.org/drm/intel/-/issues/7632
Signed-off-by: Vinay
On Fri, May 12, 2023 at 04:20:19PM -0700, Dixit, Ashutosh wrote:
On Fri, 12 May 2023 15:44:00 -0700, Umesh Nerlige Ramappa wrote:
On Fri, May 12, 2023 at 03:29:03PM -0700, Dixit, Ashutosh wrote:
> On Fri, 05 May 2023 17:58:14 -0700, Umesh Nerlige Ramappa wrote:
>>
>
> Hi Umesh/Tvrtko,
>
>>
> On 2023-05-10 15:14:16, Andi Shyti wrote:
>> Hi,
>>
>> On Tue, May 09, 2023 at 09:59:42AM -0700, fei.y...@intel.com wrote:
>>> From: Fei Yang
>>>
>>> To comply with the design that buffer objects shall have immutable
>>> cache setting through out their life cycle, {set, get}_caching ioctl's
>>>
From: Fei Yang
The design is to keep Buffer Object's caching policy immutable through
out its life cycle. This patch ends the support for set caching ioctl
from MTL onward. While doing that we also set BO's to be 1-way coherent
at creation time because GPU is no longer automatically snooping CPU
From: Fei Yang
To comply with the design that buffer objects shall have immutable
cache setting through out their life cycle, {set, get}_caching ioctl's
are no longer supported from MTL onward. With that change caching
policy can only be set at object creation time. The current code
applies a
From: Fei Yang
The first three patches in this series are taken from
https://patchwork.freedesktop.org/series/116868/
These patches are included here because the last patch
has dependency on the pat_index refactor.
This series is focusing on uAPI changes,
1. end support for set caching ioctl
On Fri, 12 May 2023 15:44:00 -0700, Umesh Nerlige Ramappa wrote:
>
> On Fri, May 12, 2023 at 03:29:03PM -0700, Dixit, Ashutosh wrote:
> > On Fri, 05 May 2023 17:58:14 -0700, Umesh Nerlige Ramappa wrote:
> >>
> >
> > Hi Umesh/Tvrtko,
> >
> >> From: Tvrtko Ursulin
> >>
> >> We do not want to have
On Wed, May 10, 2023 at 02:58:11PM -0700, Matt Atwood wrote:
> From: Tilak Tangudu
>
> Wa_14011282866 applies to RKL, ADL-S, ADL-P and TGL.
Wa_14011282866 isn't a valid workaround number.
>
> Allocate buffer pinned to GGTT and add WA to restore sampler power
> context.
>
> Bspec: 46247
>
>
On Fri, May 12, 2023 at 03:29:03PM -0700, Dixit, Ashutosh wrote:
On Fri, 05 May 2023 17:58:14 -0700, Umesh Nerlige Ramappa wrote:
Hi Umesh/Tvrtko,
From: Tvrtko Ursulin
We do not want to have timers per tile and waste CPU cycles and energy via
multiple wake-up sources, for a relatively
On Fri, May 12, 2023 at 01:57:59PM -0700, Umesh Nerlige Ramappa wrote:
On Fri, May 12, 2023 at 11:56:18AM +0100, Tvrtko Ursulin wrote:
On 12/05/2023 02:08, Dixit, Ashutosh wrote:
On Fri, 05 May 2023 17:58:15 -0700, Umesh Nerlige Ramappa wrote:
From: Tvrtko Ursulin
Reserve some bits in the
On Fri, 05 May 2023 17:58:14 -0700, Umesh Nerlige Ramappa wrote:
>
Hi Umesh/Tvrtko,
> From: Tvrtko Ursulin
>
> We do not want to have timers per tile and waste CPU cycles and energy via
> multiple wake-up sources, for a relatively un-important task of PMU
> sampling, so keeping a single timer
== Series Details ==
Series: drm/i915/hwmon: Silence UBSAN uninitialized bool variable warning (rev2)
URL : https://patchwork.freedesktop.org/series/117591/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13143 -> Patchwork_117591v2
== Series Details ==
Series: drm/i915/tc: Add a workaround for an IOM/TCSS firmware hang issue
(rev13)
URL : https://patchwork.freedesktop.org/series/117004/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13143 -> Patchwork_117004v13
== Series Details ==
Series: drm/i915/tc: Add a workaround for an IOM/TCSS firmware hang issue
(rev13)
URL : https://patchwork.freedesktop.org/series/117004/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/tc: Add a workaround for an IOM/TCSS firmware hang issue
(rev13)
URL : https://patchwork.freedesktop.org/series/117004/
State : warning
== Summary ==
Error: dim checkpatch failed
60bf22a36d66 drm/i915: Fix PIPEDMC disabling for a bigjoiner configuration
On Fri, May 12, 2023 at 11:56:18AM +0100, Tvrtko Ursulin wrote:
On 12/05/2023 02:08, Dixit, Ashutosh wrote:
On Fri, 05 May 2023 17:58:15 -0700, Umesh Nerlige Ramappa wrote:
From: Tvrtko Ursulin
Reserve some bits in the counter config namespace which will carry the
tile id and prepare the
== Series Details ==
Series: series starting with [1/4] drm/i915/dpll: drop a useless
I915_STATE_WARN_ON() (rev2)
URL : https://patchwork.freedesktop.org/series/117685/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13143 -> Patchwork_117685v2
== Series Details ==
Series: series starting with [1/4] drm/i915/dpll: drop a useless
I915_STATE_WARN_ON() (rev2)
URL : https://patchwork.freedesktop.org/series/117685/
State : warning
== Summary ==
Error: dim checkpatch failed
c7e4ac68951f drm/i915/dpll: drop a useless I915_STATE_WARN_ON()
Quoting Govindapillai, Vinod (2023-05-11 20:24:55)
>Hello
>
>Thanks for the comments. Pls see some inline replies..
>
>On Thu, 2023-04-27 at 17:24 -0300, Gustavo Sousa wrote:
>> Quoting Vinod Govindapillai (2023-04-27 12:00:15)
>> > From: Mika Kahola
>> >
>> > Display14 introduces a new way to
On Fri, 12 May 2023 02:33:33 -0700, Andi Shyti wrote:
>
Hi Andi,
>
> On Thu, May 11, 2023 at 10:43:30AM -0700, Dixit, Ashutosh wrote:
> > On Wed, 10 May 2023 11:36:06 -0700, Ashutosh Dixit wrote:
> > >
> > > Loading i915 on UBSAN enabled kernels (CONFIG_UBSAN/CONFIG_UBSAN_BOOL)
> > > causes the
Loading i915 on UBSAN enabled kernels (CONFIG_UBSAN/CONFIG_UBSAN_BOOL)
causes the following warning:
UBSAN: invalid-load in drivers/gpu/drm/i915/gt/uc/intel_uc.c:558:2
load of value 255 is not a valid value for type '_Bool'
Call Trace:
dump_stack_lvl+0x57/0x7d
ubsan_epilogue+0x5/0x40
On Fri, 12 May 2023 11:53:32 -0700, Umesh Nerlige Ramappa wrote:
>
> On Fri, May 12, 2023 at 10:08:58AM -0700, Dixit, Ashutosh wrote:
> > On Fri, 12 May 2023 03:57:35 -0700, Tvrtko Ursulin wrote:
> >>
> >>
> >> On 11/05/2023 19:57, Dixit, Ashutosh wrote:
> >> > On Fri, 05 May 2023 17:58:16 -0700,
If the output on a DP-alt link with its sink disconnected is kept
enabled for too long (about 20 sec), then some IOM/TCSS firmware timeout
will cause havoc on the PCI bus, at least for other GFX devices on it
which will stop powering up. Since user space is not guaranteed to do a
disabling modeset
Call the TypeC port flush_work and cleanup handlers without the modeset
locks held. These don't require the locks, as the work takes - as it
should be able to at any point in time - any locks it needs and by the
time cleanup is called and after cleanup returns the encoder is not in
use.
This is
On 2023-05-10 15:14:16, Andi Shyti wrote:
> Hi,
>
> On Tue, May 09, 2023 at 09:59:42AM -0700, fei.y...@intel.com wrote:
> > From: Fei Yang
> >
> > To comply with the design that buffer objects shall have immutable
> > cache setting through out their life cycle, {set, get}_caching ioctl's
> >
On Fri, May 12, 2023 at 10:08:58AM -0700, Dixit, Ashutosh wrote:
On Fri, 12 May 2023 03:57:35 -0700, Tvrtko Ursulin wrote:
On 11/05/2023 19:57, Dixit, Ashutosh wrote:
> On Fri, 05 May 2023 17:58:16 -0700, Umesh Nerlige Ramappa wrote:
>>
>
> One drive-by comment:
>
>> diff --git
On Fri, 12 May 2023, Gustavo Sousa wrote:
> Quoting Jani Nikula (2023-05-12 07:23:10)
>>Split (non-hotplug) display irq handling out of i915_irq.[ch] into
>>display/intel_display_irq.[ch].
>>
>>v2:
>>- Rebase
>>- Preserve [I915_MAX_PIPES] in functions (kernel test robot)
>>
>>Signed-off-by: Jani
On Fri, 12 May 2023, Rodrigo Vivi wrote:
> On Fri, May 12, 2023 at 02:04:44PM +0300, Jani Nikula wrote:
>> Add i915 parameter to I915_STATE_WARN() and use device based logging.
>>
>> Done using cocci + hand edited where there was no i915 local variable
>> ready.
>>
>> Signed-off-by: Jani Nikula
Add i915 parameter to I915_STATE_WARN() and use device based logging.
Done using cocci + hand edited where there was no i915 local variable
ready.
v2: avoid null deref in verify_connector_state()
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/g4x_dp.c
On 5/10/2023 21:39, Patchwork wrote:
Project List - Patchwork *Patch Details*
*Series:* drm/i1915/guc: Fix probe injection CI failures after recent
change
*URL:* https://patchwork.freedesktop.org/series/117600/
*State:*failure
*Details:*
== Series Details ==
Series: drm/i915/bios: add helper for reading SPI (rev3)
URL : https://patchwork.freedesktop.org/series/103480/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13142_full -> Patchwork_103480v3_full
== Series Details ==
Series: drm/i915/mtl: Fix expected reg value for Thunderbolt PLL disabling
(rev2)
URL : https://patchwork.freedesktop.org/series/117690/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13142 -> Patchwork_117690v2
On Fri, 12 May 2023 03:57:35 -0700, Tvrtko Ursulin wrote:
>
>
> On 11/05/2023 19:57, Dixit, Ashutosh wrote:
> > On Fri, 05 May 2023 17:58:16 -0700, Umesh Nerlige Ramappa wrote:
> >>
> >
> > One drive-by comment:
> >
> >> diff --git a/drivers/gpu/drm/i915/i915_pmu.c
> >>
On Fri, May 12, 2023 at 02:14:19PM +0300, Andy Shevchenko wrote:
On Mon, May 08, 2023 at 10:14:02PM -0700, Lucas De Marchi wrote:
Add GENMASK_U32(), GENMASK_U16() and GENMASK_U8() macros to create
masks for fixed-width types and also the corresponding BIT_U32(),
BIT_U16() and BIT_U8().
Why?
Hi Thomas,
kernel test robot noticed the following build errors:
[auto build test ERROR on 451e49cfbaa90720149e63f4fa9c7824013c783d]
url:
https://github.com/intel-lab-lkp/linux/commits/Thomas-Zimmermann/drm-armada-Use-regular-fbdev-I-O-helpers/20230512-164432
base
== Series Details ==
Series: drm/i915/bios: add helper for reading SPI (rev3)
URL : https://patchwork.freedesktop.org/series/103480/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13142 -> Patchwork_103480v3
Summary
---
1 - 100 of 192 matches
Mail list logo
