On Fri, 2023-05-05 at 09:04 -0700, Ceraolo Spurio, Daniele wrote:
alan: snip
> +int intel_gsc_fw_get_binary_info(struct intel_uc_fw *gsc_fw, const void
> *data, size_t size)
> +{
alan:snip
> + /*
> + * The GSC binary starts with the pointer layout, which contains the
> + *
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: cf09e328589a2ed7f6c8d90f2edb697fb4f8a96b Add linux-next specific
files for 20230524
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202305240732.wucsrnaj-...@intel.com
https
> From: Alex Williamson
> Sent: Wednesday, May 24, 2023 11:32 PM
>
> On Wed, 24 May 2023 02:12:14 +
> "Liu, Yi L" wrote:
>
> > > From: Alex Williamson
> > > Sent: Tuesday, May 23, 2023 11:50 PM
> > >
> > > On Tue, 23 May 2023 01:20:17 +
> > > "Liu, Yi L" wrote:
> > >
> > > > > From:
Reviewed-by: Sui Jingfeng
On 2023/5/24 17:21, Thomas Zimmermann wrote:
Implement dedicated fbdev helpers for framebuffer I/O instead
of using DRM's helpers. Use an fbdev generator macro for
deferred I/O to create the callbacks. Fbdev-generic was the
only caller of the DRM helpers, so remove
== Series Details ==
Series: mtl: add support for pmdemand (rev8)
URL : https://patchwork.freedesktop.org/series/116949/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13187 -> Patchwork_116949v8
Summary
---
== Series Details ==
Series: mtl: add support for pmdemand (rev8)
URL : https://patchwork.freedesktop.org/series/116949/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: mtl: add support for pmdemand (rev8)
URL : https://patchwork.freedesktop.org/series/116949/
State : warning
== Summary ==
Error: dim checkpatch failed
5bb5de9f24d5 drm/i915: fix the derating percentage for MTL
9108f2b8ba26 drm/i915: update the QGV point frequency
== Series Details ==
Series: drm/i915/pmu: couple of cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/118225/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13187 -> Patchwork_118225v2
Summary
---
From: Mika Kahola
MTL introduces a new way to instruct the PUnit with
power and bandwidth requirements of DE. Add the functionality
to program the registers and handle waits using interrupts.
The current wait time for timeouts is programmed for 10 msecs to
factor in the worst case scenarios.
>From MTL onwards, we need to find the best QGV point based on
the required data rate and pass the peak BW of that point to
the punit to lock the corresponding QGV point.
Bspec: 64636
Signed-off-by: Vinod Govindapillai
Reviewed-by: Stanislav Lisovskiy
---
MTL uses the peak BW of a QGV point to lock the required QGV
point instead of the QGV index. Instead of passing the deratedbw
of the selected bw_info, return the index to the selected
bw_info so that either deratedbw or peakbw can be used based on
the platform.
v2: use idx to store index returned
Extract intel_bw_check_qgv_points() from intel_bw_atomic_check
to facilitate future platform variations in handling SAGV
configurations.
Signed-off-by: Vinod Govindapillai
Reviewed-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/display/intel_bw.c | 235 +---
1 file
pmdemand support patches for MTL
SAGV configuration support for MTL
v2: added one missing patch in the previous version
v3: chekcpatch warning fixes
update index handling for the icl/tgl QGV point handling
program pmdemand code simplified
v4: update to debufs and pipe values pmdemand
In MTL onwards, pcode locks the GV point based on the peak BW
of a QGV point. So store the peak BW of all the QGV points.
v2: use DIV_ROUND_CLOSEST() for the peakBW calculation
Bspec: 64636
Signed-off-by: Vinod Govindapillai
Reviewed-by: Stanislav Lisovskiy
---
>From MTL onwwards, pcode locks the QGV point based on peak BW of
the intended QGV point passed by the driver. So the peak BW
calculation must match the value expected by the pcode. Update
the calculations as per the Bspec.
v2: use DIV_ROUND_* macro for the calculations (Ville)
v3: Use only
Follow the values from bspec for the percentage overhead for
efficiency in MTL BW calculations.
Bspec: 64631
Signed-off-by: Vinod Govindapillai
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
== Series Details ==
Series: drm/i915/pmu: couple of cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/118225/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation (rev12)
URL : https://patchwork.freedesktop.org/series/116870/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13187 -> Patchwork_116870v12
== Series Details ==
Series: drm/i915: Fix clang -Wimplicit-fallthrough in
intel_async_flip_check_hw()
URL : https://patchwork.freedesktop.org/series/118311/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13187 -> Patchwork_118311v1
On Wed, 24 May 2023 10:53:20 -0700, Tvrtko Ursulin wrote:
>
Hi Tvrtko,
> On 24/05/2023 18:38, Dixit, Ashutosh wrote:
> > On Wed, 24 May 2023 04:38:18 -0700, Tvrtko Ursulin wrote:
> >> On 23/05/2023 16:19, Ashutosh Dixit wrote:
> >>> No functional changes but we can remove some unsightly index
On Wed, 24 May 2023 02:12:31 -0700, Andrzej Hajda wrote:
>
Hi Andrzej,
> On 23.05.2023 17:19, Ashutosh Dixit wrote:
> > pmu_needs_timer() keeps the timer running even when GT is parked,
> > ostensibly to sample requested/actual frequencies. However
> > frequency_sample() has the following:
> >
>
== Series Details ==
Series: drm/i915: Fix clang -Wimplicit-fallthrough in
intel_async_flip_check_hw()
URL : https://patchwork.freedesktop.org/series/118311/
State : warning
== Summary ==
Error: dim checkpatch failed
e13a550c56f5 drm/i915: Fix clang -Wimplicit-fallthrough in
No functional changes but we can remove some unsightly index computation
and read/write functions if we convert the PMU sample array from a
one-dimensional to a two-dimensional array.
v2: Retain read/store helpers (Tvrtko)
Suggested-by: Tvrtko Ursulin
Reviewed-by: Andrzej Hajda
Reviewed-by:
pmu_needs_timer() keeps the timer running even when GT is parked,
ostensibly to sample requested/actual frequencies. However
frequency_sample() has the following:
/* Report 0/0 (actual/requested) frequency while parked. */
if (!intel_gt_pm_get_if_awake(gt))
return;
Cc: Andrzej Hajda
Cc: Tvrtko Ursulin
Signed-off-by: Ashutosh Dixit
Ashutosh Dixit (2):
drm/i915/pmu: Turn off the timer to sample frequencies when GT is
parked
drm/i915/pmu: Make PMU sample array two-dimensional
drivers/gpu/drm/i915/i915_pmu.c | 32
== Series Details ==
Series: drm/i915/mtl: Reset only one lane in case of MFD
URL : https://patchwork.freedesktop.org/series/118308/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13187 -> Patchwork_118308v1
Summary
---
== Series Details ==
Series: drm/i915/mtl: Reset only one lane in case of MFD
URL : https://patchwork.freedesktop.org/series/118308/
State : warning
== Summary ==
Error: dim checkpatch failed
e45308760a9a drm/i915/mtl: Reset only one lane in case of MFD
-:6: WARNING:COMMIT_LOG_LONG_LINE:
Hi,
I have just tested this patch on my i3-8100@3.6Ghz cpu + h110
motherboard with fbtest:
Benchmarking... 10x10 squares: 26.44 Mpixels/s
Benchmarking... 20x20 squares: 52.54 Mpixels/s
Benchmarking... 50x50 squares: 128.13 Mpixels/s
Benchmarking... 100x100 squares: 252.21 Mpixels/s
Hi Vinod,
Thanks a lot for updating the logic for the max port clock and active
phys. I believe we are on the right track. I think they still need some
tweaks and I provided comments inline.
Quoting Vinod Govindapillai (2023-05-24 09:41:24-03:00)
>From: Mika Kahola
>
>MTL introduces a new way
== Series Details ==
Series: DSC misc fixes (rev2)
URL : https://patchwork.freedesktop.org/series/117662/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13187 -> Patchwork_117662v2
Summary
---
**SUCCESS**
No
== Series Details ==
Series: drm/i915: Init DDI ports based on port_mask (rev2)
URL : https://patchwork.freedesktop.org/series/117641/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/117641/revisions/2/mbox/ not
applied
Applying: drm/i915: Remove
== Series Details ==
Series: DSC misc fixes (rev2)
URL : https://patchwork.freedesktop.org/series/117662/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: DSC misc fixes (rev2)
URL : https://patchwork.freedesktop.org/series/117662/
State : warning
== Summary ==
Error: dim checkpatch failed
b10a4676a2aa drm/i915/dp: Consider output_format while computing dsc bpp
dbccd6cff618 drm/i915/dp_mst: Use output_format to get
Hi,
we love your patch:
On 2023/5/24 17:21, Thomas Zimmermann wrote:
For framebuffers in I/O and system memory, add macros that set
struct fb_ops to the respective callback functions.
For deferred I/O, add macros that generate callback functions with
damage handling. Add initializer macros
Reviewed-by: Sui Jingfeng
On 2023/5/24 17:21, Thomas Zimmermann wrote:
Many fbdev drivers use the same set of fb_ops helpers. Add Kconfig
options to select them at once. This will help with making DRM's
fbdev emulation code more modular, but can also be used to simplify
fbdev's driver
== Series Details ==
Series: mtl: add support for pmdemand (rev7)
URL : https://patchwork.freedesktop.org/series/116949/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13187 -> Patchwork_116949v7
Summary
---
== Series Details ==
Series: mtl: add support for pmdemand (rev7)
URL : https://patchwork.freedesktop.org/series/116949/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: mtl: add support for pmdemand (rev7)
URL : https://patchwork.freedesktop.org/series/116949/
State : warning
== Summary ==
Error: dim checkpatch failed
e63632622f52 drm/i915: fix the derating percentage for MTL
b3c1ee53dae8 drm/i915: update the QGV point frequency
Tested-by: Sui Jingfeng
This version works fine, I have tested it On LoongArch with
drm/loongson(v14) as it is most handy for me.
Also because it using fbdev-generic. fbdev of IGT report no error. Then
I run fbtest from geert[1],
Before apply your patch:
Benchmarking... 10x10 squares:
On Mon, 22 May 2023 04:57:51 -0700
Yi Liu wrote:
> This is the way user to invoke hot-reset for the devices opened by cdev
> interface. User should check the flag VFIO_PCI_HOT_RESET_FLAG_DEV_ID_OWNED
> in the output of VFIO_DEVICE_GET_PCI_HOT_RESET_INFO ioctl before doing
> hot-reset for cdev
From: Fei Yang
To comply with the design that buffer objects shall have immutable
cache setting through out their life cycle, {set, get}_caching ioctl's
are no longer supported from MTL onward. With that change caching
policy can only be set at object creation time. The current code
applies a
From: Fei Yang
This series introduce a new extension for GEM_CREATE,
1. end support for set caching ioctl [PATCH 1/2]
2. add set_pat extension for gem_create [PATCH 2/2]
v2: drop one patch that was merged separately
commit 341ad0e8e254 ("drm/i915/mtl: Add PTE encode function")
v3: rebased
On Mon, 22 May 2023 04:57:50 -0700
Yi Liu wrote:
> This allows VFIO_DEVICE_GET_PCI_HOT_RESET_INFO ioctl use the iommufd_ctx
> of the cdev device to check the ownership of the other affected devices.
>
> When VFIO_DEVICE_GET_PCI_HOT_RESET_INFO is called on an IOMMUFD managed
> device, the new
== Series Details ==
Series: drm/fbdev: Remove DRM's helpers for fbdev I/O (rev4)
URL : https://patchwork.freedesktop.org/series/117671/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13187 -> Patchwork_117671v4
Summary
== Series Details ==
Series: drm/fbdev: Remove DRM's helpers for fbdev I/O (rev4)
URL : https://patchwork.freedesktop.org/series/117671/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/fbdev: Remove DRM's helpers for fbdev I/O (rev4)
URL : https://patchwork.freedesktop.org/series/117671/
State : warning
== Summary ==
Error: dim checkpatch failed
53f77f7c19f8 fbdev: Add Kconfig options to select different fb_ops helpers
f6426b54c18e fbdev:
Hang and heartbeat subtests are not supported with GuC submission
enabled.
Signed-off-by: Vinay Belgaumkar
---
tests/i915/gem_ctx_persistence.c | 32 +++-
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git a/tests/i915/gem_ctx_persistence.c
On Wed, May 24, 2023 at 11:41 AM Nathan Chancellor wrote:
>
> On Wed, May 24, 2023 at 11:32:32AM -0700, Nick Desaulniers wrote:
> > On Wed, May 24, 2023 at 8:38 AM Nathan Chancellor wrote:
> > >
> > > Clang warns:
> > >
> > > drivers/gpu/drm/i915/display/intel_display.c:6012:3: error:
tel_async_flip_check_hw(struct
> > intel_atomic_state *state, struct in
> > plane->base.base.id,
> > plane->base.name);
> > return -EINVAL;
> > }
> > +
t; plane->base.base.id,
> plane->base.name);
> return -EINVAL;
> }
> + break;
>
> case I915_FORMAT_MOD_X_TILED:
>
Hi Dave, Daniel,
Here goes the first pull request for 6.5.
In terms of headline features probably the fact GuC platforms can now show per
client engine utilisation sticks out the most.
Then there is a bunch of fixes where those in the area of GuC error capture,
SLPS and firmware loading
On 24/05/2023 18:38, Dixit, Ashutosh wrote:
On Wed, 24 May 2023 04:38:18 -0700, Tvrtko Ursulin wrote:
Hi Tvrtko,
On 23/05/2023 16:19, Ashutosh Dixit wrote:
No functional changes but we can remove some unsightly index computation
and read/write functions if we convert the PMU sample
On Wed, 24 May 2023 04:38:18 -0700, Tvrtko Ursulin wrote:
>
Hi Tvrtko,
> On 23/05/2023 16:19, Ashutosh Dixit wrote:
> > No functional changes but we can remove some unsightly index computation
> > and read/write functions if we convert the PMU sample array from a
> > one-dimensional to a
The error below seems unrelated to the change in this patch. In fact test below
fails on APL which wont excersize the patch code change.
However, from internal testing we did see cases where CI's selftest timeout is
lower than the GSC Proxy requires to complete
(i.e. the selftest would bail with
On Wed, May 24, 2023 at 01:48:57PM +, Patchwork wrote:
> == Series Details ==
>
> Series: i915: Move display identification/probing under display/ (rev4)
> URL : https://patchwork.freedesktop.org/series/117931/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from
From: Fei Yang
To comply with the design that buffer objects shall have immutable
cache setting through out their life cycle, {set, get}_caching ioctl's
are no longer supported from MTL onward. With that change caching
policy can only be set at object creation time. The current code
applies a
From: Fei Yang
This series introduce a new extension for GEM_CREATE,
1. end support for set caching ioctl [PATCH 1/2]
2. add set_pat extension for gem_create [PATCH 2/2]
v2: drop one patch that was merged separately
commit 341ad0e8e254 ("drm/i915/mtl: Add PTE encode function")
v3: rebased
On 24/05/2023 17:37, Umesh Nerlige Ramappa wrote:
On Tue, May 23, 2023 at 04:24:07PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Need to reset aggregated counters before adding to them otherwise numbers
will grow endlessly.
Signed-off-by: Tvrtko Ursulin
Fixes: 3dadeff69d4a
On Tue, May 23, 2023 at 04:24:07PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Need to reset aggregated counters before adding to them otherwise numbers
will grow endlessly.
Signed-off-by: Tvrtko Ursulin
Fixes: 3dadeff69d4a ("intel_gpu_top: Switch pmu_counter to use aggregated
rn -EINVAL;
> }
> + break;
>
> case I915_FORMAT_MOD_X_TILED:
> case I915_FORMAT_MOD_Y_TILED:
>
> ---
> base-commit: 9a2cb1b31c040e2f1b313e2f7921f0f5e6b66d82
> change-id:
> 20230524-intel_async_flip_check_hw-implicit-fallthrough-c4c40b03802f
>
> Best regards,
--
Jani Nikula, Intel Open Source Graphics Center
On Thu, May 11, 2023 at 07:55:30PM +0300, Ville Syrjälä wrote:
From: Ville Syrjälä
Sprinkle in some BUILD_BUG_ON()s to make sure some of
the bitmasks used in the device info have enough bits.
Do we have a better place for this sort of stuff?
it's being moved to display/, so I'd say the
Hi Naresh,
On Wed, May 24, 2023 at 12:32:24PM +0530, Naresh Kamboju wrote:
> Linux next-20230523 and next-20230524 the x86_64 and i386 builds failed
> with clang.
>
> Reported-by: Linux Kernel Functional Testing
>
> make --silent --keep-going \
> --jobs=8 O=/home/tu
case I915_FORMAT_MOD_X_TILED:
case I915_FORMAT_MOD_Y_TILED:
---
base-commit: 9a2cb1b31c040e2f1b313e2f7921f0f5e6b66d82
change-id: 20230524-intel_async_flip_check_hw-implicit-fallthrough-c4c40b03802f
Best regards,
--
Nathan Chancellor
On Thu, May 11, 2023 at 07:55:28PM +0300, Ville Syrjälä wrote:
From: Ville Syrjälä
HSW/BDW don't have DDI-F so don't go looking for one.
Seems to have been accidentally left behind when the
skl+ stuff got split out in commit 097d9e902068
("drm/i915/display: remove strap checks from gen 9").
On Wed, 24 May 2023 02:12:14 +
"Liu, Yi L" wrote:
> > From: Alex Williamson
> > Sent: Tuesday, May 23, 2023 11:50 PM
> >
> > On Tue, 23 May 2023 01:20:17 +
> > "Liu, Yi L" wrote:
> >
> > > > From: Alex Williamson
> > > > Sent: Tuesday, May 23, 2023 6:16 AM
> > > >
> > > > On Sat,
In case when only two or less lanes are owned such as MFD (DP-alt with x2 lanes)
we need to reset only one lane (lane0). With only x2 lanes we don't need
to poll for the phy current status on both lanes since only the owned lane
will respond.
Signed-off-by: Mika Kahola
---
From: Ville Syrjälä
Make HSW/BDW use port_mask for output probing as well.
To achieve that the strap checks are moved into
intel_ddi_init() itself. Or should we move them to the
runtime port_mask init instead? Maybe not since the hardware
is still there, just not connected to anything.
v2:
== Series Details ==
Series: Add rc_range_params for YUV420 (rev2)
URL : https://patchwork.freedesktop.org/series/118204/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13180_full -> Patchwork_118204v2_full
Summary
---
The helper intel_dp_dsc_compute_bpp gives the maximum
pipe bpp that is allowed with DSC.
Rename the this to reflect that it returns max pipe bpp supported
with DSC.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 8
Currently, we take the max lane, rate and pipe bpp, to get the maximum
compressed bpp possible. We then set the output bpp to this value.
This patch provides support to have max bpp, min rate and min lanes,
that can support the min compressed bpp.
v2:
-Avoid ending up with compressed bpp, same as
From: Stanislav Lisovskiy
Currently we seem to be using wrong DPCD register for reading compressed bpps,
reading min/max input bpc instead of compressed bpp.
Fix that, so that we now apply min/max compressed bpp limitations we get
from DP Spec Table 2-157 DP v2.0 and/or correspondent DPCD
To make way for fractional bpp support, avoid left shifting the
output_bpp by 4 in helper intel_dp_dsc_get_output_bpp.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 12
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
2 files changed, 5
DP DSC Receiver Capabilities are exposed via DPCD 60h-6Fh.
Fix the DSC RECEIVER CAP SIZE accordingly.
Fixes: ffddc4363c28 ("drm/dp: Add DP DSC DPCD receiver capability size define
and missing SHIFT")
Cc: Anusha Srivatsa
Cc: Manasi Navare
Cc: # v5.0+
Signed-off-by: Ankit Nautiyal
---
For MST the bpc is hardcoded to 8, and pipe bpp to 24.
So avoid forcing DSC bpc for MST case.
v2: Warn and ignore the debug flag than to bail out. (Jani)
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 11 +--
drivers/gpu/drm/i915/display/intel_dp_mst.c
For DSC the min BPC is 8 for ICL+ and so the min pipe_bpp is 24.
Check this condition for cases where bpc is forced by debugfs flag
dsc_force_bpc. If the check fails, then WARN and ignore the debugfs
flag.
For MST case the pipe_bpp is already computed (hardcoded to be 24),
and this check is not
As per Bsepc:49259, Bigjoiner BW check puts restriction on the
compressed bpp for a given CDCLK, pixelclock in cases where
Bigjoiner + DSC are used.
Currently compressed bpp is computed first, and it is ensured that
the bpp will work at least with the max CDCLK freq.
Since the CDCLK is computed
DSC compressed bpp and slice counts are already getting printed at the
end of dsc compute config. Remove extra logs.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
Currently there are many places where we use output_bpp for link bpp and
compressed bpp.
Lets use consistent naming:
output_bpp : The intermediate value taking into account the
output_format chroma subsampling.
compressed_bpp : target bpp for the DSC encoder.
link_bpp : final bpp used in the link.
Currently we assume 2 Pixels Per Clock (PPC) while computing
plane cdclk and min_cdlck. In cases where DSC single engine
is used the throughput is 1 PPC.
So account for the above case, while computing cdclk.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_cdclk.c |
In Bigjoiner check for DSC, bigjoiner interface bits for DP for
DISPLAY > 13 is 36 (Bspec: 49259).
v2: Corrected Display ver to 13.
v3: Follow convention for conditional statement. (Ville)
v4: Fix check for display ver. (Ville)
Signed-off-by: Ankit Nautiyal
Reviewed-by: Ville Syrjälä
---
The final link bpp used to calculate the m_n values depend on the
output_format. Though the output_format is set to RGB for MST case and
the link bpp will be same as the pipe bpp, for the sake of semantics,
lets calculate the m_n values with the link bpp, instead of pipe_bpp.
Signed-off-by: Ankit
This series is an attempt to address multiple issues with DSC,
scattered in separate existing series.
Patches 1-3 are DSC fixes from series to Handle BPC for HDMI2.1 PCON
https://patchwork.freedesktop.org/series/107550/
Patches 4-5 are from series DSC fixes for Bigjoiner:
While using DSC the compressed bpp is computed assuming RGB output
format. Consider the output_format and compute the compressed bpp
during mode valid and compute config steps.
For DP-MST we currently use RGB output format only, so continue
using RGB while computing compressed bpp for MST case.
== Series Details ==
Series: i915: Move display identification/probing under display/ (rev4)
URL : https://patchwork.freedesktop.org/series/117931/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13180_full -> Patchwork_117931v4_full
On Mon, May 22, 2023 at 01:16:03PM -0700, Kees Cook wrote:
> On Mon, May 22, 2023 at 03:52:28PM +, Azeem Shaikh wrote:
> > strlcpy() reads the entire source buffer first.
> > This read may exceed the destination size limit.
> > This is both inefficient and can lead to linear read
> > overflows
On Wed, May 24, 2023 at 03:59:47PM +0300, Lisovskiy, Stanislav wrote:
> On Wed, May 24, 2023 at 03:38:42PM +0300, Ville Syrjälä wrote:
> > On Tue, May 23, 2023 at 12:01:34PM +0300, Lisovskiy, Stanislav wrote:
> > > On Tue, May 16, 2023 at 02:40:27PM +0300, Ville Syrjälä wrote:
> > > > On Tue, May
On 23/05/2023 11:51, Kamil Konieczny wrote:
On 2023-05-15 at 14:36:30 +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Move client name to be the right most field which visually aligns better
with top(1) and prepares for inserting memory usage fields somewhere in
the middle.
On Wed, May 24, 2023 at 03:38:42PM +0300, Ville Syrjälä wrote:
> On Tue, May 23, 2023 at 12:01:34PM +0300, Lisovskiy, Stanislav wrote:
> > On Tue, May 16, 2023 at 02:40:27PM +0300, Ville Syrjälä wrote:
> > > On Tue, May 16, 2023 at 01:43:44PM +0300, Lisovskiy, Stanislav wrote:
> > > > On Fri, May
On 24/05/2023 13:30, Andi Shyti wrote:
Hi again,
finally... pushed in drm-intel-gt-next! :)
I had to revert this (uapi commit only) by force pushing, luckily it was the
top commit.
OK, sorry!
1)
IGT is not merged yet.
if igt is merged without the kernel it would fail, though.
can
Hi Dave and Daniel,
here is this week's PR for drm-misc-next. I'm taking over while Maxime
is away. There's support for a few more panels and bridges. In fbdev,
I/O helpers are now implemented within the architecture code. DRM's
shmobile driver received some updates.
Best regards
Thomas
From: Mika Kahola
MTL introduces a new way to instruct the PUnit with
power and bandwidth requirements of DE. Add the functionality
to program the registers and handle waits using interrupts.
The current wait time for timeouts is programmed for 10 msecs to
factor in the worst case scenarios.
>From MTL onwards, we need to find the best QGV point based on
the required data rate and pass the peak BW of that point to
the punit to lock the corresponding QGV point.
Bspec: 64636
Signed-off-by: Vinod Govindapillai
Reviewed-by: Stanislav Lisovskiy
---
MTL uses the peak BW of a QGV point to lock the required QGV
point instead of the QGV index. Instead of passing the deratedbw
of the selected bw_info, return the index to the selected
bw_info so that either deratedbw or peakbw can be used based on
the platform.
v2: use idx to store index returned
Extract intel_bw_check_qgv_points() from intel_bw_atomic_check
to facilitate future platform variations in handling SAGV
configurations.
Signed-off-by: Vinod Govindapillai
Reviewed-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/display/intel_bw.c | 235 +---
1 file
In MTL onwards, pcode locks the GV point based on the peak BW
of a QGV point. So store the peak BW of all the QGV points.
v2: use DIV_ROUND_CLOSEST() for the peakBW calculation
Bspec: 64636
Signed-off-by: Vinod Govindapillai
Reviewed-by: Stanislav Lisovskiy
---
>From MTL onwwards, pcode locks the QGV point based on peak BW of
the intended QGV point passed by the driver. So the peak BW
calculation must match the value expected by the pcode. Update
the calculations as per the Bspec.
v2: use DIV_ROUND_* macro for the calculations (Ville)
v3: Use only
Follow the values from bspec for the percentage overhead for
efficiency in MTL BW calculations.
Bspec: 64631
Signed-off-by: Vinod Govindapillai
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
pmdemand support patches for MTL
SAGV configuration support for MTL
v2: added one missing patch in the previous version
v3: chekcpatch warning fixes
update index handling for the icl/tgl QGV point handling
program pmdemand code simplified
v4: update to debufs and pipe values pmdemand
On Tue, May 23, 2023 at 12:01:34PM +0300, Lisovskiy, Stanislav wrote:
> On Tue, May 16, 2023 at 02:40:27PM +0300, Ville Syrjälä wrote:
> > On Tue, May 16, 2023 at 01:43:44PM +0300, Lisovskiy, Stanislav wrote:
> > > On Fri, May 12, 2023 at 11:54:16AM +0530, Ankit Nautiyal wrote:
> > > > Currently,
On 24/05/2023 13:19, Andi Shyti wrote:
Hi Tvrtko,
finally... pushed in drm-intel-gt-next! :)
I had to revert this (uapi commit only) by force pushing, luckily it was the
top commit.
OK, sorry!
1)
IGT is not merged yet.
if igt is merged without the kernel it would fail, though.
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