== Series Details ==
Series: drm/i915/mtl: Fix SSC selection for MPLLA
URL : https://patchwork.freedesktop.org/series/119428/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13277 -> Patchwork_119428v1
Summary
---
== Series Details ==
Series: drm/i915/mtl: Fix SSC selection for MPLLA
URL : https://patchwork.freedesktop.org/series/119428/
State : warning
== Summary ==
Error: dim checkpatch failed
08a60d2c1238 drm/i915/mtl: Fix SSC selection for MPLLA
-:7: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped
Thank You for the fix
Tested-by: Khaled Almahallawy
On Thu, 2023-06-15 at 21:39 -0700, Radhakrishna Sripada wrote:
> Driver does not clear the default SSC for MPLLA. This causes link
> training
> failure when trying to use 10G and 20G rates. Fix the behaviour and
> enable ssc
> only when we
Driver does not clear the default SSC for MPLLA. This causes link training
failure when trying to use 10G and 20G rates. Fix the behaviour and enable ssc
only when we really want.
Fixes: 237e7be0bf57 ("drm/i915/mtl: For DP2.0 10G and 20G rates use MPLLA")
Cc: Mika Kahola
Cc: Clint Taylor
Cc:
== Series Details ==
Series: drm/i915/perf: Consider OA buffer boundary when zeroing out reports
URL : https://patchwork.freedesktop.org/series/119427/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13277 -> Patchwork_119427v1
== Series Details ==
Series: drm/i915/perf: Determine context valid in OA reports
URL : https://patchwork.freedesktop.org/series/119426/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13277 -> Patchwork_119426v1
Summary
== Series Details ==
Series: Remove incorrect hard coded cache coherrency setting
URL : https://patchwork.freedesktop.org/series/119418/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13277 -> Patchwork_119418v1
Summary
== Series Details ==
Series: Remove incorrect hard coded cache coherrency setting
URL : https://patchwork.freedesktop.org/series/119418/
State : warning
== Summary ==
Error: dim checkpatch failed
dd65470e881c Remove incorrect hard coded cache coherrency setting
-:6:
== Series Details ==
Series: drm/i915/gsc: Fix intel_gsc_uc_fw_proxy_init_done with directed wakerefs
URL : https://patchwork.freedesktop.org/series/119412/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13277 -> Patchwork_119412v1
== Series Details ==
Series: drm/i915/gsc: Fix intel_gsc_uc_fw_proxy_init_done with directed wakerefs
URL : https://patchwork.freedesktop.org/series/119412/
State : warning
== Summary ==
Error: dim checkpatch failed
2bd0cd46532e drm/i915/gsc: Fix intel_gsc_uc_fw_proxy_init_done with directed
For reports that are not powers of 2, reports at the end of the OA
buffer may get split across the buffer boundary. When zeroing out such
reports, take the split into consideration.
Fixes: 09a36015d9a0 ("drm/i915/perf: Clear out entire reports after reading if
not power of 2 size")
== Series Details ==
Series: drm/i915: Avoid circular locking dependency when flush delayed work on
gt reset (rev3)
URL : https://patchwork.freedesktop.org/series/118898/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13276 -> Patchwork_118898v3
When supporting OA for TGL, it was seen that the context valid bit in
the report ID was not defined, however revisiting the spec seems to have
this bit defined. The bit is used to determine if a context is valid on
a context switch and is essential to determine active and idle periods
for a
== Series Details ==
Series: drm/i915: Avoid circular locking dependency when flush delayed work on
gt reset (rev3)
URL : https://patchwork.freedesktop.org/series/118898/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be
== Series Details ==
Series: drm/i915: Avoid circular locking dependency when flush delayed work on
gt reset (rev3)
URL : https://patchwork.freedesktop.org/series/118898/
State : warning
== Summary ==
Error: dim checkpatch failed
b11466545138 drm/i915: Avoid circular locking dependency when
== Series Details ==
Series: Replace acronym with full platform name in defines.
URL : https://patchwork.freedesktop.org/series/119380/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13274_full -> Patchwork_119380v1_full
The previouse i915_gem_object_create_internal already set it with proper value
before function return. This hard coded setting is incorrect for platforms like
MTL, thus need to be removed.
Signed-off-by: Zhanjun Dong
---
drivers/gpu/drm/i915/gt/intel_timeline.c | 2 --
1 file changed, 2
On Wed, 3 May 2023 at 22:23, Lisovskiy, Stanislav
wrote:
>
> On Wed, May 03, 2023 at 02:07:04PM +0300, Ville Syrjälä wrote:
> > On Wed, May 03, 2023 at 10:36:42AM +0300, Lisovskiy, Stanislav wrote:
> > > On Tue, May 02, 2023 at 05:38:57PM +0300, Ville Syrjala wrote:
> > > > From: Ville Syrjälä
>
> -Original Message-
> From: Bhadane, Dnyaneshwar
> Sent: Wednesday, June 14, 2023 10:00 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Atwood, Matthew S ; Srivatsa, Anusha
> ; Bhadane, Dnyaneshwar
>
> Subject: [PATCH 00/11] Replace acronym with full platform name in defines.
>
>
> -Original Message-
> From: Bhadane, Dnyaneshwar
> Sent: Thursday, June 15, 2023 2:54 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Srivatsa, Anusha
> Subject: [PATCH 10/11] drm/i915/adls: s/ADLS/ALDERLAKE_S in platform and
> subplatform defines
>
> From: Anusha Srivatsa
>
>
> -Original Message-
> From: Bhadane, Dnyaneshwar
> Sent: Wednesday, June 14, 2023 10:00 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Atwood, Matthew S ; Srivatsa, Anusha
> ; Bhadane, Dnyaneshwar
>
> Subject: [PATCH 07/11] drm/i915/adlp: s/ADLP/ALDERLAKE_P for display and
> graphics
Apart from the platform subject prefix,
Reviewed-by: Anusha Srivatsa
> -Original Message-
> From: Bhadane, Dnyaneshwar
> Sent: Wednesday, June 14, 2023 10:00 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Atwood, Matthew S ; Srivatsa, Anusha
> ; Bhadane, Dnyaneshwar
>
> Subject:
OK one thing that holds true for all patches in the series is the subject:
drm/i915/PLATFORM:
The general convention is to have platform is lower cases I the subject prefix.
So all occurrences of drm/i915/PLATFORM should be replaced with
drm/i915/platform.
This is something I have missed
V3 is to follow John's suggestion option 1. The better option is in
discussion and might have boarder impact.
Meanwhile we can start with option 1, check CI system report and see if
issue getting better.
Regards,
Zhanjun Dong
On 2023-06-15 5:15 p.m., Zhanjun Dong wrote:
This attempts to
Reviewed-by: Anusha Srivatsa
> -Original Message-
> From: Bhadane, Dnyaneshwar
> Sent: Wednesday, June 14, 2023 10:00 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Atwood, Matthew S ; Srivatsa, Anusha
> ; Bhadane, Dnyaneshwar
>
> Subject: [PATCH 04/11] drm/i915/JSL: s/JSL/JASPERLAKE
intel_gsc_uc_fw_proxy_init_done is used by a few code paths
and usages. However, certain paths need a wakeref while others
can't take a wakeref such as from the runtime_pm_resume callstack.
Add a param into this helper to allow callers to direct whether
to take the wakeref or not. This resolves
On 6/14/2023 3:36 PM, Daniele Ceraolo Spurio wrote:
From: Harshit Mogalapalli
Smatch warns:
drivers/gpu/drm/i915/gt/uc/intel_huc.c:388
intel_huc_init() warn: missing error code 'err'
When the allocation of VMAs fail: The value of err is zero at this
point and it is
This attempts to avoid circular locking dependency between flush delayed work
and intel_gt_reset.
Switched from cancel_delayed_work_sync to cancel_delayed_work, the non-sync
version for reset path, it is safe as the worker has the trylock code to handle
the lock; Meanwhile keep the sync version
On Wed, Jun 14, 2023 at 6:50 AM Sui Jingfeng wrote:
>
> Hi,
>
> On 2023/6/13 11:01, Sui Jingfeng wrote:
> > From: Sui Jingfeng
> >
> > Deal only with the VGA devcie(pdev->class == 0x0300), so replace the
> > pci_get_subsys() function with pci_get_class(). Filter the non-PCI display
> >
Reviewed-by: Anusha Srivatsa
> -Original Message-
> From: Bhadane, Dnyaneshwar
> Sent: Wednesday, June 14, 2023 10:00 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Atwood, Matthew S ; Srivatsa, Anusha
> ; Bhadane, Dnyaneshwar
>
> Subject: [PATCH 03/11] drm/i915/TGL: s/RKL/ROCKETLAKE
Reviewed-by: Anusha Srivatsa
> -Original Message-
> From: Bhadane, Dnyaneshwar
> Sent: Wednesday, June 14, 2023 10:00 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Atwood, Matthew S ; Srivatsa, Anusha
> ; Bhadane, Dnyaneshwar
>
> Subject: [PATCH 02/11] drm/i915/MTL: s/MTL/METEORLAKE
> -Original Message-
> From: Bhadane, Dnyaneshwar
> Sent: Wednesday, June 14, 2023 10:00 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Atwood, Matthew S ; Srivatsa, Anusha
> ; Bhadane, Dnyaneshwar
>
> Subject: [PATCH 01/11] drm/i915/TGL: s/TGL/TIGERLAKE for
> platform/subplatform
== Series Details ==
Series: Replace acronym with full platform name in defines.
URL : https://patchwork.freedesktop.org/series/119380/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13274 -> Patchwork_119380v1
Summary
== Series Details ==
Series: Replace acronym with full platform name in defines.
URL : https://patchwork.freedesktop.org/series/119380/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Replace acronym with full platform name in defines.
URL : https://patchwork.freedesktop.org/series/119380/
State : warning
== Summary ==
Error: dim checkpatch failed
7403e3359af6 drm/i915/TGL: s/TGL/TIGERLAKE for platform/subplatform defines
-:56:
On Fri, 09 Jun 2023 15:02:52 -0700, Vinay Belgaumkar wrote:
>
Hi Vinay,
> We were skipping when min_softlimit was equal to RPn. We need to apply
> it rergardless as efficient frequency will push the SLPC min to RPe.
> This will break scenarios where user sets a min softlimit < RPe before
> reset
On Fri, May 12, 2023 at 09:29:23AM -0700, Lucas De Marchi wrote:
> On Fri, May 12, 2023 at 02:14:19PM +0300, Andy Shevchenko wrote:
> > On Mon, May 08, 2023 at 10:14:02PM -0700, Lucas De Marchi wrote:
> > > Add GENMASK_U32(), GENMASK_U16() and GENMASK_U8() macros to create
> > > masks for
On Fri, May 12, 2023 at 02:45:19PM +0300, Jani Nikula wrote:
> On Fri, 12 May 2023, Andy Shevchenko
> wrote:
> > On Fri, May 12, 2023 at 02:25:18PM +0300, Jani Nikula wrote:
> >> On Fri, 12 May 2023, Andy Shevchenko
> >> wrote:
> >> > On Mon, May 08, 2023 at 10:14:02PM -0700, Lucas De Marchi
On Thu, Jun 15, 2023 at 1:19 PM Christian König
wrote:
>
> Am 13.06.23 um 16:18 schrieb Karol Herbst:
> > On Tue, Jun 13, 2023 at 3:59 PM Christian König
> > wrote:
> >> Am 13.06.23 um 15:05 schrieb Karol Herbst:
> >>> On Mon, Dec 5, 2022 at 2:40 PM Christian König
> >>> wrote:
> Am
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjälä
> Sent: Friday, June 9, 2023 1:06 AM
> To: Jani Nikula
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v2 2/7] drm/i915: Introduce device info
> port_mask
>
> On Fri, Jun 02, 2023 at
Hi Dave and Daniel,
here's the release cycles first PR from drm-misc-next-fixes. It's just
one fix and a backmerge.
Best regards
Thomas
drm-misc-next-fixes-2023-06-15:
Short summary of fixes pull:
* Fix fbdev initializer macros
The following changes since commit
Am 13.06.23 um 16:18 schrieb Karol Herbst:
On Tue, Jun 13, 2023 at 3:59 PM Christian König
wrote:
Am 13.06.23 um 15:05 schrieb Karol Herbst:
On Mon, Dec 5, 2022 at 2:40 PM Christian König wrote:
Am 29.11.22 um 22:14 schrieb Felix Kuehling:
On 2022-11-25 05:21, Christian König wrote:
On Fri, 2023-06-09 at 17:13 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Fix all the obvious issues affecting HSW/BDW PSR1 and
> restore it back to life.
>
> The PC8+ vs. init_clock_gating() problem also affects
> some non-PSR workarounds as well.
>
> v2: Rebase (due to irq code
On 6/2/2023 4:21 PM, Suraj Kandpal wrote:
Allocate a multipage object that can be used for input
and output for intel_hdcp_gsc_message so that corruption of
output message can be avoided by the current overwriting method.
Modify intel_gsc_send_sync() to take into account header_out
and addr_out
On Tue, 2023-06-13 at 14:25 -0300, Gustavo Sousa wrote:
> Quoting Mika Kahola (2023-06-09 09:21:30-03:00)
> > From PICA message bus we wait for acknowledgment from
> > read/write commands. In case of an error, we reset the
> > bus for the next command.
> >
> > Current implementation ends up
From: Anusha Srivatsa
Driver refers to the platfrom Alderlake S as ADLS in places
and ALDERLAKE_S in some. Making the consistent change
to avoid confusion of the right naming convention for
the platform.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_display_device.c |
From: Anusha Srivatsa
Follow consistent naming convention. Replace ADLP with
ALDERLAKE_P.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/intel_step.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git
Follow consistent naming convention. Replace JSL with
JASPERLAKE.
Signed-off-by: Dnyaneshwar Bhadane
---
drivers/gpu/drm/i915/display/icl_dsi.c | 4 ++--
drivers/gpu/drm/i915/display/intel_cdclk.c | 4 ++--
drivers/gpu/drm/i915/display/intel_combo_phy.c | 6 +++---
Follow consistent naming convention. Replace KBL with
KABYLAKE.
Signed-off-by: Dnyaneshwar Bhadane
---
drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 4 ++--
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 2 +-
drivers/gpu/drm/i915/gt/intel_workarounds.c| 6 +++---
From: Anusha Srivatsa
Follow consistent naming convention. Replace ADLP with
ALDERLAKE_P
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c | 2 +-
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c| 2 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
From: Anusha Srivatsa
Follow consistent naming convention. Replace ADLP with
ALDERLAKE_P
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git
Follow consistent naming convention. Replace MTL with
METEORLAKE
Signed-off-by: Dnyaneshwar Bhadane
---
drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
drivers/gpu/drm/i915/display/intel_pmdemand.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 10 ++---
Follow consistent naming convention. Replace SKL with
SKYLAKE.
Signed-off-by: Dnyaneshwar Bhadane
---
drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_workarounds.c| 2 +-
drivers/gpu/drm/i915/i915_drv.h| 14 +++---
From: Anusha Srivatsa
Driver refers to the platfrom Alderlake P as ADLP in places
and ALDERLAKE_P in some. Making the consistent change
to avoid confusion of the right naming convention for
the platform.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 2
Follow consistent naming convention. Replace RKL with
ROCKETLAKE.
Signed-off-by: Dnyaneshwar Bhadane
---
drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git
Follow consistent naming convention. Replace TGL with
TIGERLAKE.
Signed-off-by: Dnyaneshwar Bhadane
---
drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 2 +-
drivers/gpu/drm/i915/display/skl_universal_plane.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h| 4 ++--
Replace all occurences of ADL with ALDERLAKE, TGL with TIGERLAKE,
MTL with METEORLAKE, RKL with ROCKETLAKE, JSL with JASPERLAKE,
KBL with KABYLAKE and SKL with SKYLAKE in platform and subplatform
defines. This way there is a consistent pattern to how platforms
are referred. While the change is
Replace all occurences of ADL with ALDERLAKE, TGL with TIGERLAKE,
MTL with METEORLAKE, RKL with ROCKETLAKE, JSL with JASPERLAKE,
KBL with KABYLAKE and SKL with SKYLAKE in platform and subplatform
defines. This way there is a consistent pattern to how platforms
are referred. While the change is
== Series Details ==
Series: Get optimal audio frequency and channels (rev4)
URL : https://patchwork.freedesktop.org/series/119121/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13270_full -> Patchwork_119121v4_full
== Series Details ==
Series: drm/i915/huc: Fix missing error code in intel_huc_init()
URL : https://patchwork.freedesktop.org/series/119350/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13270_full -> Patchwork_119350v1_full
== Series Details ==
Series: Get optimal audio frequency and channels (rev4)
URL : https://patchwork.freedesktop.org/series/119121/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13270 -> Patchwork_119121v4
Summary
---
== Series Details ==
Series: Get optimal audio frequency and channels (rev3)
URL : https://patchwork.freedesktop.org/series/119121/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13270 -> Patchwork_119121v3
Summary
---
== Series Details ==
Series: drm/i915/display/lspcon: Increase LSPCON mode settle timeout (rev3)
URL : https://patchwork.freedesktop.org/series/108735/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13270 -> Patchwork_108735v3
== Series Details ==
Series: drm/i915/huc: Fix missing error code in intel_huc_init()
URL : https://patchwork.freedesktop.org/series/119350/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13270 -> Patchwork_119350v1
Summary
== Series Details ==
Series: Get optimal audio frequency and channels (rev4)
URL : https://patchwork.freedesktop.org/series/119121/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Hi Dnyaneshwar,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-tip/drm-tip]
url:
https://github.com/intel-lab-lkp/linux/commits/Dnyaneshwar-Bhadane/drm-i915-TGL-s-TGL-TIGERLAKE-for-platform-subplatform-defines/20230615-130242
base: git
Hi Dnyaneshwar,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-tip/drm-tip]
url:
https://github.com/intel-lab-lkp/linux/commits/Dnyaneshwar-Bhadane/drm-i915-TGL-s-TGL-TIGERLAKE-for-platform-subplatform-defines/20230615-130242
base: git
Hi Dnyaneshwar,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-tip/drm-tip]
url:
https://github.com/intel-lab-lkp/linux/commits/Dnyaneshwar-Bhadane/drm-i915-TGL-s-TGL-TIGERLAKE-for-platform-subplatform-defines/20230615-130242
base: git
Hi Chaitanya,
> -Original Message-
> From: Borah, Chaitanya Kumar
> Sent: 15 June 2023 09:30
> To: Golani, Mitulkumar Ajitkumar ;
> intel-gfx@lists.freedesktop.org
> Cc: Shankar, Uma ; Nautiyal, Ankit K
>
> Subject: RE: [RFC 3/3] drm/i915/display: Add wrapper to Compute SAD
>
> Hello
Initialize the source audio capabilities for HDMI in crtc_state
property by setting them to their maximum supported values,
including max_channel and max_frequency. This allows for the
calculation of HDMI audio source capabilities with respect to
the available mode bandwidth. These capabilities
Compute SADs that takes into account the supported rate and channel
based on the capabilities of the audio source. This wrapper function
should encapsulate the logic for determining the supported rate and
channel and should return a set of SADs that are compatible with the
source.
--v1:
- call
To enhance the relationship between the has_audio and the source
audio parameter, create a separate crtc_state audio property and
add the has_audio parameter into it. Additionally, update the
access of the has_audio parameter from the crtc_state pointer as
it is wrapped under the audio. These
Currently we do not check if there is enough bandwidth for
audio, and what channels and freq it can really support.
Also sometimes there can be HW constraints e.g. GLK where audio
channels supported are only 2.
https://patchwork.freedesktop.org/series/107647/
Obtain the optimal audio rate and
== Series Details ==
Series: Get optimal audio frequency and channels (rev3)
URL : https://patchwork.freedesktop.org/series/119121/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Get optimal audio frequency and channels (rev3)
URL : https://patchwork.freedesktop.org/series/119121/
State : warning
== Summary ==
Error: dim checkpatch failed
845b3a689a0d drm/i915/hdmi: Optimize source audio parameter handling
772de8265f74 drm/i915/display:
Hi,
Does anyone has the bandwidth to review this?
I provide more additional information here, hope it helps.
On a non-x86 multiple platform, the discrete AMDGPU fails to override
the integrated one.
because the PCI BAR 0 of the AMDGPU gets moved.
Below is the log of 'dmesg | grep
Compute SADs that takes into account the supported rate and channel
based on the capabilities of the audio source. This wrapper function
should encapsulate the logic for determining the supported rate and
channel and should return a set of SADs that are compatible with the
source.
--v1:
- call
Initialize the source audio capabilities for HDMI in crtc_state
property by setting them to their maximum supported values,
including max_channel and max_frequency. This allows for the
calculation of HDMI audio source capabilities with respect to
the available mode bandwidth. These capabilities
To enhance the relationship between the has_audio and the source
audio parameter, create a separate crtc_state audio property and
add the has_audio parameter into it. Additionally, update the
access of the has_audio parameter from the crtc_state pointer as
it is wrapped under the audio. These
Currently we do not check if there is enough bandwidth for
audio, and what channels and freq it can really support.
Also sometimes there can be HW constraints e.g. GLK where audio
channels supported are only 2.
https://patchwork.freedesktop.org/series/107647/
Obtain the optimal audio rate and
== Series Details ==
Series: Replace acronym with full platform name in defines.
URL : https://patchwork.freedesktop.org/series/119361/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
DESCEND objtool
INSTALL libsubcmd_headers
CC [M]
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