== Series Details ==
Series: drm/i915/huc: silence injected failure in the load via GSC path (rev6)
URL : https://patchwork.freedesktop.org/series/121080/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13627_full -> Patchwork_121080v6_full
== Series Details ==
Series: i915/pmu: Move execlist stats initialization to execlist specific setup
(rev2)
URL : https://patchwork.freedesktop.org/series/123616/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13627_full -> Patchwork_123616v2_full
== Series Details ==
Series: series starting with [1/2] drm/i915: Check lane count when determining
FEC support
URL : https://patchwork.freedesktop.org/series/123643/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13627_full -> Patchwork_123643v1_full
== Series Details ==
Series: series starting with [v2,1/1] drm/i915/pxp: Add drm_dbgs for critical
PXP events.
URL : https://patchwork.freedesktop.org/series/123656/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13627 -> Patchwork_123656v1
== Series Details ==
Series: series starting with [v2,1/1] drm/i915/pxp: Add drm_dbgs for critical
PXP events.
URL : https://patchwork.freedesktop.org/series/123656/
State : warning
== Summary ==
Error: dim checkpatch failed
a1eb86307547 drm/i915/pxp: Add drm_dbgs for critical PXP events.
== Series Details ==
Series: series starting with [1/4] drm/dp_mst: Fix NULL dereference during
payload addition
URL : https://patchwork.freedesktop.org/series/123652/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13627 -> Patchwork_123652v1
== Series Details ==
Series: drm/i915: prepare for xe driver display integration (rev2)
URL : https://patchwork.freedesktop.org/series/123595/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13626_full -> Patchwork_123595v2_full
== Series Details ==
Series: series starting with [1/4] drm/dp_mst: Fix NULL dereference during
payload addition
URL : https://patchwork.freedesktop.org/series/123652/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
== Series Details ==
Series: drm/i915/huc: silence injected failure in the load via GSC path (rev6)
URL : https://patchwork.freedesktop.org/series/121080/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13627 -> Patchwork_121080v6
== Series Details ==
Series: i915/pmu: Move execlist stats initialization to execlist specific setup
(rev2)
URL : https://patchwork.freedesktop.org/series/123616/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13627 -> Patchwork_123616v2
== Series Details ==
Series: series starting with [1/2] drm/i915: Check lane count when determining
FEC support
URL : https://patchwork.freedesktop.org/series/123643/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13627 -> Patchwork_123643v1
Debugging PXP issues can't even begin without understanding precedding
sequence of events. Add drm_dbg into the most important PXP events.
v2 : - remove __func__ since drm_dbg covers that (Jani).
- add timeout of the restart from front-end (Alan).
Signed-off-by: Alan Previn
---
== Series Details ==
Series: drm/i915: Convert fbdev to DRM client (rev2)
URL : https://patchwork.freedesktop.org/series/115714/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13627 -> Patchwork_115714v2
Summary
---
== Series Details ==
Series: drm/i915: Convert fbdev to DRM client (rev2)
URL : https://patchwork.freedesktop.org/series/115714/
State : warning
== Summary ==
Error: dim checkpatch failed
e92810deb3f2 drm/i915: Move fbdev functions
-:119: CHECK:ALLOC_SIZEOF_STRUCT: Prefer
If a sink is removed in the middle of payload addition
drm_dp_add_payload_part1() will fail as expected, either not finding the
payload's MST port or failing the payload-add AUX transaction.
Based on the above tune the error message down to a debug messge.
Cc: Lyude Paul
Signed-off-by: Imre
If a sink is removed in the middle of payload addition the corresponding
AUX transfer will fail as expected, so tune the error message down to a
debug messge.
Cc: Wayne Lin
Cc: Lyude Paul
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Imre Deak
---
Return an error during payload addition if the payload port isn't
found. This shouldn't change the behavior since only the i915 driver
checks the return value, printing an error message in case of a failure.
While at it simplify the control flow.
Cc: Wayne Lin
Cc: Lyude Paul
Cc:
Fix the NULL dereference leading to the following stack trace:
[ 129.687181] i915 :00:02.0: [drm:drm_dp_add_payload_part1
[drm_display_helper]] VCPI 1 for port 5be4423e not in topology, not
creating a payload to remote
[ 129.687257] BUG: kernel NULL pointer dereference, address:
On Mon, 2023-09-11 at 12:26 +0300, Jani Nikula wrote:
> On Wed, 06 Sep 2023, Alan Previn wrote:
> > Debugging PXP issues can't even begin without understanding precedding
> > sequence of events. Add drm_dbg into the most important PXP events.
> >
> > Signed-off-by: Alan Previn
alan:snip
>
> >
== Series Details ==
Series: Apply Wa_16018031267 / Wa_16018063123 (rev2)
URL : https://patchwork.freedesktop.org/series/123605/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13626 -> Patchwork_123605v2
Summary
---
== Series Details ==
Series: Apply Wa_16018031267 / Wa_16018063123 (rev2)
URL : https://patchwork.freedesktop.org/series/123605/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Apply Wa_16018031267 / Wa_16018063123 (rev2)
URL : https://patchwork.freedesktop.org/series/123605/
State : warning
== Summary ==
Error: dim checkpatch failed
9dc317b700fb drm/i915: Reserve some kernel space per vm
-:31: WARNING:AVOID_BUG: Do not crash the kernel
== Series Details ==
Series: Update GGTT with MI_UPDATE_GTT on MTL (rev4)
URL : https://patchwork.freedesktop.org/series/123329/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13626 -> Patchwork_123329v4
Summary
---
I went up the call stack to ensure the differences between the
old and new location isnt skipping over other functions that may reference
something engine related (that may also end up triggering stats variabls).
Without digging further, i see the old postion here:
i915_driver_probe ->
== Series Details ==
Series: Update GGTT with MI_UPDATE_GTT on MTL (rev4)
URL : https://patchwork.freedesktop.org/series/123329/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Update GGTT with MI_UPDATE_GTT on MTL (rev4)
URL : https://patchwork.freedesktop.org/series/123329/
State : warning
== Summary ==
Error: dim checkpatch failed
83371cb18c6e drm/i915: Lift runtime-pm acquire callbacks out of
intel_wakeref.mutex
-:57:
== Series Details ==
Series: drm/i915: prepare for xe driver display integration (rev2)
URL : https://patchwork.freedesktop.org/series/123595/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13626 -> Patchwork_123595v2
== Series Details ==
Series: drm/i915: prepare for xe driver display integration (rev2)
URL : https://patchwork.freedesktop.org/series/123595/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: prepare for xe driver display integration (rev2)
URL : https://patchwork.freedesktop.org/series/123595/
State : warning
== Summary ==
Error: dim checkpatch failed
1b12af564c06 drm/i915: define I915 during i915 driver build
6acbd52df16f drm/i915/display:
== Series Details ==
Series: drm/i915/gt: Prevent error pointer dereference (rev2)
URL : https://patchwork.freedesktop.org/series/123628/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13626 -> Patchwork_123628v2
Summary
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, June 7, 2023 12:45 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 18/19] drm/i915/dsb: Re-instate DSB for LUT
> updates
>
> From: Ville Syrjälä
>
> With all the known
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, June 7, 2023 12:45 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 17/19] drm/i915/dsb: Use DEwake to combat PkgC
> latency
>
> From: Ville Syrjälä
>
> Normally we could
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, June 7, 2023 12:45 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 16/19] drm/i915: Introudce
> intel_crtc_scanline_to_hw()
Typo in introduce
With this fixed, this is:
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, June 7, 2023 12:45 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 15/19] drm/i915: Introduce
> skl_watermark_max_latency()
>
> From: Ville Syrjälä
>
> The DSB code will
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, June 7, 2023 12:45 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 14/19] drm/i915/dsb: Evade transcoder undelayed
> vblank when using DSB
>
> From: Ville Syrjälä
>
> We
On Wed, 13 Sept 2023 at 18:48, Sebastian Andrzej Siewior
wrote:
>
> On 2023-07-05 10:30:25 [+0100], Tvrtko Ursulin wrote:
> > From: Tvrtko Ursulin
> >
> > Commit ade8a0f59844 ("drm/i915: Make all GPU resets atomic") added a
> > preempt disable section over the hardware reset callback to prepare
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, June 7, 2023 12:45 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 13/19] drm/i915/dsb: Use non-posted register
> writes for legacy LUT
>
> From: Ville Syrjälä
>
> The DSB
On Tue, 12 Sep 2023 18:46:12 -0700, Umesh Nerlige Ramappa wrote:
>
Hi Umesh,
> On Fri, Sep 08, 2023 at 06:24:16PM -0700, Dixit, Ashutosh wrote:
> > On Fri, 08 Sep 2023 18:16:26 -0700, Ashutosh Dixit wrote:
> >>
> >
> >> From: Umesh Nerlige Ramappa
> >>
> >> Correct values for OAR counters are
Reviewed-by: Oak Zeng
Thanks,
Oak
> -Original Message-
> From: Das, Nirmoy
> Sent: Wednesday, September 13, 2023 9:10 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Zeng, Oak ; chris.p.wil...@linux.intel.com;
> Piorkowski,
> Piotr ; Shyti, Andi ; Mun,
> Gwan-gyeong ; Roper, Matthew D
Reviewed-by: Oak Zeng
Thanks,
Oak
> -Original Message-
> From: Das, Nirmoy
> Sent: Wednesday, September 13, 2023 9:10 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Zeng, Oak ; chris.p.wil...@linux.intel.com;
> Piorkowski,
> Piotr ; Shyti, Andi ; Mun,
> Gwan-gyeong ; Roper, Matthew D
Thanks,
Oak
> -Original Message-
> From: Das, Nirmoy
> Sent: Wednesday, September 13, 2023 9:10 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Zeng, Oak ; chris.p.wil...@linux.intel.com;
> Piorkowski,
> Piotr ; Shyti, Andi ; Mun,
> Gwan-gyeong ; Roper, Matthew D
> ; Das, Nirmoy
>
Thanks,
Oak
> -Original Message-
> From: Das, Nirmoy
> Sent: Wednesday, September 13, 2023 9:10 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Zeng, Oak ; chris.p.wil...@linux.intel.com;
> Piorkowski,
> Piotr ; Shyti, Andi ; Mun,
> Gwan-gyeong ; Roper, Matthew D
> ; Das, Nirmoy
>
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, June 7, 2023 12:45 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 12/19] drm/i915/dsb: Load LUTs using the DSB
> during vblank
>
> From: Ville Syrjälä
>
> Loading LUTs
From: Ville Syrjälä
ICL doesn't support FEC with a x1 DP link. Make sure
we don't try to enable FEC in such cases.
Requires a bit of reordering to make sure we've computed lane_count
before checking it.
Cc: Luca Coelho
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp.c
From: Ville Syrjälä
The current check just asserts that we need FEC to use DSC
with (non-eDP) DP-SST. But MST also needs FEC for DSC. Just
check for !eDP instead to cover all the cases correctly.
Cc: Luca Coelho
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
Move functions within intel_fbdev.c to simplify later updates. No
functional changes.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/i915/display/intel_fbdev.c | 154 ++---
1 file changed, 77 insertions(+), 77 deletions(-)
diff --git
Move code from ad-hoc fbdev callbacks into DRM client functions
and remove the old callbacks. The functions instruct the client
to poll for changed output or restore the display.
The DRM core calls both, the old callbacks and the new client
helpers, from the same places. The new functions perform
Replace all code that initializes or releases fbdev emulation
throughout the driver. Instead initialize the fbdev client by a
single call to i915_fbdev_setup() after i915 has registered its
DRM device. Just like similar code in other drivers, i915 fbdev
emulation now acts as a regular DRM client.
Initialize i915's fbdev client by giving an instance of struct
drm_client_funcs to drm_client_init(). Also clean up with
drm_client_release().
Doing this in i915 prevents fbdev helpers from initializing and
releasing the client internally (see drm_fb_helper_init()). No
functional change yet; the
Convert i915's fbdev code to struct drm_client. Replaces the current
ad-hoc integration. The conversion includes a number of cleanups.
As with most other driver's fbdev emulation, fbdev in i915 is now
just another DRM client that runs after the DRM device has been
registered. This allows to
On Wed, Sep 13, 2023 at 03:02:58PM +0300, Jani Nikula wrote:
> On Wed, 13 Sep 2023, Jouni Högander wrote:
> > It's not necessary to carry separate suspended status information in
> > intel_runtime_pm struct as this information is already in underlying device
> > structure. Remove it and use
On 11/09/23 03:46, Matthew Auld wrote:
On 09/09/2023 17:09, Arunpravin Paneer Selvam wrote:
Problem statement: The current method roundup_power_of_two()
to allocate contiguous address triggers -ENOSPC in some cases
even though we have enough free spaces and so to help with
that we introduce a
On Thu, May 25, 2023 at 11:09:30AM +0300, Luca Coelho wrote:
> On Tue, 2023-05-02 at 17:39 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > ICL doesn't support FEC with a x1 DP link. Make sure
> > we don't try to enable FEC in such cases.
> >
> > Signed-off-by: Ville Syrjälä
> > ---
On Thu, May 25, 2023 at 12:51:28PM +0300, Luca Coelho wrote:
> On Wed, 2023-05-03 at 14:36 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Track DP enhanced framing properly in the crtc state instead
> > of relying just on the cached DPCD everywhere, and hook it
> > up into the state
On Monday, 11 September 2023 11:01:42 CEST Mauro Carvalho Chehab wrote:
> On Fri, 8 Sep 2023 14:32:41 +0200
> Janusz Krzysztofik wrote:
>
> > While reading KTAP data from /dev/kmsg we now ignore interrupt signals
> > that may occur during read() and we continue reading the data. No
> >
== Series Details ==
Series: drm/i915: Remove runtime suspended boolean from intel_runtime_pm struct
URL : https://patchwork.freedesktop.org/series/123637/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13624 -> Patchwork_123637v1
== Series Details ==
Series: drm/i915: Remove runtime suspended boolean from intel_runtime_pm struct
URL : https://patchwork.freedesktop.org/series/123637/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Create a separate kernel context if a platform requires
GGTT updates using MI_UPDATE_GTT blitter command.
Subsequent patch will introduce methods to update
GGTT using this bind context and MI_UPDATE_GTT blitter
command.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_engine.h
MTL can hang because of a HW bug while parallel reading/writing
from/to LMEM/GTTMMADR BAR so try to reduce GGTT update
related pci transactions with blitter command as recommended
for Wa_13010847436 and Wa_14019519902.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_gtt.c | 3 ++-
1
Implement GGTT update method with blitter command, MI_UPDATE_GTT
and install those handlers if a platform requires that.
v2: Make sure we hold the GT wakeref and Blitter engine wakeref before
we call mutex_lock/intel_context_enter below. When GT/engine are not
awake, the intel_context_enter calls
Toggle binder context ready status when needed.
To issue gpu commands, the driver must be primed to receive
requests. Maintain binder-based GGTT update disablement until driver
probing completes. Moreover, implement a temporary disablement
of blitter prior to entering suspend, followed by
Add i915_ggtt_require_binder() to indicate that i915
needs to create binder context which will be used
by subsequent patch to enable i915_address_space vfuncs
that will use GPU commands to update GGTT.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
Implement a way to iterate over sgt with pre-initialized
sgt_iter state.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_gtt.h | 3 +++
drivers/gpu/drm/i915/i915_scatterlist.h | 10 ++
2 files changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h
From: Chris Wilson
When runtime pm is first woken, it will synchronously call the
registered callbacks for the device. These callbacks
may pull in their own forest of locks, which we do not want to
conflate with the intel_wakeref.mutex. A second minor benefit to
reducing the coverage of the
Implement a way to update GGTT using MI_UPDATE_GTT command
when possible for MTL as a suggested work around for HW bugs,
Wa_13010847436 and Wa_14019519902.
v2: Fix lockdep warning related to GT wakeref vs
blitter engine wakeref.
v3: Rearrange patches/diffs to fix code mixups(Andi)
Implement a way to update GGTT using MI_UPDATE_GTT command
when possible for MTL as a suggested work around for HW bugs,
Wa_13010847436 and Wa_14019519902.
v2: Fix lockdep warning related to GT wakeref vs
blitter engine wakeref.
v3: Rearrange patches/diffs to fix code mixups(Andi)
On Monday, 11 September 2023 13:57:29 CEST Mauro Carvalho Chehab wrote:
> On Mon, 11 Sep 2023 11:28:32 +0200
> Janusz Krzysztofik wrote:
>
> > Hi Mauro,
> >
> > Thanks for review.
> >
> > On Monday, 11 September 2023 10:52:51 CEST Mauro Carvalho Chehab wrote:
> > > On Fri, 8 Sep 2023 14:32:39
On 25/08/2023 02:56, Dmitry Baryshkov wrote:
Note, numbering for this series starts from v5, since there were several
revisions for this patchset under a different series title ([1]).
USB altmodes code would send OOB notifications to the drm_connector
specified in the device tree. However as
On Tue, Aug 29, 2023 at 02:39:08PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Populate connector->ddc for all output types that don't already
> do so, and clean up a bunch of code as a result of having the
> ddc i2c adapter in easy reach. And this also provides the sysfs
> "ddc"
On 9/7/2023 3:48 PM, Andi Shyti wrote:
Hi Nirmoy,
On Wed, Sep 06, 2023 at 01:31:20PM +0200, Nirmoy Das wrote:
Implement GGTT update method with blitter command, MI_UPDATE_GTT
and install those handlers if a platform requires that.
v2: Make sure we hold the GT wakeref and Blitter engine
On 9/7/2023 3:41 PM, Andi Shyti wrote:
Hi Nirmoy,
[...]
+ /* mark the bind context's availability status */
+ bool bind_context_ready;
Do we need some locking here?
bind_context_ready is changed in suspend/resume or after mod probe so no need to
worry about locking here.
On Wed, 13 Sep 2023, Jouni Högander wrote:
> It's not necessary to carry separate suspended status information in
> intel_runtime_pm struct as this information is already in underlying device
> structure. Remove it and use pm_runtime_suspended() to obtain suspended
> status information when
Quoting Patchwork (2023-09-12 19:24:10-03:00)
>== Series Details ==
>
>Series: drm/i915/cx0: Add step for programming msgbus timer (rev2)
>URL : https://patchwork.freedesktop.org/series/123551/
>State : failure
>
>== Summary ==
>
>CI Bug Log - changes from CI_DRM_13623_full ->
Hi Ville,
It was confirmed by Jani Nikula that it is 20. Here is his comments.
" display ver 20 is what the hardware reports to us. the current info is at
bspecb70821 if you scroll down to "LNL GMD Architecture IDs"
"
Br
Vinod
From: Ville Syrjälä
Sent:
On Mon, Sep 04, 2023 at 02:55:17PM +0300, Vinod Govindapillai wrote:
> For LNL onwards, FBC can be supported on planes with per
> pixel alpha
>
> Bspec: 69560
> Signed-off-by: Vinod Govindapillai
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 3 ++-
> 1 file changed, 2 insertions(+), 1
On 12.09.2023 23:05, Matt Roper wrote:
On Tue, Sep 12, 2023 at 09:35:21AM +0200, Andrzej Hajda wrote:
Some DG2 firmware locks this register for modification. Using wa_add
with read_mask 0 allows to skip checks of such registers.
Signed-off-by: Andrzej Hajda
---
It's not necessary to carry separate suspended status information in
intel_runtime_pm struct as this information is already in underlying device
structure. Remove it and use pm_runtime_suspended() to obtain suspended
status information when needed.
Cc: Jani Nikula
Cc: Imre Deak
Signed-off-by:
== Series Details ==
Series: linux-next: manual merge of the drm-misc tree with Linus' tree (rev3)
URL : https://patchwork.freedesktop.org/series/60886/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/60886/revisions/3/mbox/ not
applied
Applying:
On Wed, Sep 13, 2023 at 11:09:39AM +1000, Stephen Rothwell wrote:
> Today's linux-next merge of the drm-misc tree got a conflict in:
>
> drivers/gpu/drm/mediatek/mtk_dpi.c
>
> between commits:
>
> 47d4bb6bbcdb ("drm/mediatek: mtk_dpi: Simplify with devm_drm_bridge_add()")
> 90c95c3892dd
== Series Details ==
Series: drm/i915/gt: Prevent error pointer dereference
URL : https://patchwork.freedesktop.org/series/123628/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13623 -> Patchwork_123628v1
Summary
---
Hi Dan,
On Wed, Sep 13, 2023 at 11:17:41AM +0300, Dan Carpenter wrote:
> Move the check for "if (IS_ERR(obj))" in front of the call to
> i915_gem_object_set_cache_coherency() which dereferences "obj".
> Otherwise it will lead to a crash.
>
> Fixes: 43aa755eae2c ("drm/i915/mtl: Update cache
== Series Details ==
Series: Add DSC fractional bpp support (rev7)
URL : https://patchwork.freedesktop.org/series/111391/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13623_full -> Patchwork_111391v7_full
Summary
---
Move the check for "if (IS_ERR(obj))" in front of the call to
i915_gem_object_set_cache_coherency() which dereferences "obj".
Otherwise it will lead to a crash.
Fixes: 43aa755eae2c ("drm/i915/mtl: Update cache coherency setting for context
structure")
Signed-off-by: Dan Carpenter
---
On 2023-07-05 10:30:25 [+0100], Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Commit ade8a0f59844 ("drm/i915: Make all GPU resets atomic") added a
> preempt disable section over the hardware reset callback to prepare the
> driver for being able to reset from atomic contexts.
…
This missed
== Series Details ==
Series: Add DSC fractional bpp support (rev7)
URL : https://patchwork.freedesktop.org/series/111391/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13623 -> Patchwork_111391v7
Summary
---
== Series Details ==
Series: drm/tests: Fix incorrect argument in drm_test_mm_insert_range
URL : https://patchwork.freedesktop.org/series/123541/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13622_full -> Patchwork_123541v1_full
> -Original Message-
> From: Sousa, Gustavo
> Sent: Tuesday, September 12, 2023 6:59 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Kahola, Mika ; Taylor, Clinton A
>
> Subject: [PATCH v2] drm/i915/cx0: Add step for programming msgbus timer
>
> There was a recent update in the BSpec
== Series Details ==
Series: Add DSC fractional bpp support (rev7)
URL : https://patchwork.freedesktop.org/series/111391/
State : warning
== Summary ==
Error: dim checkpatch failed
335c97448415 drm/display/dp: Add helper function to get DSC bpp prescision
1e1010fd7a35 drm/i915/display: Store
== Series Details ==
Series: Add DSC fractional bpp support (rev7)
URL : https://patchwork.freedesktop.org/series/111391/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
> Subject: [PATCH 1/8] drm/display/dp: Add helper function to get DSC bpp
> prescision
>
> From: Ankit Nautiyal
>
> Add helper to get the DSC bits_per_pixel precision for the DP sink.
>
I think you forgot to add my reviewed by that I gave in the last revision
Anyways,
LGTM.
Reviewed-by:
From: Ankit Nautiyal
This patch adds support to iterate over compressed output bpp as per the
fractional step, supported by DP sink.
v2:
-Avoid ending up with compressed bpp, same as pipe bpp. (Stan)
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
From: Swati Sharma
If force_dsc_fractional_bpp_en is set through debugfs allow DSC iff
compressed bpp is fractional. Continue if the computed compressed bpp
turns out to be a integer.
v2:
-Use helpers for fractional, integral bits of bits_per_pixel. (Suraj)
-Fix comment (Suraj)
Signed-off-by:
From: Swati Sharma
DSC_Sink_BPP_Precision entry is added to i915_dsc_fec_support_show
to depict sink's precision.
Also, new debugfs entry is created to enforce fractional bpp.
If Force_DSC_Fractional_BPP_en is set then while iterating over
output bpp with fractional step size we will continue if
From: Ankit Nautiyal
MTL+ supports fractional compressed bits_per_pixel, with precision of
1/16. This compressed bpp is stored in U6.4 format.
Accommodate the precision during calculation of transfer unit data
for hblank_early calculation.
v2:
-Fixed tu_data calculation while dealing with U6.4
From: Ankit Nautiyal
Add helper to get the DSC bits_per_pixel precision for the DP sink.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/display/drm_dp_helper.c | 27 +
include/drm/display/drm_dp_helper.h | 1 +
2 files changed, 28 insertions(+)
diff --git
From: Vandita Kulkarni
Consider the fractional bpp while reading the qp values.
v2: Use helpers for fractional, integral bits of bits_per_pixel. (Suraj)
Signed-off-by: Vandita Kulkarni
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
.../gpu/drm/i915/display/intel_qp_tables.c
From: Ankit Nautiyal
MTL+ supports fractional compressed bits_per_pixel, with precision of
1/16. This compressed bpp is stored in U6.4 format.
Accommodate this precision while computing m_n values.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
his patch series adds support for DSC fractional compressed bpp
for MTL+. The series starts with some fixes, followed by patches that
lay groundwork to iterate over valid compressed bpps to select the
'best' compressed bpp with optimal link configuration (taken from
upstream series:
From: Ankit Nautiyal
DSC parameter bits_per_pixel is stored in U6.4 format.
The 4 bits represent the fractional part of the bpp.
Currently we use compressed_bpp member of dsc structure to store
only the integral part of the bits_per_pixel.
To store the full bits_per_pixel along with the
99 matches
Mail list logo
