[Intel-gfx] ✓ Fi.CI.IGT: success for drm/print: Add drm_dbg_ratelimited

2023-10-06 Thread Patchwork
== Series Details == Series: drm/print: Add drm_dbg_ratelimited URL : https://patchwork.freedesktop.org/series/124722/ State : success == Summary == CI Bug Log - changes from CI_DRM_13722_full -> Patchwork_124722v1_full Summary ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/lnl: Remove watchdog timers for PSR

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915/lnl: Remove watchdog timers for PSR URL : https://patchwork.freedesktop.org/series/124715/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13722_full -> Patchwork_124715v1_full Summary

Re: [Intel-gfx] [PATCH 3/4] drm/i915/guc: Add support for w/a KLVs

2023-10-06 Thread Belgaumkar, Vinay
On 9/15/2023 2:55 PM, john.c.harri...@intel.com wrote: From: John Harrison To prevent running out of bits, new w/a enable flags are being added via a KLV system instead of a 32 bit flags word. Signed-off-by: John Harrison --- .../gpu/drm/i915/gt/uc/abi/guc_errors_abi.h | 1 +

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Enable Wa_16019325821

2023-10-06 Thread Belgaumkar, Vinay
On 9/15/2023 2:55 PM, john.c.harri...@intel.com wrote: From: John Harrison Some platforms require holding RCS context switches until CCS is idle (the reverse w/a of Wa_14014475959). Some platforms require both versions. Signed-off-by: John Harrison ---

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Annotate struct ct_incoming_msg with __counted_by

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915/guc: Annotate struct ct_incoming_msg with __counted_by URL : https://patchwork.freedesktop.org/series/124747/ State : success == Summary == CI Bug Log - changes from CI_DRM_13723 -> Patchwork_124747v1

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Create the guc_to_i915() wrapper (rev2)

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915/guc: Create the guc_to_i915() wrapper (rev2) URL : https://patchwork.freedesktop.org/series/124686/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13722_full -> Patchwork_124686v2_full

Re: [Intel-gfx] [PATCH 1/3] drm/i915/guc: Support new and improved engine busyness

2023-10-06 Thread John Harrison
On 10/3/2023 13:58, Umesh Nerlige Ramappa wrote: On Fri, Sep 22, 2023 at 03:25:08PM -0700, john.c.harri...@intel.com wrote: From: John Harrison The GuC has been extended to support a much more friendly engine busyness interface. So partition the old interface into a 'busy_v1' space and add

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915: Define and use GuC and CTB TLB invalidation routines URL : https://patchwork.freedesktop.org/series/124744/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13722 -> Patchwork_124744v1

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915: Define and use GuC and CTB TLB invalidation routines URL : https://patchwork.freedesktop.org/series/124744/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915: Define and use GuC and CTB TLB invalidation routines URL : https://patchwork.freedesktop.org/series/124744/ State : warning == Summary == Error: dim checkpatch failed a989e19c9fa8 drm/i915: Add GuC TLB Invalidation device info flags b8ea885e3069

Re: [Intel-gfx] [PATCH 1/2] drm/i915: drop -Wall and related disables from cflags as redundant

2023-10-06 Thread Nick Desaulniers
On Fri, Oct 6, 2023 at 5:35 AM Jani Nikula wrote: > > The kernel top level Makefile, and recently scripts/Makefile.extrawarn, > have included -Wall, and the disables -Wno-format-security and > $(call cc-disable-warning,frame-address,) for a very long time. They're > redundant in our local

Re: [Intel-gfx] [PATCH] drm/i915/guc: Annotate struct ct_incoming_msg with __counted_by

2023-10-06 Thread Andi Shyti
Hi Kees, On Fri, Oct 06, 2023 at 01:17:45PM -0700, Kees Cook wrote: > Prepare for the coming implementation by GCC and Clang of the __counted_by > attribute. Flexible array members annotated with __counted_by can have > their accesses bounds-checked at run-time via CONFIG_UBSAN_BOUNDS (for >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Enable WA 14018913170 (rev2)

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915/guc: Enable WA 14018913170 (rev2) URL : https://patchwork.freedesktop.org/series/124694/ State : success == Summary == CI Bug Log - changes from CI_DRM_13722 -> Patchwork_124694v2 Summary ---

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: align with W=1 warnings (rev2)

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915: align with W=1 warnings (rev2) URL : https://patchwork.freedesktop.org/series/124718/ State : failure == Summary == Error: patch https://patchwork.freedesktop.org/api/1.0/series/124718/revisions/2/mbox/ not applied Applying: drm/i915: drop -Wall and

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/guc: Enable WA 14018913170 (rev2)

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915/guc: Enable WA 14018913170 (rev2) URL : https://patchwork.freedesktop.org/series/124694/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH] drm/i915/guc: Annotate struct ct_incoming_msg with __counted_by

2023-10-06 Thread Gustavo A. R. Silva
On 10/6/23 22:17, Kees Cook wrote: Prepare for the coming implementation by GCC and Clang of the __counted_by attribute. Flexible array members annotated with __counted_by can have their accesses bounds-checked at run-time via CONFIG_UBSAN_BOUNDS (for array indexing) and CONFIG_FORTIFY_SOURCE

Re: [Intel-gfx] Regression in linux-next

2023-10-06 Thread Wysocki, Rafael J
Hi, On 10/5/2023 5:58 PM, Borah, Chaitanya Kumar wrote: Hello Rafael, Hope you are doing well. I am Chaitanya from the linux graphics team in Intel. This mail is regarding a regression we are seeing in our CI runs[1] on linux-next repository. Thanks for the report, I think that this is

Re: [Intel-gfx] [PATCH] drm/i915/guc: Update 'recommended' version to 70.12.1 for DG2/ADL-S/ADL-P/MTL

2023-10-06 Thread Andi Shyti
Hi John, > The latest GuC has new features and new workarounds that we wish to > enable. So let the universe know that it is useful to update their > firmware. > > Signed-off-by: John Harrison Reviewed-by: Andi Shyti Andi

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Update 'recommended' version to 70.12.1 for DG2/ADL-S/ADL-P/MTL

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915/guc: Update 'recommended' version to 70.12.1 for DG2/ADL-S/ADL-P/MTL URL : https://patchwork.freedesktop.org/series/124733/ State : success == Summary == CI Bug Log - changes from CI_DRM_13722 -> Patchwork_124733v1

[Intel-gfx] [PATCH] drm/i915/guc: Annotate struct ct_incoming_msg with __counted_by

2023-10-06 Thread Kees Cook
Prepare for the coming implementation by GCC and Clang of the __counted_by attribute. Flexible array members annotated with __counted_by can have their accesses bounds-checked at run-time via CONFIG_UBSAN_BOUNDS (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family functions).

[Intel-gfx] ✓ Fi.CI.BAT: success for Trim some pre-production code (rev2)

2023-10-06 Thread Patchwork
== Series Details == Series: Trim some pre-production code (rev2) URL : https://patchwork.freedesktop.org/series/124705/ State : success == Summary == CI Bug Log - changes from CI_DRM_13722 -> Patchwork_124705v2 Summary ---

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Remove xehpsdv support

2023-10-06 Thread Andrzej Hajda
On 06.10.2023 10:31, Tvrtko Ursulin wrote: From: Tvrtko Ursulin XeHP SDV was a pre-production hardware used to bring up ATS and was not generally available. Since latter was since explicitly added, there is no need to keep the code for the former around. Signed-off-by: Tvrtko Ursulin ---

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Remove incomplete PVC plumbing

2023-10-06 Thread Andrzej Hajda
On 06.10.2023 10:31, Tvrtko Ursulin wrote: From: Tvrtko Ursulin PVC support will not be coming to i915 so get rid of its partial enablement and reduce the driver maintenance burden. Signed-off-by: Tvrtko Ursulin --- .../gpu/drm/i915/gem/i915_gem_object_types.h | 2 +-

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Remove early/pre-production Haswell code

2023-10-06 Thread Andrzej Hajda
On 06.10.2023 10:31, Tvrtko Ursulin wrote: From: Tvrtko Ursulin It is not our policy to keep pre-production hardware support for this long so I guess this one was just forgotten. Signed-off-by: Tvrtko Ursulin Reviewed-by: Andrzej Hajda Regards Andrzej ---

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Trim some pre-production code (rev2)

2023-10-06 Thread Patchwork
== Series Details == Series: Trim some pre-production code (rev2) URL : https://patchwork.freedesktop.org/series/124705/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add wrapper for getiing display step (rev3)

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915: Add wrapper for getiing display step (rev3) URL : https://patchwork.freedesktop.org/series/124340/ State : success == Summary == CI Bug Log - changes from CI_DRM_13722 -> Patchwork_124340v3 Summary

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Add wrapper for getiing display step (rev3)

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915: Add wrapper for getiing display step (rev3) URL : https://patchwork.freedesktop.org/series/124340/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [bug report] drm/i915: Move submission tasklet to i915_sched_engine

2023-10-06 Thread John Harrison
Tvrtko, would you have any thoughts on this one? John. On 10/4/2023 02:57, Dan Carpenter wrote: Hello Matthew Brost, This is a semi-automatic email about new static checker warnings. The patch 22916bad07a5: "drm/i915: Move submission tasklet to i915_sched_engine" from Jun 17, 2021, leads to

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add bigjoiner force enable option to debugfs

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915: Add bigjoiner force enable option to debugfs URL : https://patchwork.freedesktop.org/series/124730/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13722 -> Patchwork_124730v1 Summary

Re: [Intel-gfx] [PATCH v7 2/5] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread Cavitt, Jonathan
As far as I can tell, most if not all of the below comments have now been addressed in version 8. Please check to verify this is correct. -Jonathan Cavitt -Original Message- From: Tvrtko Ursulin Sent: Friday, October 6, 2023 6:05 AM To: Cavitt, Jonathan ;

[Intel-gfx] [PATCH v8 6/7] drm/i915/gt: Increase sleep in gt_tlb selftest sanitycheck

2023-10-06 Thread Jonathan Cavitt
For the gt_tlb live selftest, when operating on the GSC engine, increase the timeout from 10 ms to 200 ms because the GSC engine is a bit slower than the rest. Signed-off-by: Jonathan Cavitt --- drivers/gpu/drm/i915/gt/selftest_tlb.c | 11 +-- 1 file changed, 9 insertions(+), 2

[Intel-gfx] [PATCH v8 3/7] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread Jonathan Cavitt
From: Prathap Kumar Valsan The GuC firmware had defined the interface for Translation Look-Aside Buffer (TLB) invalidation. We should use this interface when invalidating the engine and GuC TLBs. Add additional functionality to intel_gt_invalidate_tlb, invalidating the GuC TLBs and falling back

[Intel-gfx] [PATCH v8 7/7] drm/i915: Enable GuC TLB invalidations for MTL

2023-10-06 Thread Jonathan Cavitt
Enable GuC TLB invalidations for MTL. Though more platforms than just MTL support GuC TLB invalidations, MTL is presently the only platform that requires it for any purpose, so only enable it there for now to minimize cross-platform impact. Signed-off-by: Jonathan Cavitt ---

[Intel-gfx] [PATCH v8 2/7] drm/i915/guc: Add CT size delay helper

2023-10-06 Thread Jonathan Cavitt
Add a helper function to the GuC CT buffer that reports the expected time to process all outstanding requests. As of now, there is no functionality to check number of requests in the buffer, so the helper function just reports 2 seconds, or 1ms per request up to the maximum number of requests the

[Intel-gfx] [PATCH v8 5/7] drm/i915: No TLB invalidation on wedged GT

2023-10-06 Thread Jonathan Cavitt
It is not an error for GuC TLB invalidations to fail when the GT is wedged or disabled, so do not process a wait failure as one in guc_send_invalidate_tlb. Signed-off-by: Fei Yang Signed-off-by: Jonathan Cavitt CC: John Harrison --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 12

[Intel-gfx] [PATCH v8 4/7] drm/i915: No TLB invalidation on suspended GT

2023-10-06 Thread Jonathan Cavitt
In case of GT is suspended, don't allow submission of new TLB invalidation request and cancel all pending requests. The TLB entries will be invalidated either during GuC reload or on system resume. Signed-off-by: Fei Yang Signed-off-by: Jonathan Cavitt CC: John Harrison ---

[Intel-gfx] [PATCH v8 1/7] drm/i915: Add GuC TLB Invalidation device info flags

2023-10-06 Thread Jonathan Cavitt
Add device info flags for if GuC TLB Invalidation is enabled. Signed-off-by: Jonathan Cavitt --- drivers/gpu/drm/i915/i915_drv.h | 3 ++- drivers/gpu/drm/i915/intel_device_info.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [PATCH v8 0/7] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread Jonathan Cavitt
Implement GuC-based TLB invalidations and use them on MTL. v2: - Add missing supporting patches. v3: - Split suspend/resume changes and multi-gt support into separate patches. - Only perform GuC TLB invalidation functions when supported. - Move intel_guc_is_enabled check function to usage

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Store DSC DPCD capabilities in the connector

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915: Store DSC DPCD capabilities in the connector URL : https://patchwork.freedesktop.org/series/124723/ State : success == Summary == CI Bug Log - changes from CI_DRM_13722 -> Patchwork_124723v1 Summary

Re: [Intel-gfx] [PATCH v7 4/5] drm/i915/gt: Increase sleep in gt_tlb selftest sanitycheck

2023-10-06 Thread John Harrison
On 10/5/2023 12:35, Jonathan Cavitt wrote: For the gt_tlb live selftest, increase the timeout from 10 ms to 200 ms. 200 ms should be more than enough time, and 10 ms was too aggressive. This is simply waiting for a request to begin executing on an idle system? How can 10ms possibly be too

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Store DSC DPCD capabilities in the connector

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915: Store DSC DPCD capabilities in the connector URL : https://patchwork.freedesktop.org/series/124723/ State : warning == Summary == Error: dim checkpatch failed a34e461c1c43 drm/i915/dp: Sanitize DPCD revision check in intel_dp_get_dsc_sink_cap()

Re: [Intel-gfx] [PATCH 2/2] drm/i915: enable W=1 warnings by default

2023-10-06 Thread Nathan Chancellor
On Fri, Oct 06, 2023 at 03:34:47PM +0300, Jani Nikula wrote: > We enable a bunch more compiler warnings than the kernel > defaults. However, they've drifted to become a unique set of warnings, > and have increasingly fallen behind from the W=1 set. > > Align with the W=1 warnings from

Re: [Intel-gfx] [PATCH v7 3/5] drm/i915: No TLB invalidation on wedged or suspended GT

2023-10-06 Thread John Harrison
On 10/6/2023 03:23, Tvrtko Ursulin wrote: On 05/10/2023 20:35, Jonathan Cavitt wrote: ... +static bool intel_gt_is_enabled(const struct intel_gt *gt) +{ +    /* Check if GT is wedged or suspended */ +    if (intel_gt_is_wedged(gt) || !intel_irqs_enabled(gt->i915)) +    return false; +  

Re: [Intel-gfx] [PATCH 1/2] drm/i915: drop -Wall and related disables from cflags as redundant

2023-10-06 Thread Nathan Chancellor
On Fri, Oct 06, 2023 at 03:34:46PM +0300, Jani Nikula wrote: > The kernel top level Makefile, and recently scripts/Makefile.extrawarn, > have included -Wall, and the disables -Wno-format-security and > $(call cc-disable-warning,frame-address,) for a very long time. They're > redundant in our local

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/print: Add drm_dbg_ratelimited

2023-10-06 Thread Patchwork
== Series Details == Series: drm/print: Add drm_dbg_ratelimited URL : https://patchwork.freedesktop.org/series/124722/ State : success == Summary == CI Bug Log - changes from CI_DRM_13722 -> Patchwork_124722v1 Summary ---

Re: [Intel-gfx] [PATCH 2/2] drm/i915: enable W=1 warnings by default

2023-10-06 Thread kernel test robot
Hi Jani, kernel test robot noticed the following build warnings: [auto build test WARNING on drm-tip/drm-tip] url: https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-i915-drop-Wall-and-related-disables-from-cflags-as-redundant/20231006-203658 base: git

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/print: Add drm_dbg_ratelimited

2023-10-06 Thread Patchwork
== Series Details == Series: drm/print: Add drm_dbg_ratelimited URL : https://patchwork.freedesktop.org/series/124722/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH v7 2/5] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread John Harrison
On 10/6/2023 09:18, John Harrison wrote: On 10/6/2023 03:20, Nirmoy Das wrote: On 10/6/2023 12:11 PM, Tvrtko Ursulin wrote: Hi, Andi asked me to summarize what I think is unaddressed review feedback so far in order to consolidate and enable hopefully things to move forward. So I will try

Re: [Intel-gfx] [PATCH v7 2/5] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread John Harrison
On 10/6/2023 03:20, Nirmoy Das wrote: On 10/6/2023 12:11 PM, Tvrtko Ursulin wrote: Hi, Andi asked me to summarize what I think is unaddressed review feedback so far in order to consolidate and enable hopefully things to move forward. So I will try to re-iterate the comments and questions

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: align with W=1 warnings

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915: align with W=1 warnings URL : https://patchwork.freedesktop.org/series/124718/ State : success == Summary == CI Bug Log - changes from CI_DRM_13722 -> Patchwork_124718v1 Summary --- **SUCCESS**

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Remove early/pre-production Haswell code

2023-10-06 Thread Zanoni, Paulo R
On Fri, 2023-10-06 at 09:31 +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > It is not our policy to keep pre-production hardware support for this long > so I guess this one was just forgotten. Wouldn't it make sense to also remove the PCI IDs if they never made it to the real production

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: align with W=1 warnings

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915: align with W=1 warnings URL : https://patchwork.freedesktop.org/series/124718/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/lnl: Remove watchdog timers for PSR

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915/lnl: Remove watchdog timers for PSR URL : https://patchwork.freedesktop.org/series/124715/ State : success == Summary == CI Bug Log - changes from CI_DRM_13722 -> Patchwork_124715v1 Summary ---

Re: [Intel-gfx] [PATCH 01/19] drm/i915/dp: Sanitize DPCD revision check in intel_dp_get_dsc_sink_cap()

2023-10-06 Thread Lisovskiy, Stanislav
On Fri, Oct 06, 2023 at 04:37:09PM +0300, Imre Deak wrote: > Check only the eDP or the DP specific DPCD revision depending on the > sink type. Pass the corresponding revision to the function, which allows > getting the DSC caps of a branch device (in an MST topology, which has > its own DPCD and

[Intel-gfx] [PATCH] drm/i915/guc: Update 'recommended' version to 70.12.1 for DG2/ADL-S/ADL-P/MTL

2023-10-06 Thread John . C . Harrison
From: John Harrison The latest GuC has new features and new workarounds that we wish to enable. So let the universe know that it is useful to update their firmware. Signed-off-by: John Harrison --- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 8 1 file changed, 4 insertions(+), 4

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/atomic-helper: relax unregistered connector check

2023-10-06 Thread Patchwork
== Series Details == Series: drm/atomic-helper: relax unregistered connector check URL : https://patchwork.freedesktop.org/series/124664/ State : success == Summary == CI Bug Log - changes from CI_DRM_13719_full -> Patchwork_124664v1_full

[Intel-gfx] ✗ Fi.CI.BAT: failure for Trim some pre-production code

2023-10-06 Thread Patchwork
== Series Details == Series: Trim some pre-production code URL : https://patchwork.freedesktop.org/series/124705/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13722 -> Patchwork_124705v1 Summary --- **FAILURE**

[Intel-gfx] [CI] PR for new GuC v70.12.1

2023-10-06 Thread John . C . Harrison
The following changes since commit 5105ff4b9f43ba08d0a22260d670120e53c4b667: Merge branch 'mlimonci/upstream-packaging' into 'main' (2023-10-04 12:35:17 +) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-firmware guc_70.12.1 for you to fetch changes up to

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Trim some pre-production code

2023-10-06 Thread Patchwork
== Series Details == Series: Trim some pre-production code URL : https://patchwork.freedesktop.org/series/124705/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] [PATCH] drm/i915: Add bigjoiner force enable option to debugfs

2023-10-06 Thread Stanislav Lisovskiy
For validation purposes, it might be useful to be able to force Bigjoiner mode, even if current dotclock/resolution do not require that. Lets add such to option to debugfs. Signed-off-by: Stanislav Lisovskiy --- .../drm/i915/display/intel_display_debugfs.c | 71 +++

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ddi: Fix i2c_adapter assignment (rev3)

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915/ddi: Fix i2c_adapter assignment (rev3) URL : https://patchwork.freedesktop.org/series/124646/ State : success == Summary == CI Bug Log - changes from CI_DRM_13722 -> Patchwork_124646v3 Summary ---

[Intel-gfx] [PATCH 19/19] drm/i915/dp: Remove unused DSC caps from intel_dp

2023-10-06 Thread Imre Deak
The previous patches converted all users of the DSC DPCD caps to look these up from the connector, so remove the version stored in intel_dp. A follow-up patchset will read out the MST connector specific capabilities in intel_dp_add_mst_connector() ->

[Intel-gfx] [PATCH 16/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_mode_valid()

2023-10-06 Thread Imre Deak
Use the connector's DSC DPCD capabilities in intel_dp_mode_valid(). Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH 17/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_dsc_compute_config()

2023-10-06 Thread Imre Deak
Use the connector's DSC DPCD capabilities in intel_dp_dsc_compute_config(). Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH 18/19] drm/i915/dp_mst: Use connector DSC DPCD in intel_dp_mst_mode_valid_ctx()

2023-10-06 Thread Imre Deak
Use the connector's DSC DPCD capabilities in intel_dp_mst_mode_valid_ctx(). Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c

[Intel-gfx] [PATCH 13/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_dsc_compute_params()

2023-10-06 Thread Imre Deak
Use the connector's DSC DPCD capabilities in intel_dp_dsc_compute_params(). Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 17 - 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH 12/19] drm/i915/dp: Pass only the required DSC DPCD to intel_dp_sink_dsc_version_minor()

2023-10-06 Thread Imre Deak
intel_dp_sink_dsc_version_minor() only requires the DSC DPCD, so pass only this to the function. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH 14/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_dsc_supports_format()

2023-10-06 Thread Imre Deak
Use the connector's DSC DPCD capabilities in intel_dp_dsc_supports_format(). Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH 11/19] drm/i915/dp: Pass only the required i915 to intel_dp_source_dsc_version_minor()

2023-10-06 Thread Imre Deak
intel_dp_source_dsc_version_minor() only requires the i915 pointer, so pass only this to the function. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH 15/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_dsc_get_slice_count()

2023-10-06 Thread Imre Deak
Use the connector's DSC DPCD capabilities in intel_dp_dsc_get_slice_count(). Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 12 ++-- drivers/gpu/drm/i915/display/intel_dp.h | 2 +- drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- 3 files changed, 8

[Intel-gfx] [PATCH 09/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_dsc_max_sink_compressed_bppx16()

2023-10-06 Thread Imre Deak
Use the connector's DSC DPCD capabilities in intel_dp_dsc_max_sink_compressed_bppx16(). Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 19 +++ 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH 10/19] drm/i915/dp: Pass connector DSC DPCD to drm_dp_dsc_sink_supported_input_bpcs()

2023-10-06 Thread Imre Deak
Use the connector's DSC DPCD capabilities in drm_dp_dsc_sink_supported_input_bpcs(). Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 +--- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git

[Intel-gfx] [PATCH 07/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_supports_fec()

2023-10-06 Thread Imre Deak
Use the connector's DSC DPCD capabilities in intel_dp_supports_fec(). Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH 08/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_supports_dsc()

2023-10-06 Thread Imre Deak
Use the connector's DSC DPCD capabilities in intel_dp_supports_dsc(). Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [PATCH 05/19] drm/i915/dp: Use connector DSC DPCD in i915_dsc_fec_support_show()

2023-10-06 Thread Imre Deak
Use the connector's DSC DPCD capabilities in i915_dsc_fec_support_show() instead of the version stored in the encoder. Atm the two are identical, but a follow-up patch will store the (MST) connector specific version in the connector. Signed-off-by: Imre Deak ---

[Intel-gfx] [PATCH 06/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_dsc_compute_max_bpp()

2023-10-06 Thread Imre Deak
Use the connector's DSC DPCD capabilities in intel_dp_dsc_compute_max_bpp() instead of the version stored in the encoder. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 13 - drivers/gpu/drm/i915/display/intel_dp.h | 3 ++-

[Intel-gfx] [PATCH 04/19] drm/i915/dp: Use i915/intel connector local variables in i915_dsc_fec_support_show()

2023-10-06 Thread Imre Deak
Cahce the i915 specific device and connector pointers in i915_dsc_fec_support_show(). Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_display_debugfs.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git

[Intel-gfx] [PATCH 03/19] drm/i915/dp_mst: Set connector DSC capabilities and decompression AUX

2023-10-06 Thread Imre Deak
Similarly to eDP and SST-DP connectors read out the DSC capabilities for MST connectors as well. Atm these will match the root port's DSC caps and only used after a follow-up change enables the decompression for each stream separately (vs. the current way of enabling it only globally in the first

[Intel-gfx] [PATCH 02/19] drm/i915/dp: Store DSC DPCD capabilities in the connector

2023-10-06 Thread Imre Deak
In an MST topology the DSC capabilities are specific to each connector, retrieved either from the sink if it decompresses the stream, or from a branch device between the source and the sink in case this branch device does the decompression. Accordingly each connector needs to cache its own DSC

[Intel-gfx] [PATCH 00/19] drm/i915: Store DSC DPCD capabilities in the connector

2023-10-06 Thread Imre Deak
This patchset moves the DSC DPCD capabilities from the encoder (intel_dp) to the connector. This is required since in an MST topology each connector has its own version of these capabilities, allowing to configure/enable the DSC decompression for each stream separately. The changes are needed for

[Intel-gfx] [PATCH 01/19] drm/i915/dp: Sanitize DPCD revision check in intel_dp_get_dsc_sink_cap()

2023-10-06 Thread Imre Deak
Check only the eDP or the DP specific DPCD revision depending on the sink type. Pass the corresponding revision to the function, which allows getting the DSC caps of a branch device (in an MST topology, which has its own DPCD and so DPCD revision). Signed-off-by: Imre Deak ---

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Remove xehpsdv support

2023-10-06 Thread Andi Shyti
Hi Tvrtko, On Fri, Oct 06, 2023 at 09:31:03AM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > XeHP SDV was a pre-production hardware used to bring up ATS and was not > generally available. Since latter was since explicitly added, there is no mmhh? > need to keep the code for the

[Intel-gfx] [PATCH] drm/print: Add drm_dbg_ratelimited

2023-10-06 Thread Andi Shyti
From: Nirmoy Das Add a function for ratelimitted debug print. Cc: Maarten Lankhorst Cc: Maxime Ripard Cc: Thomas Zimmermann Cc: David Airlie Cc: Daniel Vetter Reviewed-by: Matthew Auld Reviewed-by: Andi Shyti Signed-off-by: Nirmoy Das Signed-off-by: Andi Shyti ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Display state checker cleanup (rev3)

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915: Display state checker cleanup (rev3) URL : https://patchwork.freedesktop.org/series/124616/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13719_full -> Patchwork_124616v3_full Summary

Re: [Intel-gfx] [PATCH v7 2/5] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread Tvrtko Ursulin
On 06/10/2023 11:11, Tvrtko Ursulin wrote: Hi, Andi asked me to summarize what I think is unaddressed review feedback so far in order to consolidate and enable hopefully things to move forward. So I will try to re-iterate the comments and questions below. But also note that there is a

[Intel-gfx] [PATCH 2/2] drm/i915: enable W=1 warnings by default

2023-10-06 Thread Jani Nikula
We enable a bunch more compiler warnings than the kernel defaults. However, they've drifted to become a unique set of warnings, and have increasingly fallen behind from the W=1 set. Align with the W=1 warnings from scripts/Makefile.extrawarn for clarity, by copy-pasting them with

Re: [Intel-gfx] [PATCH] drm/i915/lnl: Remove watchdog timers for PSR

2023-10-06 Thread Kahola, Mika
> -Original Message- > From: Ville Syrjälä > Sent: Friday, October 6, 2023 3:29 PM > To: Kahola, Mika > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH] drm/i915/lnl: Remove watchdog timers for PSR > > On Fri, Oct 06, 2023 at 02:42:10PM +0300, Mika Kahola wrote: >

[Intel-gfx] [PATCH 1/2] drm/i915: drop -Wall and related disables from cflags as redundant

2023-10-06 Thread Jani Nikula
The kernel top level Makefile, and recently scripts/Makefile.extrawarn, have included -Wall, and the disables -Wno-format-security and $(call cc-disable-warning,frame-address,) for a very long time. They're redundant in our local subdir-ccflags-y and can be dropped. Cc: Arnd Bergmann Cc: Nick

[Intel-gfx] [PATCH 0/2] drm/i915: align with W=1 warnings

2023-10-06 Thread Jani Nikula
Update i915 extra warnings to align with W=1 warnings. Cc'ing some folks who have contributed to i915 warnings in the past. I'm only running gcc 12 locally, so I may not hit all issues that other gcc or clang versions might hit. BR, Jani. Cc: Arnd Bergmann Cc: Nick Desaulniers Cc: Nathan

Re: [Intel-gfx] [PATCH] drm/i915/display: Reset message bus after each read/write operation

2023-10-06 Thread Kahola, Mika
> -Original Message- > From: Sousa, Gustavo > Sent: Friday, October 6, 2023 2:57 PM > To: Kahola, Mika ; Vivi, Rodrigo > > Cc: intel-gfx@lists.freedesktop.org > Subject: RE: [Intel-gfx] [PATCH] drm/i915/display: Reset message bus after > each read/write operation > > Quoting Kahola,

Re: [Intel-gfx] [PATCH] drm/i915/lnl: Remove watchdog timers for PSR

2023-10-06 Thread Ville Syrjälä
On Fri, Oct 06, 2023 at 02:42:10PM +0300, Mika Kahola wrote: > Currently we are not using watchdog timers for PSR/PSR2. > The patch disables these timers so they are not in use. I can't figure out what you're saying here. What bspec seems to be saying is that the max_sleep thing got nuked from

Re: [Intel-gfx] [PATCH] drm/i915/lnl: Remove watchdog timers for PSR

2023-10-06 Thread Hogander, Jouni
On Fri, 2023-10-06 at 14:42 +0300, Mika Kahola wrote: > Currently we are not using watchdog timers for PSR/PSR2. > The patch disables these timers so they are not in use. > > BSpec: 69895 > > Signed-off-by: Mika Kahola > --- >  drivers/gpu/drm/i915/display/intel_psr.c | 24

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Remove incomplete PVC plumbing

2023-10-06 Thread Andi Shyti
Hi Tvrtko, On Fri, Oct 06, 2023 at 09:31:02AM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > PVC support will not be coming to i915 so get rid of its partial > enablement and reduce the driver maintenance burden. > > Signed-off-by: Tvrtko Ursulin Reviewed-by: Andi Shyti Andi

Re: [Intel-gfx] [PATCH v7 2/5] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread Andi Shyti
Hi, > > + /* Preallocate a shared id for use under memory pressure. */ > > + err = xa_alloc_cyclic_irq(>tlb_lookup, >serial_slot, wait, > > + xa_limit_32b, >next_seqno, GFP_KERNEL); > > + if (err == -ENOMEM) { > > + kfree(wait); > > + return

Re: [Intel-gfx] [PATCH] drm/i915/display: Reset message bus after each read/write operation

2023-10-06 Thread Gustavo Sousa
Quoting Kahola, Mika (2023-10-06 03:49:15-03:00) >> -Original Message- >> From: Vivi, Rodrigo >> Sent: Thursday, October 5, 2023 7:10 PM >> To: Sousa, Gustavo >> Cc: Kahola, Mika ; intel-gfx@lists.freedesktop.org >> Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Reset message bus

[Intel-gfx] [PATCH] drm/i915/lnl: Remove watchdog timers for PSR

2023-10-06 Thread Mika Kahola
Currently we are not using watchdog timers for PSR/PSR2. The patch disables these timers so they are not in use. BSpec: 69895 Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/display/intel_psr.c | 24 +--- 1 file changed, 17 insertions(+), 7 deletions(-) diff --git

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Remove early/pre-production Haswell code

2023-10-06 Thread Tvrtko Ursulin
On 06/10/2023 11:46, Ville Syrjälä wrote: On Fri, Oct 06, 2023 at 09:31:01AM +0100, Tvrtko Ursulin wrote: From: Tvrtko Ursulin It is not our policy to keep pre-production hardware support for this long so I guess this one was just forgotten. This is about detecting pre-prod hw, not

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Create the guc_to_i915() wrapper (rev2)

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915/guc: Create the guc_to_i915() wrapper (rev2) URL : https://patchwork.freedesktop.org/series/124686/ State : success == Summary == CI Bug Log - changes from CI_DRM_13722 -> Patchwork_124686v2 Summary

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/guc: Create the guc_to_i915() wrapper (rev2)

2023-10-06 Thread Patchwork
== Series Details == Series: drm/i915/guc: Create the guc_to_i915() wrapper (rev2) URL : https://patchwork.freedesktop.org/series/124686/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Remove early/pre-production Haswell code

2023-10-06 Thread Ville Syrjälä
On Fri, Oct 06, 2023 at 09:31:01AM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > It is not our policy to keep pre-production hardware support for this long > so I guess this one was just forgotten. This is about detecting pre-prod hw, not supporting it. I think keeping the detection

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