-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/i915_gem_dmabuf.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
index 580aa42
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
Hi,
This series changes the mode set sequence so that the clock and PLL
logic that was done in the *_crtc_mode_set() hooks is done before
disabling crtcs. This avoids having to restore the old configuration
in the case
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
It is possible for a mode set to fail if there aren't shared DPLLS that
match the new configuration requirement or other errors in clock
computation. Since that step was executed after disabling crtcs, in the
failure case
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
In the ironlake mode set code, there was two instances of a loop through
encoders to find out if one of them has INTEL_OUTPUT_LVDS type. Simplify
the code by deleting some lines and use intel_pipe_has_type() instead.
Signed
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
This shouldn't change the behavior of those functions, since they are
called after the new_config is made effective and that points to the
current config. In a follow up patch, the mode set sequence will be
changed so
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
This will be used in a follow up patch to properly release shared DPLLs
without relying on the shared_dpll field in pipe_config.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers
For consistency, since that's the rule followed for internal functions.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 106 ++-
1 file changed, 54 insertions(+), 52 deletions(-)
diff
In the ironlake mode set code, there was two instances of a loop through
encoders to find out if one of them has INTEL_OUTPUT_LVDS type. Simplify
the code by deleting some lines and use intel_pipe_has_type() instead.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive
For consistency, since that's the rule followed for internal functions.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/intel_display.c | 37 ++--
2 files
For consistency, since that's the rule followed for internal functions.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/intel_display.c | 95 +---
2 files
On 10/19/2014 05:30 PM, Daniel Vetter wrote:
On Sun, Oct 19, 2014 at 04:28:57PM +0200, Daniel Vetter wrote:
On Thu, Oct 09, 2014 at 03:18:03PM +0300, Ander Conselvan de Oliveira wrote:
On 10/09/2014 12:11 PM, Daniel Vetter wrote:
On Wed, Oct 08, 2014 at 06:32:21PM +0300, Ander Conselvan de
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_ddi.c | 2 --
drivers/gpu/drm/i915/intel_display.c | 9 -
2 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm
This will be used in a follow up patch to properly release shared DPLLs
without relying on the shared_dpll field in pipe_config.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/i915_debugfs.c | 4 +--
drivers/gpu/drm/i915/i915_drv.h
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 9475271
things early will allow the mode set to fail
before actually touching the hardware.
Follow up patches will convert different platforms to use the new
infrastructure.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 3
The new struct will be used in a follow up patch to allow a current and
a staged config to exist for the same shared DPLL.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/i915_debugfs.c | 13
drivers/gpu/drm/i915/i915_drv.h
This series changes the mode set sequence so that the clock and PLL
logic that was done in the *_crtc_mode_set() hooks is done before
disabling crtcs. This avoids having to restore the old configuration
in the case of failure, since the hardware was never touched.
Ander Conselvan de Oliveira (8
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 15 +--
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index
Now that shared DPLLs configuration is staged, there's no need to track
the current ones in the new pipe_config since those are released before
making the new pipe_config effective.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915
There's no users left after the conversion to calculate clocks before
disabling crtcs during mode set.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 3 ---
drivers/gpu/drm/i915/intel_display.c | 11 ---
2
On 10/22/2014 11:33 AM, Ville Syrjälä wrote:
On Tue, Oct 21, 2014 at 04:02:04PM +0300, Ander Conselvan de Oliveira wrote:
It is possible for a mode set to fail if there aren't shared DPLLS that
match the new configuration requirement or other errors in clock
computation. If that step
On 10/09/2014 12:11 PM, Daniel Vetter wrote:
On Wed, Oct 08, 2014 at 06:32:21PM +0300, Ander Conselvan de Oliveira wrote:
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
This shouldn't change the behavior of those functions, since they are
called after the new_config
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
Currently we program just DPSCNTR and DSPSTRIDE directly from the ring
interrupt handler, which is fine since the hardware guarantees that
those are update atomically. When we have atomic page flips we'll want
to be able
On 10/27/2014 04:25 PM, Daniel Vetter wrote:
On Mon, Oct 27, 2014 at 11:08:20AM +, Damien Lespiau wrote:
On Mon, Oct 27, 2014 at 10:16:06AM +0100, Daniel Vetter wrote:
On Sat, Oct 25, 2014 at 12:11:12AM +0100, Damien Lespiau wrote:
SKL will specialize it.
Signed-off-by: Damien Lespiau
() (Paulo)
Prevent new flips the previous flip work finishes (Paulo)
Don't acquire modeset locks for mmio flip work
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 30 ++
drivers/gpu/drm/i915
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_sprite.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c
b/drivers/gpu/drm/i915/intel_sprite.c
index 8b80d68
-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_sprite.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c
b/drivers/gpu/drm/i915/intel_sprite.c
index f9ddedc..c1d9547 100644
--- a/drivers/gpu/drm/i915
Use the infrastructure added in a previous patch to choose shared DPLLs
and calculate clocks before touching the hardware.
v2: Don't set mode_set hooks since dev_priv is kzalloc()'d (Ville)
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm
There's no users left after the conversion to calculate clocks before
disabling crtcs during mode set.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 3 ---
drivers/gpu/drm/i915/intel_display.c | 7 ---
2 files
Version 2 of the series with the comments I got so far resolved.
Ander Conselvan de Oliveira (9):
drm/i915: Make *_crtc_mode_set work on new_config
drm/i915: Convert shared dpll reference count to a crtc mask
drm/i915: Move dpll crtc_mask and hw_state fields into separate struct
drm/i915
work on the staged config.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_ddi.c | 32 ++--
drivers/gpu/drm/i915/intel_display.c | 153 ---
2 files changed, 117 insertions(+), 68 deletions
This will be used in a follow up patch to properly release shared DPLLs
without relying on the shared_dpll field in pipe_config.
v2: Fix white space error (Ville)
Use hweight32() (Ville)
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm
Use the infrastructure added in a previous patch to choose shared DPLLs
and calculate clocks before touching the hardware.
v2: Don't set mode_set hooks since dev_priv is kzalloc()'d (Ville)
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm
Now that shared DPLLs configuration is staged, there's no need to track
the current ones in the new pipe_config since those are released before
making the new pipe_config effective.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915
The new struct will be used in a follow up patch to allow a current and
a staged config to exist for the same shared DPLL.
v2: Rebase on by mask_to_refcount()-hweight32() change. (Damien)
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
Reviewed-by: Damien
Use the infrastructure added in a previous patch to choose shared DPLLs
and calculate clocks before touching the hardware.
v2: Don't set mode_set hooks since dev_priv is kzalloc()'d (Ville)
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm
pll config if something fails before commit (Ville)
Don't set compute_clock hooks since dev_priv is kzalloc()'d (Ville)
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 3 +
drivers/gpu/drm/i915/intel_display.c | 142
picks, so either way,
Reviewed-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
+}
+
static int __intel_set_mode(struct drm_crtc *crtc,
struct drm_display_mode *mode,
- int x, int y, struct drm_framebuffer *fb
On 10/23/2014 09:50 PM, Jesse Barnes wrote:
This will allow us to consult more info before deciding whether to flip
or do a full mode set.
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/intel_display.c | 36 ++--
1 file changed,
On 10/23/2014 09:50 PM, Jesse Barnes wrote:
This is useful for checking things later.
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/intel_drv.h | 4 +++
drivers/gpu/drm/i915/intel_hdmi.c | 61 +++
2 files changed, 65
.
With the comments I made addressed, this series is
Reviewed-by: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
For the series,
Reviewed-by: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
On 10/30/2014 08:54 PM, Jesse Barnes wrote:
This should allow us to avoid mode sets for some panel fitter config
changes.
v2:
- fixup pfit comment (Ander)
Signed-off-by: Jesse Barnes jbar
On 11/03/2014 02:33 PM, Daniel Vetter wrote:
On Tue, Oct 28, 2014 at 03:10:12PM +0200, Ander Conselvan de Oliveira wrote:
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_sprite.c | 25 +
1 file changed
On 11/03/2014 03:56 PM, Daniel Vetter wrote:
On Mon, Nov 03, 2014 at 02:51:27PM +0100, Daniel Vetter wrote:
On Wed, Oct 29, 2014 at 11:32:33AM +0200, Ander Conselvan de Oliveira wrote:
It is possible for a mode set to fail if there aren't shared DPLLS that
match the new configuration
On 11/03/2014 03:40 PM, Daniel Vetter wrote:
More concise. Noticed while reviewing Ander's patch which touched a
lot of the pipe_has_type checks.
Signed-off-by: Daniel Vetter daniel.vet...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 9 +++--
1 file changed, 3 insertions(+), 6
. Since a flip cannot
be queued while there is a pending flip, the two paths shouldn't ever
run in parallel. We might need to revisit that if support for replacing
flips is implemented though.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
I'm not sure if locking
On 11/05/2014 01:23 PM, Chris Wilson wrote:
On Wed, Nov 05, 2014 at 01:03:00PM +0200, Ander Conselvan de Oliveira wrote:
This simplifies the code quite a bit compared to iterating over all
rings during the ring interrupt.
Also, it allows us to drop the mmio_flip spinlock, since the mmio_flip
On 11/05/2014 12:07 AM, Daniel Vetter wrote:
/**
+ * struct struct drm_atomic_state - the global state object for atomic updates
+ * @dev: parent DRM device
+ * @flags: state flags like async update
+ * @planes: pointer to array of plane pointers
+ * @plane_states: pointer to array of plane
. Since a flip cannot
be queued while there is a pending flip, the two paths shouldn't ever
run in parallel. We might need to revisit that if support for replacing
flips is implemented though.
v2: Don't hold dev-struct_mutext while waiting (Chris)
Signed-off-by: Ander Conselvan de Oliveira
So that it can be used by the flip code to wait for rendering without
holding any locks.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 5 +
drivers/gpu/drm/i915/i915_gem.c | 20 +++-
2 files changed
-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/i915_irq.c | 3 --
drivers/gpu/drm/i915/intel_display.c | 90 +---
drivers/gpu/drm/i915/intel_drv.h | 9 +---
3 files changed, 12 insertions(+), 90 deletions
On 11/06/2014 12:26 AM, Jesse Barnes wrote:
This will allow us to consult more info before deciding whether to flip
or do a full mode set.
v2:
- don't use uninitialized or incorrect pipe masks in set_config
failure path (Ander)
v3:
- fixup for pipe_config changes in compute_config
The cleanup path would reset pll-new_config to NULL but wouldn't free
the allocated memory.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915
Reviewed-by: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
On 11/07/2014 11:11 PM, Jesse Barnes wrote:
This will allow us to consult more info before deciding whether to flip
or do a full mode set.
v2:
- don't use uninitialized or incorrect pipe masks in set_config
Reviewed-by: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
On 11/06/2014 12:26 AM, Jesse Barnes wrote:
This allows us to calculate the full pipe config before we do any mode
setting work.
v2:
- clarify comments about global vs. per-crtc mode set (Ander)
- clean up
Reviewed-by: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
On 11/06/2014 12:26 AM, Jesse Barnes wrote:
This is useful for checking things later.
v2:
- fix hsw infoframe enabled check (Ander)
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu
Reviewed-by: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
On 11/06/2014 12:26 AM, Jesse Barnes wrote:
This only affects the fastboot path as-is. In that case, we simply need
to make sure that we update the pipe size at the first mode set. Rather
than putting it off until
Reviewed-by: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
On 11/06/2014 12:26 AM, Jesse Barnes wrote:
If these change (e.g. after a modeset following a fastboot), we need to
do a full mode set.
v2:
- put under pipe_config check so we don't deref a null state (Jesse
On 11/06/2014 12:26 AM, Jesse Barnes wrote:
This should allow us to avoid mode sets for some panel fitter config
changes.
v2:
- fixup pfit comment (Ander)
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/intel_display.c | 61
Hi Bob,
Thanks for the patch. Just a small comment below.
On 11/11/2014 01:09 AM, Bob Paauwe wrote:
Use the new pipe config values to calculate the updated pll dividers.
This regression was introduced in
commit 0dbdf89f27b17ae1eceed6782c2917f74cbb5d59
Author: Ander Conselvan de Oliveira
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
Or going from tiled to untiled may break.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_sprite.c |1 +
1 files changed, 1 insertions(+), 0 deletions
Ping?
On 09/05/2012 02:30 PM, Ander Conselvan de Oliveira wrote:
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
linux_sysfs_create() checked for a driver named intel while the intel
driver is called i915. This went unnoticed because in kernels 2.6.39
and after
the docs.
Reviewed-by: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/intel_display.c | 73
++--
1 file changed, 62 insertions(+), 11 deletions(-)
diff --git
The same logic can be implemented without it, and it even saves a line
of code.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu
On 11/24/2014 09:52 PM, Matt Roper wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
We need to get hdisplay and vdisplay in a few places so create a
helper to make our job easier.
v2 (by Matt): Use new stereo doubling function (suggested by Ville)
v3 (by Matt):
- Add missing
Reviewed-by: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
On 11/24/2014 09:53 PM, Matt Roper wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
After some refactor intel_primary_plane_setplane() does the same
as intel_pipe_set_base() so we can get rid
On 11/24/2014 09:53 PM, Matt Roper wrote:
Primary and sprite planes have already been refactored to include a
'prepare' step which handles all the commit-time operations that could
fail (i.e., pinning buffers and such). Refactor the cursor commit in a
similar manner.
For simplicity and
On 11/24/2014 09:53 PM, Matt Roper wrote:
The 'prepare' step for all types of planes are pretty similar;
consolidate the three 'prepare' functions into a single function. This
paves the way for future integration with the atomic plane handlers.
Note that we pull the 'wait for pending flips'
On 11/28/2014 02:15 PM, Ander Conselvan de Oliveira wrote:
On 11/24/2014 09:53 PM, Matt Roper wrote:
Primary and sprite planes have already been refactored to include a
'prepare' step which handles all the commit-time operations that could
fail (i.e., pinning buffers and such). Refactor
On 11/24/2014 09:53 PM, Matt Roper wrote:
Primary and sprite planes have already been refactored to include a
'prepare' step which handles all the commit-time operations that could
fail (i.e., pinning buffers and such). Refactor the cursor commit in a
similar manner.
For simplicity and
On 11/24/2014 09:53 PM, Matt Roper wrote:
The 'prepare' step for all types of planes are pretty similar;
consolidate the three 'prepare' functions into a single function. This
paves the way for future integration with the atomic plane handlers.
Note that we pull the 'wait for pending flips'
On 11/24/2014 09:53 PM, Matt Roper wrote:
All plane update functions need to unpin the old framebuffer when
flipping to a new one. Pull this logic into a separate function to ease
the integration with atomic plane helpers.
Signed-off-by: Matt Roper matthew.d.ro...@intel.com
---
On 11/24/2014 09:53 PM, Matt Roper wrote:
If we extend the commit_plane handlers for each plane type to be able to
handle fb=0, then we can easily implement plane disable via the
update_plane handler. The cursor plane already works this way, and this
is the direction we need to go to integrate
On 12/02/2014 01:40 AM, Matt Roper wrote:
All plane update functions need to unpin the old framebuffer when
flipping to a new one. Pull this logic into a separate function to ease
the integration with atomic plane helpers.
v2: Don't wait for vblank if we don't have an old fb to cleanup (Ander)
character. With this and the comments to patch 7 fixed, feel free
to use
(for the series) Reviewed-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
Ander
+ return -EINVAL;
+
+ return plane-funcs-update_plane(plane, plane-crtc, NULL
Reviewed-by: Ander Conselvan de Oliveira conselv...@gmail.com
On 12/02/2014 05:45 PM, Matt Roper wrote:
All plane update functions need to unpin the old framebuffer when
flipping to a new one. Pull this logic into a separate function to ease
the integration with atomic plane helpers.
v2
...@intel.com
Reviewed-by: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 93 ++--
drivers/gpu/drm/i915/intel_drv.h | 2 +-
drivers/gpu/drm/i915/intel_sprite.c | 71 +++
3 files
Reviewed-by: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
On 12/04/2014 08:27 PM, Matt Roper wrote:
If we extend the commit_plane handlers for each plane type to be able to
handle fb=0, then we can easily implement plane disable via the
update_plane handler. The cursor
In function that define a local pipe_config variable to point to
crtc-config, replace remaining references to crtc-config with
the local variable. This makes the code more consistent and easier
to change in an automated manner.
---
drivers/gpu/drm/i915/intel_display.c | 6 +++---
1 file changed,
This reduces the number of direct users of crtc-new_config. At some
point we'll be able to get rid of that pointer altogether, in favor
of drm core state structs.
---
drivers/gpu/drm/i915/i915_drv.h | 3 +-
drivers/gpu/drm/i915/intel_ddi.c | 29
So that we can get rid of the new_config pointer later.
---
drivers/gpu/drm/i915/intel_display.c | 30 ++
1 file changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index da5af23..a9f3034
There are no more users of that pointer since the new config is now
passed down the call chain during mode set. Also, when the switch to
atomic happens, the right config (state) should be derived from an
atomic state structure.
---
drivers/gpu/drm/i915/intel_display.c | 46
So that atomic operations will reference the right crtc state.
---
drivers/gpu/drm/i915/intel_display.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 462f22a..20b9e9b 100644
---
To match the semantics of drm_crtc-state, which this will eventually
become. Following coccinelle script did most of the work.
@@ struct intel_crtc *crtc; @@
-crtc-config
+crtc-config
@@ struct intel_crtc *crtc; identifier member; @@
-crtc-config.member
+crtc-config-member
@@ struct drm_crtc
The objective is to make this structure usable with the atomic helpers,
so let's start with the rename. Patch generated with coccinelle:
@@ @@
-struct intel_crtc_config
+struct intel_crtc_state
---
drivers/gpu/drm/i915/i915_drv.h | 4 +-
drivers/gpu/drm/i915/intel_crt.c | 6 +--
, and by getting rid of intel_crtc-new_config and
passing it down the call chain.
I'm not sure if this actually goes in the right direction, so I'm
sending this RFC.
Thanks,
Ander
Ander Conselvan de Oliveira (8):
drm/i915: Rename struct intel_crtc_config to intel_crtc_state
drm/i915: Embedded struct
And get rid of the duplicate mode structures. The bulk of the patch
was generated with the following semantic patch.
@@ struct intel_crtc_state *state; @@
-state-adjusted_mode
+state-base.adjusted_mode
@@ struct intel_crtc_state *state; @@
-state-requested_mode
+state-base.mode
@@ struct
On 12/08/2014 06:36 PM, Daniel Vetter wrote:
On Mon, Dec 08, 2014 at 05:21:07PM +0200, Ander Conselvan de Oliveira wrote:
There are no more users of that pointer since the new config is now
passed down the call chain during mode set. Also, when the switch to
atomic happens, the right config
I'm resending this series, now without the RFC status. Code is
unchanged from the RFC.
Ander Conselvan de Oliveira (8):
drm/i915: Rename struct intel_crtc_config to intel_crtc_state
drm/i915: Embedded struct drm_crtc_state in intel_crtc_state
drm/i915: Pass new_config down do
So that we can get rid of the new_config pointer later.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 30 ++
1 file changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm
There are no more users of that pointer since the new config is now
passed down the call chain during mode set. Also, when the switch to
atomic happens, the right config (state) should be derived from an
atomic state structure.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive
The objective is to make this structure usable with the atomic helpers,
so let's start with the rename. Patch generated with coccinelle:
@@ @@
-struct intel_crtc_config
+struct intel_crtc_state
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm
In function that define a local pipe_config variable to point to
crtc-config, replace remaining references to crtc-config with
the local variable. This makes the code more consistent and easier
to change in an automated manner.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive
This reduces the number of direct users of crtc-new_config. At some
point we'll be able to get rid of that pointer altogether, in favor
of drm core state structs.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 3
intel_crtc_state state; @@
-state.adjusted_mode
+state.base.adjusted_mode
@@ struct intel_crtc_state state; @@
-state.requested_mode
+state.base.mode
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/i915_irq.c | 8 +-
drivers/gpu/drm/i915
(crtc)-config
@@ struct drm_crtc *crtc; identifier member; @@
-to_intel_crtc(crtc)-config.member
+to_intel_crtc(crtc)-config-member
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/i915_debugfs.c | 12 +-
drivers/gpu/drm/i915/i915_irq.c
So that atomic operations will reference the right crtc state.
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm
On 12/12/2014 01:53 AM, Matt Roper wrote:
Once we integrate our work into the atomic pipeline, plane commit
operations will need to happen with interrupts disabled, due to vblank
evasion. Our commit functions today include sleepable work, so those
operations need to be split out and run either
On 12/12/2014 01:54 AM, Matt Roper wrote:
Add the new driver entrypoints that will be called by the atomic plane
helpers.
This patch does not actually switch over to the new plane helpers yet,
so there should be no functional change here. Also note that although
plane programming was already
On 12/09/2014 09:53 PM, Matt Roper wrote:
Now that we have hooks to enable the atomic plane helpers, we can use
the plane helpers for our .update_plane() and .disable_plane()
entrypoints.
Note that we still need to make a few small behavioral changes to the
driver entrypoints here as we make
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