Quoting Umesh Nerlige Ramappa (2021-02-02 20:10:44)
> On Tue, Feb 02, 2021 at 08:24:15AM +0000, Chris Wilson wrote:
> >Ok, this looks as compact and readable as writing it as a bunch of
> >tables. I presume there's a reason you didn't just use generation rather
> >than platfor
Quoting Tvrtko Ursulin (2021-02-02 16:52:18)
>
> On 02/02/2021 15:14, Chris Wilson wrote:
> > live_timeslice_rewind assumes a particular traversal and reordering
> > after the first timeslice yield. However, the outcome can be either
> > (A1, A2, B1) or (A1, B2, A2) dep
Quoting Tvrtko Ursulin (2021-02-02 16:44:26)
>
> On 02/02/2021 15:14, Chris Wilson wrote:
> > + err = 0;
> > + count = 0;
> > + for_each_uabi_engine(engine, i915) {
> > + if (!intel_engine_has_scheduler(engine))
>
This reverts commit 2d670ea2bd53a9792f453bb5b97cb8ef695988ff.
---
Documentation/sound/designs/index.rst | 1 -
.../sound/designs/jack-injection.rst | 166 --
include/sound/core.h | 6 -
include/sound/jack.h | 1 -
is always justified; put a barrier on
updating the irq handler so that we know that the next interrupt will
be redirected towards ourselves.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 7 ++
drivers/gpu/drm/i915/gt/intel_engine_types.h | 14
Quoting Chris Wilson (2021-02-02 15:53:41)
> Quoting Tvrtko Ursulin (2021-02-02 15:49:59)
> >
> > On 02/02/2021 15:14, Chris Wilson wrote:
> > > The different submission backends each have their own preferred
> > > behaviour and interrupt setup. Let
Quoting Tvrtko Ursulin (2021-02-02 15:49:59)
>
> On 02/02/2021 15:14, Chris Wilson wrote:
> > The different submission backends each have their own preferred
> > behaviour and interrupt setup. Let each handle their own interrupts.
> >
> > This becomes more useful
Since we dropped the use of dev->struct_mutex from inside the shrinker,
we no longer include that as part of our fs_reclaim tainting. We can
drop the i915 argument and rebrand it as a generic fs_reclaim tainter.
Signed-off-by: Chris Wilson
Cc: Thomas Hellström
Reviewed-by: Thomas Hellst
After calling lock_set_subclass() the lock _must_ be used, or else
lockdep's internal nr_used_locks becomes unbalanced. Extract the little
utility function to i915_utils.c
Signed-off-by: Chris Wilson
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 13 +
drivers
Since we dropped the use of dev->struct_mutex from inside the shrinker,
we no longer include that as part of our fs_reclaim tainting. We can
drop the i915 argument and rebrand it as a generic fs_reclaim tainter.
Signed-off-by: Chris Wilson
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/
Since we setup the submission method for the engines once, it is easy to
assign an enum and use that instead of probing into the backends.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_engine.h | 8 +++-
drivers/gpu/drm/i915/gt
As a topological sort, we expect it to run in linear graph time,
O(V+E). In removing the recursion, it is no longer a DFS but rather a
BFS, and performs as O(VE). Let's demonstrate how bad this is with a few
examples, and build a few test cases to verify a potential fix.
Signed-off-by: Chris
The different submission backends each have their own preferred
behaviour and interrupt setup. Let each handle their own interrupts.
This becomes more useful later as we to extract the use of auxiliary
state in the interrupt handler that is backend specific.
Signed-off-by: Chris Wilson
oal.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/display/intel_display.c | 5 ++-
drivers/gpu/drm/i915/gem/i915_gem_object.h| 5 ++-
drivers/gpu/drm/i915/gem/i915_gem_wait.c | 29 +---
drivers/gpu/drm/i915/gt/intel_engine_cs.c |
Exercise rescheduling priority inheritance around a sequence of requests
that wrap around all the engines.
Signed-off-by: Chris Wilson
---
.../gpu/drm/i915/selftests/i915_scheduler.c | 225 ++
1 file changed, 225 insertions(+)
diff --git a/drivers/gpu/drm/i915/selftests
Make the ability to suspend and resume a request and its dependents
generic.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
.../drm/i915/gt/intel_execlists_submission.c | 167 +-
drivers/gpu/drm/i915/gt/selftest_execlists.c | 8 +-
drivers/gpu/drm/i915
,
the memoization of how far we had progressed down a branch was
forgotten. The result was that instead of running in linear time, it was
running in geometric time and could easily run for a few hundred
milliseconds given a wide enough graph, not the microseconds as required.
Signed-off-by: Chris Wilson
Reviewed
to force a rewind.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_execlists.c | 21 +++-
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_execlists.c
b/drivers/gpu/drm/i915/gt/selftest_execlists.c
index 951e2bf867e1
In the process of preparing to reuse the request submission logic for
other backends, lift it out of the execlists backend. It already
operates on the common structs, so just a matter of moving and renaming.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
.../drm/i915/gt
In the process of preparing to reuse the request submission logic for
other backends, lift it out of the execlists backend.
While this operates on the common structs, we do have a bit of backend
knowledge, which is harmless for !lrc but still unsightly.
Signed-off-by: Chris Wilson
Reviewed
The current implementation of walking the children of a deferred
requests lacks the backtracking required to reduce the dfs to linear.
Having pulled it from execlists into the common layer, we can reuse the
dfs code for priority inheritance.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko
the entire multi-engine priority inheritance depth-first search,
to a smaller lock on each engine around a single list on that engine.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +
.../gpu/drm/i915/gt/intel_engine_heartbeat.c | 3
Lift the ability to defer a request until later from execlists into the
common layer.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
.../drm/i915/gt/intel_execlists_submission.c | 57 +++--
drivers/gpu/drm/i915/i915_scheduler.c | 63
-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
.../drm/i915/gt/intel_execlists_submission.c | 46 -
.../gpu/drm/i915/gt/intel_ring_submission.c | 4 --
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 50 ---
3 files changed, 44 insertions(+), 56 deletions
Quoting Tvrtko Ursulin (2021-02-02 13:15:52)
>
> On 01/02/2021 08:56, Chris Wilson wrote:
> > Make the ability to suspend and resume a request and its dependents
> > generic.
> > +bool __i915_sched_suspend_request(struct intel_engine_cs *engine,
> > +
Quoting Tvrtko Ursulin (2021-02-02 13:15:52)
>
> On 01/02/2021 08:56, Chris Wilson wrote:
> > +void __i915_sched_resume_request(struct intel_engine_cs *engine,
> > + struct i915_request *rq)
> > +{
> > + LIST_HEAD(list);
>
Quoting Tvrtko Ursulin (2021-02-02 12:03:02)
> > diff --git a/drivers/gpu/drm/i915/gt/selftest_execlists.c
> > b/drivers/gpu/drm/i915/gt/selftest_execlists.c
> > index 5d7fac383add..9304a35384aa 100644
> > --- a/drivers/gpu/drm/i915/gt/selftest_execlists.c
> > +++
Quoting Jani Nikula (2021-02-02 07:15:18)
> On Mon, 18 Jan 2021, Jani Nikula wrote:
> > The following commits have been marked as Cc: stable or fixing something
> > in v5.11-rc4 or earlier, but failed to cherry-pick to
> > drm-intel-fixes. Please see if they are worth backporting, and please do
>
Quoting Umesh Nerlige Ramappa (2021-02-02 07:54:15)
> Validity of an OA format is checked by using a sparse array of formats
> per gen. Instead maintain a mask of supported formats for a platform in
> the perf object.
>
> Signed-off-by: Umesh Nerlige Ramappa
> ---
>
Quoting Srivatsa, Anusha (2021-02-01 23:19:40)
>
>
> > -Original Message-
> > From: Chris Wilson
> > Sent: Monday, February 1, 2021 3:05 PM
> > To: Srivatsa, Anusha ; intel-
> > g...@lists.freedesktop.org
> > Subject: Re: [Intel-gfx] [PA
Quoting Anusha Srivatsa (2021-02-01 23:01:33)
> Add support to load GuC and HuC firmware for Dg1.
Do you have the corresponding link for the linux-firmware.git? That is
useful for cross referencing that the target version does exist in the
public repository.
-Chris
to execution.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Tvrtko Ursulin
Cc: Andi Shyti
---
.../drm/i915/gt/intel_execlists_submission.c | 20 ---
1 file changed, 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
b/drivers/gpu/drm/i915/gt
Quoting Maarten Lankhorst (2021-02-01 12:50:37)
> Make creation separate from pinning, in order to take the lock only
> once, and pin the mapping with the lock held.
>
> Changes since v1:
> - Rebase on top of upstream changes.
> Changes since v2:
> - Fully clear wa_ctx on error.
>
>
Quoting Tvrtko Ursulin (2021-02-01 11:57:56)
> From: Tvrtko Ursulin
>
> Slight improvement with regards to wrapping header components to fit
> console width. If a single element is wider than max it can still
> overflow but it should now work better for practical console widths.
<
Quoting Tvrtko Ursulin (2021-02-01 10:45:23)
> From: Tvrtko Ursulin
>
> Allow hiding inactive clients (used no GPU time ever) in interactive mode
> by pressing 'i'.
>
> Signed-off-by: Tvrtko Ursulin
Ok, that's where you meant. Coffee not winning the battle today.
Reviewe
Quoting Tvrtko Ursulin (2021-02-01 10:45:22)
> From: Tvrtko Ursulin
>
> Document numeric busyness overlay and sort selection.
I looked for a 'h' or '?' screen.
Reviewed-by: Chris Wilson
-Chris
___
Intel-gfx mailing list
Quoting Tvrtko Ursulin (2021-02-01 10:45:24)
> From: Tvrtko Ursulin
>
> Client stats refactoring broke the header layout with an extra newline.
Argh; keep the newline, or at least check the terminal width and make
the newline conditional.
-Chris
___
Instead of copying the whole table to each category (mocs, l3cc), use a
single table with a pointer to it if the category is enabled.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_mocs.c | 32 +
1 file changed, 22 insertions(+), 10 deletions(-)
diff
Quoting Tvrtko Ursulin (2021-02-01 09:53:20)
>
> On 01/02/2021 09:31, Chris Wilson wrote:
> > Hide inactive clients by pressing 'i' (toggle in interactive mode).
> >
> > v2: Fix location of filter_idle.
> >
> > Signed-off-by: Chris Wilson
> > Cc: Tvrtk
Hide inactive clients by pressing 'i' (toggle in interactive mode).
v2: Fix location of filter_idle.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Reviewed-by: Tvrtko Ursulin
---
tools/intel_gpu_top.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/tools/intel_gpu_top.c b/tools
Since we setup the submission method for the engines once, it is easy to
assign an enum and use that instead of probing into the backends.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine.h | 8 +++-
drivers/gpu/drm/i915/gt/intel_engine_cs.c
We check for idle during debug prints and other debugging actions.
Simplify the flow by not touching execlists state.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt
Extract the scheduler lists into a related structure, stop sprawling
over struct intel_engine_cs. Also transfer the responsibility of tracing
the scheduler events from ENGINE_TRACE() to SCHED_TRACE().
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 8 +-
drivers
A quick test to verify that the backend accepts each type of timeline
and can use them to track and control request emission.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_timeline.c | 105
1 file changed, 105 insertions(+)
diff --git a/drivers/gpu/drm
As soon as we mark a request as completed, it may be retired. So when
cancelling a request and marking it complete, make sure we first keep a
reference to the request.
Signed-off-by: Chris Wilson
---
.../drm/i915/gt/intel_execlists_submission.c | 19 +++
drivers/gpu/drm/i915/gt
Make the ability to suspend and resume a request and its dependents
generic.
Signed-off-by: Chris Wilson
---
.../drm/i915/gt/intel_execlists_submission.c | 167 +-
drivers/gpu/drm/i915/gt/selftest_execlists.c | 8 +-
drivers/gpu/drm/i915/i915_scheduler.c | 153
Start extracting the scheduling flags from the engine. We begin with its
own existence.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine.h| 6 ++
drivers/gpu/drm/i915/gt/intel_engine_types.h | 21 +++
.../drm/i915/gt/intel_execlists_submission.c
The name very often may be freed independently of the fence, with the
only protection being RCU. To be safe as we read the names, hold RCU.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_sw_fence.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915
to force a rewind.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_execlists.c | 21 +++-
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_execlists.c
b/drivers/gpu/drm/i915/gt/selftest_execlists.c
index 951e2bf867e1
Extract the scheduling queue from "execlists" into the per-engine
scheduling structs, for reuse by other backends.
Signed-off-by: Chris Wilson
---
.../gpu/drm/i915/gem/i915_gem_context_types.h | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_wait.c | 1 +
drivers/gpu/d
Wrap the query on whether the backend engine supports us emitting
semaphores to coordinate multiple requests.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_request.c | 2 +-
drivers/gpu/drm/i915/i915_request.h | 5 +
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git
As a topological sort, we expect it to run in linear graph time,
O(V+E). In removing the recursion, it is no longer a DFS but rather a
BFS, and performs as O(VE). Let's demonstrate how bad this is with a few
examples, and build a few test cases to verify a potential fix.
Signed-off-by: Chris
The current implementation of walking the children of a deferred
requests lacks the backtracking required to reduce the dfs to linear.
Having pulled it from execlists into the common layer, we can reuse the
dfs code for priority inheritance.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915
Verify that context isolation is also preserved when accessing
context-local registers with relative-mmio commands.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 88 --
1 file changed, 67 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu
Whether a scheduler chooses to implement timeslicing is up to it, and
not an underlying property of the HW engine. The scheduler does depend
on the HW supporting preemption.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine.h | 6 ++
drivers/gpu/drm/i915/gt
Since finding the currently active request starts by walking the
scheduler lists under the scheduler lock, move the routine to the
scheduler.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine.h| 3 -
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 71
Exercise rescheduling priority inheritance around a sequence of requests
that wrap around all the engines.
Signed-off-by: Chris Wilson
---
.../gpu/drm/i915/selftests/i915_scheduler.c | 225 ++
1 file changed, 225 insertions(+)
diff --git a/drivers/gpu/drm/i915/selftests
Lift the ability to defer a request until later from execlists into the
common layer.
Signed-off-by: Chris Wilson
---
.../drm/i915/gt/intel_execlists_submission.c | 57 +++--
drivers/gpu/drm/i915/i915_scheduler.c | 63 +--
drivers/gpu/drm/i915
As we are about to shuffle the lists around to consolidate new control
objects, reduce the code movement by wrapping access to the scheduler
lists ahead of time.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 17 +++---
drivers/gpu/drm/i915/gt
Claim the submit_request vfunc as the entry point into the scheduler
backend for ready requests.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine_types.h | 8
drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 11 ++-
drivers/gpu/drm/i915/gt
In the process of preparing to reuse the request submission logic for
other backends, lift it out of the execlists backend. It already
operates on the common structs, so just a matter of moving and renaming.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
.../drm/i915/gt
Verify that one context running on engine A cannot manipulate another
client's context concurrently running on engine B using unprivileged
access.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 275 +
1 file changed, 238 insertions(+), 37
Move the scheduler pretty printer from out of the execlists register
state to and push it to the schduler.
v2: It's not common to all, so shove it out of intel_engine_cs and
split it between scheduler front/back ends
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c
the semaphores to lightly utilised system where the latency between
requests is more noticeable, and curtail the bus-contention from checking
for signaled semaphores.
References: 44d89409a12e ("drm/i915: Make the semaphore saturation mask global")
Signed-off-by: Chris Wilson
---
drive
Move the scheduling tasklists out of the execlists backend into the
per-engine scheduling bookkeeping.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine.h| 33 +++-
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 33 ++--
.../gpu/drm/i915/gt
It appears that Elkhart Lake uses the same clock for CTX_TIMESTAMP as
CS_TIMESTAMP, leaving Icelake as the odd one out.
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3024
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c | 2 +-
1 file changed, 1
Kick the scheduler to allow it to see the timeslice duration change,
don't peek into execlists.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/sysfs_engines.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/sysfs_engines.c
b
Primarily to smooth over differences with the guc backend that struggles
with smaller quanta, bump the default timeslicing to 5ms from 1ms.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/Kconfig.profile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm
Re-enable secure dispatch for gen6/gen7, primarily to workaround the
command parser and overly zealous command validation on Haswell. For
example this prevents making accurate measurements using a journal for
store results from the GPU without CPU intervention.
Signed-off-by: Chris Wilson
This was removed in commit 478ffad6d690 ("drm/i915: drop
engine_pin/unpin_breadcrumbs_irq") as the last user had been removed,
but now there is a promise of a new user in the next patch.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_breadcru
In the process of preparing to reuse the request submission logic for
other backends, lift it out of the execlists backend.
While this operates on the common structs, we do have a bit of backend
knowledge, which is harmless for !lrc but still unsightly.
Signed-off-by: Chris Wilson
---
drivers
.
As they are not bound, we need to nerf a few assumptions that a rq->ring
is in the GGTT.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_context.c | 2 +-
.../drm/i915/gt/intel_execlists_submission.c | 2 +-
drivers/gpu/drm/i915/gt/intel_ring.c |
independent timelines.
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Reviewed-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index
,
the memoization of how far we had progressed down a branch was
forgotten. The result was that instead of running in linear time, it was
running in geometric time and could easily run for a few hundred
milliseconds given a wide enough graph, not the microseconds as required.
Signed-off-by: Chris Wilson
Reviewed
For a modeset/pageflip, there is a very precise deadline by which the
frame must be completed in order to hit the vblank and be shown. While
we don't pass along that exact information, we can at least inform the
scheduler that this request-chain needs to be completed asap.
Signed-off-by: Chris
If we allow for per-client timelines, even with legacy ring submission,
we open the door to a world full of possiblities [scheduling and
semaphores].
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/gen2_engine_cs.c | 72 ++-
drivers/gpu/drm/i915/gt/gen2_engine_cs.h
Busy-waiting is used for preempt-to-busy by schedulers, if they so
choose. Since it is not a property of the engine, but that of the
submission backend, move the flag from out of the engine to
i915_sched_engine.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 4
.
Having built the ring scheduler infrastructure over top of the global
ringbuffer submission, we now need to provide the HW knowledge required
to build command packets and implement context switching.
Signed-off-by: Chris Wilson
---
.../gpu/drm/i915/gt/intel_ring_scheduler.c| 459
the entire multi-engine priority inheritance depth-first search,
to a smaller lock on each engine around a single list on that engine.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +
.../gpu/drm/i915/gt/intel_engine_heartbeat.c | 3
-by: Chris Wilson
---
.../drm/i915/gt/intel_execlists_submission.c | 46 -
.../gpu/drm/i915/gt/intel_ring_submission.c | 4 --
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 50 ---
3 files changed, 44 insertions(+), 56 deletions(-)
diff --git a/drivers/gpu/drm
Whether the scheduler depends on interrupt delivery for forward progress
is a property of the scheduler backend not of the underlying engine, so
move the flag from inside the engine to i915_sched_engine.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine.h| 6
to.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
index f1811e79401e..0f0bf9e4d34f 100644
of the siblings.
Signed-off-by: Chris Wilson
---
.../drm/i915/gt/intel_execlists_submission.c | 435 +-
drivers/gpu/drm/i915/gt/selftest_execlists.c | 146 --
drivers/gpu/drm/i915/i915_request.c | 12 +-
drivers/gpu/drm/i915/i915_scheduler.c | 70 ++-
drivers/gpu
the spinlock, and so reduce contention.
Signed-off-by: Chris Wilson
---
.../drm/i915/gt/intel_execlists_submission.c | 88 ---
1 file changed, 39 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
b/drivers/gpu/drm/i915/gt
While the HW may support preemption, whether or not the scheduler
enforces preemption by forcibly resetting the current context is
ultimately up to the scheduler.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine.h | 7 ++-
drivers/gpu/drm/i915/gt
interrupts do not
appear to be affecting throughput (+-10%, some tasks even improve to the
reduced request overheads) and improve latency. [Which is a massive
improvement since the introduction of Sandybridge!]
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers
and so need more than 12b.
Signed-off-by: Chris Wilson
Reviewed-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/gen6_engine_cs.c| 4 ++--
drivers/gpu/drm/i915/gt/gen8_engine_cs.c| 2 +-
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 1 -
.../drm/i915/gt
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 2 +-
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 5 -
drivers/gpu/drm/i915/gt/intel_gt_types.h | 1 +
drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++
4 files
Explicitly differentiate between the absolute and relative timelines,
and the global HWSP and ppHWSP relative offsets. When using a timeline
that is relative to a known status page, we can replace the absolute
addressing in the commands with indexed variants.
Signed-off-by: Chris Wilson
Reviewed
5784106.01 0.32 # rbtree without deadlines
23.35 4152999.80 0.24 # skiplist without deadlines
Based on the skiplist implementation by Dr Con Kolivas for MuQSS.
References: https://en.wikipedia.org/wiki/Skip_list
Signed-off-by: Chris Wilson
---
.../drm/i915/gt
In preparation for removing the has_initial_breadcrumb field, add a
helper function for the existing callers.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c| 2 +-
drivers/gpu/drm/i915/gt/intel_ring_submission.c | 4 ++--
drivers/gpu
If any engine asks for the tasklet to be kicked from the CS interrupt,
do so. Currently, this is used by the execlists scheduler backends to
feed in the next request to the HW, and similarly could be used by a
ring scheduler, as will be seen in the next patch.
Signed-off-by: Chris Wilson
Relative timelines are relative to either the global or per-process
HWSP, and so we can replace the absolute addressing with store-index
variants for position invariance.
Signed-off-by: Chris Wilson
Reviewed-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 98
oal.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/display/intel_display.c | 5 ++-
drivers/gpu/drm/i915/gem/i915_gem_object.h| 5 ++-
drivers/gpu/drm/i915/gem/i915_gem_wait.c | 29 +---
drivers/gpu/drm/i915/gt/intel_engine_cs.c |
Wrap cmpxchg64 with a try_cmpxchg()-esque helper. Hiding the old-value
dance in the helper allows for cleaner code.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_utils.h | 32 +++
1 file changed, 32 insertions(+)
diff --git
Let userspace know if they can trust timeslicing by including it as part
of the I915_PARAM_HAS_SCHEDULER::I915_SCHEDULER_CAP_TIMESLICING
v2: Only declare timeslicing if we can safely preempt userspace.
Fixes: 8ee36e048c98 ("drm/i915/execlists: Minimalistic timeslicing")
Signed-off
nge in single client workloads such as games,
though running multiple applications on a desktop should have reduced
jitter i.e. smoother input-output latency.
This scheduler is based on MuQSS by Dr Con Kolivas.
v2: More commentary, especially around where we reset the deadlines.
Testcase: igt/gem_
Hide inactive clients by pressing 'i' (toggle in interactive mode).
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
tools/intel_gpu_top.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index 60ff62d28..edf0dedac 100644
--- a/tools
Quoting Tvrtko Ursulin (2021-02-01 08:36:04)
>
> On 01/02/2021 08:21, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2021-02-01 08:14:45)
> >>
> >> On 31/01/2021 03:11, Chris Wilson wrote:
> >>> Keep new clients hidden until they utilise the GPU.
> &g
Quoting Jani Nikula (2021-01-28 13:23:48)
>
> A number of our CI systems are hitting redzone overwritten errors after
> s2idle, with the errors introduced between v5.11-rc4 and v5.11-rc5. See
> snippet below, full logs for one affected machine at [1].
>
> Known issue?
Fwiw, I think this should
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