On Wed, Dec 14, 2011 at 01:57:32PM +0100, Daniel Vetter wrote:
Like for shmem_pwrite_slow. The only difference is that because we
read data, we can leave the fetched cachelines in the cpu: In the case
that the object isn't in the cpu read domain anymore, the clflush for
the next cpu read
On Tue, Jan 31, 2012 at 09:46:14AM +0100, Daniel Vetter wrote:
On Mon, Jan 30, 2012 at 03:07:40PM -0800, AW wrote:
Is it possible that this
https://bugzilla.kernel.org/show_bug.cgi?id=42691
is caused by the intel graphix driver?
This does not crash:
1. reboot
2. log in+out again
On Mon, Jan 30, 2012 at 04:55:49PM +0100, Daniel Vetter wrote:
Chris Wilson reported that with a bunch of patches to no longer force
batchbuffer (in most cases at least) into the mappable part of gtt
that his Pineview died while prefetching the last page of the gtt.
Turns out that since my
On Wed, Dec 14, 2011 at 04:46:48PM -0200, Eugeni Dodonov wrote:
On Wed, Dec 14, 2011 at 10:57, Daniel Vetter daniel.vet...@ffwll.ch wrote:
From: Chris Wilson ch...@chris-wilson.co.uk
As the buffer is not necessarily accessible through the GTT at the time
of a GPU hang, and capturing
These are all user-trigerable, so tune down their loudness a notch.
For some of these we have i-g-t tests (because they prevent
newly-discovered bugs), without this patches running the test suite
leaves behind a dirty dmesg.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm
to dump the mbox registers, but couldn't find any
inconsistencies. Still, dump them too.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_debugfs.c |6 ++
drivers/gpu/drm/i915/i915_drv.h |4
drivers/gpu/drm/i915/i915_irq.c |7 +++
3
On Wed, Feb 01, 2012 at 01:35:14PM -0800, Ben Widawsky wrote:
On 01/31/2012 07:47 AM, Daniel Vetter wrote:
We have to do this manually. Somebody had a Great Idea.
I've measured speed-ups just a few percent above the noise level
(below 5% for the best case), but no slowdows. Chris Wilson
.
v4: Fixup whitespace.
Acked-by: Chris Wilson ch...@chris-wilson.co.uk
Reviewed-by: Ben Widawsky b...@bwidawsk.net
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_dma.c|2 +-
drivers/gpu/drm/i915/i915_drv.c|4 ++-
drivers/gpu/drm/i915
On Sat, Feb 04, 2012 at 09:59:57PM +0100, Eric Anholt wrote:
On Thu, 2 Feb 2012 09:58:12 +0100, Daniel Vetter daniel.vet...@ffwll.ch
wrote:
We have to do this manually. Somebody had a Great Idea.
I've measured speed-ups just a few percent above the noise level
(below 5% for the best
On Sat, Feb 04, 2012 at 07:13:41PM -0800, Ben Widawsky wrote:
On 02/02/12 00:40, Daniel Vetter wrote:
On Wed, Feb 01, 2012 at 09:30:57PM -0800, Ben Widawsky wrote:
[...]
I'd also say it's not a bad idea to elaborate the assumption that we
never have less than 256MB of memory WARN_ON(dimm_c0
of cheap ownership tracking, not who exactly created the buffer. The
latter is imo only really interesting for resource accounting, and that
would require it to be somewhat more solid. And we don't do any resource
accounting atm anyway.
-Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365
. Can you whip up
that patch, too?
Thanks, Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
(1):
agp/intel: Add pci id for hostbridge from has/qemu
Chris Wilson (1):
drm/i915: Check that plane/pipe is disabled before removing the fb
Daniel Vetter (1):
drm/i915: kill i915_mem.c
Eugeni Dodonov (3):
drm/i915: there is no pipe CxSR on ironlake
drm/i915: fix
updated drm-intel-testing to the latest -next with the
latest -fixes from Keith merged in for easier testing.
Go wild, test and please report any issues.
Thanks, Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
___
Intel-gfx
);
+ WARN(gtfifodbg GT_FIFO_CPU_ERROR_MASK,
+ MMIO read or write has been dropped %x\n, gtfifodbg);
+ I915_WRITE_NOTRACE(GTFIFODBG, GT_FIFO_CPU_ERROR_MASK);
I think we should move the write out of line and only do it when we're
actually catching an error.
-Daniel
--
Daniel Vetter
Mail
On Tue, Feb 07, 2012 at 04:21:50PM +0100, Ben Widawsky wrote:
If we don't have a sufficient number of free entries in the FIFO, we
proceed to do a write anyway. With this check we should have a clue if
that write actually failed or not.
After some discussion with Daniel Vetter regarding his
/
Cheers, Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Wed, Feb 01, 2012 at 01:39:03PM -0800, Ben Widawsky wrote:
On Tue, Jan 31, 2012 at 04:47:56PM +0100, Daniel Vetter wrote:
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
Reviewed-by: Ben Widawsky b...@bwidawsk.net
Queued for -next, thanks for the review.
-Daniel
--
Daniel Vetter
Mail
be good. It confused me quite a bit until I've
noticed what you've done and found the actual change ...
Cheers, Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http
On Tue, Jan 31, 2012 at 08:34:15PM +, Chris Wilson wrote:
On Tue, 31 Jan 2012 21:08:14 +0100, Daniel Vetter daniel.vet...@ffwll.ch
wrote:
These are all user-trigerable, so tune down their loudness a notch.
For some of these we have i-g-t tests (because they prevent
newly-discovered
use after free issues (and issues with
concurrent set_tiling).
-Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Wed, Feb 01, 2012 at 10:23:05PM -0200, Eugeni Dodonov wrote:
On Wed, Feb 1, 2012 at 19:39, Chris Wilson ch...@chris-wilson.co.uk wrote:
On Wed, 1 Feb 2012 22:26:45 +0100, Daniel Vetter daniel.vet...@ffwll.ch
wrote:
Chris Wilson and me have again stared at funny error states and it's
, Daniel
Daniel Vetter (7):
agp/intel-gtt: export the scratch page dma address
agp/intel-gtt: export the gtt pagetable iomapping
drm/i915: initialization/teardown for the aliasing ppgtt
drm/i915: ppgtt binding/unbinding support
drm/i915: ppgtt register definitions
drm/i915: ppgtt debugfs
We need this because ppgtt page directory entries need to be in the
global gtt pagetable.
Reviewed-by: Ben Widawsky b...@bwidawsk.net
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/char/agp/intel-gtt.c |1 +
include/drm/intel-gtt.h |2 ++
2 files changed, 3
code as noted by Ben Widawsky.
v4: Paint the init code in a more pleasing colour as suggest by Chris
Wilson.
v5: Explain the magic numbers noticed by Ben Widawsky.
Reviewed-by: Ben Widawsky b...@bwidawsk.net
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_dma.c
. Noticed by Chris Wilson.
Reviewed-by: Ben Widawsky b...@bwidawsk.net
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h|7 ++
drivers/gpu/drm/i915/i915_gem.c| 11 ++
drivers/gpu/drm/i915/i915_gem_execbuffer.c |9 ++
drivers/gpu
This was pretty usefull for debugging, might be useful for diagnosing
issues.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
Reviewed-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_debugfs.c | 38 +++
1 files changed, 38 insertions(+), 0
less grumpy by adding a
module option.
v4: New try at making Chris Wilson happy.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
Reviewed-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_dma.c |2 +-
drivers/gpu/drm/i915/i915_drv.c |7 +++
drivers/gpu/drm/i915
On Thu, Feb 09, 2012 at 04:21:31PM -0200, Eugeni Dodonov wrote:
On Thu, Feb 9, 2012 at 14:15, Daniel Vetter daniel.vet...@ffwll.ch wrote:
Hi all,
I've rebased and updated my ppgtt patches. Only changes are somewhat
improved
commit messages (especially for the final patch that actually
that it
works and grab the output of intel_reg_dumper from intel-gpu-tools. Then
please do whatever dance is required to break it, and again grab the
output of intel_reg_dumper. Hopefully there's some funky register we've
forgotten to set up again correctly.
Yours, Daniel
--
Daniel Vetter
Mail
On Fri, Feb 10, 2012 at 02:42:05PM -0200, Eugeni Dodonov wrote:
On Sat, Jan 28, 2012 at 20:48, Daniel Vetter daniel.vet...@ffwll.ch wrote:
The drm core _really_ likes to frob around with the crtc timings and
put halfed vertical timings (in fields) in there. Which confuses the
overlay code
Sorry, I've tried to ignore this Android thing ;-) Patch looks good and I
think a few #ifdefs for include files are okish. Applied, thanks.
-Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
___
Intel-gfx mailing list
Intel-gfx
doing
stupid and ugly things. Care to send in a patch to make building
sprite_on.c less noisy? I have gcc 4.6 here, so that's the benchmark ;-)
Cheers, Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
___
Intel-gfx mailing list
Graunke kenn...@whitecape.org
Thanks for the patch, this looks much nicer.
-Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo
bugs, especially for newer hw
that anything than the latest released versions of libdrm, kernel, ddx and
mesa is not advised.
Cheers, Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
___
Intel-gfx mailing list
Intel-gfx
On Mon, Feb 13, 2012 at 10:13:02AM -0500, Sean Paul wrote:
On Mon, Feb 13, 2012 at 5:08 AM, Daniel Vetter dan...@ffwll.ch wrote:
On Wed, Feb 01, 2012 at 05:31:30PM -0500, Sean Paul wrote:
This patch removes the locking from the downclock routines since we are no
longer locking the registers
On Mon, Feb 13, 2012 at 11:44:00AM +0100, Oleksij Rempel (Alexey Fisher) wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Am 13.02.2012 11:18, schrieb Daniel Vetter:
On Sat, Feb 04, 2012 at 07:17:01PM +0100, Oleksij Rempel (fishor)
wrote:
i do not know if this is really graphic
On Mon, Feb 13, 2012 at 17:53, Oleksij Rempel (fishor)
bug-tr...@fisher-privat.net wrote:
Am 13.02.2012 17:41, schrieb Daniel Vetter:
On Mon, Feb 13, 2012 at 11:44:00AM +0100, Oleksij Rempel (Alexey Fisher)
wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Am 13.02.2012 11:18, schrieb
,
+ force_audio_names[i]);
dev_priv-force_audio_property = prop;
}
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365
device to really test this.
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
This way we can free up the bus-adaptor.algo_data pointer and make it
available for use with the bitbanging fallback algo.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h | 13 -
drivers/gpu/drm/i915/intel_i2c.c |6 +++---
2 files
the xfer function of the bit-
banging algo in the i2c core.
To make that possible, export the 2 i2c algo functions.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/i2c/algos/i2c-algo-bit.c | 12 +++-
include/linux/i2c-algo-bit.h |4
2 files changed, 11 insertions
-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/intel_i2c.c | 144 +++---
2 files changed, 72 insertions(+), 73 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index
... and directly call the newly exported i2c bit-banging functions.
The code is still pretty convoluted because we only set up the gpio
i2c stuff when actually falling back, resulting in more complexity
than necessary. This will be fixed up in the next patch.
Signed-Off-by: Daniel Vetter
any more.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |3 +-
drivers/gpu/drm/i915/intel_i2c.c | 50 ++---
2 files changed, 21 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers
: Sat Jun 4 19:34:56 2011 +
Revert drm/i915: Enable GMBUS for post-gen2 chipsets
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=35572
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_i2c.c |2 +-
1 files changed, 1 insertions(+), 1 deletions
any more.
v2: Chris Wilson noticed that I've mixed up and ...
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |3 +-
drivers/gpu/drm/i915/intel_i2c.c | 50 ++---
2 files changed, 21 insertions(+), 32 deletions
a conservative
estimate as suggested by Daniel Vetter.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Thanks for these 3 patches, queued for next. I've had to resolve a little
conflict in this one because
- you've based these on a three without Ben's defer retirement patches
- and I don't want
On Wed, Feb 15, 2012 at 02:42:42PM +0100, Ben Widawsky wrote:
Introduced in commits c1cd90ed and d27b1e0e
Cc: Daniel Vetter daniel.vet...@ffwll.ch
Signed-off-by: Ben Widawsky b...@bwidawsk.net
This one smells like gcc being stupid - it's in a static function an gcc
sees all the callsites
works for him, so I've decided to include this into the current
-next cycle to get feedback (and no_lvds quirk patches) as early as
possible.
Thanks for the patch and review.
-Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
, Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
welcome.
Yours, Daniel
Daniel Vetter (5):
drm/i915: split out dma mapping from global gtt bind/unbind functions
drm/i915: bind objects to the global gtt only when needed
drm/i915: implement SNB workaround for lazy global gtt
drm/i915: enable lazy global-gtt binding
drm/i915: add
unmapping that needs a fully idle gpu.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |5 ++-
drivers/gpu/drm/i915/i915_gem.c |6 +++-
drivers/gpu/drm/i915/i915_gem_gtt.c | 45 +-
3 files changed, 24 insertions
-reloc patches.
v4: Fix a bug in the i915 error state capture code noticed by Chris
Wilson.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/i915_gem.c | 12 ++--
drivers/gpu/drm/i915/i915_gem_gtt.c |4
of such a reloc into the global gtt actually
works instead of binding the source, which is rather pointless ...
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 ++-
1 files changed, 14 insertions(+), 1 deletions(-)
diff --git
Now that everything is in place, only bind to the global gtt
when actually required. Patch split-up suggested by Chris Wilson.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_gem.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git
automatically using ppgtt ...
Luckily PIPE_CONTROL (the only write cmd current userspace uses) is
not affected by all this, as tested by tests/gem_pipe_control_store_loop.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_dma.c |3 +++
include/drm/i915_drm.h
- print less when pf is disabled and option '-l' is used
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
I've slurped these 4 patches into i-g-t, thanks.
-Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
___
Intel-gfx
On Wed, Feb 15, 2012 at 11:10:08PM +, Chris Wilson wrote:
On Wed, 15 Feb 2012 23:50:23 +0100, Daniel Vetter daniel.vet...@ffwll.ch
wrote:
+ /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
+* pipe_control writes because the gpu doesn't properly redirect them
gcc seems to get uber-anal recently about these things.
Reported-by: Dan Carpenter dan.carpen...@oracle.com
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915
on the implicit clamping
to PAGE_SIZE.
Also kill a copypasted spurious space in both functions while at it.
Cc: linux...@kvack.org
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
include/linux/pagemap.h | 28 ++--
1 files changed, 18 insertions(+), 10 deletions(-)
diff --git
-mm.
Review, comments, flames highly welcome.
Cheers, Daniel
Daniel Vetter (14):
drm/i915: merge shmem_pwrite slowfast-path
drm/i915: merge shmem_pread slowfast-path
drm: add helper to clflush a virtual address range
drm/i915: move clflushing into shmem_pread
drm/i915: kill ranged cpu
With the previous rewrite, they've become essential identical.
v2: Simplify the page_do_bit17_swizzling logic as suggested by Chris
Wilson.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_gem.c | 126 ++
1 files changed, 33
With the previous rewrite, they've become essential identical.
v2: Simplify the page_do_bit17_swizzling logic as suggested by Chris
Wilson.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_gem.c | 108 ++-
1 files changed, 27
Useful when the page is already mapped to copy date in/out.
For -stable because the next patch (fixing phys obj pwrite) needs this
little helper function.
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/drm_cache.c | 23
No longer needed.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_drv.h |7 --
drivers/gpu/drm/i915/i915_gem.c | 117 ---
2 files changed, 0 insertions(+), 124 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b
~120 µs instead fo ~210 µs to write 1mb on my snb. I like this.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_gem.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index
reduction of dirt in dmesg) it's now even a notch faster.
v3: Unconditionaly grab a page reference when dropping
dev-struct_mutex to simplify the code-flow.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_gem.c | 42 +++---
1 files
It's around 20% faster.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_gem.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 48bef0b..9f49421 100644
While moving around things, this two functions slowly grew out of any
sane bounds. So extract a few lines that do the copying and
clflushing. Also add a few comments to explain what's going on.
Signed-Off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_gem.c | 192
else accidently.
-Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Thu, Feb 16, 2012 at 09:32:08PM +0800, Hillf Danton wrote:
On Thu, Feb 16, 2012 at 8:01 PM, Daniel Vetter daniel.vet...@ffwll.ch wrote:
@@ -416,17 +417,20 @@ static inline int fault_in_pages_writeable(char
__user *uaddr, int size)
* Writing zeroes into userspace here is OK
presence ping on pch_split chips. I expect a few new quirks due to this
...
Go forth and test!
Cheers, Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http
On Thu, Feb 16, 2012 at 08:48:07AM -0800, Eric Anholt wrote:
On Thu, 16 Feb 2012 13:11:31 +0100, Daniel Vetter daniel.vet...@ffwll.ch
wrote:
No longer needed.
What this code was for: Before gtt mapping, we were doing software
fallbacks in Mesa with pread/write on pages at a time (or worse
On Thu, Feb 16, 2012 at 03:52:46PM -0800, Eric Anholt wrote:
On Thu, 16 Feb 2012 18:38:08 +0100, Daniel Vetter dan...@ffwll.ch wrote:
On Thu, Feb 16, 2012 at 08:48:07AM -0800, Eric Anholt wrote:
On Thu, 16 Feb 2012 13:11:31 +0100, Daniel Vetter
daniel.vet...@ffwll.ch wrote:
No longer
in there since at the time I've merged Jesse's soix patches
I didn't yet roll drm-intel-next forward to post-rc1 - I tend to only
do that once drm-next has rolled forward first.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
be impressed. So a linear start/end, page-aligned,
sounds more than good enough to me for now.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx
the problem with 3.16-rc2.
I'm confused now. Is the bisect result
commit 773875bfb6737982903c42d1ee88cf60af80089c
Author: Daniel Vetter daniel.vet...@ffwll.ch
Date: Mon Jan 27 10:00:30 2014 +0100
drm/i915: Don't set the 8to6 dither flag when not scaling
now the culprit or not? Or do we have 2
On Tue, Jul 01, 2014 at 10:39:52AM +0530, Vandana Kannan wrote:
On Jun-18-2014 9:22 PM, Daniel Vetter wrote:
On Wed, Jun 18, 2014 at 07:47:24PM +0530, Vandana Kannan wrote:
For Gen 8, set M2_N2 registers on every mode set. This is required to
make
sure M2_N2 registers are set during
://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
;
+ }
}
console_unlock();
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
On Fri, Jun 27, 2014 at 09:15:25AM -0700, Steve Aarnio wrote:
On 06/11/2014 08:41 AM, Jesse Barnes wrote:
On Wed, 11 Jun 2014 17:39:29 +0200
Daniel Vetter dan...@ffwll.ch wrote:
On Wed, Jun 11, 2014 at 5:13 PM, Jesse Barnes jbar...@virtuousgeek.org
wrote:
- If you have a machine which
/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
for cdclk to settle.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
the hw folks about this, maybe starting with
Cesar, to see if we can drop the power any further by doing this or
poking some other reg...
Pulled the entire series except this one here int dinq. Thanks for
patchesreview.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57
On Fri, Jun 27, 2014 at 09:38:52PM +0300, Imre Deak wrote:
Hi Egbert,
On Fri, 2014-06-27 at 15:55 +0200, Egbert Eich wrote:
Chris Wilson writes:
On Fri, Jun 27, 2014 at 12:07:47AM +0200, Egbert Eich wrote:
Hi Daniel, hi Imre,
Daniel Vetter writes:
Adding
On Mon, Jun 23, 2014 at 11:52:11AM +, Mateo Lozano, Oscar wrote:
-Original Message-
From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
Vetter
Sent: Wednesday, June 18, 2014 9:49 PM
To: Mateo Lozano, Oscar
Cc: intel-gfx@lists.freedesktop.org
Subject
://www.getpostbox.com
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
since the driver really needs them. Gross design, but
that's how the hardware works.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http
. Looks good to me.
Reviewed-by: Zhenyu Wang zhen...@linux.intel.com
Thanks for your review.
Do you know when this can be applied?
I'll hold off merging until we have buy-in from upstream quemu on a given
approach (which should work for both linux and windows).
-Daniel
--
Daniel Vetter
you fixed this in your acpi tree or do I need to do something
in drm-intel?
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http
. Integrated MS/xD Controller
As soon as X is initialized, graphics work again, I just don't have a boot
console.
So once X is running fbcon also works again, i.e. it's only the initial
boot console that's black?
Thanks, Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79
On Mon, Jul 07, 2014 at 05:04:41PM +0200, Daniel Vetter wrote:
On Sat, Jun 21, 2014 at 01:57:32PM +0200, Thomas Richter wrote:
Hi Daniel, dear intel experts,
this a bug report for the intel i945GM integrated graphics chipset (*NOT*
the 830GM this time). Since at least 3.12.0, but also
with i7 4770k (this machine, now
fixed).
I'll file it under stuff we need to fix before enabling fbc for real. And
we need a testcase for this, too. For now I guess you have to life with
disabling fbc.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http
stopped.
Cc: Naresh Kumar Kachhi naresh.kumar.kac...@intel.com
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
commit a51435a3137ad8ae75c288c39bd2d8b2696bae8f
mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http
Let's go whole hog here and call it ctx-user_handle.
ACK
And it's unsigned and only 32bits...
ACK, I´ll change the type to unit32_t
Aside when resending please pull in all the r-b tags from Jesse so that
lazy me has less hassle when merging this ;-)
-Daniel
--
Daniel Vetter
Software
Suggested by Brad Volking.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
tests/gem_exec_parse.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/tests/gem_exec_parse.c b/tests/gem_exec_parse.c
index f7376e391ee9..5bab4db777b3 100644
--- a/tests
701 - 800 of 22400 matches
Mail list logo
