On Wed, Dec 09, 2020 at 06:30:16PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/icl: Fix initing the DSI DSC power refcount during HW readout
> URL : https://patchwork.freedesktop.org/series/84735/
> State : success
Thanks for the review, pushed to din.
>
> == Summary =
On Fri, Dec 11, 2020 at 09:04:02AM +0200, Chery, Nanley G wrote:
> [...]
> > > We probably don't have to update the header, but we noticed in our
> > > testing that the clear color prefers an alignment greater than 64B.
> > > Unfortunately, I can't find any bspec note about this. As long as the
> >
aee8e325241b5b5b34ede7e
Author: Imre Deak
Date: Sat Oct 3 03:18:46 2020 +0300
drm/i915/tgl: Fix Combo PHY DPLL fractional divider for 38.4MHz ref clock
in drm-tip. Could you give it a try?
> In drivers/gpu/drm/i915/display/intel_dpll_mgr.c, I see an entry for 540,000.
> Presumbly, this
intel_dp_set_signal_levels() is needed for link training, so move it to
intel_dp_link_training.c.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c| 18 --
drivers/gpu/drm/i915/display/intel_dp.h| 3 ---
.../drm/i915/display
ink trained to the debug
message in intel_dp_set_signal_levels().
Fixes: b30edfd8d0b4 ("drm/i915: Switch to LTTPR non-transparent mode link
training")
Cc: Ville Syrjälä
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
.../drm/i915/display/intel_dp_li
Instead of a single global pm_qos, track the pm_qos request for
> each intel_dp.
>
> Fixes: 9ee32fea5fe8 ("drm/i915: irq-drive the dp aux communication")
> Signed-off-by: Chris Wilson
> Cc: Ville Syrjälä
> Cc: Imre Deak
Could intel_dp_aux_init/fini() be
Instead of a single global pm_qos, track the pm_qos request for
> each intel_dp.
>
> v2: Move the pm_qos setup/teardown to intel_dp_aux_init/fini
>
> Fixes: 9ee32fea5fe8 ("drm/i915: irq-drive the dp aux communication")
> Signed-off-by: Chris Wilson
> Cc: Ville Syrjäl
power wells.
>
> PPS power domain requires only to track the AUX_A associated
> power wells as the platforms need AUX power in order to access PPS
> registers supports eDP only on PORT_A.
>
> v2:
> - Fixed missed POWER_DOMAIN_PPS in pps_unlock().
>
> Cc: Imre D
On Tue, Jan 05, 2021 at 05:50:41AM +, Matthew Wilcox wrote:
> On Tue, Dec 29, 2020 at 04:41:31PM +0200, Imre Deak wrote:
> > Hi,
> >
> > On Mon, Dec 21, 2020 at 04:07:58AM +, Matthew Wilcox wrote:
> > >
> > > At boot,
> > >
> > >
Stable team, please backport the upstream commit
8f329967d596 ("drm/i915/tgl: Fix Combo PHY DPLL fractional divider for 38.4MHz
ref clock")
to the v5.10 stable kernel.
Thanks,
Imre
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lis
On Wed, Jan 06, 2021 at 07:04:42PM +0100, Greg KH wrote:
> On Wed, Jan 06, 2021 at 07:53:01PM +0200, Imre Deak wrote:
> > Stable team, please backport the upstream commit
> >
> > 8f329967d596 ("drm/i915/tgl: Fix Combo PHY DPLL fractional divider for
> > 38.4MHz r
On Thu, Jan 07, 2021 at 09:01:40AM +0200, Jani Nikula wrote:
> On Wed, 09 Dec 2020, Imre Deak wrote:
> > For an enabled DSC during HW readout the corresponding power reference
> > is taken along the CRTC power domain references in
> > get_crtc_power_domains(). Remove the i
gacy platforms like vlv and chv therefore re-use
> > the POWER_DOMAIN_DISPLAY_CORE power domain, which only used
> > by vlv and chv display power domain.
> >
> > This will avoids the unnecessary noise of unrelated power wells
> > in pps_{lock,unlock}.
> >
> > Cc: Jani Nikula
On Tue, Jan 12, 2021 at 08:10:40PM +0200, Ville Syrjälä wrote:
> On Tue, Dec 29, 2020 at 07:22:01PM +0200, Imre Deak wrote:
> > The DP PHY vswing/pre-emphasis level programming the driver does is
> > related to the DPTX -> first LTTPR link segment only. Accordingly it
> > s
On Wed, May 19, 2021 at 07:48:21PM +0530, Tejas Upadhyay wrote:
> When pipe A is disabled and MIPI DSI is enabled on pipe B,
> the AMT KVMR feature will incorrectly see pipe A as enabled.
> Set 0x42080 bit 23=1 before enabling DSI on pipe B and leave
> it set while DSI is enabled on pipe B. No impa
On Wed, Jun 02, 2021 at 02:35:28PM +0530, Anshuman Gupta wrote:
> On 2021-05-26 at 20:07:28 +0530, Imre Deak wrote:
> > It's possible that an already dequeued put_async_work() will release the
> > reference (*) that was put asynchronously after the dequeue happened.
> >
On Thu, May 27, 2021 at 06:40:00PM +, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [1/3] drm/i915/ddi: Flush encoder power domain
> ref puts during driver unload
> URL : https://patchwork.freedesktop.org/series/90613/
> State : success
Thanks for the review, pus
On Sat, Jun 05, 2021 at 11:22:07AM +0800, Wan Jiabing wrote:
> Fix the following coccicheck warning:
>
> ./drivers/gpu/drm/i915/display/intel_display_power.c:3081:1-28:
> duplicated argument to & or |
>
> This commit fixes duplicate argument. It might be a typo.
> But what I can do is to remove
On Wed, Jun 09, 2021 at 02:42:04PM +0300, Jani Nikula wrote:
> On Wed, 26 May 2021, Imre Deak wrote:
> > On ADL_P the power well->PHY mapping doesn't follow the mapping on previous
> > platforms, fix this up.
> >
> > While at it remove the redundant dev_pr
).
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3500
Reported-and-tested-by: Chris Chiu
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_ddi.c | 34 ++--
drivers/gpu/drm/i915/display/intel_tc.c | 34 +++-
drivers/gpu/drm/i915/display
- Remove boolean check clear flag
> - Add WA_verify hook in dsi sync_state
> Changes since V2:
> - Used REG_BIT, ignored pipe A and used sw state check - Jani
> - Made function wrapper - Jani
> Changes since V1:
> - ./dim checkpatch errors address
On Thu, Jun 10, 2021 at 09:28:31PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Force a TypeC PHY disconnect during suspend/shutdown
> URL : https://patchwork.freedesktop.org/series/91345/
> State : failure
Thanks for the report, testing and review. Pushed to drm-intel-n
On Mon, Oct 04, 2021 at 08:05:33PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Print out each DP vswing adjustment request we got from the RX.
> Could help in diagnosing what's going on during link training.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Imre
Imo including the connector info eventually would be good to be able to
match these lines with those only showing the connector, or connectors
in i915_display_info etc.
> Signed-off-by: Ville Syrjälä
Reviewed-by: Imre Deak
> ---
> .../drm/i915/display/intel_dp_link_training.c | 167 +++
as well.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Imre Deak
> ---
> drivers/gpu/drm/i915/display/intel_dp_link_training.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_tra
-descriptors
Imre Deak (11):
drm/i915: Add a table with a descriptor for all i915 modifiers
drm/i915: Move intel_get_format_info() to intel_fb.c
drm/i915: Add tiling attribute to the modifier descriptor
drm/i915: Simplify the modifier check for interlaced scanout support
drm/i915: Unexport
a modifier, for instance checking if the modifier is a
CCS modifier type.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_cursor.c | 19 +-
.../drm/i915/display/intel_display_types.h| 1 -
drivers/gpu/drm/i915/display/intel_fb.c | 178 ++
drivers/gpu
Move the function retrieving the format override information for a given
format/modifier to intel_fb.c. We can store a pointer to the format list
in each modifier's descriptor instead of the corresponding switch/case
logic, avoiding the listing of the modifiers twice.
Signed-off-by: Imre
Add a tiling atttribute to the modifier descriptor, which let's us
get the tiling without listing the modifiers twice.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_fb.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/drivers/gp
Checking the modifiers that support interlacing makes the condition
simpler and avoids us having to add new modifiers to the list (presuming
all/most of the new modifiers won't support interlacing).
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 9 ++-
This function is only used by intel_fb.c, so unexport it.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_fb.c | 2 +-
drivers/gpu/drm/i915/display/intel_fb.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
b/drivers
patch will change all is_ccs_plane()/is_gen12_ccs_plane()
checks to consider only the CCS control planes.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_fb.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
b/driver
Move intel_format_info_is_yuv_semiplanar() to intel_fb.c . The number of
planes for YUV semiplanar formats using CCS modifiers will change on
future platforms. We can use the modifier descriptors to simplify
getting the plane numbers for all modifiers, prepare for that here.
Signed-off-by: Imre
cs_plane(), is_gen12_ccs_cc_plane() functions as they are only
used in intel_fb.c
Signed-off-by: Imre Deak
---
.../drm/i915/display/intel_display_types.h| 7 --
drivers/gpu/drm/i915/display/intel_fb.c | 73 ++-
drivers/gpu/drm/i915/display/intel_fb.h | 5 +-
.../
On future platforms the index of the color-clear plane will change from
the one used by the GEN12 RC CCS CC modifier, so add a way to retrieve
the index independently of the platform/modifier.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_display.c | 10 +---
drivers/gpu
Move the function to intel_fb.c and rename it adding the intel_fb_
prefix following the naming of exported functions.
Signed-off-by: Imre Deak
---
.../drm/i915/display/intel_display_types.h| 9 --
drivers/gpu/drm/i915/display/intel_fb.c | 29 ++-
drivers/gpu/drm
Instead of open-coding the checks add functions for this, simplifying
the handling of CCS modifiers on future platforms.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_fb.c | 24 +++
drivers/gpu/drm/i915/display/intel_fb.h | 2 ++
.../drm/i915
On Fri, Oct 08, 2021 at 12:10:00AM +0300, Ville Syrjälä wrote:
> On Thu, Oct 07, 2021 at 11:35:07PM +0300, Imre Deak wrote:
> > Add a table describing all the framebuffer modifiers used by i915 at one
> > place. This has the benefit of deduplicating the listing of supported
> &g
On Fri, Oct 08, 2021 at 12:32:57AM +0300, Ville Syrjälä wrote:
> On Fri, Oct 08, 2021 at 12:26:11AM +0300, Imre Deak wrote:
> > On Fri, Oct 08, 2021 at 12:10:00AM +0300, Ville Syrjälä wrote:
> > > On Thu, Oct 07, 2021 at 11:35:07PM +0300, Imre Deak wrote:
> > > >
fiers in intel_fb_get_format_info() passed from
userspace.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_display.c | 132 +--
drivers/gpu/drm/i915/display/intel_fb.c | 163 +++
drivers/gpu/drm/i915/display/intel_fb.h | 3 +
3 files ch
Syrjälä
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 30 +--
drivers/gpu/drm/i915/display/intel_cursor.c | 19 +-
.../drm/i915/display/intel_display_types.h| 1 -
drivers/gpu/drm/i915/display/intel_fb.c | 143 ++
drivers/gpu/drm/i915/display
cs_plane(), is_gen12_ccs_cc_plane() functions as they are only
used in intel_fb.c
Signed-off-by: Imre Deak
---
.../drm/i915/display/intel_display_types.h| 7 --
drivers/gpu/drm/i915/display/intel_fb.c | 73 ++-
drivers/gpu/drm/i915/display/intel_fb.h | 5 +-
.../
This function is only used by intel_fb.c, so unexport it.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_fb.c | 2 +-
drivers/gpu/drm/i915/display/intel_fb.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
b/drivers
On future platforms the index of the color-clear plane will change from
the one used by the GEN12 RC CCS CC modifier, so add a way to retrieve
the index independently of the platform/modifier.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_display.c | 10 +---
drivers/gpu
Add a tiling atttribute to the modifier descriptor, which let's us
get the tiling without listing the modifiers twice.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_fb.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/drivers/gp
Move the function to intel_fb.c and rename it adding the intel_fb_
prefix following the naming of exported functions.
Signed-off-by: Imre Deak
---
.../drm/i915/display/intel_display_types.h| 9 --
drivers/gpu/drm/i915/display/intel_fb.c | 29 ++-
drivers/gpu/drm
Instead of open-coding the checks add functions for this, simplifying
the handling of CCS modifiers on future platforms.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_fb.c | 24 +++
drivers/gpu/drm/i915/display/intel_fb.h | 2 ++
.../drm/i915
On Thu, Oct 07, 2021 at 01:19:25PM +0530, Nautiyal, Ankit K wrote:
>
> On 10/5/2021 9:01 PM, Imre Deak wrote:
> > On Tue, Oct 05, 2021 at 01:34:21PM +0300, Jani Nikula wrote:
> > > Cc: Imre, I think you were involved in adding the checks.
> > About ADL-S the spec
On Wed, Oct 13, 2021 at 11:14:42PM +0300, Ville Syrjälä wrote:
> On Fri, Oct 08, 2021 at 03:19:08AM +0300, Imre Deak wrote:
> > Add a table describing all the framebuffer modifiers used by i915 at one
> > place. This has the benefit of deduplicating the listing of supported
> &g
On Wed, Oct 13, 2021 at 11:17:04PM +0300, Ville Syrjälä wrote:
> On Fri, Oct 08, 2021 at 03:19:09AM +0300, Imre Deak wrote:
> > Move the function retrieving the format override information for a given
> > format/modifier to intel_fb.c. We can store a pointer to the format l
On Wed, Oct 13, 2021 at 11:18:27PM +0300, Ville Syrjälä wrote:
> On Thu, Oct 07, 2021 at 11:35:09PM +0300, Imre Deak wrote:
> > Add a tiling atttribute to the modifier descriptor, which let's us
> > get the tiling without listing the modifiers twice.
> >
&g
On Wed, Oct 13, 2021 at 11:45:33PM +0300, Ville Syrjälä wrote:
> On Wed, Oct 13, 2021 at 11:27:02PM +0300, Ville Syrjälä wrote:
> > On Thu, Oct 07, 2021 at 11:35:15PM +0300, Imre Deak wrote:
> > > Future platforms change the location of CCS control planes in CCS
> >
On Thu, Oct 14, 2021 at 12:54:58AM +0300, Ville Syrjälä wrote:
> On Thu, Oct 14, 2021 at 12:32:55AM +0300, Imre Deak wrote:
> > On Wed, Oct 13, 2021 at 11:45:33PM +0300, Ville Syrjälä wrote:
> > > On Wed, Oct 13, 2021 at 11:27:02PM +0300, Ville Syrjälä wrote:
> > > >
On Wed, Oct 13, 2021 at 11:40:11PM +0300, Ville Syrjälä wrote:
> On Fri, Oct 08, 2021 at 03:19:08AM +0300, Imre Deak wrote:
> > bool is_ccs_plane(const struct drm_framebuffer *fb, int plane);
> > bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int pl
On Thu, Oct 14, 2021 at 01:38:14AM +0300, Ville Syrjälä wrote:
> On Thu, Oct 14, 2021 at 01:28:24AM +0300, Imre Deak wrote:
> > On Thu, Oct 14, 2021 at 12:54:58AM +0300, Ville Syrjälä wrote:
> > > On Thu, Oct 14, 2021 at 12:32:55AM +0300, Imre Deak wrote:
> > > > On W
On Thu, Oct 14, 2021 at 05:02:46PM +0530, Nautiyal, Ankit K wrote:
>
> On 10/13/2021 8:49 PM, Imre Deak wrote:
> > On Thu, Oct 07, 2021 at 01:19:25PM +0530, Nautiyal, Ankit K wrote:
> > > On 10/5/2021 9:01 PM, Imre Deak wrote:
> > > > On Tue, Oct 05, 2021 at 01
On Thu, Oct 14, 2021 at 05:07:16PM +0300, Jani Nikula wrote:
> On Thu, 07 Oct 2021, Imre Deak wrote:
> > Add a table describing all the framebuffer modifiers used by i915 at one
> > place. This has the benefit of deduplicating the listing of supported
> > modifiers for each
This is v3 of [1] addressing review comments and adding r-b lines.
[1] https://patchwork.freedesktop.org/series/95579/
Cc: Juha-Pekka Heikkila
Cc: Ville Syrjälä
Cc: Jani Nikula
Imre Deak (11):
drm/i915: Add a table with a descriptor for all i915 modifiers
drm/i915: Move
Heikkila
Cc: Jani Nikula
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila (v2)
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 30 +--
drivers/gpu/drm/i915/display/intel_cursor.c | 19 +-
.../drm/i915/display/intel_display_types.h| 1 -
drivers/gpu/drm/i915/display/intel_fb.c
Juha-Pekka Heikkila
Cc: Ville Syrjälä
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila
---
drivers/gpu/drm/i915/display/intel_fb.c | 33 -
1 file changed, 21 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
b/drivers/gpu/drm/i9
Checking the modifiers that support interlacing makes the condition
simpler and avoids us having to add new modifiers to the list (presuming
all/most of the new modifiers won't support interlacing).
Cc: Juha-Pekka Heikkila
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila
---
dr
andle invalid modifiers in intel_fb_get_format_info() passed from
userspace. (CI/igt_kms_addfb_basic/addfb25-bad-modifier)
v3: Move lookup_modifier() to the next patch, where it's first used.
Cc: Juha-Pekka Heikkila
Cc: Ville Syrjälä
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekk
This function is only used by intel_fb.c, so unexport it.
Cc: Juha-Pekka Heikkila
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila
---
drivers/gpu/drm/i915/display/intel_fb.c | 2 +-
drivers/gpu/drm/i915/display/intel_fb.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff
Heikkila
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 1 +
drivers/gpu/drm/i915/display/intel_display.c | 8 -
drivers/gpu/drm/i915/display/intel_display.h | 3 --
drivers/gpu/drm/i915/display/intel_fb.c | 30
cs_plane(), is_gen12_ccs_cc_plane() functions as they are only
used in intel_fb.c
v1-v2: Unchanged
v3: (Ville)
- Use ccs_aux instead of the ccs_ctrl term everywhere.
- Use color_plane instead of plane term for FB plane indicies.
Cc: Juha-Pekka Heikkila
Cc: Ville Syrjälä
Signed-off-by: Imre Deak
Reviewed-
will change all is_ccs_plane()/is_gen12_ccs_plane() checks to
consider only the CCS AUX planes.
Cc: Juha-Pekka Heikkila
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila
---
drivers/gpu/drm/i915/display/intel_fb.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --
On future platforms the index of the color-clear plane will change from
the one used by the GEN12 RC CCS CC modifier, so add a way to retrieve
the index independently of the platform/modifier.
Cc: Juha-Pekka Heikkila
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila
---
drivers/gpu
Move the function to intel_fb.c and rename it adding the intel_fb_
prefix following the naming of exported functions.
Cc: Juha-Pekka Heikkila
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila
---
.../drm/i915/display/intel_display_types.h| 9 --
drivers/gpu/drm/i915/display
Instead of open-coding the checks add functions for this, simplifying
the handling of CCS modifiers on future platforms.
Cc: Juha-Pekka Heikkila
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila
---
drivers/gpu/drm/i915/display/intel_fb.c | 24 +++
drivers/gpu
e-DDI platforms.
Cc: José Roberto de Souza
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 9d8132dd4cc5a..23de500d56b52 100644
On Sat, Oct 16, 2021 at 12:59:46AM +0300, Jani Nikula wrote:
> On Fri, 15 Oct 2021, "Souza, Jose" wrote:
> > On Fri, 2021-10-15 at 15:10 +0300, Imre Deak wrote:
> >> Reading out the DP encoders' DPCD during booting or resume is only
> >> required
t 3 patches are also needed for stable kernels.
Cc: José Roberto de Souza
Cc: Jani Nikula
Cc: Ville Syrjälä
Imre Deak (6):
drm/i915/dp: Skip the HW readout of DPCD on disabled encoders
drm/i915/dp: Ensure sink rate values are always valid
drm/i915/dp: Ensure max link params are always va
sted-by: Mat Jonczyk
Cc: Mat Jonczyk
Cc: José Roberto de Souza
Cc: Jani Nikula
Cc: Ville Syrjälä
Cc:
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/d
ble.
Cc: Ville Syrjälä
Cc:
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 153ae944a354b..1935eb49f9
ille Syrjälä
Cc: Ville Syrjälä
Cc:
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 23de500d56b52..153ae944a354b 100644
--- a/driv
Print an error if the DPCD sink max lane count is invalid and fix it up.
While at it also add an assert that the link max lane count (derived
from intel_dp_max_common_lane_count(), potentially reduced by the LT
fallback logic) value is also valid.
Cc: Ville Syrjälä
Signed-off-by: Imre Deak
(an invalid DPCD injected maliciously or read from a
buggy monitor). So fixup the invalid DPCD sink rate values already and print
an error in this case (since it's still a user visible problem).
Cc: Ville Syrjälä
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c
Add an assert that lookups from the intel_dp->common_rates[] array
are always valid.
Cc: Ville Syrjälä
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c | 33 -
1 file changed, 16 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i
Hi Petri, Tomi,
could you check the failure below?
On Fri, Oct 15, 2021 at 11:19:13AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Simplify handling of modifiers (rev10)
> URL : https://patchwork.freedesktop.org/series/95579/
> State : failure
>
> == Summary ==
>
> CI
eferences: https://gitlab.freedesktop.org/drm/intel/-/issues/4298
Suggested-by: Ville Syrjälä
Cc: Ville Syrjälä
Cc:
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/
On Mon, Oct 18, 2021 at 06:04:18PM +0300, Ville Syrjälä wrote:
> On Mon, Oct 18, 2021 at 12:41:52PM +0300, Imre Deak wrote:
> > Print an error if the DPCD sink max lane count is invalid and fix it up.
> >
> > While at it also add an assert that the link max lane co
On Mon, Oct 18, 2021 at 06:42:38PM +0300, Petri Latvala wrote:
> On Mon, Oct 18, 2021 at 03:10:54PM +0300, Imre Deak wrote:
> > Hi Petri, Tomi,
> >
> > could you check the failure below?
> >
> > On Fri, Oct 15, 2021 at 11:19:13AM +, Patchwo
On Tue, Oct 19, 2021 at 10:27:18AM +0300, Jani Nikula wrote:
> On Mon, 18 Oct 2021, Imre Deak wrote:
> > Atm, there are no sink rate values set for DP (vs. eDP) sinks until the
> > DPCD capabilities are successfully read from the sink. During this time
> > intel_dp->num
On Tue, Oct 19, 2021 at 10:37:33AM +0300, Jani Nikula wrote:
> On Tue, 19 Oct 2021, Imre Deak wrote:
> > On Tue, Oct 19, 2021 at 10:27:18AM +0300, Jani Nikula wrote:
> >> On Mon, 18 Oct 2021, Imre Deak wrote:
> >> > Atm, there are no sink rate values set fo
open-coded
> into check_modifier_display_ver()?!?
Because it's not always the device version which is queried, rather is
the modifier support a given display version range? See the follow-up
patch where this is needed.
>
> BR,
> Jani.
>
> >
> > Reviewed-by: Juha-Pekka Heikki
t;= md->display_ver.from &&
> display_ver <= md->display_ver.until;
> }
>
> On Fri, 15 Oct 2021, Imre Deak wrote:
> > +static bool check_modifier_display_ver_range(const struct
> > intel_modifier_desc *md,
> > +
On Tue, Oct 19, 2021 at 11:38:33AM +0300, Imre Deak wrote:
> On Tue, Oct 19, 2021 at 11:02:45AM +0300, Jani Nikula wrote:
> >
> > From patch 1:
> >
> > static bool check_modifier_display_ver(const struct intel_modifier_desc *md,
> >
jälä
Cc: Jani Nikula
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila
---
.../drm/i915/display/intel_display_types.h| 7 --
drivers/gpu/drm/i915/display/intel_fb.c | 82 ++-
drivers/gpu/drm/i915/display/intel_fb.h | 5 +-
.../drm/i915/display/skl_universal
On Tue, Oct 19, 2021 at 11:47:45AM +0300, Imre Deak wrote:
> On Tue, Oct 19, 2021 at 11:38:33AM +0300, Imre Deak wrote:
> > On Tue, Oct 19, 2021 at 11:02:45AM +0300, Jani Nikula wrote:
> > >
> > > From patch 1:
> > >
> > > static bool check_modifier
On Tue, Oct 19, 2021 at 01:24:51PM +0300, Jani Nikula wrote:
> On Mon, 18 Oct 2021, Vandita Kulkarni wrote:
> > MIPI DSI transcoder cannot be in video mode to support any of the
> > display C states.
>
> Imre, could you review this one please?
>
> The added confusion is that POWER_DOMAIN_TRANSCO
Hi Lakshmi,
the failure below is expected, could we add cibug filter for it?
On Tue, Oct 19, 2021 at 12:52:22AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/dp: Fix link parameter use in lack of a valid DPCD (rev2)
> URL : https://patchwork.freedesktop.org/series/95948/
On Tue, Oct 19, 2021 at 06:33:12PM +0300, Vudum, Lakshminarayana wrote:
> Re-reported. Looks like kms_bw tests are broken?
Thanks. Yes, I think so.
> -Original Message-
> From: Deak, Imre
> Sent: Tuesday, October 19, 2021 5:54 AM
> To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminar
On Tue, Oct 19, 2021 at 10:39:08AM +0300, Imre Deak wrote:
> On Tue, Oct 19, 2021 at 10:37:33AM +0300, Jani Nikula wrote:
> > On Tue, 19 Oct 2021, Imre Deak wrote:
> > > On Tue, Oct 19, 2021 at 10:27:18AM +0300, Jani Nikula wrote:
> > >> On Mon, 18 Oct 2021, Imre De
On Tue, Oct 19, 2021 at 10:23:14PM +0300, Jani Nikula wrote:
> On Mon, 18 Oct 2021, Imre Deak wrote:
> > Add an assert that lookups from the intel_dp->common_rates[] array
> > are always valid.
>
> The one thought I had here was that if we're adding helper functions
On Wed, Oct 20, 2021 at 12:40:30PM +0300, Ville Syrjälä wrote:
> On Fri, Oct 15, 2021 at 01:09:11AM +0300, Imre Deak wrote:
> > +static const struct intel_modifier_desc intel_modifiers[] = {
> > + {
> > + .modifier = DRM_FORMAT_MOD_LINEAR,
> > + .di
On Tue, Oct 19, 2021 at 02:45:53PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/dp: Fix link parameter use in lack of a valid DPCD (rev2)
> URL : https://patchwork.freedesktop.org/series/95948/
> State : success
Pushed to drm-intel-next, thanks for the reviews.
>
> == S
This is v4 of [1] addressing review comments from Jani and Ville in
patch 1 and 9.
[1] https://patchwork.freedesktop.org/series/95579/
Cc: Juha-Pekka Heikkila
Cc: Ville Syrjälä
Cc: Jani Nikula
Imre Deak (11):
drm/i915: Add a table with a descriptor for all i915 modifiers
drm/i915: Move
andle invalid modifiers in intel_fb_get_format_info() passed from
userspace. (CI/igt_kms_addfb_basic/addfb25-bad-modifier)
v3: Move lookup_modifier() to the next patch, where it's first used.
Cc: Juha-Pekka Heikkila
Cc: Ville Syrjälä
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekk
open-coding it. (Jani)
- Preserve the current modifier order exposed to user space. (Ville)
Cc: Ville Syrjälä
Cc: Juha-Pekka Heikkila
Cc: Jani Nikula
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila (v3)
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 30 +--
drivers/gpu/drm
Juha-Pekka Heikkila
Cc: Ville Syrjälä
Signed-off-by: Imre Deak
Reviewed-by: Juha-Pekka Heikkila
---
drivers/gpu/drm/i915/display/intel_fb.c | 31 +++--
1 file changed, 19 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
b/drivers/gpu/drm/i9
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