From: John Harrison john.c.harri...@intel.com
The code to wait for a ring to be idle ends by calling __wait_seqno() on the
value in the last request structure. However, with a scheduler, there may be
work queued up but not yet submitted. There is also the possiblity of
pre-emption re-ordering
From: John Harrison john.c.harri...@intel.com
Created GPU scheduler source files with only a basic init function.
---
drivers/gpu/drm/i915/Makefile |1 +
drivers/gpu/drm/i915/i915_drv.h |4 +++
drivers/gpu/drm/i915/i915_gem.c |3 ++
From: John Harrison john.c.harri...@intel.com
There is a workaround for a hardware bug when reading the seqno from the status
page. The bug does not exist on VLV however, the workaround was still being
applied.
---
drivers/gpu/drm/i915/intel_ringbuffer.c |5 -
1 file changed, 4
From: John Harrison john.c.harri...@intel.com
The scheduler needs to track batch buffers by seqno without extra, non-batch
buffer work being attached to the same seqno. This means that anywhere which
adds work to the ring should explicitly call i915_add_request() when it has
finished writing to
From: John Harrison john.c.harri...@intel.com
Added various definitions that will be useful for the scheduler in general and
pre-emptive context switching in particular.
---
drivers/gpu/drm/i915/i915_drv.h |5 ++-
drivers/gpu/drm/i915/i915_reg.h | 30 ++-
From: John Harrison john.c.harri...@intel.com
The previous code was not correctly masking the value of the GTFIFOCTL register,
leading to overruns and the message MMIO read or write has been dropped. In
addition, the checks were repeated in several different places. This commit
replaces these
From: John Harrison john.c.harri...@intel.com
The scheduler needs to know what each seqno that pops out of the ring is
referring to. This change adds a hook into the the 'submit some random work that
got forgotten about' clean up code to inform the scheduler that a new seqno has
been sent to the
From: John Harrison john.c.harri...@intel.com
GPU page faults can now require scheduler operation in order to complete. For
example, in order to free up sufficient memory to handle the fault the handler
must wait for a batch buffer to complete that has not even been sent to the
hardware yet. Thus
From: John Harrison john.c.harri...@intel.com
Added trace points to the scheduler to track all the various events, node state
transitions and other interesting things that occur.
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c |2 +
drivers/gpu/drm/i915/i915_scheduler.c | 31 -
From: John Harrison john.c.harri...@intel.com
Added a DRM debug facility for use by the scheduler.
---
include/drm/drmP.h |7 +++
1 file changed, 7 insertions(+)
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 76ccaab..2f477c9 100644
--- a/include/drm/drmP.h
+++
From: John Harrison john.c.harri...@intel.com
The i915_gem_record_rings() code was unconditionally querying and saving state
for the batch_obj of a request structure. This is not necessarily set. Thus a
null pointer dereference can occur.
---
drivers/gpu/drm/i915/i915_gpu_error.c | 13
From: John Harrison john.c.harri...@intel.com
The GPU scheduler can cause seqno values to become out of order. This means that
a straight forward 'is seqno X seqno Y' test is no longer valid. Instead, a
call into the scheduler must be made to see if the value being queried is known
to be out of
From: John Harrison john.c.harri...@intel.com
When requesting that all GPU work is completed, it is now necessary to get the
scheduler involved in order to flush out work that queued and not yet submitted.
---
drivers/gpu/drm/i915/i915_gem.c | 16 +++-
From: John Harrison john.c.harri...@intel.com
The new seqno alloction code pre-allocates a 'lazy' request structure and then
tries to allocate the 'lazy' seqno. The seqno allocation can potential wrap
around zero and when doing so, tries to idle the ring by waiting for all
oustanding work to
From: John Harrison john.c.harri...@intel.com
The scheduler decouples the submission of batch buffers to the driver from their
subsequent submission to the hardware. This means that an application which is
continuously submitting buffers as fast as it can could potentialy flood the
driver. To
From: John Harrison john.c.harri...@intel.com
The scheduler decouples the submission of batch buffers to the driver with
submission of batch buffers to the hardware. Thus it is possible for an
application to submit work, then close the DRM handle and free up all the
resources that piece of work
From: John Harrison john.c.harri...@intel.com
Updated the execbuffer() code to pass the packaged up batch buffer information
to the scheduler rather than calling execbuffer_final() directly. The scheduler
queue() code is currently a stub which simply chains on to _final() immediately.
---
From: John Harrison john.c.harri...@intel.com
If the scheduler pre-empts a batch buffer that is queued in the ring or even
executing in the ring then that buffer must be returned to the queued in
software state. Part of this re-queueing is to clean up the request structure.
---
From: John Harrison john.c.harri...@intel.com
The scheduler requires each batch buffer to be tagged with the seqno it has been
assigned and for that seqno to only be attached to the given batch buffer. Note
that the seqno assigned to a batch buffer that is being submitted to the
hardware might be
From: John Harrison john.c.harri...@intel.com
Hardware sempahores require seqno values to be continuously incrementing.
However, the scheduler's reordering of batch buffers means that the seqno values
going through the hardware could be out of order. Thus semaphores can not be
used.
On the other
From: John Harrison john.c.harri...@intel.com
The scheduler needs to do interrupt triggered work that is too complex to do in
the interrupt handler. Thus it requires a deferred work handler to process this
work asynchronously.
---
drivers/gpu/drm/i915/i915_dma.c |3 +++
From: John Harrison john.c.harri...@intel.com
Validation tests need a run time mechanism for querying whether or not the
driver supports the Android native sync facility.
---
drivers/gpu/drm/i915/i915_dma.c |7 +++
include/uapi/drm/i915_drm.h |1 +
2 files changed, 8
From: John Harrison john.c.harri...@intel.com
Added a Kconfig option for enabling/disabling the GPU scheduler.
---
drivers/gpu/drm/i915/Kconfig |8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index 437e182..22a036b 100644
From: John Harrison john.c.harri...@intel.com
To aid with debugging issues related to the scheduler, it can be useful to
ensure that all batch buffers are submitted immediately rather than queued until
later. This change adds an override flag via the module parameter to force
instant submission.
From: John Harrison john.c.harri...@intel.com
It is useful for know what the scheduler is doing for both debugging and
performance analysis purposes. This change adds a bunch of counters and such
that keep track of various scheduler operations (batches submitted, preempted,
interrupts processed,
From: John Harrison john.c.harri...@intel.com
It can be useful to be able to disable certain features (e.g. the entire
scheduler) via a module parameter for debugging purposes. A parameter has the
advantage of not being a compile time switch but without implying that it can be
changed dynamically
From: John Harrison john.c.harri...@intel.com
The 'i915_driver_preclose()' function has a parameter called 'file_priv'.
However, this is misleading as the structure it points to is a 'drm_file' not a
'drm_i915_file_private'. It should be named just 'file' to avoid confusion.
---
From: John Harrison john.c.harri...@intel.com
Filled in all the 'do stuff here' blanks...
The general theory of operation is that when batch buffers are submitted to the
driver, the execbuffer() code assigns a unique seqno value and then packages up
all the information required to execute the
From: John Harrison john.c.harri...@intel.com
Any commands written to the ring without the scheduler's knowledge can get lost
during a pre-emption event. This checkin updates the page flip code to send the
ring commands via the scheduler's 'fake batch' interface. Thus the page flip is
kept safe
From: John Harrison john.c.harri...@intel.com
When debugging batch buffer submission issues, it is useful to be able to see
what the current state of the scheduler is. This change adds functions for
decoding the internal scheduler state and reporting it.
---
drivers/gpu/drm/i915/i915_scheduler.c
From: John Harrison john.c.harri...@intel.com
The validation tests require hooks into the GPU scheduler to allow them to
analyse what the scheduler is doing internally.
---
drivers/gpu/drm/i915/i915_scheduler.c |4
drivers/gpu/drm/i915/i915_scheduler.h | 16
From: John Harrison john.c.harri...@intel.com
Added support for pre-empting batch buffers that have already been submitted to
the ring. Currently this implements Gen7 level pre-emption which means
pre-empting only at voluntary points within the batch buffer. The ring
submission code itself adds
From: John Harrison john.c.harri...@intel.com
There are various parameters within the scheduler which can be tuned to improve
performance, reduce memory footprint, etc. This change adds support for altering
these via debugfs.
---
drivers/gpu/drm/i915/i915_debugfs.c | 117
From: John Harrison john.c.harri...@intel.com
The scheduler needs to explicitly allocate a seqno to track each submitted batch
buffer. This must happen a long time before any commands are actually written to
the ring.
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c |5 +
From: John Harrison john.c.harri...@intel.com
The scheduler needs to be informed of each batch buffer completion. This is done
via the user interrupt mechanism. The epilogue of each batch buffer submission
updates a sequence number value (seqno) and triggers a user interrupt.
This change hooks
From: John Harrison john.c.harri...@intel.com
A major point of the GPU scheduler is that it re-orders batch buffers after they
have been submitted to the driver. Rather than attempting to re-assign seqno
values, it is much simpler to have each batch buffer keep its initially assigned
number and
From: John Harrison john.c.harri...@intel.com
This is required by user land validation programs that need to know whether the
scheduler is available for testing or not.
---
drivers/gpu/drm/i915/i915_dma.c |3 +++
include/uapi/drm/i915_drm.h |1 +
2 files changed, 4 insertions(+)
From: John Harrison john.c.harri...@intel.com
The new seqno alloction code pre-allocates a 'lazy' request structure and then
tries to allocate the 'lazy' seqno. The seqno allocation can potential wrap
around zero and when doing so, tries to idle the ring by waiting for all
oustanding work to
From: John Harrison john.c.harri...@intel.com
Work in progress for replacing seqno usage with requst structures.
There is a general feeling that it is better to move away from using a simple
integer 'seqno' value to track batch buffer completion. Instead, the request
structure should be used.
From: John Harrison john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_gem.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 2a5351d..8c68219 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_gem.c |7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 16
drivers/gpu/drm/i915/i915_gem.c | 20
drivers/gpu/drm/i915/intel_lrc.c|2 ++
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 17 -
drivers/gpu/drm/i915/i915_gem.c | 25 ++---
drivers/gpu/drm/i915/intel_display.c |2 +-
3 files
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h |6 +++---
drivers/gpu/drm/i915/i915_gem.c |6 +++---
drivers/gpu/drm/i915/intel_overlay.c |4 ++--
3 files changed, 8 insertions(+), 8
From: John Harrison john.c.harri...@intel.com
Note: i915_trace_irq_get is no longer inline as it requires accessing the
internals of the request structure. As i915_drv.h includes intel_ringbuffer.h,
an inline within the former is never going to be able to use details from the
latter.
For:
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_gem.c | 25 -
1 file changed, 16 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 18 +-
drivers/gpu/drm/i915/i915_gem.c | 30 +++---
drivers/gpu/drm/i915/intel_lrc.c|
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_gem.c| 13 +++-
drivers/gpu/drm/i915/i915_gem_execbuffer.c |2 +-
drivers/gpu/drm/i915/intel_display.c |2 +-
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_debugfs.c|6 +--
drivers/gpu/drm/i915/i915_drv.h|6 +--
drivers/gpu/drm/i915/i915_gem.c| 66
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 12
drivers/gpu/drm/i915/intel_ringbuffer.h |7 +++
2 files changed, 19 insertions(+)
diff --git
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_gem.c | 57 +--
1 file changed, 24 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_debugfs.c |3 +--
drivers/gpu/drm/i915/i915_drv.h | 17 +
drivers/gpu/drm/i915/i915_gem.c | 12
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_gem.c| 10 +++---
drivers/gpu/drm/i915/i915_gem_execbuffer.c |2 +-
drivers/gpu/drm/i915/i915_trace.h | 47
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_debugfs.c |9 +
drivers/gpu/drm/i915/i915_drv.h |2 --
drivers/gpu/drm/i915/i915_gem.c | 32 +++
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 12 +++-
drivers/gpu/drm/i915/intel_drv.h |2 +-
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_debugfs.c |3 ++-
drivers/gpu/drm/i915/i915_gem.c | 14 ++
drivers/gpu/drm/i915/i915_gpu_error.c | 12
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_debugfs.c |4 ++--
drivers/gpu/drm/i915/intel_display.c |9 ++---
drivers/gpu/drm/i915/intel_drv.h |2 +-
3 files changed, 9 insertions(+), 6
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/intel_overlay.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_overlay.c
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_irq.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 34 ---
drivers/gpu/drm/i915/i915_gem.c | 21 +++
drivers/gpu/drm/i915/intel_lrc.c|
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_gem.c| 13 +++
drivers/gpu/drm/i915/i915_gem_execbuffer.c |2 +-
drivers/gpu/drm/i915/intel_display.c |2 +-
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_debugfs.c |3 +--
drivers/gpu/drm/i915/i915_drv.h | 18 ++
drivers/gpu/drm/i915/i915_gem.c | 12
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h |5 -
drivers/gpu/drm/i915/i915_gem.c | 28 +++-
drivers/gpu/drm/i915/intel_lrc.c| 10 --
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/intel_lrc.c|3 +--
drivers/gpu/drm/i915/intel_ringbuffer.c |3 +--
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 32 +++
drivers/gpu/drm/i915/i915_gem.c | 21
drivers/gpu/drm/i915/intel_lrc.c|
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
---
drivers/gpu/drm/i915/i915_gem.c |1 -
drivers/gpu/drm/i915/intel_lrc.c|1 +
drivers/gpu/drm/i915/intel_ringbuffer.c |1 +
3 files changed, 2 insertions(+), 1
From: John Harrison john.c.harri...@intel.com
Added helper functions for retreiving the ring and seqno entries from a request
structure. This allows the internal workings of the request structure to be
hidden from code that is using these. It also allows for useful
workarounds/debug code to be
From: John Harrison john.c.harri...@intel.com
Now that all code above is using request structures instead of seqno values, it
is possible to convert __wait_seqno() itself. Internally, it is still calling
i915_seqno_passed(), this will be updated later in the series. This step is just
changing
From: John Harrison john.c.harri...@intel.com
The OLS value is now obsolete. Exactly the same value is guarateed to be always
available as PLR-seqno. Thus it is safe to remove the OLS completely. And also
to rename the PLR to OLR to keep the 'outstanding lazy ...' naming convention
valid.
For:
From: John Harrison john.c.harri...@intel.com
Converted 'last_flip_req' to be an actual request rather than a seqno value as
part of the on going seqno to request changes. This includes reference counting
the request being saved away to ensure it can not be retired and freed while the
overlay
From: John Harrison john.c.harri...@intel.com
The object structure contains the last read, write and fenced seqno values for
use in syncrhonisation operations. These have now been replaced with their
request structure counterparts.
Note that to ensure that objects do not end up with dangling
From: John Harrison john.c.harri...@intel.com
The aim is to replace seqno values with request structures. A step along the way
is to switch to using the PLR in preference to the OLS. That requires the PLR to
only be valid when and only when the OLS is also valid. I.e., the two must be
kept in
From: John Harrison john.c.harri...@intel.com
The plan is to use request structures everywhere that seqno values were
previously used. This means saving pointers to structures in places that used to
be simple integers. In turn, that means that the target structure now needs much
more stringent
From: John Harrison john.c.harri...@intel.com
Converted the mmio_flip 'seqno' value to be a request structure as part of the
on going seqno to request changes. This includes reference counting the request
being saved away to ensure it can not be retired and freed while the flip code
is still
From: John Harrison john.c.harri...@intel.com
Updated i915_wait_seqno() to take a request structure instead of a seqno value
and renamed it accordingly. Internally, it just pulls the seqno out of the
request and calls on to __wait_seqno() as before. However, all the code further
up the stack is
From: John Harrison john.c.harri...@intel.com
Converted the flip_queued_seqno value to be a request structure as part of the
on going seqno to request changes. This includes reference counting the request
being saved away to ensure it can not be retired and freed while the flip code
is still
From: John Harrison john.c.harri...@intel.com
An earlier commit (c8725f3dc0911d4354315a65150aecd8b7d0d74a: Do not call
retire_requests from wait_for_rendering) removed the use of the ring parameter
within wait_rendering__tail() but did not remove the parameter itself. As the
plan is to remove
From: John Harrison john.c.harri...@intel.com
Updated the _check_olr() function to actually take a requst object and compare
it to the OLR rather than extracting seqnos and comparing those.
Note that there is one use case where the request object being processed is no
longer available at that
From: John Harrison john.c.harri...@intel.com
There is a general theory that kzmalloc is better/safer than kmalloc, especially
for interesting data structures. This change updates the request structure
allocation to be zero filled. That also means it is no longer necessary to
explicitly clear the
From: John Harrison john.c.harri...@intel.com
Convert the throttle code to use the request structure rather than extracting a
ring/seqno pair from it and using those. This is in preparation for
__wait_seqno() becoming __wait_request().
For: VIZ-4377
Signed-off-by: John Harrison
From: John Harrison john.c.harri...@intel.com
Work in progress for replacing seqno usage with requst structures.
There is a general feeling that it is better to move away from using a simple
integer 'seqno' value to track batch buffer completion. Instead, the request
structure should be used.
From: John Harrison john.c.harri...@intel.com
All the code above is now using requests not seqnos so it is possible to convert
the trace functions across. Note that rather than get into problematic reference
counting issues, the trace code only saves the seqno and ring values from the
request
From: John Harrison john.c.harri...@intel.com
The next patch in the series converts some display related seqno usage to
request structure usage. However, the request dereference introduced must be
done from interrupt context. As the dereference potentially involves freeing the
request structure
From: John Harrison john.c.harri...@intel.com
The ring member of the object structure was always updated with the
last_read_seqno member. Thus with the conversion to last_read_req, obj-ring is
now a direct copy of obj-last_read_req-ring. This makes it somewhat redundant
and potentially misleading
From: John Harrison john.c.harri...@intel.com
There is no longer any need to retreive a seqno value from an i915_add_request()
call. The calling code already knows which request structure is being processed
(it can only be ring-OLR). And as the request itself is now used in preference
to the
From: John Harrison john.c.harri...@intel.com
It makes a lot more sense (and makes future seqno - request conversion patches
simpler) to fill in the 'ring' field of the request structure at the point of
creation rather than submission. Given that the request structure is assigned by
ring specific
From: John Harrison john.c.harri...@intel.com
Added reference counting of the request structure around __wait_seqno() calls.
This is a precursor to updating the wait code itself to take the request rather
than a seqno. At that point, it would be a Bad Idea for a request object to be
retired and
From: John Harrison john.c.harri...@intel.com
The request completion test no longer chains on to the request completion
processing code. Thus it no longer needs to pass a 'lazy coherency' flag through
to the seqno query call. Hence that parameter can be removed.
For: VIZ-4377
Signed-off-by: John
From: John Harrison john.c.harri...@intel.com
Added a hook to the ring noftification code to process request completion. This
means that there is no longer a need to explicitly process request completions
every time a request object is tested. Instead, the test code simply becomes
'return
From: John Harrison john.c.harri...@intel.com
Continuing the removal of seqno based operations - updated the request
completion query to not simply chain on to i915_seqno_passed(). Instead, it now
simply returns a pre-cached completion flag in the fast case. In the slow case
it reads the hardware
From: John Harrison john.c.harri...@intel.com
The completion status for all entries in the request list is updated on demand.
This occurs whenever the code queries the completion status of a given request
and a new seqno value has popped out of the hardware. Unfortuntately, not all
such queries
From: John Harrison john.c.harri...@intel.com
Updated the trace_irq code to use requests instead of seqnos. This includes
reference counting the request object to ensure it sticks around when required.
Note that getting access to the reference counting functions means moving the
inline
From: John Harrison john.c.harri...@intel.com
For debugging purposes, it is useful to be able to uniquely identify a given
request structure as it works its way through the system. This becomes
especially tricky if the seqno value is late allocated as then the request has
nothing but its pointer
From: John Harrison john.c.harri...@intel.com
Almost everywhere that caled i915_seqno_passed() was really asking 'has the
given seqno popped out of the hardware yet?'. Thus it had to query the current
hardware seqno and then do a signed delta comparison (which copes with wrapping
around zero but
From: John Harrison john.c.harri...@intel.com
*** Work in progress. Do not submit - currently broken! ***
This patch is being included in the series simply to show the intention.
The seqno value is now only used for the final test for completion of a request.
It is no longer used to track the
From: John Harrison john.c.harri...@intel.com
More seqno value to request structure conversions. Note, this change temporarily
moves the 'get_seqno()' call inside ring_idle() but this will disappear again in
a later patch when i915_seqno_passed() itself is converted.
For: VIZ-4377
Signed-off-by:
From: John Harrison john.c.harri...@intel.com
If a ring failed to initialise for any reason then the error path would try to
clean up all rings including those that had not yet been allocated. The ring
clean up code did a check that the ring was valid before starting its work.
Unfortunately, that
From: John Harrison john.c.harri...@intel.com
Added helper functions for retrieving the ring and seqno entries from a request
structure. This allows the internal workings of the request structure to be
hidden from code that is using these. It also allows for useful
workarounds/debug code to be
From: John Harrison john.c.harri...@intel.com
There is a general feeling that it is better to move away from using a simple
integer 'seqno' value to track batch buffer completion. Instead, the request
structure should be used. That provides for much more flexibility going
forwards. Especially
From: John Harrison john.c.harri...@intel.com
Added reference counting of the request structure around __wait_seqno() calls.
This is a precursor to updating the wait code itself to take the request rather
than a seqno. At that point, it would be a Bad Idea for a request object to be
retired and
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