On Thu, 2023-09-14 at 14:08 +0300, Imre Deak wrote:
> On Thu, Sep 14, 2023 at 01:51:16PM +0300, Luca Coelho wrote:
> > On Thu, 2023-09-14 at 12:55 +0300, Imre Deak wrote:
> > > On Thu, Sep 14, 2023 at 12:33:59PM +0300, Luca Coelho wrote:
> > > > On Thu, 2023-08-24 a
On Thu, 2023-09-14 at 12:55 +0300, Imre Deak wrote:
> On Thu, Sep 14, 2023 at 12:33:59PM +0300, Luca Coelho wrote:
> > On Thu, 2023-08-24 at 11:04 +0300, Imre Deak wrote:
> > > A follow-up patch will need to limit the output link bpp both in the
> > > non-DSC and
On Thu, 2023-08-24 at 11:04 +0300, Imre Deak wrote:
> A follow-up patch will need to limit the output link bpp both in the
> non-DSC and DSC configuration, so track the pipe and link bpp limits
> separately in the link_config_limits struct.
>
> Use .4 fixed point format for link bpp matching the
On Thu, 2023-10-26 at 14:23 +, Manna, Animesh wrote:
>
> > -Original Message-
> > From: Luca Coelho
> > Sent: Thursday, October 26, 2023 1:08 PM
> > To: Manna, Animesh ; intel-
> > g...@lists.freedesktop.org
> > Cc: Nikula, Jani
> > Sub
On Fri, 2023-10-27 at 17:27 +0530, Animesh Manna wrote:
> Refactor DSB implementation to be compatible with Xe driver.
>
> v1: RFC version.
> v2: Make intel_dsb structure opaque from external usage. [Jani]
> v3: Rebased on latest.
> v4:
> - Add boundary check in dsb_buffer_memset(). [Luca]
> -
On Tue, 2023-10-31 at 09:15 +, Manna, Animesh wrote:
>
> > -Original Message-
> > From: Luca Coelho
> > Sent: Tuesday, October 31, 2023 1:14 PM
> > To: Manna, Animesh ; intel-
> > g...@lists.freedesktop.org
> > Cc: Nikula, Jani
> > Sub
On Sun, 2023-10-08 at 15:42 +0530, Animesh Manna wrote:
> Refactor DSB implementation to be compatible with Xe driver.
>
> v1: RFC version.
> v2: Make intel_dsb structure opaque from external usage. [Jani]
> v3: Rebased on latest.
>
> Cc: Jani Nikula
> Signed-off-by: Animesh Manna
> ---
Looks
uffer_memset(). [Luca]
> - Use size_t instead of u32. [Luca]
> v5: WARN_ON() added for out of boudary case with some optimization. [Luca]
>
> Cc: Jani Nikula
> Signed-off-by: Animesh Manna
> ---
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
> drivers/gpu/drm/i915/Makefile
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Currently all module parameters are handled by i915_param.c/h. This
> is a problem for display parameters when Xe driver is used. Add
> a mechanism to add parameters specific to the display. This is mainly
> copied from
On Mon, 2023-10-23 at 07:50 +, Hogander, Jouni wrote:
> On Sun, 2023-10-22 at 20:45 +0300, Luca Coelho wrote:
> > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > > Currently all module parameters are handled by i915_param.c/h. This
> > > is a problem for
On Mon, 2023-10-23 at 11:14 +0300, Luca Coelho wrote:
> On Mon, 2023-10-23 at 07:50 +, Hogander, Jouni wrote:
> > On Sun, 2023-10-22 at 20:45 +0300, Luca Coelho wrote:
> > > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > > > Currently all
the display code.
Signed-off-by: Luca Coelho
---
Note: this patch was accidentally sent only to intel-xe[1], but should
have been sent to intel-gfx. Thus, this is v2.
In v2:
* Renamed uncore_spin_*() to intel_spin_*()
* Corrected the order: save, lock, unlock, restore
[1] https
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> .../gpu/drm/i915/display/intel_display_params.c | 15 +++
> .../gpu/drm/i915/display/intel_display_params.h | 5 +
> drivers/gpu/drm/i915/display/intel_psr.c | 14
ump. Display parameters are also included in
> i915_capabilities
>
> v2: Add parameters to i915_capabilities as well
>
> Signed-off-by: Jouni Högander
> ---
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
eturn 0;
> }
> @@ -1751,8 +1751,8 @@ void intel_fbc_handle_fifo_underrun_irq(struct
> drm_i915_private *i915)
> */
> static int intel_sanitize_fbc_option(struct drm_i915_private *i915)
> {
> - if (i915->params.enable_fbc >= 0)
> - return !!i915->params.enable_fbc;
> + if (i915->display.params.enable_fbc >= 0)
> + return !!i915->display.params.enable_fbc;
It was like this before your change, but just as a side-comment, it
would e simpler to just return true here, because !!enable_fbc will
always be true here.
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
the display code.
Signed-off-by: Luca Coelho
---
In v2:
* Renamed uncore_spin_*() to intel_spin_*()
* Corrected the order: save, lock, unlock, restore
In v3:
* Undid the change to pass drm_i915_private instead of the lock
itself, since we would have to include i915_drv.h and that pulls
/drivers/gpu/drm/i915/i915_params.h
> index 8169234338b1..cf5448bbc087 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -63,7 +63,6 @@ struct drm_printer;
> param(unsigned int, lmem_bar_size, 0, 0400) \
> /* leave bools at the end to not create holes */ \
> param(bool, enable_hangcheck, true, 0600) \
> - param(bool, load_detect_test, false, 0600) \
> param(bool, force_reset_modeset_test, false, 0600) \
> param(bool, error_capture, true,
> IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
> param(bool, disable_display, false, 0400) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
gt; -i915_param_named(verbose_state_checks, bool, 0600,
> +i915_param_named(verbose_state_checks, bool, 0400,
> "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state
> conditions.");
>
> i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display.h| 2 +-
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
>
ize, 0, 0400) \
> /* leave bools at the end to not create holes */ \
> param(bool, enable_hangcheck, true, 0600) \
> - param(bool, force_reset_modeset_test, false, 0600) \
> param(bool, error_capture, true,
> IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
> - param(bool, disable_display, false, 0400) \
> param(bool, verbose_state_checks, true, 0) \
> param(bool, nuclear_pageflip, false, 0400) \
> param(bool, enable_dp_mst, true, 0600) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
rivers/gpu/drm/i915/i915_params.h
> @@ -63,7 +63,7 @@ struct drm_printer;
> param(unsigned int, lmem_bar_size, 0, 0400) \
> /* leave bools at the end to not create holes */ \
> param(bool, enable_hangcheck, true, 0600) \
> - param(bool, force_reset_modeset_test, false, 0600) \
> + param(bool, force_reset_modeset_test, false, 0600) \
> param(bool, error_capture, true,
> IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
> param(bool, disable_display, false, 0400) \
> param(bool, verbose_state_checks, true, 0) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
915_params.h
> index 4b543beb17ca..c7fff571db2c 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -64,7 +64,6 @@ struct drm_printer;
> /* leave bools at the end to not create holes */ \
> param(bool, enable_hangcheck, true, 0600) \
> param(bool, error_capture, true,
> IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
> - param(bool, nuclear_pageflip, false, 0400) \
> param(bool, enable_dp_mst, true, 0600) \
> param(bool, enable_gvt, false, IS_ENABLED(CONFIG_DRM_I915_GVT) ? 0400 :
> 0)
>
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
,7 +64,6 @@ struct drm_printer;
> /* leave bools at the end to not create holes */ \
> param(bool, enable_hangcheck, true, 0600) \
> param(bool, error_capture, true,
> IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
> - param(bool, enable_dp_mst, true, 0600) \
> param(bool, enable_gvt, false, IS_ENABLED(CONFIG_DRM_I915_GVT) ? 0400 :
> 0)
>
> #define MEMBER(T, member, ...) T member;
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
nges throughout this series, could be
controversial, since it's a userspace API change of sorts. It used to
be possible to write but it won't be anymore. But, as we discussed
offline, it shouldn't be problem, because probably nobody is writing to
them, and most likely doing so wouldn't have the
_private;
> */
> #define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
> param(char *, vbt_firmware, NULL, 0400) \
> - param(int, enable_fbc, -1, 0600) \
> + param(int, lvds_channel_mode, 0, 0400) \
> + param(int, enable_fbc, -1, 0600)\
The enable_fbc
s/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(int, enable_dc, -1, 0400) \
> param(bool, enable_dpt, true, 0400) \
> param(bool, enable_sagv, true, 0600) \
> param(int, disable_power_well, -1, 0400) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
isplay_param_named_unsafe(enable_dpt, bool, 0400,
> "Enable display page table (DPT) (default: true)");
>
> +intel_display_param_named_unsafe(enable_sagv, bool, 0600,
> + "Enable system agent voltage/frequency scaling (SAGV) (default: true)");
> +
Shouldn't it be 0400 here?
With this fixed:
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
5/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -57,7 +57,6 @@ struct drm_printer;
> param(int, mmio_debug, -IS_ENABLED(CONFIG_DRM_I915_DEBUG_MMIO), 0600) \
> param(unsigned int, reset, 3, 0600) \
> param(unsigned int, inject_probe_failure, 0, 0) \
> - param(int, enable_dpcd_backlight, -1, 0600) \
> param(char *, force_probe, CONFIG_DRM_I915_FORCE_PROBE, 0400) \
> param(unsigned int, request_timeout_ms,
> CONFIG_DRM_I915_REQUEST_TIMEOUT, CONFIG_DRM_I915_REQUEST_TIMEOUT ? 0600 : 0) \
> param(unsigned int, lmem_size, 0, 0400) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(int, vbt_sdvo_panel_type, -1, 0400) \
> param(int, enable_dc, -1, 0400) \
> param(bool, enable_dpt, true, 0400) \
> param(bool, enable_sagv, true, 0600) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
t;);
> -
> i915_param_named_unsafe(load_detect_test, bool, 0400,
> "Force-enable the VGA load detect code for testing (default:false). "
> "For developers only.");
> diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> index c3487b9d6937..b8728990cb8b 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(bool, enable_dpt, true, 0400) \
> param(bool, enable_sagv, true, 0600) \
> param(int, disable_power_well, -1, 0400) \
> param(int, enable_ips, 1, 0600) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
> i915_param_named_unsafe(load_detect_test, bool, 0400,
> diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> index 066f15783580..060464df03c2 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(int, disable_power_well, -1, 0400) \
> param(int, enable_ips, 1, 0600) \
> param(int, invert_brightness, 0, 0600) \
> param(int, enable_guc, -1, 0400) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/hsw_ips.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_display_params.c | 2 ++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
>
; +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -46,7 +46,6 @@ struct drm_printer;
> * debugfs file
> */
> #define I915_PARAMS_FOR_EACH(param) \
> - param(char *, vbt_firmware, NULL, 0400) \
> param(int, modeset, -1, 0400) \
> param(int, lvds_channel_mode, 0, 0400) \
> param(int, panel_use_ssc, -1, 0600) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(int, panel_use_ssc, -1, 0600) \
> param(int, vbt_sdvo_panel_type, -1, 0400) \
> param(int, enable_dc, -1, 0400) \
> param(bool, enable_dpt, true, 0400) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
able_power_well, int,
> 0400,
> "Disable display power wells when possible "
> "(-1=auto [default], 0=power wells always on, 1=power wells disabled
> when possible)");
>
> -i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
> +intel_display_param_named_unsafe(enable_ips, int, 0400, "Enable IPS
> (default: true)");
> +
This change is in the wrong patch. It should be moved to the previous
one.
With this fixed:
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
ex ae0873443a65..c33edaee5032 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -55,7 +55,6 @@ struct drm_printer;
> param(char *, gsc_firmware_path, NULL, 0400) \
> param(bool, memtest, false, 0400) \
> param(int, mmio_debug, -IS_ENABLED(CONFIG_DRM_I915_DEBUG_MMIO), 0600) \
> - param(int, edp_vswing, 0, 0400) \
> param(unsigned int, reset, 3, 0600) \
> param(unsigned int, inject_probe_failure, 0, 0) \
> param(int, enable_dpcd_backlight, -1, 0600) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
On Tue, 2023-10-24 at 08:22 +, Hogander, Jouni wrote:
> On Mon, 2023-10-23 at 17:00 +0300, Luca Coelho wrote:
> > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > > Signed-off-by: Jouni Högander
> > > ---
> > > drivers/gpu/drm/i91
efault value in description. This is now added.
>
> v2:
> - Fix enable_psr2_sel_fetch description.
> - Add default value into psr_safest_params description.
>
> Cc: Luca Coelho
>
> Signed-off-by: Jouni Högander
> ---
> .../gpu/drm/i915/display/intel_display_params.c
On Tue, 2023-10-24 at 15:15 +0300, Jani Nikula wrote:
> On Tue, 24 Oct 2023, Luca Coelho wrote:
> > On Tue, 2023-10-24 at 08:51 +, Hogander, Jouni wrote:
> > > On Mon, 2023-10-23 at 17:06 +0300, Luca Coelho wrote:
> > > > On Mon, 2023-10-16 at 14:
On Tue, 2023-10-24 at 08:51 +, Hogander, Jouni wrote:
> On Mon, 2023-10-23 at 17:06 +0300, Luca Coelho wrote:
> > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > > Generally we have writable device parameters in debugfs. No need
> > > to allo
On Tue, 2023-10-24 at 13:32 +0300, Jouni Högander wrote:
> Move enable_ips module parameter under display and change it as boolean.
>
> v2:
> - Change enable_ip as boolean
> - Fix copy paste error (i915_param -> intel_display_param)
>
> Cc: Luca Coelho
>
>
This function doesn't really return the pin assignment mask, but the
max lane count derived from that. So rename the function to
mtl_tc_port_get_max_lane_count() to better reflect what it really does.
Reviewed-by: Lucas De Marchi
Reviewed-by: Suraj Kandpal
Signed-off-by: Luca Coelho
This makes the code a bit more symmetric and readable, especially when
we start adding more display version-specific alternatives.
Reviewed-by: Suraj Kandpal
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_tc.c | 32 +++--
1 file changed, 19 insertions
It is irrelevant for the caller that the max lane count is being
derived from a FIA register, so having "fia" in the function name is
irrelevant. Rename the function accordingly.
Reviewed-by: Lucas De Marchi
Reviewed-by: Suraj Kandpal
Signed-off-by: Luca Coelho
---
drivers/gp
gment" typo, as reported by checkpatch.
In v4:
* Rebased;
* Renamed port_max to lane_max (Lucas' comment).
Please review.
Cheers,
Luca.
Luca Coelho (4):
drm/i915/tc: rename mtl_tc_port_get_pin_assignment_mask()
drm/i915/tc: make intel_tc_port_get_lane_mask() static
drm/i915/tc: m
This function is only used locally, so make it static and remove the
definition from the header file.
Reviewed-by: Suraj Kandpal
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_tc.c | 2 +-
drivers/gpu/drm/i915/display/intel_tc.h | 1 -
2 files changed, 1 insertion(+), 2
From: Luca Coelho
The intel_dp_dsc_get_output_bpp() function outputs two lines of
unconditional logs, which was okay when it was called only once. But
now, we also call this function from intel_dp_mode_valid(), which is
in turn called for every mode we need to validate. This causes a lot
On Tue, 2022-06-07 at 11:05 +0300, Jani Nikula wrote:
> On Tue, 07 Jun 2022, Luca Coelho wrote:
> > From: Luca Coelho
> >
> > The intel_dp_dsc_get_output_bpp() function outputs two lines of
> > unconditional logs, which was okay when it was called only once.
On Mon, 2022-06-06 at 17:56 +0530, Anshuman Gupta wrote:
> Currently i915 disables d3cold for i915 pci dev.
> This blocks D3 for i915 gfx pci upstream bridge (VSP).
> Let's disable d3cold at gfx root port to make sure that
> i915 gfx VSP can transition to D3 to save some power.
(nit) It's better
On Mon, 2022-08-29 at 02:48 +, Murthy, Arun R wrote:
> > -Original Message-
> > From: Intel-gfx On Behalf
> > Of
> > Animesh Manna
> > Sent: Friday, August 26, 2022 5:48 PM
> > To: intel-gfx@lists.freedesktop.org
> > Subject: [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Added restriction
> >
On Fri, 2022-09-16 at 19:52 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> If pipe B is fused off we also shouldn't have FBC B.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_device_info.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
On Fri, 2022-09-16 at 19:52 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Remove the old tales about 90/270 degree rotation
> effectively preventing FBC. That hasn't been true since
> we stopped demanding the fence is present in
> commit 691f7ba58d52 ("drm/i915/display/fbc: Make fences
>
On Thu, 2022-09-22 at 11:29 +0300, Ville Syrjälä wrote:
> On Thu, Sep 22, 2022 at 11:18:55AM +0300, Luca Coelho wrote:
> > On Fri, 2022-09-16 at 19:52 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > If pipe B is fused off we also shouldn't
> Signed-off-by: Ville Syrjälä
> ---
Makes sense.
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
On Thu, 2022-09-22 at 12:36 +0300, Ville Syrjälä wrote:
> On Thu, Sep 22, 2022 at 11:51:16AM +0300, Jani Nikula wrote:
> > On Thu, 22 Sep 2022, Ville Syrjälä wrote:
> > > On Thu, Sep 22, 2022 at 11:18:55AM +0300, Luca Coelho wrote:
> > > > On Fri, 2022-09-16 at 19
On Mon, 2022-09-12 at 14:18 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Just return the thing directly from the switch statement.
>
> Signed-off-by: Ville Syrjälä
> ---
Also here. I think this is just unnecessary churn, but it's up to you,
so:
Reviewed-by: Luca
On Mon, 2022-09-12 at 14:18 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Pull the eDP backlight setup ino its own function. No
> reason to pollute intel_edp_init_connector() with all
> the mundane details.
>
> Signed-off-by: Ville Syrjälä
> ---
>
On Mon, 2022-09-26 at 13:43 +0300, Jani Nikula wrote:
> On Mon, 26 Sep 2022, Luca Coelho wrote:
> > On Mon, 2022-09-12 at 14:18 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > No need for the 'procmon' variable here. Just return the
ractice, the compiler will very
likely optimize out the procmon variable.
In general, I think I think it's preferable to avoid this kind of
patches, because they just make git blame a bit harder to interpret.
Nevertheless, this is certainly not a reason to nack, so:
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
On Mon, 2022-09-12 at 14:18 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Most of our encoder type cast stuff already operates on
> intel_encoder rather than drm_encoder. Switch to_lvds_encoder()
> over as well.
>
> Signed-off-by: Ville Syrjälä
> ---
On Fri, 2022-09-23 at 10:46 +0300, Ville Syrjälä wrote:
> On Fri, Sep 23, 2022 at 09:24:28AM +0300, Luca Coelho wrote:
> > On Thu, 2022-09-22 at 14:57 +0300, Ville Syrjälä wrote:
> > > On Thu, Sep 22, 2022 at 02:37:35PM +0300, Luca Coelho wrote:
> > > > On Thu, 20
and D as well and disable them all accordingly, when their respective
pipes are fused off.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_fbc.h | 2 ++
drivers/gpu/drm/i915/intel_device_info.c | 3 +++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display
Signed-off-by: Ville Syrjälä
> ---
Same thing here.
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
On Mon, 2022-09-12 at 14:18 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Most places that deal with output types already use BIT()
> but a few places still use manual shifts. Convert the
> stragglers over to BIT().
>
> Signed-off-by: Ville Syrjälä
> ---
On Mon, 2022-09-26 at 14:16 +0300, Ville Syrjälä wrote:
> On Mon, Sep 26, 2022 at 01:58:42PM +0300, Luca Coelho wrote:
> > On Mon, 2022-09-12 at 14:18 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Pull the eDP backlight setup ino its own
On Mon, 2022-09-26 at 14:33 +0300, Luca Coelho wrote:
> On Mon, 2022-09-26 at 14:16 +0300, Ville Syrjälä wrote:
> > On Mon, Sep 26, 2022 at 01:58:42PM +0300, Luca Coelho wrote:
> > > On Mon, 2022-09-12 at 14:18 +0300, Ville Syrjala wrote:
> > > > From: Ville Syrjälä
On Thu, 2022-09-22 at 14:57 +0300, Ville Syrjälä wrote:
> On Thu, Sep 22, 2022 at 02:37:35PM +0300, Luca Coelho wrote:
> > On Thu, 2022-09-22 at 12:36 +0300, Ville Syrjälä wrote:
> > > On Thu, Sep 22, 2022 at 11:51:16AM +0300, Jani Nikula wrote:
> > > > On T
hen the scalers
are actually being set up.
Signed-off-by: Luca Coelho
---
In v2:
* fix DRM_PLANE_NO_SCALING renamed macros;
In v3:
* No changes.
In v4:
* Got rid of the changes in the general planes max scale code;
* Added a couple of FIXMEs;
* Made intel_atomic_setup_scaler() ret
From: Animesh Manna
The max source and destination limits for scalers in MTL have changed.
Use the new values accordingly.
Signed-off-by: José Roberto de Souza
Signed-off-by: Animesh Manna
Signed-off-by: Luca Coelho
---
In v2:
* No changes;
In v3:
* Removed stray reviewed-by tag
Hi,
Here's an updated version of the patches after Ville's last comments.
The versioning history is in the patches themselves.
Please review.
Cheers,
Luca.
Animesh Manna (1):
drm/i915/mtl: update scaler source and destination limits for MTL
Luca Coelho (1):
drm/i915/mtl: limit second
hen the scalers
are actually being set up.
Signed-off-by: Luca Coelho
---
In v2:
* fix DRM_PLANE_NO_SCALING renamed macros;
In v3:
* No changes.
In v4:
* Got rid of the changes in the general planes max scale code;
* Added a couple of FIXMEs;
* Made intel_atomic_setup_scaler() ret
Hi,
I stupidly sent an old version of the patches in my v5... Resending
the correct ones (which were sent as v4).
The versioning history is in the patches themselves.
Please review.
Cheers,
Luca.
Animesh Manna (1):
drm/i915/mtl: Limit scaler input to 4k in plane scaling
Luca Coelho (1
From: Animesh Manna
As part of die area reduction max input source modified to 4096
for MTL so modified range check logic of scaler.
Signed-off-by: Jos� Roberto de Souza
Signed-off-by: Animesh Manna
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/skl_scaler.c | 31
The bspec has been updated and now display versions 12 and 13 support
source width up to 5120 pixels, source height up to 8192 lines,
destination width up to 8192 and destination height up to 8192.
Update the code accordingly.
BSpec: 50441
Reviewed-by: Ankit Nautiyal
Signed-off-by: Luca Coelho
The bspec has been updated and now display versions 12 and 13 support
source width up to 5120 pixels, source height up to 8192 lines,
destination width up to 8192 and destination height up to 8192.
Update the code accordingly.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display
hen the scalers
are actually being set up.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_atomic.c | 83 ++---
1 file changed, 73 insertions(+), 10 deletions(-)
In v2:
* fix DRM_PLANE_NO_SCALING renamed macros;
In v3:
* No changes.
In v4:
* Got
From: Animesh Manna
As part of die area reduction max input source modified to 4096
for MTL so modified range check logic of scaler.
Signed-off-by: Jos� Roberto de Souza
Signed-off-by: Animesh Manna
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/skl_scaler.c | 31
hen the scalers
are actually being set up.
Signed-off-by: Luca Coelho
---
In v2:
* fix DRM_PLANE_NO_SCALING renamed macros;
In v3:
* No changes.
In v4:
* Got rid of the changes in the general planes max scale code;
* Added a couple of FIXMEs;
* Made intel_atomic_setup_scaler() ret
Hi,
I'm resending this series with a cover letter, because the patches
didn't seem to arrive in patchwork as they should.
The versioning history is in the patches themselves.
Please review.
Cheers,
Luca.
Animesh Manna (1):
drm/i915/mtl: Limit scaler input to 4k in plane scaling
Luca
From: Animesh Manna
As part of die area reduction max input source modified to 4096
for MTL so modified range check logic of scaler.
Signed-off-by: Jose Roberto de Souza
Signed-off-by: Animesh Manna
Signed-off-by: Luca Coelho
---
In v2:
* No changes;
In v3:
* Removed stray reviewed
From: Animesh Manna
As part of die area reduction max input source modified to 4096
for MTL so modified range check logic of scaler.
Signed-off-by: José Roberto de Souza
Signed-off-by: Animesh Manna
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/skl_scaler.c | 31
From: Animesh Manna
As part of die area reduction max input source modified to 4096
for MTL so modified range check logic of scaler.
Signed-off-by: Jos� Roberto de Souza
Signed-off-by: Animesh Manna
Signed-off-by: Luca Coelho
---
In v2:
* No changes;
In v3:
* Removed stray reviewed
hen the scalers
are actually being set up.
Signed-off-by: Luca Coelho
---
In v2:
* fix DRM_PLANE_NO_SCALING renamed macros;
In v3:
* No changes.
drivers/gpu/drm/i915/display/i9xx_plane.c | 4 +-
drivers/gpu/drm/i915/display/intel_atomic.c | 47 +++
.../gpu/drm/i
hen the scalers
are actually being set up.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 4 +-
drivers/gpu/drm/i915/display/intel_atomic.c | 47 +++
.../gpu/drm/i915/display/intel_atomic_plane.c | 39 +--
.../gpu/drm/i915/disp
From: Animesh Manna
As part of die area reduction max input source modified to 4096
for MTL so modified range check logic of scaler.
Signed-off-by: José Roberto de Souza
Signed-off-by: Animesh Manna
Reviewed-by: Manasi Navare
---
drivers/gpu/drm/i915/display/skl_scaler.c | 31
From: Animesh Manna
As part of die area reduction max input source modified to 4096
for MTL so modified range check logic of scaler.
Signed-off-by: José Roberto de Souza
Signed-off-by: Animesh Manna
Reviewed-by: Manasi Navare
---
No changes in v2.
drivers/gpu/drm/i915/display/skl_scaler.c
hen the scalers
are actually being set up.
Signed-off-by: Luca Coelho
---
In v2:
* fix DRM_PLANE_NO_SCALING renamed macros;
drivers/gpu/drm/i915/display/i9xx_plane.c | 4 +-
drivers/gpu/drm/i915/display/intel_atomic.c | 47 +++
.../gpu/drm/i915/display/intel_atomic_plan
On Wed, 2023-01-18 at 17:17 +0200, Jani Nikula wrote:
> Replace the __builtin_strcmp() if ladder with generics.
>
> Signed-off-by: Jani Nikula
> ---
Neat! I learned something new. For the whole series:
Reviewed-by: Luca Coelho
> drivers/gpu/drm/i915/i91
On Thu, 2023-01-26 at 14:11 +0200, Luca Coelho wrote:
> On Thu, 2023-01-26 at 14:00 +0200, Jani Nikula wrote:
> > On Thu, 26 Jan 2023, Luca Coelho wrote:
> > > On Wed, 2023-01-25 at 12:44 +0200, Jouni Högander wrote:
> > > > > diff --git a/drivers/gpu/drm/i915
On Thu, 2023-01-05 at 14:54 +0200, Mika Kahola wrote:
> From: Anusha Srivatsa
>
> Unlike previous platforms that used PORT_TX_DFLEXDPSP
> for max_lane calculation, MTL uses only PORT_TX_DFLEXPA1
> from which the max_lanes has to be calculated.
"have to be calculated" or "the max_lanes value
On Thu, 2023-01-26 at 16:40 +0200, Luca Coelho wrote:
> On Thu, 2023-01-05 at 14:54 +0200, Mika Kahola wrote:
> > From: Anusha Srivatsa
> >
> > Unlike previous platforms that used PORT_TX_DFLEXDPSP
> > for max_lane calculation, MTL uses only PORT_TX_DFLEXPA1
>
int color_plane)
> > +{
> > + struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
Should you use i915 instead of dev_priv? I've heard and read elsewhere
that this is generally a desired change. Much easier to use always the
same local name for this kind of thing. Though this file is already
interspersed with both versions...
Regardless of these nitpicks (change them if you want):
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
On Thu, 2023-01-26 at 14:00 +0200, Jani Nikula wrote:
> On Thu, 26 Jan 2023, Luca Coelho wrote:
> > On Wed, 2023-01-25 at 12:44 +0200, Jouni Högander wrote:
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > b/drivers/gpu/drm/i915/display/intel
On Thu, 2023-01-26 at 11:12 -0800, Lucas De Marchi wrote:
> On Thu, Jan 26, 2023 at 01:34:40PM -0500, Rodrigo Vivi wrote:
> > On Thu, Jan 26, 2023 at 08:36:42AM -0800, Lucas De Marchi wrote:
> > > On Thu, Jan 26, 2023 at 06:05:32PM +0200, Jani Nikula wrote:
> > > > On
On Thu, 2023-01-26 at 08:36 -0800, Lucas De Marchi wrote:
> On Thu, Jan 26, 2023 at 06:05:32PM +0200, Jani Nikula wrote:
> > On Thu, 26 Jan 2023, Luca Coelho wrote:
> > > On Thu, 2023-01-26 at 14:11 +0200, Luca Coelho wrote:
> > > > On Thu, 2023-01-26 at
On Fri, 2023-01-27 at 16:37 +0200, Jani Nikula wrote:
> On Fri, 27 Jan 2023, Tvrtko Ursulin wrote:
> > On 26/01/2023 16:05, Jani Nikula wrote:
> > > On Thu, 26 Jan 2023, Luca Coelho wrote:
> > > > On Thu, 2023-01-26 at 14:11 +0200, Luca Coelho wrote:
> > >
On Fri, 2023-01-27 at 11:33 -0800, Lucas De Marchi wrote:
> On Fri, Jan 27, 2023 at 07:12:29PM +0200, Luca Coelho wrote:
> > On Fri, 2023-01-27 at 16:37 +0200, Jani Nikula wrote:
> > > On Fri, 27 Jan 2023, Tvrtko Ursulin
> > > wrote:
> > > >
On Tue, 2023-03-14 at 20:21 +0900, Tetsuo Handa wrote:
> Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
> macro") says, flush_scheduled_work() is dangerous and will be forbidden.
>
> Now that i915 is the last flush_scheduled_work() user, for now let's
> start with blind
tiated commits.
>
> Should be far less fragile since now we just need to remember
> to flag the internal commits, and not worry about where new
> crtcs might get pulled in.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5260
> Signed-off-by: Ville Syrjälä
> ---
Looks good to me.
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
On Thu, 2023-03-16 at 13:13 +0200, Mika Kahola wrote:
> From: Anusha Srivatsa
>
> Unlike previous platforms that used PORT_TX_DFLEXDPSP
> for max_lane calculation, MTL uses only PORT_TX_DFLEXPA1
> from which the max_lanes has to be calculated.
>
> Bspec: 50235, 65380
>
> Cc: Mika Kahola
> Cc:
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