On Wed, Apr 14, 2021 at 12:38:44PM +0100, Tvrtko Ursulin wrote:
On 13/04/2021 06:09, Lucas De Marchi wrote:
Now that it's not used anywhere, remove it from struct
intel_device_info. To allow a period in which code will be converted to
the new macro, keep IS_GEN_RANGE() around, just redef
out getting overly abstracted.
> - allows future junction with CSR_VERSION for simplicity.
> - Enforces dmc file will never change this standard.
>
> Cc: Fei Yang
> Cc: Jani Nikula
> Cc: Lucas De Marchi
> Signed-off-by: Rodrigo Vivi
> ---
>
abstracted.
- allows future junction with CSR_VERSION for simplicity.
- Enforces dmc file will never change this standard.
v2: define DMC_PATH inside .c (Lucas)
Cc: Fei Yang
Cc: Jani Nikula
Cc: Lucas De Marchi
Signed-off-by: Rodrigo Vivi
Reviewed-by: José Roberto de Souza #v1
Reviewed-by: Lucas
with guc/huc, without getting overly abstracted.
- allows future junction with CSR_VERSION for simplicity.
- Enforces dmc file will never change this standard.
v2: define DMC_PATH inside .c (Lucas)
Cc: Fei Yang
Cc: Jani Nikula
Cc: Lucas De Marchi
Signed-off-by: Rodrigo Vivi
Reviewed-by: José
Direction on gen >= 9 was to stop using straps and rely on VBT
indicating if the port is present or not. Remove FIXME comment since
this will never be "fixed".
Signed-off-by: Lucas De Marchi
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 6 --
1 fi
rest of the
driver instead of checking for == 9
- also handle CNL and only initialize port F if it is
IS_CNL_WITH_PORT_F. Eventually CNL may be removed, but while it
isn't let's keep it consistent everywhere
Signed-off-by: Lucas De Marchi
Reviewed-by: Anusha Srivatsa
Lucas De Marchi (4):
drm/i915/display: move vbt check to intel_ddi_init()
drm/i915/display: remove FIXME comment for intended feature
drm/i915/display: remove strap checks from gen 9
drm/i915/display: hide workaround for broken vbt in intel_bios.c
drivers/gpu/drm/i915/display/intel_b
Instead of poluting the normal code path in intel_display.c, make
intel_bios.c handle the brokenness of the VBT.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_bios.c| 15 +++
drivers/gpu/drm/i915/display/intel_display.c | 14 ++
2 files
el_display.c we don't have to check
intel_bios_is_port_present(), just rely on the check in
intel_ddi_init().
v2: Rebase on commit 45c0673aac97 ("drm/i915/bios: start using the
intel_bios_encoder_data directly") re-using that check in intel_ddi_init()
instead of adding a new one.
Instead of poluting the normal code path in intel_display.c, make
intel_bios.c handle the brokenness of the VBT.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_bios.c| 15 +++
drivers/gpu/drm/i915/display/intel_display.c | 14 ++
2 files
On Wed, Apr 28, 2021 at 10:02:45AM +0300, Jani Nikula wrote:
On Tue, 27 Apr 2021, Lucas De Marchi wrote:
Instead of poluting the normal code path in intel_display.c, make
intel_bios.c handle the brokenness of the VBT.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display
el_display.c we don't have to check
intel_bios_is_port_present(), just rely on the check in
intel_ddi_init().
v2: Rebase on commit 45c0673aac97 ("drm/i915/bios: start using the
intel_bios_encoder_data directly") re-using that check in intel_ddi_init()
instead of adding a new one.
First and second patches should be straightforward. Third patch is a
simplification for gen9+ since we are not supposed to check the straps
anymore and rely on VBT.
Last patch hides port F hacks in intel_bios.c so we have a clean init
sequence.
Lucas De Marchi (4):
drm/i915/display: move vbt
rest of the
driver instead of checking for == 9
- also handle CNL and only initialize port F if it is
IS_CNL_WITH_PORT_F. Eventually CNL may be removed, but while it
isn't let's keep it consistent everywhere
Signed-off-by: Lucas De Marchi
Reviewed-by: Anusha Srivatsa
Reviewed-
Instead of poluting the normal code path in intel_display.c, make
intel_bios.c handle the brokenness of the VBT.
Signed-off-by: Lucas De Marchi
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bios.c| 20
drivers/gpu/drm/i915/display/intel_display.c | 14
Direction on gen >= 9 was to stop using straps and rely on VBT
indicating if the port is present or not. Remove FIXME comment since
this will never be "fixed".
Signed-off-by: Lucas De Marchi
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 6 --
1 fi
d, the clr bits could be anything since they don't really
matter. The biggest value added by the wa_masked_* variant is the use of
_MASKED_* where needed.
Lucas De Marchi
}
static void
wa_masked_dis(struct i915_wa_list *wal, i915_reg_t reg, u32 val)
{
- wa_add(wal, reg, 0, _MASKED_BIT_DIS
Ursulin
Reviewed-by: Lucas De Marchi
Lucas De Marchi
---
drivers/gpu/drm/i915/i915_debugfs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 8dd374691102..b9c81376a413 100644
--- a/drivers/gpu
On Thu, Apr 29, 2021 at 10:12:49AM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Same workaround was listed two times - once under the Gen7 block and once
under the Haswell section.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Lucas De Marchi
Lucas De Marchi
---
drivers/gpu/drm/i915
Fix the TODO leftover in the code by changing the argument in MG_PLL
macros. The MG_PLL ids used to access the register values can be
converted from tc_port rather than port.
The helper functions were also renamed to use "tc" as prefix to make
them more generic.
Signed-off-by: Lucas
Even if we don't have the correct clock and get a warning, we should not
skip the return.
Fixes: 1fa11ee2d9d0 ("drm/i915/icl: start adding the TBT pll")
Cc: Paulo Zanoni
Cc: # v4.19+
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_ddi.c | 2 +-
1 file changed, 1
Some PLL reworks on ICL. Patches are more or less independent of each
other, but touch the same part of the code.
Lucas De Marchi (5):
drm/i915/icl: use tc_port in MG_PLL macros
drm/i915: always return something
drm/i915/icl: remove dpll from clk_sel
drm/i915/icl: keep track of unused pll
Instead of looping again on the range of plls, just keep track of one
unused one and use it later.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915
We should not pass DPLL_ID_ICL_DPLL0 or DPLL_ID_ICL_DPLL1 to this
function because the path is only taken for non-combophy ports. Let the
warning trigger if improper value is given.
While at it, rename the function to match the register name we are
trying to program.
Signed-off-by: Lucas De
This allows us to use PLLs that are not consecutive (although we don't
currently have any case) while clarifying the code paths in which only
one PLL is supposed to be used.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 41 ---
1 file c
On Thu, Jan 17, 2019 at 12:21 PM Lucas De Marchi
wrote:
>
> Right now when searching for shared plls we mandate that they have
> consecutive IDs since we just pass the min and max id and loop over the
> range. However the IDs can't be arbitrarily defined since they are used
>
table more readable and to implicitly mark entries that are defined
- Minor improvements to "drm/i915: cache number of MOCS entries"
(suggested by Tvrtko)
- Reorder patches to avoid unneeded changes (suggested by Tvrtko)
Lucas De Marchi (5):
drm/i915: initialize unused MOCS
ble for Ice Lake will
be added by other patches, this only reformats the table.
While at it also fix the indentation.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_mocs.c | 80 +++
1 file changed, 29 insertions(+), 51 deletions(-)
diff --git a/drivers/
: 34007
BSpec: 560
Signed-off-by: Tomasz Lis
Reviewed-by: Daniele Ceraolo Spurio
Reviewed-by: Lucas De Marchi
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_mocs.c | 107 +++---
1 file changed, 98 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915
re removed
since they are overly verbose and copy-pasted in several functions: now
the definition is in the top only.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_mocs.c | 88 ---
1 file changed, 57 insertions(+), 31 deletions(-)
diff --git a/drivers/gp
Let's use a macro to make tables smaller and at the same time allow us
to add fields that apply to all entries in future.
For the sake of readability, I'm calling an exception on 80 chars limit.
Lines are aligned for easy comparison of the entry values.
Signed-off-by: Lucas
Instead of initializing them to uncached, let's set them to PTE for
kernel tracking. While at it do some minor adjustments to comments and
coding style.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_mocs.c | 56 +--
1 file changed, 23 inser
ollow up.
v2: make size and n_entries `unsigned int` and introduce changes as a
pre-work for the Ice Lake changes (Tvrtko)
Suggested-by: Tvrtko Ursulin
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_mocs.c | 27 ++-
1 file changed, 14 insertions(+
code formatting tools
Signed-off-by: Tomasz Lis
Suggested-by: Lucas De Marchi
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_mocs.c | 57 ++-
1 file changed, 25 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_mocs.c
b/drivers
On Tue, Jan 22, 2019 at 6:32 AM Chris Wilson wrote:
>
> Quoting Lucas De Marchi (2019-01-22 05:12:24)
> > Let's use a macro to make tables smaller and at the same time allow us
> > to add fields that apply to all entries in future.
> >
> > For the sake of reada
CC'ing people who have commits related to this series.
Could you take a look on it?
thanks
Lucas De Marchi
On Thu, Jan 17, 2019 at 12:21:08PM -0800, Lucas De Marchi wrote:
Some PLL reworks on ICL. Patches are more or less independent of each
other, but touch the same part of the code.
On Wed, Jan 23, 2019 at 04:19:30PM +0200, Joonas Lahtinen wrote:
The subject of this patch could really be bit more specific "... on DDI clock
selection".
Fixed. I'll wait for reviews on other patches to re-spin this series as
it's already conflicting.
thanks
Lucas
On Wed, Jan 23, 2019 at 07:33:35PM +0100, Tomasz Lis wrote:
On 2019-01-22 06:12, Lucas De Marchi wrote:
Instead of initializing them to uncached, let's set them to PTE for
kernel tracking. While at it do some minor adjustments to comments and
coding style.
Signed-off-by: Lucas De M
On Tue, Jan 22, 2019 at 09:37:02PM +, Chris Wilson wrote:
Quoting Lucas De Marchi (2019-01-22 21:33:25)
On Tue, Jan 22, 2019 at 6:32 AM Chris Wilson wrote:
>
> Quoting Lucas De Marchi (2019-01-22 05:12:24)
> > Let's use a macro to make tables smaller and at the same tim
On Tue, Jan 22, 2019 at 02:40:48PM +, Chris Wilson wrote:
Quoting Lucas De Marchi (2019-01-22 05:12:25)
Instead of considering we have defined entries for any index in the
table, let's keep track of the ones we explicitly defined. This will
allow Gen 11 to have it's new table
re removed
since they are overly verbose and copy-pasted in several functions: now
the definition is in the top only.
v2: add helper function to get the index (from Chris)
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_mocs.c | 111 +-
1 file changed, 78
code formatting tools
Signed-off-by: Tomasz Lis
Suggested-by: Lucas De Marchi
Signed-off-by: Lucas De Marchi
Reviewed-by: Chris Wilson
Acked-by: Tomasz Lis # v3
---
drivers/gpu/drm/i915/intel_mocs.c | 57 ++-
1 file changed, 25 insertions(+), 32 deletions(-)
diff
v9 of https://patchwork.freedesktop.org/series/54070/
Changes:
- Add the R-b received
- Wrap lines in "drm/i915: use a macro to define MOCS entries"
- Add helper functions in
"drm/i915: keep track of used entries in MOCS table"
Lucas De Marchi (5):
drm/i915: in
ble for Ice Lake will
be added by other patches, this only reformats the table.
While at it also fix the indentation.
Signed-off-by: Lucas De Marchi
Reviewed-by: Tomasz Lis
---
drivers/gpu/drm/i915/intel_mocs.c | 80 +++
1 file changed, 29 insertions(+), 51 deleti
ere always
undefined. So we should at least be able to guarantee that the data
written by userspace from the CPU is visible. After that, your caches
are on your own".
Signed-off-by: Lucas De Marchi
Reviewed-by: Chris Wilson
Reviewed-by: Tomasz Lis
---
drivers/gpu/drm/i915/in
ollow up.
v2: make size and n_entries `unsigned int` and introduce changes as a
pre-work for the Ice Lake changes (Tvrtko)
Suggested-by: Tvrtko Ursulin
Signed-off-by: Lucas De Marchi
Reviewed-by: Chris Wilson
Reviewed-by: Tomasz Lis
---
drivers/gpu/drm/i915/intel_mocs.c
comment (from Tomasz)
BSpec: 34007
BSpec: 560
Signed-off-by: Tomasz Lis
Reviewed-by: Daniele Ceraolo Spurio
Reviewed-by: Lucas De Marchi
Signed-off-by: Lucas De Marchi
Acked-by: Tomasz Lis
---
drivers/gpu/drm/i915/intel_mocs.c | 132 --
1 file changed, 123
Let's use a macro to make tables smaller and at the same time allow us
to add fields that apply to all entries in future.
v2: rewrap lines to respect 80 chars limit and make it more readable
(from Chris)
Signed-off-by: Lucas De Marchi
Reviewed-by: Tomasz Lis
---
drivers/gpu/drm
On Wed, Jan 23, 2019 at 05:15:26PM -0800, Paulo Zanoni wrote:
Em qui, 2019-01-17 às 12:21 -0800, Lucas De Marchi escreveu:
Fix the TODO leftover in the code by changing the argument in MG_PLL
macros. The MG_PLL ids used to access the register values can be
converted from tc_port rather than
On Thu, Jan 24, 2019 at 12:41:27PM +0200, Joonas Lahtinen wrote:
Quoting Lucas De Marchi (2019-01-24 02:06:04)
From: Tomasz Lis
The table has been unified across OSes to minimize virtualization overhead.
The MOCS table is now published as part of bspec, and versioned. Entries
are supposed to
Signed-off-by: Lucas De Marchi
Reviewed-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_ddi.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 51d4be072268..ca705546a0ab 100644
--- a/drivers/gpu
Even if we don't have the correct clock and get a warning, we should not
skip the return.
v2: improve commit message (from Joonas)
Fixes: 1fa11ee2d9d0 ("drm/i915/icl: start adding the TBT pll")
Cc: Paulo Zanoni
Cc: # v4.19+
Signed-off-by: Lucas De Marchi
Reviewed-by: Mika Kahol
w and when/if we do, I'm
not sure the alternative I proposed in v1 isn't better.
Lucas De Marchi (4):
drm/i915/icl: use tc_port in MG_PLL macros
drm/i915: always return something on DDI clock selection
drm/i915/icl: remove dpll from clk_sel
drm/i915/icl: keep track of unused pll whi
ke
them more generic.
v2: Improve commit message and fix checkpatch warning (from Paulo)
Signed-off-by: Lucas De Marchi
Reviewed-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_reg.h | 52 +-
drivers/gpu/drm/i915/intel_ddi.c | 7 ++-
drivers/gpu/drm/i915/intel_display.c
Instead of looping again on the range of plls, just keep track of one
unused one and use it later.
Signed-off-by: Lucas De Marchi
Reviewed-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers
DPLL state left over by
> broken SNB BIOSen")
>
> It seems this was cherry-picked incorrectly :-(
while the cherry-pick was correct, the macro is different on
drm-intel-fixes. IS_GEN(dev_priv, 6) needs to be converted to
IS_GEN6(dev_priv).
).
I assumed the no harm and simplest approach so I didn't bother
checking if the it was already set. So I'd not say it was
"inadvertently", it was on purpose.
But if it makes life easier to read the logs:
Acked-by: Lucas De Marchi
Lucas De Marchi
Cc: Lucas De Marc
The only meaninful change is that it supports up to 32 fw_info entries
rather than the previous max=20.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_csr.c | 35 ++--
1 file changed, 24 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915
Change all fields in intel_package_header and intel_dmc_header whose
meaning are 1-byte numbers to use u8.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_csr.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_csr.c b
Like parse_csr_fw_css() this parses the package_header from firmware and
saves the relevant fields in the csr struct. In this function we also
lookup the fw_info we are interested in.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_csr.c | 94 +++-
1
parse_csr_fw() is responsible to set up several fields in struct intel_csr,
including the payload. We don't need to assign it again.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_csr.c | 17 ++---
1 file changed, 6 insertions(+), 11 deletions(-)
diff --git a/dr
.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_csr.c | 71
1 file changed, 53 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index 7ff08de83cc6..b7181ca6c8f5 100644
--- a/drivers/gpu/drm
Let's start splitting the parse function, making all of them return the
number of bytes parsed - different versions of the firmware header may
require different sizes for the structures.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_csr.c | 49 +++---
Complete the extraction of functions to parse specific parts of the
firmware. The return of the function parse_csr_fw() is now redundant
since it already sets the dmc_payload field. Changing it is left for
later to avoid noise in the commit.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm
Add a comment to explain we will
continue to try to find a more specific firmware version, even if this
is not required by the spec.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_csr.c | 68
1 file changed, 51 insertions(+), 17 deletions(-)
diff --
In intel_package_header version 2 there's a new field in the
fw_info table that must be 0, otherwise it's not the correct DMC
firmware. Add a check for version 2 or later.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_csr.c | 14 +++---
1 file changed, 11
Main difference is that now there are up to 20 MMIOs that can be set and
a lot of noise due to the struct changing the fields in the middle.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_drv.h | 4 +-
drivers/gpu/drm/i915/intel_csr.c | 107 +++
2
On Thu, May 23, 2019 at 10:43:39AM -0700, Rodrigo Vivi wrote:
On Thu, May 23, 2019 at 01:24:13AM -0700, Lucas De Marchi wrote:
The only meaninful change is that it supports up to 32 fw_info entries
rather than the previous max=20.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915
On Thu, May 23, 2019 at 11:57:19AM -0700, Rodrigo Vivi wrote:
On Thu, May 23, 2019 at 01:24:17AM -0700, Lucas De Marchi wrote:
Main difference is that now there are up to 20 MMIOs that can be set and
a lot of noise due to the struct changing the fields in the middle.
Signed-off-by: Lucas De
On Thu, May 23, 2019 at 11:58:46AM -0700, Rodrigo Vivi wrote:
On Thu, May 23, 2019 at 01:24:19AM -0700, Lucas De Marchi wrote:
While loading the DMC firmware we were double checking the headers made
sense, but in no place we checked that we were actually reading memory
we were supposed to. This
good idea, we don't - just in case it leaves the
> +* machine in an unusable condition.
> +*/
> +
> + mutex_lock(&i915->drm.struct_mutex);
> + for (phase = phases; *phase; phase++) {
> + list_for_each_entry(obj, *phase, mm.link)
turn false in intel_port_is_tc since no EHL ports are TC.
> > (Jose)
>
> Reviewed-by: José Roberto de Souza
I removed the (v2) from the first line of the commit message since we
don't add that normally and pushed.
Thanks.
Lucas De Marchi
>
> >
> > Cc: Jose Souza
automatically
calculated and we don't have to worry about extending it anymore.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_drv.h | 4
drivers/gpu/drm/i915/intel_device_info.h | 8
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm
unsigned long for platform_mask
+drivers/gpu/drm/i915/i915_drv.h:2360:46: warning: shift too big (61) for type
unsigned int
ops, I forgot to update mask to unsigned long in IS_SUBPLATFORM(). I
will fix in the next version.
Lucas De Marchi
+drivers/gpu/drm/i915/i915_drv.h:2360:46: warning
automatically
calculated and we don't have to worry about extending it anymore.
v2: fix sparse and checkpatch warnings
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_drv.h | 6 +-
drivers/gpu/drm/i915/intel_device_info.h | 7 +++
2 files changed, 4 insertions(
On Tue, Apr 2, 2019 at 11:58 PM Tvrtko Ursulin
wrote:
>
>
> On 03/04/2019 02:46, Lucas De Marchi wrote:
> > No reason to stick to u32 for platform mask if we can just use more bits
> > on 64 bit platforms.
> >
> > $ size drivers/gpu/drm/i915/i915.ko*
> >
On Wed, Apr 03, 2019 at 10:25:33AM +0100, Tvrtko Ursulin wrote:
On 03/04/2019 09:15, Lucas De Marchi wrote:
On Tue, Apr 2, 2019 at 11:58 PM Tvrtko Ursulin
wrote:
On 03/04/2019 02:46, Lucas De Marchi wrote:
No reason to stick to u32 for platform mask if we can just use more bits
on 64 bit
Reorder if/else so we check for gen >= 11 first, similar to most of
other checks in the driver.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_pm.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/
Separate the two comments: one is a workaround and the other is a sanity
check. We could just compare != 1, but let's treat them differently due
to having different meaning.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_pm.c | 10 ++
1 file changed, 6 insertions(
At some point the spec was changed and we never updated the numbers to
match it. Let's try once more to keep them in sync.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gp
I was fixing a pm thing that ended up not being needed. So, just get the
small/trivial changes out.
No change in behavior.
Lucas De Marchi (3):
drm/i915/icl: fix step numbers in icl_display_core_init()
drm/i915: reorder if chain to have last gen first
drm/i915: do not mix workaround with
L.
> pw_idx >= ICL_PW_CTL_IDX_AUX_A && pw_idx <=
> ICL_PW_CTL_IDX_AUX_B &&
> !intel_bios_is_port_edp(dev_priv, port)) {
> val = I915_READ(ICL_AUX_ANAOVRD1(pw_idx));
> @@ -4055,7 +4055,7 @@ void intel_power_domains_i
2 set)
> +{
> + intel_uncore_rmw(uncore, reg, 0, set);
> +}
> +
> +static void rmw_clear(struct intel_uncore *uncore, i915_reg_t reg, u32 clr)
> +{
> + intel_uncore_rmw(uncore, reg, clr, 0);
> +}
> +
> +static void rwm_set_fw(struct intel_uncore *uncore, i915_reg_t reg, u32 set
Fix compilation error
Cc: Lucas De Marchi
Signed-off-by: Vivek Kasireddy
Reviewed-by: Bob Paauwe
---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 60 ++-
1 file changed, 59 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
b/drivers/gpu/
On Fri, Apr 5, 2019 at 1:43 PM Chris Wilson wrote:
>
> Quoting Lucas De Marchi (2019-04-05 21:39:46)
> > On Fri, Apr 5, 2019 at 1:24 PM Chris Wilson
> > wrote:
> > >
> > > Currently i915_reset.c mixes calls to intel_uncore, pci and our old
> > > st
("drm/i915: Make MG PHY macros semantically consistent")
Cc: José Roberto de Souza
Cc: Lucas De Marchi
Cc: Aditya Swarup
Signed-off-by: Imre Deak
Reviewed-by: Lucas De Marchi
thanks
Lucas De Marchi
---
drivers/gpu/drm/i915/intel_ddi.c | 18 --
1 file changed,
e the offenders to me.
For the patch, regardless of the argument name:
Reviewed-by: Lucas De Marchi
Lucas De Marchi
Reviewed-by: Dhinakaran Pandiyan
> trans_offsets[(trans)] - \
+INTEL_INFO(dev_priv)-
> trans_offsets[TRANSCODER_A] + (reg)
really find a way to test this...
>
> Cc: Uma Shankar
> Fixes: d2c19b06d6ea ("drm/i915: Clean up ilk/icl pipe/output CSC programming")
> Signed-off-by: Ville Syrjälä
+Clint
Does this fix the problem you reported earlier this week?
Lucas De Marchi
> ---
> drivers/
break;
> - case DPLL_CFGCR1_KDIV_4:
> - p2 = 4;
> + case DPLL_CFGCR1_KDIV_3:
> + p2 = 3;
confusing in the spec because kdiv 3 has the value 4. And no idea why
we call it p2
rather than kdiv, that IMO whould make more sense.
Reviewed-by: Luc
uldn't
be easier to read by skipping the initializer and just aligning the
numbers? IMO the lines below seem
easier to read:
static const struct skl_wrpll_params icl_dp_combo_pll_24MHz_values[] = {
/* clock, dco_int, dco_frac, kdiv, qdiv_mode, qdiv_ratio */
{ 5400, { 0x151,0x4000,
Cc: Jani Nikula
> > Signed-off-by: Aditya Swarup
>
> Also please add Fixes tag with SHA of the original patch that
> adds these macros.
but this doesn't fix a bug, does it? why would you propagate this to stable?
Lucas De Marchi
> With that,
>
> Reviewed-by: Manasi
On Thu, Feb 21, 2019 at 01:17:16PM -0800, Rodrigo Vivi wrote:
Other than LPT, no other PCH needed to differentiate between
LP and HP. So let's remove this before we spread this mistake
to future platforms.
Cc: Anusha Srivatsa
Cc: Lucas De Marchi
Signed-off-by: Rodrigo Vivi
Review
On Thu, Feb 21, 2019 at 01:44:30PM -0800, Rodrigo Vivi wrote:
No functional change. Just a reorg to match the preferred
behavior.
v2: missing else (Ville)
Cc: Ville Syrjälä
Cc: Lucas De Marchi
Signed-off-by: Rodrigo Vivi
Reviewed-by: Lucas De Marchi
Lucas De Marchi
---
drivers/gpu/drm
ln, port) \
Going through each of those, it seems MG_DP_MODE() was indeed the only
one left behind. Could you double check?
Reviewed-by: Lucas De Marchi
thanks
Lucas De Marchi
> Cc: Clint Taylor
> Cc: Imre Deak
> Cc: Jani Nikula
> Cc: Aditya Swarup
> Cc: Manasi navare
&g
Define a HAS_TRANSCODER_EDP() macro that checks if we have defined an
offset for this transcoder. This allows platforms to be defined without
eDP transcoder.
Cc: Mika Kahola
Cc: Imre Deak
Cc: Rodrigo Vivi
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers
Instead of keeping track of the number of transcoders, loop through all
the interesting ones and check if there is a correspondent offset.
Cc: Rodrigo Vivi
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_display.c | 21 -
1 file changed, 12 insertions(+), 9
Lake case that heavily relies
on the PLL id to make decisions on what type of PLL that is. This
hinders code sharing across platforms as the IDs may change easily.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_dpll_mgr.h | 9 -
1 file changed, 8 insertions(+), 1 deletion
as I don't think it should ever trigger.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_display.c | 3 --
drivers/gpu/drm/i915/intel_dpll_mgr.c | 54 +--
drivers/gpu/drm/i915/intel_dpll_mgr.h | 1 -
3 files changed, 35 insertions(+), 23 dele
Let the MG plls have their own hooks since it shares very little with
other PLL types. It's also better so the platform info contains the info
if the PLL is for MG PHY rather than relying on the PLL ids.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_dpll_mgr.c
Cc: Jose Souza
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_irq.c | 34 +++--
1 file changed, 20 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7c7e84e86c6a..524caf168a01 100644
--
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