On Wed, 2017-02-22 at 09:59 +0530, Archit Taneja wrote:
>
> On 02/22/2017 05:31 AM, Pandiyan, Dhinakaran wrote:
> > On Fri, 2017-02-17 at 15:37 +0530, Archit Taneja wrote:
> >>
> >> On 02/16/2017 05:43 AM, Pandiyan, Dhinakaran wrote:
> >>> On Wed, 2017
On Thu, 2017-02-16 at 09:09 +, Lankhorst, Maarten wrote:
> Daniel Vetter schreef op di 14-02-2017 om 20:51 [+0100]:
> > On Mon, Feb 13, 2017 at 10:26 PM, Pandiyan, Dhinakaran
> > wrote:
> > > On Mon, 2017-02-13 at 09:05 +, Lankhorst, Maarten wrote:
> > >
On Sun, 2017-02-26 at 20:57 +0100, Daniel Vetter wrote:
> On Wed, Feb 22, 2017 at 12:01:12AM +0000, Pandiyan, Dhinakaran wrote:
> > On Fri, 2017-02-17 at 15:37 +0530, Archit Taneja wrote:
> > >
> > > On 02/16/2017 05:43 AM, Pandiyan, Dhinakaran wrote:
> > >
On Tue, 2017-05-16 at 11:07 -0700, Puthikorn Voravootivat wrote:
>
>
> On Mon, May 15, 2017 at 11:21 PM, Pandiyan, Dhinakaran
> wrote:
> On Mon, 2017-05-15 at 17:43 -0700, Puthikorn Voravootivat
> wrote:
> >
> >
>
On Tue, 2017-05-16 at 13:56 -0700, Puthikorn Voravootivat wrote:
>
>
> On Tue, May 16, 2017 at 1:29 PM, Pandiyan, Dhinakaran
> wrote:
> On Tue, 2017-05-16 at 11:07 -0700, Puthikorn Voravootivat
> wrote:
> >
> >
> &
On Tue, 2017-05-16 at 17:39 -0700, Puthikorn Voravootivat wrote:
>
>
> On Tue, May 16, 2017 at 2:21 PM, Pandiyan, Dhinakaran
> wrote:
> On Tue, 2017-05-16 at 13:56 -0700, Puthikorn Voravootivat
> wrote:
> >
> >
>
On Tue, 2017-05-16 at 17:34 -0700, Puthikorn Voravootivat wrote:
> Read desired PWM frequency from panel vbt and calculate the
> value for divider in DPCD address 0x724 and 0x728 to have
> as many bits as possible for PWM duty cyle for granularity of
> brightness adjustment while the frequency divi
From: Puthikorn Voravootivat [put...@google.com] on behalf of Puthikorn
Voravootivat [put...@chromium.org]
Sent: Tuesday, May 16, 2017 5:33 PM
To: intel-gfx@lists.freedesktop.org; Pandiyan, Dhinakaran
Cc: dri-de...@lists.freedesktop.org; Jani Nikula
On Tue, 2017-05-16 at 17:34 -0700, Puthikorn Voravootivat wrote:
> This patch adds option to enable dynamic backlight for eDP
> panel that supports this feature via DPCD register and
> set minimum / maximum brightness to 0% and 100% of the
> normal brightness.
>
> Signed-off-by: Puthikorn Voravoot
On Thu, 2017-05-18 at 14:10 +0300, Jani Nikula wrote:
> Face the fact, there are Display Port sink and branch devices out there
> in the wild that don't follow the Display Port specifications, or they
> have bugs, or just otherwise require special treatment. Start a common
> quirk database the driv
On Wed, 2017-05-17 at 14:04 -0700, Puthikorn Voravootivat wrote:
>
> On Wed, May 17, 2017 at 1:09 PM, Pandiyan, Dhinakaran
> wrote:
>
>
> From: Puthikorn Voravootivat [put...@google.com] on behalf of
&
Yeah, looks fine to me.
-DK
From: put...@google.com [mailto:put...@google.com] On Behalf Of Puthikorn
Voravootivat
Sent: Friday, May 19, 2017 2:00 PM
To: Pandiyan, Dhinakaran
Cc: put...@chromium.org; dri-de...@lists.freedesktop.org;
intel-gfx@lists.freedesktop.org; jani.nik...@linux.intel.com
The patch looks good overall, it would have been easier to merge if
you'd sent this as the first patch in this version. Some comments
inline.
On Fri, 2017-05-26 at 18:42 -0700, Puthikorn Voravootivat wrote:
> Read desired PWM frequency from panel vbt and calculate the
> value for divider in DPCD
On Fri, 2017-05-26 at 18:42 -0700, Puthikorn Voravootivat wrote:
> This patch adds option to enable dynamic backlight for eDP
> panel that supports this feature via DPCD register and
> set minimum / maximum brightness to 0% and 100% of the
> normal brightness.
>
> Signed-off-by: Puthikorn Voravoot
On Tue, 2017-05-30 at 15:42 -0700, Rodrigo Vivi wrote:
> As for BXT, PP_DIVISOR was removed from CNP PCH and power
> cycle delay has been moved to PP_CONTROL.
>
> Cc: Jani Nikula
> Signed-off-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/intel_dp.c | 10 +-
> 1 file changed, 5 insertion
On Wed, 2017-05-31 at 14:37 -0700, Puthikorn Voravootivat wrote:
>
>
> On Tue, May 30, 2017 at 9:18 PM, Pandiyan, Dhinakaran
> wrote:
> On Fri, 2017-05-26 at 18:42 -0700, Puthikorn Voravootivat
> wrote:
> > This patch adds option to enable d
On Wed, 2017-05-31 at 14:54 -0700, Rodrigo Vivi wrote:
> As for BXT, PP_DIVISOR was removed from CNP PCH and power
> cycle delay has been moved to PP_CONTROL.
>
> v2: Add missed pp_div write, that is now part of PP_CONTROL[8:4]
> as on Broxton. (Found by DK)
>
> Cc: Dhinakaran Pandiyan
> Cc:
On Wed, 2017-05-31 at 23:46 +, Vivi, Rodrigo wrote:
> On Wed, 2017-05-31 at 23:07 +0000, Pandiyan, Dhinakaran wrote:
> > On Wed, 2017-05-31 at 14:54 -0700, Rodrigo Vivi wrote:
> > > As for BXT, PP_DIVISOR was removed from CNP PCH and power
> > > cycle delay h
On Tue, 2017-05-30 at 15:42 -0700, Rodrigo Vivi wrote:
> Split out BXT and CNP's setup_backlight(),enable_backlight(),
> disable_backlight() and hz_to_pwm() into
> two separate functions instead of reusing BXT function.
>
> Reuse set_backlight() and get_backlight() since they have
> no reference t
, 2017 9:29 AM
To: Pandiyan, Dhinakaran
Cc: intel-gfx@lists.freedesktop.org; Nikula, Jani
Subject: Re: [Intel-gfx] [PATCH 04/13] drm/i915/cnp: Backlight support for CNP.
On Thu, 2017-06-01 at 02:15 +, Pandiyan, Dhinakaran wrote:
> On Tue, 2017-05-30 at 15:42 -0700, Rodrigo Vivi wrote:
> &
Reviewed-by: Dhinakaran Pandiyan
-DK
On Thu, 2017-06-01 at 15:33 -0700, Rodrigo Vivi wrote:
> Split out BXT and CNP's setup_backlight(),enable_backlight(),
> disable_backlight() and hz_to_pwm() into
> two separate functions instead of reusing BXT function.
>
> Reuse set_backlight() and get_back
On Fri, 2017-05-26 at 18:42 -0700, Puthikorn Voravootivat wrote:
> Add heuristic to decide that AUX or PWM pin should use for
> backlight brightness adjustment and modify i915 param description
> to have auto, force disable, and force enable.
>
> The heuristic to determine that using AUX pin is be
On Fri, 2017-06-02 at 17:42 +, Pandiyan, Dhinakaran wrote:
Somehow the CC's got removed in my previous reply, adding them back. See
one additional comment below.
> On Fri, 2017-05-26 at 18:42 -0700, Puthikorn Voravootivat wrote:
> > Add heuristic to decide that AUX or PWM pin
On Fri, 2017-05-26 at 18:42 -0700, Puthikorn Voravootivat wrote:
> This patch adds option to enable dynamic backlight for eDP
> panel that supports this feature via DPCD register and
> set minimum / maximum brightness to 0% and 100% of the
> normal brightness.
>
> Signed-off-by: Puthikorn Voravoot
On Tue, 2017-05-30 at 15:42 -0700, Rodrigo Vivi wrote:
> All here is pretty much like Kabylake, expect the PCH.
>
> This patch exclude the addition of DMC, GuC and most workardounds since
> they might have changes/updates.
>
> v2: Take advantage of IS_GEN9_BC minimizing the needed plumbing.
>
>
On Fri, 2017-06-02 at 21:25 +, Pandiyan, Dhinakaran wrote:
> On Tue, 2017-05-30 at 15:42 -0700, Rodrigo Vivi wrote:
> > All here is pretty much like Kabylake, expect the PCH.
> >
> > This patch exclude the addition of DMC, GuC and most workardounds since
> > they
On Tue, 2017-05-30 at 15:43 -0700, Rodrigo Vivi wrote:
> From the DMC perspective the same firmware is used on
> both platforms. We haven't recieved any separated release
> specifically for Coffee Lake so let's just re-use what
> is already there for Kabylake.
>
> Signed-off-by: Rodrigo Vivi
Typ
On Mon, 2017-06-05 at 19:55 +0300, Ville Syrjälä wrote:
> On Mon, Jun 05, 2017 at 04:41:07PM +, Vivi, Rodrigo wrote:
> > On Mon, 2017-06-05 at 18:22 +0300, Imre Deak wrote:
> > > On Thu, Apr 06, 2017 at 12:15:27PM -0700, Rodrigo Vivi wrote:
> > > > All the low level cdclk bits are present, so l
On Fri, 2017-06-02 at 19:04 -0700, Puthikorn Voravootivat wrote:
> This patch adds option to enable dynamic backlight for eDP
> panel that supports this feature via DPCD register and
> set minimum / maximum brightness to 0% and 100% of the
> normal brightness.
>
> Change-Id: I52f04b814bb4cd9df570a
>
> On Mon, Jun 5, 2017 at 11:49 AM, Pandiyan, Dhinakaran
> wrote:
> On Fri, 2017-06-02 at 19:04 -0700, Puthikorn Voravootivat
> wrote:
> > This patch adds option to enable dynamic backlight for eDP
> > panel that supports this feature
On Tue, 2017-06-06 at 08:24 -0700, Rodrigo Vivi wrote:
> On Mon, Jun 5, 2017 at 10:04 AM, Pandiyan, Dhinakaran
> wrote:
> > On Mon, 2017-06-05 at 19:55 +0300, Ville Syrjälä wrote:
> >> On Mon, Jun 05, 2017 at 04:41:07PM +, Vivi, Rodrigo wrote:
> >> > On Mon
On Tue, 2017-06-06 at 11:12 -0700, Rodrigo Vivi wrote:
> On Tue, Jun 6, 2017 at 11:09 AM, Rodrigo Vivi wrote:
> > On Tue, Jun 6, 2017 at 10:39 AM, Pandiyan, Dhinakaran
> > wrote:
> >> On Tue, 2017-06-06 at 08:24 -0700, Rodrigo Vivi wrote:
> >>> On Mo
On Tue, 2017-06-06 at 12:19 -0700, Rodrigo Vivi wrote:
> So let's force it on the virtual detection.
>
> Also it is still the only silicon for now on this PCH,
> so WARN otherwise.
>
> Signed-off-by: Rodrigo Vivi
> Reviewed-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/i915_drv.c | 4
>
On Tue, 2017-06-06 at 12:20 -0700, Rodrigo Vivi wrote:
> All here is pretty much like Kabylake.
>
> Cc: Dhinakaran Pandiyan
> Signed-off-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915
On Tue, 2017-06-06 at 12:20 -0700, Rodrigo Vivi wrote:
> The whole Display engine for Coffee Lake is pretty much
> identical to the Kabylake. For this reason let's reuse
> all display related production workardounds here even though
Are these all the display workarounds we have or is this patch ju
On Wed, 2017-06-07 at 21:52 +, Vivi, Rodrigo wrote:
> On Wed, 2017-06-07 at 18:44 +0000, Pandiyan, Dhinakaran wrote:
> > On Tue, 2017-06-06 at 12:20 -0700, Rodrigo Vivi wrote:
> > > The whole Display engine for Coffee Lake is pretty much
> > > identical to the Kaby
On Wed, 2017-06-07 at 21:53 +, Vivi, Rodrigo wrote:
> On Wed, 2017-06-07 at 18:04 +0000, Pandiyan, Dhinakaran wrote:
> > On Tue, 2017-06-06 at 12:20 -0700, Rodrigo Vivi wrote:
> > > All here is pretty much like Kabylake.
> > >
> > > Cc: Dhinakaran Pandiya
On Tue, 2017-06-06 at 12:20 -0700, Rodrigo Vivi wrote:
> Coffee Lake inherit most of Kabylake production
> workardounds.
>
> Only difference identified so far is:
> - WaDisableLSQCROPERFforOCL is marked as SIWA_NEVER
>
> Cc: Dhinakaran Pandiyan
> Signed-off-by: Rodrigo Vivi
> ---
> drivers/gpu
On Wed, 2017-06-07 at 11:43 -0700, Anusha Srivatsa wrote:
> Coffeelake reuses Kabylake's HUC firmware.
s/Coffeelake/Coffee Lake
That's how the other patches have it :)
>
> Cc: Rodrigo Vivi
> Signed-off-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/intel_huc.c | 2 +-
> 1 file changed, 1 i
On Fri, 2017-06-09 at 17:34 +0300, Ville Syrjälä wrote:
> On Thu, Jun 08, 2017 at 03:03:13PM -0700, Rodrigo Vivi wrote:
> > All the low level cdclk bits are present, so let's add the required
> > hooks to reconfigure cdclk on the fly.
> >
> > v2: Rebase due to cnl_sanitize_cdclk()
> > v3: Rebased
On Fri, 2017-06-09 at 22:02 +0300, Imre Deak wrote:
> On Fri, Jun 09, 2017 at 05:34:55PM +0300, Ville Syrjälä wrote:
> > On Thu, Jun 08, 2017 at 03:03:13PM -0700, Rodrigo Vivi wrote:
> > > All the low level cdclk bits are present, so let's add the required
> > > hooks to reconfigure cdclk on the fl
On Fri, 2017-06-09 at 13:03 -0700, Rodrigo Vivi wrote:
> All here is pretty much like Kabylake.
>
> Including CFL-U has to use same ddi translation table
> as KBL-U for now.
>
> v2: Include missed IS_COFFEELAKE on edp trans table. (DK)
> Handle CFL-U with same translation table as KBL-U. (DK
On Fri, 2017-06-09 at 15:02 -0700, Rodrigo Vivi wrote:
> All here is pretty much like Kabylake.
>
> Including CFL-U has to use same ddi translation table
> as KBL-U for now.
>
> v2: Include missed IS_COFFEELAKE on edp trans table. (DK)
> Handle CFL-U with same translation table as KBL-U. (DK
On Tue, 2017-06-13 at 08:29 +0200, Maarten Lankhorst wrote:
> Op 12-06-17 om 22:16 schreef Dhinakaran Pandiyan:
> > Maarten and Ville noticed that we are enabling backlight via DP aux very
> > early in the modeset_init path via the intel_dp_aux_setup_backlight()
> > function. Looks like all we need
On Tue, 2017-06-13 at 09:48 +0300, Jani Nikula wrote:
> On Mon, 12 Jun 2017, Dhinakaran Pandiyan
> wrote:
> > Maarten and Ville noticed that we are enabling backlight via DP aux very
> > early in the modeset_init path via the intel_dp_aux_setup_backlight()
> > function. Looks like all we need to
On Fri, 2017-06-16 at 16:26 +0300, Imre Deak wrote:
> On Thu, Jun 15, 2017 at 01:56:47PM -0700, Dhinakaran Pandiyan wrote:
> > Although we use 9 bits of Device ID for identifying PCH, only 8 bits are
> > stored in dev_priv->pch_id. This makes HAS_PCH_CNP_LP() and
> > HAS_PCH_SPT_LP() incorrect. Fix
On Fri, 2017-06-16 at 23:35 +0300, Imre Deak wrote:
> On Fri, Jun 16, 2017 at 11:18:40PM +0300, Ville Syrjälä wrote:
> > On Fri, Jun 16, 2017 at 10:58:57PM +0300, Imre Deak wrote:
> > > On Fri, Jun 16, 2017 at 10:19:34PM +0300, Pandiyan, Dhinakaran wrote:
> > > > On
On Fri, 2017-06-16 at 13:20 -0700, Rodrigo Vivi wrote:
> This missing case could be reached out on missing
> type or missing voltage.
Should we even reach this far with a missing DDI type?
-DK
> So let's add a debug
> message to make our lives easier whenever this
> might happen.
>
> Cc: Paulo
On Fri, 2017-06-16 at 14:12 -0700, Manasi Navare wrote:
> On Fri, Jun 16, 2017 at 08:58:25PM +0000, Pandiyan, Dhinakaran wrote:
> > On Fri, 2017-06-16 at 13:20 -0700, Rodrigo Vivi wrote:
> > > This missing case could be reached out on missing
> > > type or missing volta
On Fri, 2017-06-16 at 21:26 +, Vivi, Rodrigo wrote:
> On Fri, 2017-06-16 at 21:21 +0000, Pandiyan, Dhinakaran wrote:
> > On Fri, 2017-06-16 at 14:12 -0700, Manasi Navare wrote:
> > > On Fri, Jun 16, 2017 at 08:58:25PM +, Pandiyan, Dhinakaran wrote:
> > > > On
On Mon, 2017-06-19 at 11:08 -0700, Dhinakaran Pandiyan wrote:
> Maarten and Ville noticed that we are enabling backlight via DP aux very
> early in the modeset_init path via the intel_dp_aux_setup_backlight()
> function, since commit e7156c833903 ("drm/i915: Add Backlight Control using
> DPCD for e
On Tue, 2017-06-20 at 11:03 +0200, Daniel Vetter wrote:
> On Mon, Jun 05, 2017 at 02:56:04PM -0700, Puthikorn Voravootivat wrote:
> > This patch set contain 3 patches which are already reviewed by DK.
> > Another 6 patches in previous version was already merged in v7 and v9.
> > - First patch se
On Tue, 2017-06-20 at 16:03 +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Make the code less confusiong by always using the top 9 bits of the
> LPC bridge device ID to detect the PCH type. We need to add a bit of
> new code for WPT, and we need to adjust the KBP ID as w
On Tue, 2017-06-20 at 11:16 +0200, Daniel Vetter wrote:
> In
>
> commit 91eefc05f0ac71902906b2058360e61bd25137fe
> Author: Daniel Vetter
> Date: Wed Dec 14 00:08:10 2016 +0100
>
> drm: Tighten locking in drm_mode_getconnector
>
> I reordered the logic a bit in that IOCTL, but that brok
g in drm_mode_getconnector")
> Cc: Sean Paul
> Cc: Daniel Vetter
> Cc: Jani Nikula
> Cc: David Airlie
> Cc: dri-de...@lists.freedesktop.org
> Reported-by: "H.J. Lu"
> Tested-by: "H.J. Lu"
> Cc: # v4.11+
> Bugzilla: https://bugs.freede
On Wed, 2017-06-21 at 12:59 +0200, Maarten Lankhorst wrote:
> When reading all debugfs files on a system with DP-MST the kernel panics
> on a null pointer dereference because intel_dp is null for a DP-MST
> connector. Detect this case and skip those connectors.
>
> Signed-off-by: Maarten Lankho
On Mon, 2017-06-26 at 10:18 +0200, Maarten Lankhorst wrote:
> When reading all debugfs files on a system with DP-MST the kernel panics
> on a null pointer dereference because intel_dp is null for a DP-MST
> connector. Detect this case and skip those connectors.
>
> Also fix the write for the DP
Patch looks correct,
Reviewed-by: Dhinakaran Pandiyan
On Mon, 2017-06-26 at 10:33 +0200, Maarten Lankhorst wrote:
> Commit 9a148a96fc3a ("drm/i915/debugfs: add dp mst info") adds support
> for DP-MST to intel_connector_info, but forgot to remove the early
> return for DP-MST.
>
> Remove it, an
On Tue, 2017-06-27 at 16:23 +0300, David Weinehall wrote:
> On Mon, Jun 26, 2017 at 05:18:19PM +0300, David Weinehall wrote:
> > On Thu, Jun 22, 2017 at 12:03:39PM -0700, Puthikorn Voravootivat wrote:
> > > This patch adds option to enable dynamic backlight for eDP
> > > panel that supports this
I went and read Mika's review in [1] and also the patches posted and
committed after that. The version currently in drm-tip deviates from his
review and the fix here addresses Mika's comments correctly.
Verified that BSpec does indeed say
WaDisableKillLogic is applicable to only SKL and BXT.
As
...@linux.intel.com]
Sent: Friday, July 07, 2017 11:24 AM
To: Rodrigo Vivi
Cc: intel-gfx; Pandiyan, Dhinakaran; Zanoni, Paulo R; Vivi, Rodrigo
Subject: Re: [Intel-gfx] [PATCH 1/3] drm/i915: Fix up CNL cdclk related limits
On Fri, Jul 07, 2017 at 10:54:47AM -0700, Rodrigo Vivi wrote:
> I will rev
On Mon, 2017-07-10 at 16:02 +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Follow the GLK path when computing cdclk and related limits. CNL
> pipes also produce two pixels per clock, so that's what we should
> really use. However for the purposes of pixel rate calculatio
On Mon, 2017-07-10 at 21:11 +0300, Ville Syrjälä wrote:
> On Mon, Jul 10, 2017 at 05:34:11PM +0000, Pandiyan, Dhinakaran wrote:
> >
> >
> >
> > On Mon, 2017-07-10 at 16:02 +0300, ville.syrj...@linux.intel.com wrote:
> > > From: Ville Syrjälä
> > &
On Mon, 2017-07-10 at 22:33 +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Currently the .modeset_calc_cdclk() hooks check the final cdclk value
> against the max allowed. That's not really sufficient since the low
> level calc_cdclk() functions effectively clamp the min
On Tue, 2017-07-11 at 16:00 +0300, Ville Syrjälä wrote:
> On Tue, Jul 11, 2017 at 02:47:42AM -0700, Dhinakaran Pandiyan wrote:
> > On Monday, July 10, 2017 10:33:46 PM PDT ville.syrj...@linux.intel.com
> > wrote:
> > > From: Ville Syrjälä
> > >
> > > Make the min_pixclk thing less confusing b
On Fri, 2017-07-14 at 19:14 +0200, Daniel Vetter wrote:
> I can live without those logs, and it avoids a kernel
> recompile&reboot.
>
Sounds reasonable, having hda dynamic debug does not feel like a
necessity for module_reload testing.
Reviewed-by: Dhinakaran Pandiyan
> Signed-off-by: Danie
Looks like a typo in
cf54ca8 ("drm/i915/cnl: Implement voltage swing sequence.")
but Cc'ing Rodrigo, Clint to make sure this wasn't a workaround.
-DK
On Mon, 2017-07-17 at 11:21 -0700, Matthias Kaehlcke wrote:
> For 0.85V cnl_get_buf_trans_edp() returns the DP table, instead of EDP.
> Use th
On Mon, 2017-07-17 at 18:55 +, Pandiyan, Dhinakaran wrote:
> Looks like a typo in
>
> cf54ca8 ("drm/i915/cnl: Implement voltage swing sequence.")
>
> but Cc'ing Rodrigo, Clint to make sure this wasn't a workaround.
>
> -DK
Checked with Clint
On Tue, 2017-07-18 at 17:25 +0300, Paul Kocialkowski wrote:
> This adds the connector name when printing a debug message about the DP
> link training result. It is useful to figure out what connector is
> failing when multiple DP connectors are used.
>
> Signed-off-by: Paul Kocialkowski
> ---
On Tue, 2017-07-18 at 19:35 +0100, Chris Wilson wrote:
> Quoting Dhinakaran Pandiyan (2017-07-18 19:28:00)
> > INTEL_GEN() appears to be the new way of doing these platform checks, so
> > convert this i915_irq.c too.
> >
> > Signed-off-by: Dhinakaran Pandiyan
> Reviewed-by: Chris Wilson
> -Ch
On Wed, 2017-07-19 at 15:59 +0530, Jenny TC wrote:
> With older panels, AUX pin for backlight doesn't work. On some
> panels, this causes backlight issues on S3 resume.
What is it that we are missing in the resume path?
> Enable the
> feature only for eDP1.4 or later.
I can't find the eDP 1.4
On Mon, 2017-06-26 at 15:32 +0300, Paul Kocialkowski wrote:
> After detecting an IRQ storm, hotplug detection will switch from
> irq-based detection to poll-based detection. After a short delay or
> when resetting storm detection from debugfs, detection will switch
> back to being irq-based.
>
>
On Thu, 2017-07-20 at 18:35 +0300, David Weinehall wrote:
> On 2017-07-20 12:33, Jani Nikula wrote:
> > On Wed, 19 Jul 2017, "Pandiyan, Dhinakaran"
> > wrote:
> >> On Wed, 2017-07-19 at 15:59 +0530, Jenny TC wrote:
> >>> With older panels, AUX pin
On Thu, 2017-07-20 at 12:25 +0300, Jani Nikula wrote:
> This reverts commit 560a758d39c616f83ac25ff6e0816a49ebe6401c.
>
> The DPCD backlight commits regress a Thinkpad X1 Carbon 4th Gen and a
> BXT-P (in CI). Enabling dynamic backlight boots to a black screen, and
> enabling DPCD backlight lead
On Thu, 2017-07-20 at 10:06 +, Tc, Jenny wrote:
> > >> With older panels, AUX pin for backlight doesn't work.
> >
> > What evidence do you have to back up that claim?
>
> Debugging further it's found that the panel I am having doesn't support AUX
> Backlight.
>
> cat /sys/kernel/debug/dr
On Mon, 2017-09-11 at 16:33 +0300, Ville Syrjälä wrote:
> On Wed, Sep 06, 2017 at 05:14:58PM -0700, Dhinakaran Pandiyan wrote:
> > The POWER_DOWN_PHY and POWER_UP_PHY sideband message transactions allow
> > the source to reqest any node in a mst path or a whole path to be
> > powered down or up. Th
On Mon, 2017-09-11 at 15:42 -0700, Rodrigo Vivi wrote:
> DK had pointed out a comment there was hard to understand, so I
> tried to read back again and I couldn't understand that as well.
> So let me re-phrase that in a way that anyone can understand
> later, even myself.
>
This reads much better
On Tue, 2017-09-12 at 19:17 +0300, Ville Syrjälä wrote:
> On Tue, Sep 12, 2017 at 07:11:32PM +0300, Ville Syrjälä wrote:
> > On Tue, Sep 05, 2017 at 06:26:34PM -0700, Dhinakaran Pandiyan wrote:
> > > Use the POWER_DOWN_PHY and POWER_UP_PHY sideband message trasactions to
> > > set power states for
On Tue, 2017-09-12 at 19:08 +, Pandiyan, Dhinakaran wrote:
> On Tue, 2017-09-12 at 19:17 +0300, Ville Syrjälä wrote:
> > On Tue, Sep 12, 2017 at 07:11:32PM +0300, Ville Syrjälä wrote:
> > > On Tue, Sep 05, 2017 at 06:26:34PM -0700, Dhinakaran Pandiyan wrote:
> > &g
On Wed, 2017-09-13 at 12:32 +0300, Jani Nikula wrote:
> On Tue, 12 Sep 2017, Dhinakaran Pandiyan
> wrote:
> > There is just only one caller now, which already checks for
> > intel_dp->is_mst. So, remove this and fix some braces while at it.
> >
> > Signed-off-by: Dhinakaran Pandiyan
> > ---
>
On Wed, 2017-09-13 at 16:24 +0300, Ville Syrjälä wrote:
> On Tue, Sep 12, 2017 at 04:57:25PM -0700, Dhinakaran Pandiyan wrote:
> > drm_dp_mst_topology_mgr_resume() fails if there are dpcd failures, so
> > there's no need to try that again in _check_mst_status()
>
> That commit message somehow does
On Wed, 2017-09-13 at 16:31 +0300, Ville Syrjälä wrote:
> On Tue, Sep 12, 2017 at 04:57:26PM -0700, Dhinakaran Pandiyan wrote:
> > There is just only one caller now, which already checks for
> > intel_dp->is_mst. So, remove this and fix some braces while at it.
>
> Hmm. So this depends on the subt
On Thu, 2017-09-14 at 09:00 +0300, Jani Nikula wrote:
> On Wed, 13 Sep 2017, Dhinakaran Pandiyan
> wrote:
> > Link status is available in the ESI field on devices with DPCD r1.2 or
> > higher. DP spec also says "An MST upstream device shall use this field
> > instead of the Link/Sink Device Statu
On Wed, 2017-09-13 at 19:18 +0100, Chris Wilson wrote:
> The goal here is to trim an excess posting read and keep the predicates
Curious why we do the posting reads, is that a hardware requirement?
> tight (reusing the same predicate throughout for GT ack/handling).
>
> add/remove: 0/0 grow/sh
On Wed, 2017-09-13 at 17:20 -0700, Ausmus, James wrote:
> On Tue, Sep 12, 2017 at 4:57 PM, Dhinakaran Pandiyan
> wrote:
> > Print connector name in destroy_connect() and this doesn't add any extra
> > lines to dmesg. The debug macro has been moved before the unregister
> > call so that we don't l
On Thu, 2017-09-14 at 09:37 +0100, Chris Wilson wrote:
> Quoting Pandiyan, Dhinakaran (2017-09-14 08:20:21)
> >
> > On Wed, 2017-09-13 at 19:18 +0100, Chris Wilson wrote:
> > > The goal here is to trim an excess posting read and keep the predicates
> >
> > Cur
On Thu, 2017-09-14 at 14:32 -0700, Ausmus, James wrote:
> On Tue, Sep 12, 2017 at 4:57 PM, Dhinakaran Pandiyan
> wrote:
> > The caller already has code to handle failure, no need to duplicate
> > that.
> >
> > Signed-off-by: Dhinakaran Pandiyan
> > ---
> > drivers/gpu/drm/i915/intel_dp.c | 6 --
On Thu, 2017-09-14 at 15:26 -0700, Ausmus, James wrote:
> On Tue, Sep 12, 2017 at 4:57 PM, Dhinakaran Pandiyan
> wrote:
> > The other instances of link training are protected with
> > connection_mutex, so do the same in check_mst_status() too.
>
> We don't seem to be taking connection_mutex arou
On Thu, 2017-09-14 at 15:36 -0700, Ausmus, James wrote:
> On Tue, Sep 12, 2017 at 4:57 PM, Dhinakaran Pandiyan
> wrote:
> > intel_dp_can_mst() performs these checks.
> >
> > Signed-off-by: Dhinakaran Pandiyan
> > ---
> > drivers/gpu/drm/i915/intel_dp.c | 6 --
> > 1 file changed, 6 deletions
On Fri, 2017-09-15 at 13:10 +0300, Ville Syrjälä wrote:
> On Tue, Sep 12, 2017 at 04:57:29PM -0700, Dhinakaran Pandiyan wrote:
> > The other instances of link training are protected with
> > connection_mutex, so do the same in check_mst_status() too.
> >
> > Signed-off-by: Dhinakaran Pandiyan
> >
On Mon, 2017-09-18 at 16:56 -0700, Rodrigo Vivi wrote:
> "CNL PCH chance of hang when software accesses south display
> registers after hotplug is enabled.
> Workaround: Program 0xC2000 bits 11:8 = 0xF before enabling
> south display hotplug detection."
>
> "Workaround only needs to be applied
On Wed, 2017-09-13 at 13:06 -0700, Dhinakaran Pandiyan wrote:
> Use the POWER_DOWN_PHY and POWER_UP_PHY sideband message transactions to
> set power states for downstream sinks. Apart from giving us the ability
> to set power state for individual sinks, this fixes the below test for
> me.
>
> $ xr
On Tue, 2017-09-19 at 15:42 +0300, Ville Syrjälä wrote:
> On Mon, Sep 18, 2017 at 09:50:30PM +0000, Pandiyan, Dhinakaran wrote:
> > On Fri, 2017-09-15 at 13:10 +0300, Ville Syrjälä wrote:
> > > On Tue, Sep 12, 2017 at 04:57:29PM -0700, Dhinakaran Pandiyan wrote:
> > &g
On Fri, 2017-09-15 at 17:00 -0700, Radhakrishna Sripada wrote:
> Platforms do not support psr and drrs simultaneously.
> Adding a subtest to make the check.
>
> Cc: Rodrigo Vivi
> Cc: Daniel Vetter
> Signed-off-by: Radhakrishna Sripada
> ---
> tests/kms_psr_sink_crc.c | 14 ++
> 1
On Wed, 2017-09-20 at 12:11 -0700, Ausmus, James wrote:
> On Mon, Sep 18, 2017 at 3:21 PM, Dhinakaran Pandiyan
> wrote:
> > Rewriting this code without the goto, I believe, makes it more readable.
> > One functional change that has been included is the handling of failed ESI
> > register reads. In
On Wed, 2017-09-20 at 13:02 -0700, Ausmus, James wrote:
> On Wed, Sep 20, 2017 at 12:55 PM, Pandiyan, Dhinakaran
> wrote:
> > On Wed, 2017-09-20 at 12:11 -0700, Ausmus, James wrote:
> >> On Mon, Sep 18, 2017 at 3:21 PM, Dhinakaran Pandiyan
> >> wrote:
> >>
On Thu, 2017-09-21 at 07:53 -0700, Rodrigo Vivi wrote:
> On Thu, Sep 21, 2017 at 01:37:31AM +, Radhakrishna Sripada wrote:
> > The substring to be matched is modified to reflect kernel code.
>
> Well, technically it is not a regression on psr_drrs because it has
> this bug since the beginning
On Thu, 2017-11-02 at 07:27 -0700, Rodrigo Vivi wrote:
> On Thu, Nov 02, 2017 at 10:34:37AM +, Jani Nikula wrote:
> > On Wed, 01 Nov 2017, Anusha Srivatsa wrote:
> > > There is a new version of DMC available for KBL.
> >
> > Nobody's going to pull this to linux-firmware if you don't send it
On Tue, 2017-11-07 at 13:39 +0100, Daniel Vetter wrote:
> On Tue, Nov 07, 2017 at 10:47:00AM +0100, Michel Dänzer wrote:
> > On 07/11/17 07:26 AM, Dhinakaran Pandiyan wrote:
> > > Some HW vblank counters reset due to power management events, which messes
> > > up the vblank counting logic. This lea
On Tue, 2017-10-31 at 22:51 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Extract the current crtc from the crtc state rather than via
> the legacy encoder->crtc pointer whenever possible.
>
There are still some encoder->crtc remaining. How much of a problem is
this?
> Signed-off-by:
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