[Intel-gfx] [PATCH 0/9] external/drm: Fix static analysis issues

This patch set fixes various issues reported by a static analysis tool. Praveen Paneri (9): external/drm: Validate bo_fake before using. external/drm: Validate output of realloc() external/drm: Use snprintf instead of sprintf external/drm: Validate pointer before using external/drm

[Intel-gfx] [PATCH 6/9] external/drm: Avoid negative array index value

recode can be negative or zero as well. Put the correct condition on it before using it as array index. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- xf86drm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xf86drm.c b/xf86drm.c index 60663d4..df56f9e 100644

[Intel-gfx] [PATCH 1/9] external/drm: Validate bo_fake before using.

Check on bo_fake before dereferencing the object in functions evict_lru and evict_mru. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- intel/intel_bufmgr_fake.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/intel/intel_bufmgr_fake.c b/intel

[Intel-gfx] [PATCH 3/9] external/drm: Use snprintf instead of sprintf

We must have upper bound on what we are going to write into a fixed size buffer. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- intel/intel_decode.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/intel/intel_decode.c b/intel/intel_decode.c index 61239dd

[Intel-gfx] [PATCH 7/9] external/drm: Check function return value

Validate the return value of SLCreateEntry() before using it. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- xf86drmSL.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xf86drmSL.c b/xf86drmSL.c index acddb54..45f3906 100644 --- a/xf86drmSL.c +++ b/xf86drmSL.c @@ -139,6 +139,7

[Intel-gfx] [PATCH 2/9] external/drm: Validate output of realloc()

realloc will return NULL if failed to allocate the extra memory requested. Return from function if it fails. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- intel/intel_bufmgr_gem.c | 37 - 1 file changed, 28 insertions(+), 9 deletions(-) diff

[Intel-gfx] [PATCH 5/9] external/drm: Validate function return value

Return value of drmHashCreate() and drmGetEntry() functions can be NULL. It should be validated before being used. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- xf86drm.c | 24 ++-- 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/xf86drm.c b

[Intel-gfx] [PATCH 4/9] external/drm: Validate pointer before using

Move the dereferencing below the check for valid ctx pointer. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- intel/intel_decode.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/intel/intel_decode.c b/intel/intel_decode.c index 2667a7c..5a4fc4a 100644

[Intel-gfx] [PATCH 9/9] external/drm: Avoid uninitialized variable

drmSLLookupNeighbors function is using update without initializing it. Fixed it by calling SLLocate(). Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- xf86drmSL.c | 1 + 1 file changed, 1 insertion(+) diff --git a/xf86drmSL.c b/xf86drmSL.c index 00ae9f9..ca54148 100644

[Intel-gfx] [PATCH 8/9] external/drm: Validate all memory allocations

This patch adds check for various malloc/calloc function if they were able to allocate memory as requested or not. Return appropriate error if the allocation fails. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- intel/intel_bufmgr_fake.c | 4 intel/intel_bufmgr_gem.c | 3

[Intel-gfx] [PATCH 12/12] xf86drmSL: Add missing function call to SLLocate()

A call to SLLocate() is missing from the function drmSLLookupNeighbors() Adding the same to fix this bug. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- xf86drmSL.c | 1 + 1 file changed, 1 insertion(+) diff --git a/xf86drmSL.c b/xf86drmSL.c index edafe7b..9c6f65a 100644

[Intel-gfx] [PATCH 07/12] intel: Validate memory allocations

This patch adds check for various malloc/calloc function if they were able to allocate memory as requested or not. Return appropriate error if the allocation fails. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- intel/intel_bufmgr_fake.c | 4 intel/intel_bufmgr_gem.c | 3

[Intel-gfx] [PATCH 04/12] intel: Validate pointer before using

Move the dereferencing below the check for valid ctx pointer. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- intel/intel_decode.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/intel/intel_decode.c b/intel/intel_decode.c index b70d949..5dab9ca 100644

[Intel-gfx] [PATCH 03/12] intel: Use snprintf instead of sprintf

We must have upper bound on what we are going to write into a fixed size buffer. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- intel/intel_decode.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/intel/intel_decode.c b/intel/intel_decode.c index 7d5cbe5

[Intel-gfx] [PATCH 01/12] intel: Validate bo_fake before using.

Check on bo_fake before dereferencing the object in functions evict_lru and evict_mru. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- intel/intel_bufmgr_fake.c | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/intel/intel_bufmgr_fake.c b/intel

[Intel-gfx] [PATCH 09/12] xf86drmSL: Check memory allocation by SL_RANDOM_INIT()

If the allocation fails, return -ENOMEM. Handle the return value at the caller funtion drmSLInsert() as well. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- xf86drmSL.c | 5 + 1 file changed, 5 insertions(+) diff --git a/xf86drmSL.c b/xf86drmSL.c index 45f3906..edafe7b 100644

[Intel-gfx] [PATCH 08/12] drm: Validate memory allocations

This patch adds check on various drmMalloc() calls if they were able to allocate memory as requested or not. Return appropriate error if the allocation fails. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- xf86drm.c | 51 --- 1 file

[Intel-gfx] [PATCH 10/12] xf86drmHash: Check memory allocation in HashHash()

HASH_RANDOM_INIT() can fail to allocate memory. In such case return an invalid hash value (0x) from HashHash() function. Caller functions check the hash value and act accordingly. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- xf86drmHash.c | 9 + 1 file changed, 9

[Intel-gfx] [PATCH 02/12] intel: Validate output of realloc()

realloc will return NULL if failed to allocate the extra memory requested. Return from function if it fails. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- intel/intel_bufmgr_gem.c | 37 - 1 file changed, 28 insertions(+), 9 deletions(-) diff

[Intel-gfx] [PATCH 00/12] drm: Fix various static analysis issues

This patch set fixes various issues reported by a static analysis tool. Praveen Paneri (12): intel: Validate bo_fake before using. intel: Validate output of realloc() intel: Use snprintf instead of sprintf intel: Validate pointer before using xf86drm: Avoid negative array index value

[Intel-gfx] [PATCH 11/12] xf86drm: Validate function return value

Return value of drmHashCreate() and drmGetEntry() functions can be NULL. It should be validated before being used. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- xf86drm.c | 24 +++- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/xf86drm.c b

[Intel-gfx] [PATCH 05/12] xf86drm: Avoid negative array index value

Variable retcode can be negative as well. Put the correct condition on it before using it as array index. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- xf86drm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xf86drm.c b/xf86drm.c index e73cddd..1e25424 100644

[Intel-gfx] [PATCH 06/12] xf86drmSL: Check function return value

Validate the return value of SLCreateEntry() before using it. Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- xf86drmSL.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xf86drmSL.c b/xf86drmSL.c index acddb54..45f3906 100644 --- a/xf86drmSL.c +++ b/xf86drmSL.c @@ -139,6 +139,7

[Intel-gfx] [PATCH] drm/i915/vlv: Add RPS debugfs disabling for vlv/chv

-off-by: Deepak S deepa...@intel.com Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- drivers/gpu/drm/i915/i915_debugfs.c | 55 + drivers/gpu/drm/i915/i915_drv.h | 2 ++ 2 files changed, 57 insertions(+) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH] drm/i915: Update PM interrupts before updating the freq

the frequency. Signed-off-by: Deepak S deepa...@intel.com Signed-off-by: Praveen Paneri praveen.pan...@intel.com --- drivers/gpu/drm/i915/intel_pm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 4e24d2b..1082123

[Intel-gfx] [PATCH] drm/i915: Skip shrinking of fenced objects if Gfx is suspended

resume could cause power leakage. To avoid this intermediate resume of gfx device, don't consider tiled(fenced) objects for purge in the shrinker path. Signed-off-by: Akash Goel <akash.g...@intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- drivers/

[Intel-gfx] [PATCH] drm/i915: Unbind objects in shrinker only if device is runtime active

. Considering the power leakage due to intermediate resume, perform unbinding operation only if device is already runtime active. Signed-off-by: Akash Goel <akash.g...@intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> --- dr

[Intel-gfx] [PATCH 2/2] drm/i915: Add rpm get/put in i915_shrinker_oom

i915_gem_shrink_all() will scan the bound list only if device is not suspended but in OOM scenarios it becomes absolutely necessary to release as much memory as possible. So, adding rpm get/put in i915_shrinker_oom() to ensure shrinking of bound objects in OOM scenario. Signed-off-by: Praveen

[Intel-gfx] [PATCH 1/2] drm/i915: Unbind objects in shrinker only if device is runtime active

. Considering the power leakage due to intermediate resume, perform unbinding operation only if device is already runtime active. Signed-off-by: Akash Goel <akash.g...@intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> Reviewed-by: Chris Wilson <ch...@chris-wilson.co.uk> --

[Intel-gfx] [PATCH v2 1/2] drm/i915: Unbind objects in shrinker only if device is runtime active

. Considering the power leakage due to intermediate resume, perform unbinding operation only if device is already runtime active. v2: Using newly implemented intel_runtime_pm_get_if_in_use() Signed-off-by: Akash Goel <akash.g...@intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com&

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Add rpm get/put in oom and vmap notifier

On Monday 02 May 2016 06:34 PM, Chris Wilson wrote: On Mon, May 02, 2016 at 02:10:29PM +0530, Praveen Paneri wrote: i915_gem_shrink() will scan the bound list only if device is not suspended but in OOM failure scenario it becomes absolutely necessary to release as much memory as possible

[Intel-gfx] [PATCH 1/2] drm/i915: Unbind objects in shrinker only if device is runtime active

. Considering the power leakage due to intermediate resume, perform unbinding operation only if device is already runtime active. v2: Use newly implemented intel_runtime_pm_get_if_in_use (Chris) Signed-off-by: Akash Goel <akash.g...@intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com&

[Intel-gfx] [PATCH 2/2] drm/i915: Add rpm get/put in oom and vmap notifier

/put in i915_gem_shrinker_oom() and i915_gem_shrinker_vmap() to ensure shrinking of bound objects as well. Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> Reviewed-by: Chris Wilson <ch...@chris-wilson.co.uk> --- drivers/gpu/drm/i915/i915_gem_shrinker.c | 4 1 fil

[Intel-gfx] [PATCH 5/5] tests/kms_draw_crc: add support for Y tiling

From: Paulo Zanoni <paulo.r.zan...@intel.com> This is the program that's supposed to test lib/igt_draw. We just added Y tiling support for the library, so add the tests now. Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.

[Intel-gfx] [PATCH 4/5] lib/igt_draw: Add Y-tiling support for IGT_DRAW_BLT method

From: Akash Goel <akash.g...@intel.com> Signed-off-by: Akash Goel <akash.g...@intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- lib/igt_draw.c | 41 + 1 file changed, 41 insertions(+) diff --git a/lib/igt_draw.

[Intel-gfx] [PATCH 3/5] lib/igt_draw: Add Y-tiling support

This patch adds Y-tiling support for igt_draw_rect function. v2: Use helper function to get tile sizes (Ville) Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- lib/igt_draw.c | 132 + 1 file changed, 87 insertions(

[Intel-gfx] [PATCH 2/5] lib/igt_fb: Add helper function for tile_to_mod

igt_get_fb_tile_size function takes modifer as an argument This helper function will let users to convert tiling to modifier and use igt_get_fb_tile_size() Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- lib/igt_fb.c | 27 +++ lib/igt_fb.h | 1 + 2

[Intel-gfx] [PATCH 1/5] lib/igt_fb: Let others use igt_get_fb_tile_size

This function can be used by igt_draw to get accurate tile dimensions for all tile formats. Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- lib/igt_fb.c | 2 +- lib/igt_fb.h | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/igt_fb.c b/lib/igt_fb.c

[Intel-gfx] [PATCH] drm/i915/bxt: Broxton decoupled MMIO

kitprasad.r.sha...@intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 11 drivers/gpu/drm/i915/i915_reg.h | 7 +++ drivers/gpu/drm/i915/intel_uncore.c | 113 +--- 3 files changed, 122 in

Re: [Intel-gfx] [PATCH v3] drm/i915/bxt: Broxton decoupled MMIO

Hi Chris, On Wednesday 05 October 2016 01:26 AM, Chris Wilson wrote: On Tue, Oct 04, 2016 at 09:16:06PM +0530, Praveen Paneri wrote: +#define HAS_DECOUPLED_MMIO(dev) (INTEL_INFO(dev)->has_decoupled_mmio \ + && IS_BXT_REVID(dev, BXT_REVID_C0, REVID_FOREVER)) Ed

[Intel-gfx] [PATCH v3] drm/i915/bxt: Broxton decoupled MMIO

-by: Zhe Wang <zhe1.w...@intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 18 +- drivers/gpu/drm/i915/i915_pci.c | 1 + drivers/gpu/drm/i915/i915_reg.h | 7 +++ drivers/gpu/drm/i915/intel_un

Re: [Intel-gfx] [PATCH v3] drm/i915/bxt: Broxton decoupled MMIO

Thanks Chris for the review. Will fix these and resend. ~Praveen On Wednesday 05 October 2016 01:26 AM, Chris Wilson wrote: On Tue, Oct 04, 2016 at 09:16:06PM +0530, Praveen Paneri wrote: +#define HAS_DECOUPLED_MMIO(dev) (INTEL_INFO(dev)->has_decoupled_mmio \ + && I

[Intel-gfx] [PATCH v2] drm/i915/bxt: Broxton decoupled MMIO

held and skipped decoupled access - Skipped writing 64 bit register through decoupled MMIO Signed-off-by: Zhe Wang <zhe1.w...@intel.com> Signed-off-by: Damien Lespiau <damien.lesp...@intel.com> Signed-off-by: Ankitprasad Sharma <ankitprasad.r.sha...@intel.com> Signed-off-

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Broxton decoupled MMIO

On Tuesday 06 September 2016 12:06 PM, Chris Wilson wrote: On Tue, Sep 06, 2016 at 10:54:14AM +0530, Praveen Paneri wrote: Decoupled MMIO is an alternative way to access forcewake domain registers, which requires less cycles and avoids frequent software forcewake. How about when forcewake

[Intel-gfx] [PATCH 4/4] tests/kms_draw_crc: add support for Y tiling

From: Paulo Zanoni This is the program that's supposed to test lib/igt_draw. We just added Y tiling support for the library, so add the tests now. Change-Id: Id0a805aab2d804cf82c188326a8562f0ec75c874 Signed-off-by: Paulo Zanoni ---

[Intel-gfx] [PATCH 2/4] lib/igt_draw: Add Y-tiling support

This patch adds Y-tiling support for igt_draw_rect function. Change-Id: I139e9773b7df286febe9ffa3dce358df079dac14 Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- lib/igt_draw.c | 148 ++--- 1 file changed, 110 insertions(

[Intel-gfx] [PATCH v4] drm/i915/bxt: Broxton decoupled MMIO

alignment and variable names (Chris) - Write GEN9_DECOUPLED_REG0_DW1 register in just one go (Zhe Wang) Signed-off-by: Zhe Wang <zhe1.w...@intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 18 +- drivers/gpu/drm/i91

[Intel-gfx] [PATCH v5] drm/i915/bxt: Broxton decoupled MMIO

alignment and variable names (Chris) - Write GEN9_DECOUPLED_REG0_DW1 register in just one go (Zhe Wang) v5: - Changed HAS_DECOUPLED_MMIO() argument name to dev_priv (Tvrtko) - Sanitize info->had_decoupled_mmio at init (Chris) Signed-off-by: Zhe Wang <zhe1.w...@intel.com> Signed-off-by

Re: [Intel-gfx] [PATCH v5] drm/i915/bxt: Broxton decoupled MMIO

Hi Tvrtko, On Wednesday 16 November 2016 01:55 PM, Tvrtko Ursulin wrote: On 15/11/2016 17:19, Praveen Paneri wrote: Decoupled MMIO is an alternative way to access forcewake domain registers, which requires less cycles for a single read/write and avoids frequent software forcewake

Re: [Intel-gfx] [PATCH v4] drm/i915/bxt: Broxton decoupled MMIO

Hi Chris, On Tuesday 15 November 2016 03:37 PM, Chris Wilson wrote: On Tue, Nov 15, 2016 at 09:36:34AM +, Tvrtko Ursulin wrote: On 15/11/2016 06:40, Praveen Paneri wrote: Decoupled MMIO is an alternative way to access forcewake domain registers, which requires less cycles for a single

Re: [Intel-gfx] [PATCH v4] drm/i915/bxt: Broxton decoupled MMIO

Hi Tvrtko, On Tuesday 15 November 2016 03:06 PM, Tvrtko Ursulin wrote: On 15/11/2016 06:40, Praveen Paneri wrote: Decoupled MMIO is an alternative way to access forcewake domain registers, which requires less cycles for a single read/write and avoids frequent software forcewake

[Intel-gfx] [PATCH v4] drm/i915: Fix FBC cfb stride programming for non X-tiled FB

name and platform check (Ville) v4: Added WA details in comment (Paulo) Cc: Paulo Zanoni <paulo.r.zan...@intel.com> Cc: Ville Syrj??l?? <ville.syrj...@linux.intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ dr

[Intel-gfx] [PATCH 4/7] lib/igt_draw: Add Y-tiling support for IGT_DRAW_BLT method

From: Akash Goel <akash.g...@intel.com> Signed-off-by: Akash Goel <akash.g...@intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- lib/igt_draw.c | 35 +++ 1 file changed, 35 insertions(+) diff --git a/lib/igt_draw.c b/li

[Intel-gfx] [PATCH 0/7] Add Y-tiling support into IGTs

tiling Praveen Paneri (5): lib/igt_fb: Let others use igt_get_fb_tile_size lib/igt_fb: Add helper function for tile_to_mod lib/igt_draw: Add Y-tiling support igt/kms_frontbuffer_tracking: Add Y-tiling support igt/kms_fbc_crc.c : Add Y-tile tests lib/igt_draw.c | 167

[Intel-gfx] [PATCH 1/7] lib/igt_fb: Let others use igt_get_fb_tile_size

This function can be used by igt_draw to get accurate tile dimensions for all tile formats. Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- lib/igt_fb.c | 2 +- lib/igt_fb.h | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/igt_fb.c b/lib/igt_fb.c

[Intel-gfx] [PATCH 7/7] igt/kms_fbc_crc.c : Add Y-tile tests

Now that we have support for Y-tiled buffers, add another iteration of tests for Y-tiled buffers. Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- tests/kms_fbc_crc.c | 71 + 1 file changed, 39 insertions(+), 32 deletions(-)

[Intel-gfx] [PATCH 3/7] lib/igt_draw: Add Y-tiling support

This patch adds Y-tiling support for igt_draw_rect function. v2: Use helper function to get tile sizes (Ville) Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- lib/igt_draw.c | 132 + 1 file changed, 87 insertions(

[Intel-gfx] [PATCH 5/7] tests/kms_draw_crc: add support for Y tiling

From: Paulo Zanoni <paulo.r.zan...@intel.com> This is the program that's supposed to test lib/igt_draw. We just added Y tiling support for the library, so add the tests now. Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.

[Intel-gfx] [PATCH 6/7] igt/kms_frontbuffer_tracking: Add Y-tiling support

Allow tests to create Y-tiled bufferes using a separate argument to the test without increasing the number of subtests. Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- tests/kms_frontbuffer_tracking.c | 46 +++- 1 file changed, 27 inse

[Intel-gfx] [PATCH 2/7] lib/igt_fb: Add helper function for tile_to_mod

igt_get_fb_tile_size function takes modifer as an argument This helper function will let users to convert tiling to modifier and use igt_get_fb_tile_size() Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- lib/igt_fb.c | 27 +++ lib/igt_fb.h | 1 + 2

Re: [Intel-gfx] [PATCH v3] drm/i915: Fix FBC cfb stride programming for non X-tiled FB

On Fri, Mar 17, 2017 at 1:24 AM, Paulo Zanoni <paulo.r.zan...@intel.com> wrote: > Em Qui, 2017-03-16 às 17:38 +0530, Praveen Paneri escreveu: >> When FBC is enabled for linear, legacy Y-tiled and Yf-tiled >> surfaces on gen9, the cfb stride must be programmed by SW as >&

Re: [Intel-gfx] [PATCH 1/7] lib/igt_fb: Let others use igt_get_fb_tile_size

On Monday 20 March 2017 03:18 PM, Daniel Vetter wrote: On Sat, Mar 18, 2017 at 12:45:20AM +0530, Praveen Paneri wrote: This function can be used by igt_draw to get accurate tile dimensions for all tile formats. Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- lib/igt_fb

[Intel-gfx] [PATCH v3] drm/i915: Fix FBC cfb stride programming for non X-tiled FB

name and platform check (Ville) Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_fbc.c | 8 2 files changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH] drm/i915: Enable FBC for non X-tiled FBs

FBC is only enabled for X-tiled framebuffers but there are quite a few cases where we tend to use Y-tiled framebuffers. So enabling it for non X-tiled framebuffers. Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/dr

[Intel-gfx] [PATCH v2] drm/i915: Enable FBC for non X-tiled FBs

FBC is only enabled for X-tiled framebuffers but there are quite a few cases where we tend to use Y-tiled framebuffers. So enabling it for non X-tiled framebuffers. v2: Minor fix for a build error Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- drivers/gpu/drm/i915/i915_reg.

Re: [Intel-gfx] [PATCH] drm/i915: Enable FBC for non X-tiled FBs

Hi Ville, On Wednesday 15 March 2017 03:53 PM, Ville Syrjälä wrote: On Wed, Mar 15, 2017 at 12:29:35PM +0530, Praveen Paneri wrote: FBC is only enabled for X-tiled framebuffers but there are quite a few cases where we tend to use Y-tiled framebuffers. So enabling it for non X-tiled

[Intel-gfx] [PATCH v3] drm/i915: enable WaDisableDopClkGating for skl

it only for SKL (Rodrigo) Cc: David Weinehall <david.weineh...@linux.intel.com> Reviewed-by: David Weinehall <david.weineh...@linux.intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 6 ++ 1 file changed, 6 insertions(+) di

Re: [Intel-gfx] [PATCH v3] drm/i915: enable WaDisableDopClkGating for skl

Just realized that I have sent out a wrong patch. Plz ignore this. Gonna send the correct one in some time. Thanks, Praveen Thanks, Praveen On Thu, Aug 3, 2017 at 7:21 PM, Praveen Paneri <praveen.pan...@intel.com> wrote: > This WA is required when decoupled frequencies for slice an

Re: [Intel-gfx] [PATCH v3] drm/i915: enable WaDisableDopClkGating for skl

On Thu, Aug 3, 2017 at 11:07 PM, Rodrigo Vivi <rodrigo.v...@gmail.com> wrote: > On Thu, Aug 3, 2017 at 10:32 AM, Praveen Paneri > <praveen.pan...@intel.com> wrote: >> This WA is required when decoupled frequencies for slice and unslice >> are enabled. This dis

[Intel-gfx] [PATCH v3] drm/i915: enable WaDisableDopClkGating for skl

it only for SKL (Rodrigo) Cc: David Weinehall <david.weineh...@linux.intel.com> Reviewed-by: David Weinehall <david.weineh...@linux.intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 8 +++- 1 file changed, 7 insertions(+), 1

[Intel-gfx] [PATCH v6] drm/i915: Fix FBC cfb stride programming for non X-tiled FB

) - Used appropriate bit mask while writing the register (Paulo) Cc: Paulo Zanoni <paulo.r.zan...@intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_reg.h | 4 drivers/gpu/drm/i915/inte

Re: [Intel-gfx] [PATCH v2 5/7] tests/kms_draw_crc: add support for Y tiling

Hi Paulo, On Wednesday 12 July 2017 12:33 AM, Paulo Zanoni wrote: Em Sex, 2017-04-28 às 20:07 +0530, Praveen Paneri escreveu: From: Paulo Zanoni <paulo.r.zan...@intel.com> This is the program that's supposed to test lib/igt_draw. We just added Y tiling support for the library,

Re: [Intel-gfx] [PATCH v2 4/7] lib/igt_draw: Add Y-tiling support for IGT_DRAW_BLT method

On Friday 14 July 2017 01:29 AM, Paulo Zanoni wrote: Em Sex, 2017-04-28 às 20:07 +0530, Praveen Paneri escreveu: From: Akash Goel <akash.g...@intel.com> v2: Moved identical code into a single function (Paulo) My MI-fu is not very strong, but I tried to check this against BSpec

Re: [Intel-gfx] [PATCH v2 7/7] igt/kms_fbc_crc.c : Add Y-tile tests

Hi Paulo, On Thursday 13 July 2017 02:31 AM, Paulo Zanoni wrote: Em Sex, 2017-04-28 às 20:07 +0530, Praveen Paneri escreveu: Now that we have support for Y-tiled buffers, add another iteration of tests for Y-tiled buffers. Have you tested this on platforms that don't support Y-tiled buffers

Re: [Intel-gfx] [PATCH] lib/igt_draw: Add Y-tiling support

On Friday 14 July 2017 03:03 AM, Paulo Zanoni wrote: Em Sex, 2017-06-09 às 15:48 +0530, Praveen Paneri escreveu: This patch adds Y-tiling support for igt_draw_rect function. v2: Use helper function to get tile sizes (Ville) v3: Moved igt_get_fb_tile_size() out of the for loop for better

Re: [Intel-gfx] [PATCH v2 5/7] tests/kms_draw_crc: add support for Y tiling

On Friday 14 July 2017 01:49 AM, Paulo Zanoni wrote: Em Qua, 2017-07-12 às 13:45 +0530, Praveen Paneri escreveu: Hi Paulo, On Wednesday 12 July 2017 12:33 AM, Paulo Zanoni wrote: Em Sex, 2017-04-28 às 20:07 +0530, Praveen Paneri escreveu: From: Paulo Zanoni <paulo.r.zan...@intel.

Re: [Intel-gfx] [PATCH v2 7/7] igt/kms_fbc_crc.c : Add Y-tile tests

On Friday 14 July 2017 07:55 PM, Paulo Zanoni wrote: Em Sex, 2017-07-14 às 19:25 +0530, Praveen Paneri escreveu: Hi Paulo, On Thursday 13 July 2017 02:31 AM, Paulo Zanoni wrote: Em Sex, 2017-04-28 às 20:07 +0530, Praveen Paneri escreveu: Now that we have support for Y-tiled buffers, add

Re: [Intel-gfx] [PATCH v2 6/7] igt/kms_frontbuffer_tracking: Add Y-tiling support

Hi Paulo, On Thursday 13 July 2017 01:47 AM, Paulo Zanoni wrote: Em Sex, 2017-04-28 às 20:07 +0530, Praveen Paneri escreveu: Allow tests to create Y-tiled bufferes using a separate argument to the test without increasing the number of subtests. v2: Changed tiling option to string (Paulo) I

[Intel-gfx] [PATCH i-g-t v3 2/5] lib/igt_fb: Add helper function for tile_to_mod

From: Praveen Paneri <praveen.pan...@intel.com> igt_get_fb_tile_size function takes modifer as an argument This helper function will let users to convert tiling to modifier and use igt_get_fb_tile_size() v2: Improved code comment (Paulo) Signed-off-by: Praveen Paneri <praveen.pan...@

[Intel-gfx] [PATCH i-g-t v3 4/5] tests/kms_draw_crc: add support for Y tiling

From: Paulo Zanoni <paulo.r.zan...@intel.com> From: Paulo Zanoni <paulo.r.zan...@intel.com> This is the program that's supposed to test lib/igt_draw. We just added Y tiling support for the library, so add the tests now. Reviewed-by: Praveen Paneri <praveen.pan...@intel.com> Si

[Intel-gfx] [PATCH i-g-t v3 5/5] igt/kms_fbc_crc.c : Add Y-tile tests

From: Praveen Paneri <praveen.pan...@intel.com> Now that we have support for Y-tiled buffers, add another iteration of tests for Y-tiled buffers. v3: - Iterate over tiling modifier instead of tiling constant (Paulo) - Improved logging and fixed indentation (Paulo) Signed-off-by: P

[Intel-gfx] [PATCH i-g-t v3 3/5] lib/igt_draw: add support for Y tiling

From: Paulo Zanoni <paulo.r.zan...@intel.com> From: Paulo Zanoni <paulo.r.zan...@intel.com> Most of the patch is to change the tile/untile functions so they can work with Y-major tiling. v2: (Praveen) No skipping on BLT for Y-tile now as we have a fix for that. Reviewed-by: Pr

[Intel-gfx] [PATCH i-g-t v3 0/5] Add Y-tiling support into IGTs

support for Y tiling tests/kms_draw_crc: add support for Y tiling Praveen Paneri (3): lib/igt_fb: Let others use igt_get_fb_tile_size lib/igt_fb: Add helper function for tile_to_mod igt/kms_fbc_crc.c : Add Y-tile tests lib/igt_draw.c | 171

[Intel-gfx] [PATCH i-g-t v3 1/5] lib/igt_fb: Let others use igt_get_fb_tile_size

From: Praveen Paneri <praveen.pan...@intel.com> This function can be used by igt_draw to get accurate tile dimensions for all tile formats. v2: Added comments to function igt_get_fb_tile_size (Daniel) v3: Fixed errors in comments and coding style (Paulo) Signed-off-by: Praveen

[Intel-gfx] [PATCH v5] drm/i915: Fix FBC cfb stride programming for non X-tiled FB

name and platform check (Ville) v4: Added WA details in comment (Paulo) v5: - Read modified reg write to preserve other bit values (Paulo) - Store modified stride value in reg_params (Paulo) - Keep GLK out of the WA (Paulo) Cc: Paulo Zanoni <paulo.r.zan...@intel.com> Signed-off-by: Praveen

Re: [Intel-gfx] [PATCH i-g-t v3 0/5] Add Y-tiling support into IGTs

On Tuesday 25 July 2017 08:48 PM, Paulo Zanoni wrote: Em Ter, 2017-07-18 às 22:52 +0530, Praveen Paneri escreveu: This series adds Y-tiled buffer creation support into IGT libraries and goes on to use this capability to add support into FBC tests to use Y-tiled buffers. Everything reviewed

Re: [Intel-gfx] [PATCH 0/7] Add Y-tiling support into IGTs

Hi Paulo, Thanks for your review. On Wednesday 26 April 2017 08:21 PM, Paulo Zanoni wrote: Em Qua, 2017-04-26 às 10:46 -0300, Paulo Zanoni escreveu: Em Sáb, 2017-03-18 às 00:45 +0530, Praveen Paneri escreveu: This series adds Y-tiled buffer creation support into IGT libraries and goes

Re: [Intel-gfx] [PATCH v2 0/7] Add Y-tiling support into IGTs

HI Paulo, On Sat, Apr 29, 2017 at 12:51 AM, Paulo Zanoni <paulo.r.zan...@intel.com> wrote: > Em Sex, 2017-04-28 às 20:07 +0530, Praveen Paneri escreveu: >> This series adds Y-tiled buffer creation support into IGT libraries >> and >> goes on to use this capability to

[Intel-gfx] [PATCH v2 7/7] igt/kms_fbc_crc.c : Add Y-tile tests

Now that we have support for Y-tiled buffers, add another iteration of tests for Y-tiled buffers. Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- tests/kms_fbc_crc.c | 71 + 1 file changed, 39 insertions(+), 32 deletions(-)

[Intel-gfx] [PATCH v2 3/7] lib/igt_draw: Add Y-tiling support

This patch adds Y-tiling support for igt_draw_rect function. v2: Use helper function to get tile sizes (Ville) Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- lib/igt_draw.c | 132 + 1 file changed, 87 insertions(

[Intel-gfx] [PATCH v2 5/7] tests/kms_draw_crc: add support for Y tiling

From: Paulo Zanoni <paulo.r.zan...@intel.com> This is the program that's supposed to test lib/igt_draw. We just added Y tiling support for the library, so add the tests now. Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.

[Intel-gfx] [PATCH v2 4/7] lib/igt_draw: Add Y-tiling support for IGT_DRAW_BLT method

From: Akash Goel <akash.g...@intel.com> v2: Moved identical code into a single function (Paulo) Signed-off-by: Akash Goel <akash.g...@intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- lib/igt_draw.c | 33 + 1 file chan

[Intel-gfx] [PATCH v2 6/7] igt/kms_frontbuffer_tracking: Add Y-tiling support

Allow tests to create Y-tiled bufferes using a separate argument to the test without increasing the number of subtests. v2: Changed tiling option to string (Paulo) Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- tests/kms_frontbuffer_tracking.

[Intel-gfx] [PATCH v2 1/7] lib/igt_fb: Let others use igt_get_fb_tile_size

This function can be used by igt_draw to get accurate tile dimensions for all tile formats. v2: Added comments to function igt_get_fb_tile_size (Daniel) Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- lib/igt_fb.c | 16 +--- lib/igt_fb.h | 3 ++- 2 files chang

[Intel-gfx] [PATCH v2 0/7] Add Y-tiling support into IGTs

tiling Praveen Paneri (5): lib/igt_fb: Let others use igt_get_fb_tile_size lib/igt_fb: Add helper function for tile_to_mod lib/igt_draw: Add Y-tiling support igt/kms_frontbuffer_tracking: Add Y-tiling support igt/kms_fbc_crc.c : Add Y-tile tests lib/igt_draw.c | 165

[Intel-gfx] [PATCH v2 2/7] lib/igt_fb: Add helper function for tile_to_mod

igt_get_fb_tile_size function takes modifer as an argument This helper function will let users to convert tiling to modifier and use igt_get_fb_tile_size() Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- lib/igt_fb.c | 26 ++ lib/igt_fb.h | 1 + 2

[Intel-gfx] [PATCH] drm/i915: enable WaDisableDopClkGating for SKL GT4

This WA is required when decopled frequencies for slice and unslice are enabled. This disables DOP clock gating for SKL GT4. Cc: David Weinehall <david.weineh...@linux.intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 6 ++

[Intel-gfx] [PATCH] drm/i915: enable WaDisableDopClkGating for gen9

neh...@linux.intel.com> Reviewed-by: David Weinehall <david.weineh...@linux.intel.com> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/dr

[Intel-gfx] [PATCH] lib/igt_draw: Add Y-tiling support

This patch adds Y-tiling support for igt_draw_rect function. v2: Use helper function to get tile sizes (Ville) v3: Moved igt_get_fb_tile_size() out of the for loop for better performance (Paulo) Signed-off-by: Praveen Paneri <praveen.pan...@intel.com> --- lib/igt_draw.c

Re: [Intel-gfx] [PATCH] lib/igt_draw: Add Y-tiling support

Hi Paulo, Could you plz review this patch in context of this series. https://patchwork.freedesktop.org/series/21467/ It should fix the issue that you highlighted. Thanks, Praveen On Friday 09 June 2017 03:48 PM, Praveen Paneri wrote: This patch adds Y-tiling support for igt_draw_rect

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