On Mon, Apr 11, 2022 at 08:47:32PM +, Sean Paul wrote:
> From: Sean Paul
>
> This patch updates the connector's property value in 2 cases which were
> previously missed:
>
> 1- Content type changes. The value should revert back to DESIRED from
>ENABLED in case the driver must
at the driver try CP enable.
> + */
> + if (new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
> + new_conn_state->crtc != old_conn_state->crtc)
> + return true;
I'm with the feeling that this chunk should deserve a separated patch.
But th
On Mon, Apr 11, 2022 at 08:47:30PM +, Sean Paul wrote:
> From: Sean Paul
>
> This patch moves the hdcp atomic check from i915 to drm_hdcp so other
> drivers can use it. No functional changes, just cleaned up some of the
> code when moving it over.
Reviewed-by: Rodrigo Viv
On Thu, Mar 24, 2022 at 04:02:41PM +0100, Thorsten Leemhuis wrote:
> Hi i915 maintainers, this is your Linux kernel regression tracker!
> What's up with the following regression?
>
> https://gitlab.freedesktop.org/drm/intel/-/issues/5284
>
> That report it more than two weeks old now, but seems
On Fri, Mar 25, 2022 at 08:10:59PM +0200, Ville Syrjälä wrote:
> On Fri, Mar 25, 2022 at 08:34:36AM -0700, José Roberto de Souza wrote:
> > intel_drrs_enable and intel_drrs_disable where renamed to
> > intel_drrs_activate and intel_drrs_deactivate in commit
> > 54903c7a6b40 ("drm/i915:
On Tue, Mar 15, 2022 at 03:11:56PM +0200, Alexander Usyskin wrote:
> From: Tomas Winkler
>
> Implement runtime handlers for mei-gsc, to track
> idle state of the device properly.
>
> CC: Rodrigo Vivi
> Signed-off-by: Tomas Winkler
> Signed-off-by: Alexander Usyskin
On Tue, Mar 08, 2022 at 06:36:53PM +0200, Alexander Usyskin wrote:
> From: Tomas Winkler
>
> Implement runtime handlers for mei-gsc, to track
> idle state of the device properly.
>
> CC: Rodrigo Vivi
> Signed-off-by: Tomas Winkler
> Signed-off-by: Alexander Usyskin
&
On Thu, Feb 24, 2022 at 02:15:44PM +, Souza, Jose wrote:
> + Rodrigo
>
> On Thu, 2022-02-24 at 15:11 +0200, Ville Syrjälä wrote:
> > On Thu, Feb 24, 2022 at 03:06:30PM +0200, Ville Syrjälä wrote:
> > > On Thu, Feb 24, 2022 at 01:01:24PM +, Souza, Jose wrote:
> > > > On Thu, 2022-02-24 at
lane_vma to min_page_size of stolen mem
drm/i915: More gt idling time with guc submission
Rodrigo Vivi (1):
Merge tag 'drm-intel-gt-next-2022-02-17' of
git://anongit.freedesktop.org/drm/drm-intel into drm-intel-next
Tejas Upadhyay (1):
drm/i915/adl-n: Add PCH Support for Alder La
On Thu, Feb 17, 2022 at 06:02:23PM +0530, Tejas Upadhyay wrote:
> We dont need to implement reset_domain in intel_engine
> _setup(), but can be done as a helper. Implemented as
> engine->reset_domain = get_reset_domain().
>
> Cc: Rodrigo Vivi
> Signed-off-by: Tejas Upadhy
instead of
this
if we should be listing the devices individually, probably using the
DECLARE_PCI_FIXUP_HEADER or some other way to make it clear and explicit the
opt-in
on the quirk.
Anyway, the addition of this one here is needed and the rest can be in a
follow-up:
Reviewed-by: Rodrigo Vivi
Cc: Baolu Lu
Cc: David Woodhouse
Baolu, David, could we push this through drm-intel?
> return;
>
> if (risky_device(dev))
> --
> 2.34.1
>
On Thu, Dec 16, 2021 at 09:52:26AM +, Tvrtko Ursulin wrote:
>
>
> On 09/12/2021 12:01, Tejas Upadhyay wrote:
> > Most code paths does full reset with preparing all
> > engines for reset except below two :
> >
> > 1. Single engine reset needs to prepare engines for
> > reset based on its
/i915/gvt: Constify intel_gvt_sched_policy_ops
drm/i915/gvt: Constify gvt_mmio_block
drm/i915/gvt: Constify cmd_interrupt_events
drm/i915/gvt: Constify formats
drm/i915/gvt: Constify gtt_type_table_entry
drm/i915/gvt: Constify vgpu_types
Rodrigo Vivi (2):
Merge tag
On Fri, Feb 04, 2022 at 06:45:51PM +0100, Andi Shyti wrote:
> Hi Dan,
>
> > There were two error paths in __cancel_reset() which return success
> > instead of a negative error code as expected.
> >
> > Fixes: 4e6835466771 ("drm/i915/selftests: Add a cancel request selftest
> > that triggers a
They shouldn't be seen on anything properly supported.
>
> 2) This seems all to be a layer below drm anyway and could even be used
> in places outside easy access to a drm pointer.
>
> So, it seems the benefit of using the subsystem-specific drm_WARN_ONCE
> doesn't justify the
On Thu, Jan 27, 2022 at 11:51:15AM +0300, Dan Carpenter wrote:
> This "ret" declaration shadows an existing "ret" variable at the top of
> the function. Delete it.
>
> Signed-off-by: Dan Carpenter
Reviewed-by: Rodrigo Vivi
and pushing right now
> ---
>
On Thu, Jan 27, 2022 at 09:20:14AM +0100, Maarten Lankhorst wrote:
> Op 26-01-2022 om 14:09 schreef Jouni Högander:
> > We should now rely on userspace doing dirtyfb. There is no
> > need to have separate frontbuffer tracking hooks in gem code.
> >
> > This patch is removing all frontbuffer
eparing to enter system sleep state S5
> reboot: Power down
>
> Changes since v1:
> - Rebase to latest drm-tip
>
> Fixes: 0cfab4cb3c4e ("drm/i915/pxp: Enable PXP power management")
> Suggested-by: Lee Shawn C
> Signed-off-by: Juston Li
> Reviewed-by: Daniel
On Wed, Jan 12, 2022 at 05:28:29PM -0800, Lucas De Marchi wrote:
> On Wed, Jan 12, 2022 at 07:06:45PM -0600, Bjorn Helgaas wrote:
> > On Wed, Jan 12, 2022 at 04:21:28PM -0800, Lucas De Marchi wrote:
> > > On Wed, Jan 12, 2022 at 06:08:05PM -0600, Bjorn Helgaas wrote:
> > > > On Wed, Jan 12, 2022
On Thu, Jan 13, 2022 at 06:58:47PM +0200, Jani Nikula wrote:
> On Wed, 12 Jan 2022, Rodrigo Vivi wrote:
> > I understand that I'm late to the fun here, but I got myself wondering if
> > we couldn't separated the registers in a "regs" directory
> > and find some wa
ters (engine registers, SNPS PHY registers) off to their own header
> files.
>
> v3:
> - Split out i915_reg_defs.h in its own patch
> - Also split out combo PHY and MG/DKL PHY sets of registers
>
> Cc: Jani Nikula
> Cc: Ville Syrjälä
> Cc: Rodrigo Vivi
> Cc: Luca
On Tue, Jan 11, 2022 at 06:08:28AM -0500, Wang, Zhi A wrote:
> On 1/11/22 6:08 AM, Wang, Zhi A wrote:
> > On 1/11/2022 12:52 AM, Vivi, Rodrigo wrote:
> >> On Fri, 2022-01-07 at 14:43 +, Wang, Zhi A wrote:
> >>> Hi folks:
> >>>
> >>> Happy holidays! This pull mostly contains the code re-factors
On Mon, Jan 10, 2022 at 11:32:11AM -0600, Bjorn Helgaas wrote:
> On Mon, Jan 10, 2022 at 12:11:36PM -0500, Rodrigo Vivi wrote:
> > On Fri, Jan 07, 2022 at 08:57:32PM -0600, Bjorn Helgaas wrote:
> > > On Fri, Jan 07, 2022 at 01:05:16PM -0800, Lucas De Marchi wrote:
> > >
ff-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
> ---
> arch/x86/kernel/early-quirks.c | 14 ++
> 1 file changed, 6 insertions(+), 8 deletions(-)
>
> diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
> index 8b689c2b8cc7..df34963e23bf 100
able.
> >
> > Signed-off-by: Lucas De Marchi
>
> I don't know the details of stolen memory, but the implementation of
> this quirk looks good to me. Very nice that it's now very clear
> exactly what the change is.
Reviewed-by: Rodrigo Vivi
Bjorn, ack to merge through
Hi Dave and Daniel,
First, a heads up that I will be on vacation for the next weeks
so Jani will cover the drm-intel-fixes for the next rounds.
Now, here goes drm-intel-fixes-2021-12-15:
Fix a bound check in the DMC fw load.
Thanks,
Rodrigo.
The following changes since commit
Hi Dave and Daniel,
Here goes drm-intel-fixes-2021-12-09:
A fix to a error pointer dereference in gem_execbuffer and
a fix for GT initialization when GuC/HuC are used on ICL.
Thanks,
Rodrigo.
The following changes since commit 0fcfb00b28c0b7884635dacf38e46d60bf3d4eb1:
Linux 5.16-rc4
ZE(engine_reset_domains) ||
> +!engine_reset_domains[id]);
> + engine->reset_domain = engine_reset_domains[id];
> + }
probably better if we could have a function for this.
engine->reset_domain = intel_reset_domain()... or something like that...
b
Hi Dave and Daniel,
Here goes drm-intel-fixes-2021-12-02:
- Fixing a regression where the backlight brightness control stopped working.
- Fix the Intel HDR backlight support detection.
- Reverting a w/a to fix a gpu Hang in TGL. The w/a itself was also
for a hang, but in a much rarer scenario.
Hi Dave and Daniel,
Only one fix for this round. Sending earlier today due to Holiday in US
tomorrow.
Here goes drm-intel-fixes-2021-11-24:
Fix wakeref handling of PXP suspend.
Thanks,
Rodrigo.
The following changes since commit 136057256686de39cc3a07c2e39ef6bc43003ff6:
Linux 5.16-rc2
On Wed, Nov 24, 2021 at 08:55:39AM -0500, Rodrigo Vivi wrote:
> On Wed, Nov 24, 2021 at 08:56:52AM +, Tvrtko Ursulin wrote:
> >
> > On 23/11/2021 19:52, Rodrigo Vivi wrote:
> > > On Tue, Nov 23, 2021 at 09:39:25AM +, Tvrtko Ursulin wrote:
> > > >
On Wed, Nov 24, 2021 at 08:56:52AM +, Tvrtko Ursulin wrote:
>
> On 23/11/2021 19:52, Rodrigo Vivi wrote:
> > On Tue, Nov 23, 2021 at 09:39:25AM +, Tvrtko Ursulin wrote:
> > >
> > > On 17/11/2021 22:49, Vinay Belgaumkar wrote:
> > > > From: Chris
he initial implementation vs
only once like the in 90a987205c6c).
If this one is really fixing the regression by itself:
Acked-by: Rodrigo Vivi
on this patch here.
But I still don't want to take the risk with touching the freq with
race to idle, until not convinced that it is absolutely needed
On Wed, Nov 17, 2021 at 02:49:55PM -0800, Vinay Belgaumkar wrote:
> From: Chris Wilson
>
> While the power consumption is proportional to the frequency, there is
> also a static draw for active gates. The longer we are able to powergate
> (rc6), the lower the static draw. Thus there is a
> > platforms(Syrjala Ville)
> >
> > v3: Change commit message(Nikula Jani)
> It would require to reorder the commit log, version log
> need to move after commit message.
Well noticed. I changed while pushing.
So, for the record:
Reviewed-by: Rodrigo Vivi
Signed-off-by: Ro
On Mon, Nov 22, 2021 at 09:57:30AM +0530, Tejas Upadhyay wrote:
> Please do not merge this is trybot patch to run CI with PXP
> and MEI PXP enabled to get premegre results for
> https://patchwork.freedesktop.org/series/96658/#rev3 change.
Please don't send this kind of tests to intel-gfx ml.
On Mon, Nov 22, 2021 at 01:15:04PM +0200, Jani Nikula wrote:
> Follow the convention of corresponding .h for .c.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
for the series
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 1 +
> drivers/gpu/drm/i915
Hi Dave and Daniel,
Here goes drm-intel-fixes-2021-11-18:
One quick fix for return error handling, one fix for ADL-P display
and one revert targeting stable 5.4, for TGL's DSI display clocks
Thanks,
Rodrigo.
The following changes since commit fa55b7dcdc43c1aa1ba12bca9d2dd4318c2a0dbf:
Linux
rmtip.html?
hmm... I could swear that I had seen the ADL-P green there a few
days ago as well... But right now I couldn't see ADL-P there...
So that fails on having a *reliable* green CI picture...
Any idea why that is down at this moment?
>
> Cc: Rodrigo Vivi
>
> Signed-off-by
On Tue, Nov 16, 2021 at 02:49:16PM +0300, Dan Carpenter wrote:
> The intel_engine_create_virtual() function does not return NULL. It
> returns error pointers.
>
> Fixes: e5e32171a2cf ("drm/i915/guc: Connect UAPI to GuC multi-lrc interface")
> Signed-off-by: Dan Carpent
On Tue, Nov 16, 2021 at 03:58:13PM +0200, Jani Nikula wrote:
> Use <> not "" for including headers from include/drm.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/pxp/intel_pxp_session.c | 3 ++-
> drivers/gpu/dr
On Mon, Nov 15, 2021 at 09:58:56AM -0500, Rodrigo Vivi wrote:
> On Mon, Nov 15, 2021 at 01:44:57PM +0200, Jani Nikula wrote:
> > On Mon, 15 Nov 2021, Tilak Tangudu wrote:
> >
> > The actual commit message with explanations why it will work now and
> > didn't work bef
On Mon, Nov 15, 2021 at 02:20:36PM -0500, Rodrigo Vivi wrote:
> On Mon, Nov 15, 2021 at 09:10:54PM +0530, Tilak Tangudu wrote:
> > s2idle and runtime pm puts the pci gfx device in D3Hot, ACPI runtime
> > monitors the pci tree,if it sees complete tree as D3Hot,it transitions
ernal experiments for s3/s4 failed with that
and this approach here was the safest one, so let's move with this and
prevent the d3cold for now and then allow the runtime_pm autosuspend
enabled by default everywhere.
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/i915_drv.c | 19
On Fri, Nov 12, 2021 at 09:38:06PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use REG_BIT() & co. for PIPEMISC* bits, and while at it
> fill in the missing dithering bits since we already had some
> of them defined.
>
> Signed-off-by: Ville Syrjälä
> ---
>
On Fri, Nov 12, 2021 at 09:38:11PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use REG_BIT() & co. for the CRC registers.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/i915_reg.h | 77 ++
On Fri, Nov 12, 2021 at 09:38:12PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use REG_BIT() & co. for DPINVTT/VLV_DPFLIPSTAT bits.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/i915_irq.c | 2 +-
> drivers/
On Fri, Nov 12, 2021 at 09:38:13PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use REG_BIT() & co. for FPGA_DBG/CLAIM_ER bits.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/i915_reg.h | 8
> 1 file
On Fri, Nov 12, 2021 at 09:38:05PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Since tgl PIPE_DSL has 20 bits for the scanline. Let's bump our
> definition to match. And while at it let's also add the define
> for the current field readback.
>
> We can also get rid of the gen2 vs.
s move the DSS lookup for a DG2 workaround into a helper function
> that will only get called after we've already decided that we're on a
> DG2 platform.
>
> Fixes: 645cc0b9d972 ("drm/i915/dg2: Add initial gt/ctx/engine workarounds")
> Signed-off-by: Matt Roper
Reviewed-by: R
On Mon, Nov 15, 2021 at 01:44:57PM +0200, Jani Nikula wrote:
> On Mon, 15 Nov 2021, Tilak Tangudu wrote:
>
> The actual commit message with explanations why it will work now and
> didn't work before go here.
The truth is that:
1. We don't have a good track of *all* the issues with the past
On Wed, Nov 10, 2021 at 01:46:46PM +0200, Ville Syrjälä wrote:
> On Wed, Nov 10, 2021 at 10:59:26AM +0530, Tilak Tangudu wrote:
> > Enable runtime pm autosuspend by default for gen12 and
> > later versions.
> >
> > Signed-off-by: Tilak Tangudu
> > ---
> > drivers/gpu/drm/i915/intel_runtime_pm.c
Hi Dave and Daniel,
Here goes drm-intel-next-fixes-2021-11-09:
Couple Reverts, build fix, couple virtualization fixes,
blank screen and other display rates fixes, and more.
Four patches targeting stable in here.
Display Fixes:
- DP rates related fixes (Imre, Jani)
- A Revert on disaling dual
On Tue, Nov 09, 2021 at 02:48:50PM +0300, Dan Carpenter wrote:
> The "ret" variable is checked on the previous line so we know it's
> zero. No need to check again.
>
> Signed-off-by: Dan Carpenter
Reviewed-by: Rodrigo Vivi
and pushed.
thanks for the patch
> --
On Fri, Oct 29, 2021 at 05:18:01PM -0700, José Roberto de Souza wrote:
> Changing the buffer in the middle of the scanout then entering an
> period of flip idleness will cause part of the previous buffer being
> diplayed to user when PSR is enabled.
>
> So here disabling and scheduling activation
On Mon, Oct 18, 2021 at 11:24:21AM +0300, Jani Nikula wrote:
> On Fri, 15 Oct 2021, Rodrigo Vivi wrote:
> > We should stop using the gen name and the "+" to reference
> > the newer platforms.
> > And on this case specifically we can simplify the debug
> >
On Mon, Oct 18, 2021 at 11:25:00AM +0300, Jani Nikula wrote:
> On Fri, 15 Oct 2021, Rodrigo Vivi wrote:
> > There's no such thing as gen13. It is either display 13
> > or graphics 13. Don't propagate the gen12 confusion
> > further.
>
> Reviewed-by: Jani Nikula
th
Roper (1):
drm/i915/uapi: Add comment clarifying purpose of I915_TILING_* values
Rodrigo Vivi (2):
Merge drm/drm-next into drm-intel-next
drm/i915: Clean up PXP Kconfig info.
Ville Syrjälä (14):
drm/i915: Extend the async flip VT-d w/a to skl/bxt
drm/i195: Make
There's no such thing as gen13. It is either display 13
or graphics 13. Don't propagate the gen12 confusion
further.
Cc: Joonas Lahtinen
Cc: Jani Nikula
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_reg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers
We should stop using the gen name and the "+" to reference
the newer platforms.
And on this case specifically we can simplify the debug
message even further.
Cc: Jani Nikula
Cc: Matthew Brost
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
1 file
the
config menu entry, only in the help.
Cc: Alan Previn
Cc: Daniele Ceraolo Spurio
Signed-off-by: Rodrigo Vivi
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/Kconfig | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig b/drive
Cc: Joonas Lahtinen
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 2 +-
drivers/gpu/drm/i915/gt/intel_lrc.c | 8
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
b/drive
We should prefer Graphics and Display version over the
old global "gen" thing. Of course we are not changing functions
and variables and the legacy there, but at least let's start to
document things properly and set some good examples.
Cc: Jani Nikula
Cc: Joonas Lahtinen
Signed-off-b
We should prefer Display version over the old global "gen" thing.
Of course we are not changing functions and variables and the legacy
there, but at least let's start to document things properly and
set some good examples.
Cc: Jani Nikula
Signed-off-by: Rodrigo Vivi
---
drivers/gp
We should stop using the gen name and the "+" to reference
the newer platforms.
And on this case specifically we can simplify the debug
message even further.
Cc: Jani Nikula
Cc: Matthew Brost
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
1 file
the
config menu entry, only in the help.
Cc: Alan Previn
Cc: Daniele Ceraolo Spurio
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/Kconfig | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index 88
LOR_CTL RMW in there. I guess because
> force_black was computed way too late originally, but that is now
> sorted.
I would be hesitant in removing that, but since Juston confirmed that
everything works well for him with these patches, it is fine by me.
Great clean-up.
Reviewed-by: Rodrigo Vivi
ly access SFC_DONE when media domain is not fused off
drm/i915/adl_p: Also disable underrun recovery with MSO
drm/i915/dg2: Memory latency values from pcode must be doubled
Radhakrishna Sripada (1):
drm/i915: Update memory bandwidth parameters
Rodrigo Vivi (2):
Merge tag 'drm-misc-
On Tue, Jul 06, 2021 at 04:44:30PM -0700, Lucas De Marchi wrote:
> On Thu, Nov 05, 2020 at 10:02:27AM +0200, Joonas Lahtinen wrote:
> > Quoting Lucas De Marchi (2020-11-05 03:04:22)
> > > On Wed, Nov 04, 2020 at 11:55:15AM +0200, Joonas Lahtinen wrote:
> > > >Quoting Lucas De Marchi (2020-10-27
On Mon, Sep 20, 2021 at 04:18:10PM +, Teres Alexis, Alan Previn wrote:
>
> On Mon, 2021-09-20 at 12:04 -0400, Rodrigo Vivi wrote:
> > On Fri, Sep 17, 2021 at 09:20:00PM -0700, Alan Previn wrote:
> > > From: "Huang, Sean Z"
> > >
> > > The H
etween pxp_inval and
> context_close, add usage examples (Rodrigo)
can you please add the v10 change explanation here instead of only
in the cover letter? (apply this comment to all the modified patches)
>
> Signed-off-by: Alan Previn
> Signed-off-by: Daniele Ceraolo Spurio
> Sign
work function.
> v4: improve comments, simplify wait logic (Rodrigo)
> v5: unconditionally set interrupts, rename state_attacked var (Rodrigo)
>
> Signed-off-by: Alan Previn
> Signed-off-by: Huang, Sean Z
> Signed-off-by: Daniele Ceraolo Spurio
> Cc: Chris Wilson
> Cc:
e GT workaround functions and multicast
> steering setup per-gt.
>
> Cc: Tvrtko Ursulin
> Cc: Daniele Ceraolo Spurio
> Signed-off-by: Venkata Sandeep Dhanalakota
> Signed-off-by: Matt Roper
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c
On Thu, Sep 16, 2021 at 02:06:56PM +0300, Jani Nikula wrote:
> On Wed, 15 Sep 2021, Rodrigo Vivi wrote:
> > On Wed, Sep 15, 2021 at 04:53:35PM +0300, Jani Nikula wrote:
> >> On Fri, 10 Sep 2021, Daniele Ceraolo Spurio
> >> wrote:
> >> > diff --git
On Wed, Sep 15, 2021 at 11:23:45AM -0400, Rodrigo Vivi wrote:
> On Wed, Sep 15, 2021 at 08:11:54AM -0700, Daniele Ceraolo Spurio wrote:
> >
> >
> > On 9/14/2021 12:13 PM, Rodrigo Vivi wrote:
> > > On Fri, Sep 10, 2021 at 08:36:22AM -0700, Daniele Ceraolo Spurio wro
On Wed, Sep 15, 2021 at 04:53:35PM +0300, Jani Nikula wrote:
> On Fri, 10 Sep 2021, Daniele Ceraolo Spurio
> wrote:
> > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h
> > b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> > new file mode 100644
> > index ..e87550fb9821
> > --- /dev/null
>
IFWIs that do not
> > support PXP, so we need it to be an opt-in until we add support to query
> > the caps from the mei device.
> >
> > Signed-off-by: Daniele Ceraolo Spurio
> > Reviewed-by: Rodrigo Vivi
> > ---
> > drivers/gpu/drm/i915/Kconfig
On Wed, Sep 15, 2021 at 08:11:54AM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 9/14/2021 12:13 PM, Rodrigo Vivi wrote:
> > On Fri, Sep 10, 2021 at 08:36:22AM -0700, Daniele Ceraolo Spurio wrote:
> > > From: "Huang, Sean Z"
> > >
> > &g
igned-off-by: Huang, Sean Z
> Signed-off-by: Daniele Ceraolo Spurio
> Cc: Chris Wilson
> Cc: Rodrigo Vivi
ops, I had missed this patch. Sorry
and thanks Alan for the ping.
> ---
> drivers/gpu/drm/i915/Makefile| 1 +
> drivers/gpu/drm/i915/gt/intel_gt_pm.c
l
>
> v6: don't use fetch_and_zero in fini (Rodrigo)
>
> Signed-off-by: Huang, Sean Z
> Signed-off-by: Daniele Ceraolo Spurio
> Cc: Chris Wilson
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/Makefile | 3 +-
> drivers/gpu/drm/i915/pxp
context_close, add usage examples (Rodrigo)
>
> Signed-off-by: Daniele Ceraolo Spurio
> Signed-off-by: Bommu Krishnaiah
> Cc: Rodrigo Vivi
> Cc: Chris Wilson
> Cc: Lionel Landwerlin
> Cc: Jason Ekstrand
> Cc: Daniel Vetter
Reviewed-by: Rodrigo Vivi
> ---
>
f-by: Daniele Ceraolo Spurio
> Cc: Daniel Vetter
> Cc: Rodrigo Vivi
Reviewed-by: Rodrigo Vivi
> ---
> Documentation/gpu/i915.rst | 8
> drivers/gpu/drm/i915/pxp/intel_pxp.c | 28 +
> drivers/gpu/drm/i915/pxp/intel_pxp_types.h | 47 ++
, unless the system is on S3/S4 and our power
is cut.
Let's put this hammer for now everywhere. So we can work to enable
the auto-suspend by default without blowing up the world.
Then, this should be removed when we finally fix the D3Cold flow.
Cc: Tilak Tangudu
Signed-off-by: Rodrigo Vivi
No functional changes. Just revamping the functions with
s/dev_priv/i915
and consolidating along with other runtime_pm functions.
v2: avoid the extra redirection (Imre)
Cc: Imre Deak
Cc: Tilak Tangudu
Signed-off-by: Rodrigo Vivi
Reviewed-by: Imre Deak
---
drivers/gpu/drm/i915/i915_drv.c
gen12 and newer. We will return later to extend
that to older platforms.
Cc: Daniel Vetter
Cc: David Weinehall
Cc: Tilak Tangudu
Cc: Imre Deak
Signed-off-by: Rodrigo Vivi
Reviewed-by: Anshuman Gupta #v1
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 4
1 file changed, 4 insertions
aniel Vetter
> Cc: Rodrigo Vivi
> ---
> Documentation/gpu/i915.rst | 8
> drivers/gpu/drm/i915/pxp/intel_pxp.c | 28 +
> drivers/gpu/drm/i915/pxp/intel_pxp_types.h | 47 --
> 3 files changed, 71 insertions(+), 12 deletion
ck if an object it valid, hold wakeref in
> context, don't add a new flag to RESET_STATS (Daniel)
>
> v8: don't increase guilty count for contexts banned during pxp
> invalidation (Rodrigo)
>
> Signed-off-by: Daniele Ceraolo Spurio
> Signed-off-by: Bommu Krishnaiah
some benchmark results to commit message.
>
> v5:
> * Add explicit regression summary to commit message. (Eero)
>
> References: b901bb89324a ("drm/i915/gemfs: enable THP")
> References: 9987da4b5dcf ("drm/i915: Disable THP until we have a GPU read BW
> W/A"
On Mon, Aug 30, 2021 at 03:53:43PM +0300, Jani Nikula wrote:
> Failures to register debugfs should be ignored anyway, so stop
> propagating errors altogether for clarity and simplicity. No functional
> changes.
not even a drm_debug if that fails?
>
> Signed-off-by: Jani Nikula
> ---
>
IGT:
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Jani Nikula
> ---
> .../gpu/drm/i915/display/intel_display_debugfs.c| 13 +
> 1 file changed, 5 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> b/d
On Mon, Aug 30, 2021 at 03:53:41PM +0300, Jani Nikula wrote:
> Clean up the LPSP capability printout. No functional changes.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> .../drm/i915/display/intel_display_debugfs.c | 44 +++
>
On Mon, Aug 30, 2021 at 03:53:40PM +0300, Jani Nikula wrote:
> Clean up the LPSP status printout. No functional changes.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> .../drm/i915/display/intel_display_debugfs.c | 37 ++-
> 1 file chan
On Mon, Aug 30, 2021 at 03:53:44PM +0300, Jani Nikula wrote:
> Prefer the intel_ types. No functional changes.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_connector.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display_debugfs.c | 3 ++-
>
On Mon, Aug 30, 2021 at 03:53:44PM +0300, Jani Nikula wrote:
> Prefer the intel_ types. No functional changes.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_connector.c | 2 +-
> drivers/gpu/drm/i915/display/intel
v9: move decrypt check after icl_check_nv12_planes() when overlays
> have fb set (Juston)
>
> v10 (Daniele): update PXP check again to match rework in earlier patches and
> don't consider protection valid if the object has not been used in an
> execbuf beforehand.
Reviewed-b
: Ville Syrjälä
> Cc: Gaurav Kumar
> Cc: Shankar Uma
> Signed-off-by: Anshuman Gupta
> Signed-off-by: Daniele Ceraolo Spurio
> Signed-off-by: Juston Li
> Reviewed-by: Rodrigo Vivi #v4
The end result looks identical to me, so my rv-b remains valid.
> Reviewed-b
On Tue, Aug 31, 2021 at 03:01:51PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> > > +}
> > > +
> > > +void intel_pxp_invalidate(struct intel_pxp *pxp)
> > > +{
> > > + struct drm_i915_private *i915 = pxp_to_gt(pxp)->i915;
> > > + struct i915_gem_context *ctx, *cn;
> > > +
> > > + /* ban all
ck if an object it valid, hold wakeref in
> context, don't add a new flag to RESET_STATS (Daniel)
>
> Signed-off-by: Daniele Ceraolo Spurio
> Signed-off-by: Bommu Krishnaiah
> Cc: Rodrigo Vivi
> Cc: Chris Wilson
> Cc: Lionel Landwerlin
> Cc: Jason Ekstran
gt; Signed-off-by: Huang, Sean Z
> Signed-off-by: Daniele Ceraolo Spurio
> Cc: Chris Wilson
> Reviewed-by: Rodrigo Vivi #v4
> ---
> drivers/gpu/drm/i915/Makefile | 3 +-
> drivers/gpu/drm/i915/pxp/intel_pxp.c | 13
> drivers/gpu/drm/i915/pxp/intel_pxp_
On Thu, Aug 26, 2021 at 01:37:34PM -0400, Rodrigo Vivi wrote:
> On Fri, Aug 20, 2021 at 08:26:14PM +0300, Ville Syrjälä wrote:
> > On Fri, Aug 20, 2021 at 03:52:59PM +0800, Kai-Heng Feng wrote:
> > > Users reported that after commit 2bbd6dba84d4 ("drm/i915: Try to use
> &
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