This patch set adds the foundational support for Displayport compliance
testing in the
i915 driver. It implements the framework for automated test support that
preclude the
need (most) for operator input during testing. Tests for AUX transactions,
EDID reads
and basic link training have also
Add the skeleton framework for supporting automation for Displayport compliance
testing. This patch
adds the necessary framework for the source device to appropriately responded
to test automation
requests from a sink device.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm
Add a simple function to pull the preferred mode out of an EDID block. This
function
is designed for use during Displayport compliance testing.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 25 +
1 file changed, 25 insertions
Adds the failsafe mode (640x480@60hz) as a constant and a function that
retrieves it. These are
designed for use in Displayport compliance testing only and should not be used
outside that
context.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 12
This function computes the EDID checksum for a block of EDID data. This function
is necessary for Displayport compliance testing as it does not not require the
complete EDID checking functionality provided by the DRM layer functions.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu
Add a wrapper around intel_crtc_set_config() to allow it to be called from the
DP compliance test functions. This is necessary to perform the internal mode
set operations required for compliance testing.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_display.c | 6
These counters are used for Displayort complinace testing to detect error
conditions
when executing certain compliance tests. Currently these are used in the EDID
tests
to determine if the video mode needs to be set to the preferred mode or the
failsafe
mode.
Signed-off-by: Todd Previte tprev
successful link training. This patch
updates
the link training functions and where/how they're used to be more intelligent
about
failures and to stop trying to train the link when it's a lost cause.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_ddi.c | 23
.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 0e207aaf..f0664cd 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b
Implements an updated version of the automated testing function that handles
Displayport compliance for EDID operations.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 77 -
1 file changed, 76 insertions(+), 1 deletion
Cleans up a couple of unused variables and an extraneous debug log
message that was unintentionally left behind.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915
,
resulting in a faied test.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 32 ++--
1 file changed, 18 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 1c6ee34
Implements basic link training functionality for Displayport automated
compliance
testing.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 47 +
1 file changed, 47 insertions(+)
diff --git a/drivers/gpu/drm/i915
Daniel Vetter mailto:dan...@ffwll.ch
Tuesday, July 15, 2014 12:46 AM
On Mon, Jul 14, 2014 at 12:10:47PM -0700, Todd Previte wrote:
The Displayport Link Layer Compliance Testing Specification 1.2 rev 1.1
specifies that
repeated AUX transactions after a failure (NACK, DEFER or no response) must
Daniel Vetter mailto:dan...@ffwll.ch
Tuesday, July 15, 2014 12:47 AM
On Mon, Jul 14, 2014 at 12:10:46PM -0700, Todd Previte wrote:
Cleans up a couple of unused variables and an extraneous debug log
message that was unintentionally left behind.
Signed-off-by: Todd Previtetprev...@gmail.com
Paulo Zanoni mailto:przan...@gmail.com
Tuesday, July 29, 2014 2:53 PM
2014-07-22 18:11 GMT-03:00 Jesse Barnesjbar...@virtuousgeek.org:
On Tue, 22 Jul 2014 22:53:44 +0200
Daniel Vetterdan...@ffwll.ch wrote:
On Tue, Jul 22, 2014 at 10:48 PM, Jesse Barnesjbar...@virtuousgeek.org wrote:
Are
with an ACK immediately in some cases and wait til the
end in others.
return test_result;
}
--
1.9.1
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Todd Previte
DP_NAK_ALLOCATE_FAIL 0x0a
+
#define MODE_I2C_START 1
#define MODE_I2C_WRITE 2
#define MODE_I2C_READ 4
Constant definitions look good.
Reviewed-by: Todd Previte tprev...@gmail.com
Dave Airlie mailto:airl...@gmail.com
Tuesday, May 20, 2014 7:54 PM
Hey,
So this set is pretty close to what I think we should
/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -181,6 +181,7 @@ struct drm_mode_get_plane_res {
#define DRM_MODE_ENCODER_TVDAC 4
#define DRM_MODE_ENCODER_VIRTUAL 5
#define DRM_MODE_ENCODER_DSI 6
+#define DRM_MODE_ENCODER_DPMST 7
struct drm_mode_get_encoder {
__u32 encoder_id;
Reviewed-by: Todd
(struct drm_mode_group *group);
+extern void drm_reinit_primary_mode_group(struct drm_device *dev);
extern bool drm_probe_ddc(struct i2c_adapter *adapter);
extern struct edid *drm_get_edid(struct drm_connector *connector,
struct i2c_adapter *adapter);
Reviewed-by: Todd Previte tprev...@gmail.com
Dave
-by: Todd Previte tprev...@gmail.com
Dave Airlie mailto:airl...@gmail.com
Tuesday, May 20, 2014 7:54 PM
Hey,
So this set is pretty close to what I think we should be merging
initially,
Since the last set, it makes fbcon and suspend/resume work a lot better,
I've also fixed a couple of bugs
Minor formatting issues - there's a number of lines that exceed 80
characters in length. One other comment inline below.
Reviewed-by: Todd Previte tprev...@gmail.com
Dave Airlie mailto:airl...@gmail.com
Tuesday, May 20, 2014 7:54 PM
From: Dave Airlie airl...@redhat.com
This is required
Looks good.
Reviewed-by: Todd Previte tprev...@gmail.com
Dave Airlie mailto:airl...@gmail.com
Tuesday, May 20, 2014 7:55 PM
From: Dave Airlie airl...@redhat.com
DP MST will need connectors that aren't connected to specific
encoders, add some checks in advance to avoid oopses.
Signed-off
This one looks fine to me.
Reviewed-by: Todd Previte tprev...@gmail.com
Dave Airlie mailto:airl...@gmail.com
Tuesday, May 20, 2014 7:54 PM
From: Dave Airlie airl...@redhat.com
This property will be used by the MST code to provide userspace
with a path to parse so it can recognise connectors
Looks good to me.
Reviewed-by: Todd Previte tprev...@gmail.com
Dave Airlie mailto:airl...@gmail.com
Tuesday, May 20, 2014 7:55 PM
From: Dave Airlie airl...@redhat.com
this is just prep work for mst support.
Signed-off-by: Dave Airlie airl...@redhat.com
---
drivers/gpu/drm/i915/intel_ddi.c
These look like they're already integrated into -nightly? But for the
record...
Reviewed-by: Todd Previte tprev...@gmail.com
-T
Dave Airlie mailto:airl...@gmail.com
Tuesday, June 17, 2014 6:29 PM
From: Daniel Vetter daniel.vet...@ffwll.ch
For no reason at all the public docs lack them
This looks like it's good to go.
As an aside, I don't *think* any of the compliance testing stuff I'm
working on cares whether it's short of long pulse (1.1a compliance), but
it will be interesting to see if/when/where it might have an effect.
Reviewed-by: Todd Previte tprev...@gmail.com
Add the skeleton framework for supporting automation for Displayport compliance
testing. This patch
adds the necessary framework for the source device to appropriately responded
to test automation
requests from a sink device.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm
Adds basic link training test functionality for Displayport compliance.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915
Move the DPCD read to the top and check for an interrupt from the sink to catch
Displayport automated testing requests necessary to support Displayport
compliance
testing. The checks for active connectors and link status are moved below the
check for the interrupt.
Signed-off-by: Todd Previte
Several compliance tests require that follow-up AUX transactions (after a
failure or no response) are not resent sooner than 400us later. Add a 400us
delay to the response time of any failed transaction to account for this.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915
This patch set adds the foundational support for Displayport compliance testing
in the
i915 driver. It implements the framework for automated test support that
preclude the
need (most) for operator input during testing. Tests for AUX transactions, EDID
reads
and basic link training have also
the mode is included as well.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 100 +---
1 file changed, 93 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index
Implements some of the basic EDID tests for Displayport compliance. These tests
include reading the EDID, verifying the checksum and writing the test responses
back to the sink device.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 36
For HSW+ platforms, enable the 5.4Ghz (HBR2) link rate for devices that support
it. The
sink device must report that is supports Displayport 1.2 and the HBR2 bit rate
in the
DPCD in order to use HBR2.
---
drivers/gpu/drm/i915/intel_dp.c | 21 +++--
1 file changed, 15
On 1/16/2014 11:30 PM, Daniel Vetter wrote:
On Fri, Jan 17, 2014 at 4:06 AM, Todd Previte tprev...@gmail.com wrote:
For HSW+ platforms, enable the 5.4Ghz (HBR2) link rate for devices that support
it. The
sink device must report that is supports Displayport 1.2 and the HBR2 bit rate
On 1/17/2014 4:55 AM, Damien Lespiau wrote:
On Thu, Jan 16, 2014 at 08:06:08PM -0700, Todd Previte wrote:
For HSW+ platforms, enable the 5.4Ghz (HBR2) link rate for devices that support
it. The
sink device must report that is supports Displayport 1.2 and the HBR2 bit rate
in the
DPCD in order
On 1/17/2014 8:08 AM, Damien Lespiau wrote:
On Fri, Jan 17, 2014 at 07:58:58AM -0700, Todd Previte wrote:
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 7df5085..f92d1c0 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
On 1/17/2014 6:32 AM, Jani Nikula wrote:
On Fri, 17 Jan 2014, Damien Lespiau damien.lesp...@intel.com wrote:
I see spaces instead of tabs. You can use the useful checkpatch.pl
script on patches to catch those pesky style issues (from within a linux
tree):
$ ./scripts/checkpatch.pl
Clean up and adjustments per the feedback above.
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for appropriate hardware to 5.4Ghz link rate configuration
- Added a check for TPS3 supprt in the DPCD read
- Adjusted channel equalization to use TPS3 when appropriate
- Cleaned up whitespace
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 30
More whitepsace cleanup.
One caveat with this patch: current link policy dictates that the driver will
train the
wide and slow, i.e. max lanes at low speed. It will increase lanes and speed
when the
specified resolution demands greater bandwidth. Consequently, the resolution
For HSW+ platforms, enable the 5.4Ghz (HBR2) link rate for devices that support
it. The
sink device must report that is supports Displayport 1.2 and the HBR2 bit rate
in the
DPCD in order to use HBR2.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 31
These bits are in reverse order in the header from those defined in
the specification. Change the bit positions for ports B and D to
correctly match the spec.
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
These bits are in reverse order in the header from those defined in
the specification. Change the bit positions for ports B and D to
correctly match the spec.
- Added sign-off
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
1 file changed, 2
On 11/22/13 1:36 AM, Takashi Iwai wrote:
I got kernel WARNINGs frequently on Haswell laptops complaining about
invalid max DP link bw. With drm.debug=0x0e, it turned out that the
obtained DPCD is utterly bogus when it happens:
[drm:intel_dp_get_dpcd], DPCD: 4d 4d 4d 4d 4d 4d 4d 4d 4d 4d 4d
Addresses the comments and feedback herein. VLV2 and gen4 have separate bit
definitions now. The correct bits are selected in gen4x_dp_detect() based on
the detected platform.
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-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/i915_reg.h | 11 ---
drivers/gpu/drm/i915/intel_dp.c | 39 +++
2 files changed, 35 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index
Fixed the trailing brace for the switch() statement in gen4x_dp_detect()
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trailing brace for the added switch()
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/i915_reg.h | 11 ---
drivers/gpu/drm/i915/intel_dp.c | 40
2 files changed, 36 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm
On 01/22/2014 11:41 PM, Jani Nikula wrote:
On Thu, 23 Jan 2014, Todd Previte tprev...@gmail.com wrote:
Add new definitions for hotplug live status bits for VLV2 since they're
in reverse order from the gen4x ones.
Changelog:
- Restored gen4 bit definitions
- Added new definitions for VLV2
Adds a function to set the training pattern for Displayport. This is
functionality required to establish more fine-grained control over
the Displayport interface, both for operational reliability and
compliance testing.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915
.
Todd Previte (5):
dmr/i915: Displayport - Add a function to set the training pattern
drm/i915: Displayport - Add function to check link status
drm/i915: Displayport - Add function to enable/disable scrambling on
the main link
drm/i915: Displayport - Add function for executing a single
Adds a function to check the link status across all lanes for Displayport.
This is functionality required to establish more fine-grained control over
the Displayport interface, both for operational reliability and
compliance testing.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu
Adds a function to execute a single iteration of the clock recovery
sequence for Displayport. This is functionality required to establish
more fine-grained control over the Displayport interface, both for
operational reliability and compliance testing.
Signed-off-by: Todd Previte tprev
Adds a function to enable and disable scrambling directly for the main link.
This is functionality required to establish more fine-grained control over
the Displayport interface, both for operational reliability and
compliance testing.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers
Adds a function to execute a single iteration of the channel equalization
sequence for Displayport. This is functionality required to establish more
fine-grained control over the Displayport interface, both for operational
reliability and compliance testing.
Signed-off-by: Todd Previte tprev
On 09/20/2013 06:42 AM, Jani Nikula wrote:
Per DP1.2 spec.
Signed-off-by: Jani Nikula jani.nik...@intel.com
---
drivers/gpu/drm/i915/intel_dp.c |7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index
On 09/20/2013 06:42 AM, Jani Nikula wrote:
Reduce AUX transactions for non-eDP.
Signed-off-by: Jani Nikula jani.nik...@intel.com
---
drivers/gpu/drm/i915/intel_dp.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c
, 600);
+ else
+ usleep_range(300, 400);
continue;
default:
DRM_ERROR(aux_ch invalid native reply 0x%02x\n,
Those look like reasonable values to me.
[Reviewed-by]: Todd Previte tprev
On 09/20/2013 01:57 PM, Paulo Zanoni wrote:
2013/9/20 Todd Previte tprev...@gmail.com:
On 09/20/2013 06:42 AM, Jani Nikula wrote:
Reduce AUX transactions for non-eDP.
Signed-off-by: Jani Nikula jani.nik...@intel.com
---
drivers/gpu/drm/i915/intel_dp.c | 13 -
1 file changed
Looks good.
Reviewed-by: Todd Previte tprev...@gmail.com
On Fri, Sep 27, 2013 at 4:48 AM, Jani Nikula jani.nik...@intel.com wrote:
Detailed cap info at address 80h is not available with DPCD ver
1.0. Whether such devices exist in the wild I don't know, but there
should be no harm done
Yep. Good to go.
Reviewed-by: Todd Previte tprev...@gmail.com
On Fri, Sep 27, 2013 at 4:51 AM, Jani Nikula jani.nik...@linux.intel.comwrote:
On Fri, 20 Sep 2013, Todd Previte tprev...@gmail.com wrote:
On 09/20/2013 06:42 AM, Jani Nikula wrote:
Per DP1.2 spec.
Signed-off-by: Jani
).
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 108 +++-
include/drm/drm_dp_helper.h | 3 +-
2 files changed, 108 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915
On 10/4/13 3:45 AM, Chris Wilson wrote:
On Fri, Oct 04, 2013 at 03:32:10AM -0700, Todd Previte wrote:
This initial patch adds support for automated testing of the source device
to the i915 driver. Most of this patch is infrastructure for the tests;
follow up patches will add support
On 10/4/13 4:49 AM, Jani Nikula wrote:
On Fri, 04 Oct 2013, Todd Previtetprev...@gmail.com wrote:
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index ae8dbfb..9fa544b 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -266,9 +266,10 @@
).
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 75 +++--
1 file changed, 72 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 9770160..1f97a1c 100644
Ignore this message. Will resend to appropriate thread.
-T
On 10/4/13 12:46 PM, Todd Previte wrote:
This initial patch adds support for automated testing of the source device
to the i915 driver. Most of this patch is infrastructure for the tests;
follow up patches will add support
).
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 75 +++--
1 file changed, 72 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 9770160..1f97a1c 100644
- DP_TEST_LINK_PATTERN is ambiguous, rename to DP_TEST_LINK_VIDEO_PATTERN to
clarify
- Added DP_TEST_LINK_FAUX_PATTERN to support automated testing of Fast AUX
Signed-off-by: Todd Previte tprev...@gmail.com
---
include/drm/drm_dp_helper.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion
On 10/4/13 1:39 PM, Ben Widawsky wrote:
On Fri, Oct 04, 2013 at 11:11:32AM -0700, Todd Previte wrote:
On 10/4/13 3:45 AM, Chris Wilson wrote:
On Fri, Oct 04, 2013 at 03:32:10AM -0700, Todd Previte wrote:
This initial patch adds support for automated testing of the source device
to the i915
://bugs.freedesktop.org/show_bug.cgi?id=65496
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=59321
Tested-by: Takashi Iwai ti...@suse.de
Tested-by: Paulo Zanoni paulo.r.zan...@intel.com
Signed-off-by: Ben Widawsky b...@bwidawsk.net
Tested-By: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915
Revised patch incorporating feedback from the various reviews.
- Changed printk() to DRM_DEBUG_KMS()
- Removed extraneous comments
- Added test hook for Fast AUX automated testing
Note this patch relies on the constants defined in drm/drm_dp_helper.h that
were updated
in a
).
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 87 +++--
1 file changed, 84 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index c8515bb..5f2a720 100644
On 11/5/13 2:21 AM, Jani Nikula wrote:
On Sat, 02 Nov 2013, Todd Previte tprev...@gmail.com wrote:
This initial patch adds support for automated testing of the source device
to the i915 driver. Most of this patch is infrastructure for the tests;
follow up patches will add support
on the concept of the driver using levels not values for
voltage swing and preemphasis. This solution works for BDW in the near
term, though, so I'm good with it.
Reviewed-by: Todd Previte tprev...@gmail.com
+#define DDI_BUF_EMP_800MV_0DB_BDW (624) /* Sel6 */
850, .5
+#define
is disabled. */
Reviewed-by: Todd Previte tprev...@gmail.com
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Hi Rodrigo,
This patch looks good.
Reviewed-by: Todd Previte tprev...@gmail.com
-T
-Original Message-
From: Rodrigo Vivi [mailto:rodrigo.v...@gmail.com]
Sent: Tuesday, September 16, 2014 4:18 PM
To: intel-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org; Rodrigo Vivi
Hi Rodrigo,
Looks good. Only thing that needs to be removed is that extra blank line
between the last part of the function and the return statement. Otherwise...
Reviewed-by: Todd Previte tprev...@gmail.com
-Original Message-
From: Rodrigo Vivi [mailto:rodrigo.v...@intel.com]
Sent
...@lists.freedesktop.org
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/drm_dp_helper.c | 2 ++
include/drm/drm_dp_helper.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 08e33b8..8353051 100644
--- a/drivers/gpu/drm
.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/i915_debugfs.c | 389
drivers/gpu/drm/i915/intel_dp.c | 13 +-
2 files changed, 397 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm
,
resulting in a faied test.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_dp.c | 32 +++-
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f7d4119
The kernel side is responsible for the acknowledgement of the test requests and
setup of the required parameters. It also handles the necessary AUX
transactions
for reading the EDID and DPCD as well as writing response codes or checksums as
necessary. Performing these operations in userspace
-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/i915_debugfs.c | 124 +++-
drivers/gpu/drm/i915/intel_dp.c | 34 ++
drivers/gpu/drm/i915/intel_drv.h| 4 ++
3 files changed, 161 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu
Add the skeleton framework for supporting automation for Displayport compliance
testing. This patch adds the necessary framework for the source device to
appropriately
respond to test automation requests from a sink device.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915
Adds provisions in intel_dp_compute_config() to accommodate compliance testing.
Mostly
this invovles circumventing the automatic link configuration paramters and
allowing
the compliance code to set those parameters as required by the tests.
Signed-off-by: Todd Previte tprev...@gmail.com
The hot plug function for DP appears to have been broken somewhere along the
way. Without
this function being operational, hot plug events are not correctly received for
compliance
testing. This patch implements the necessary functionality to resolve that
issue.
Signed-off-by: Todd Previte
interface to use these new parameters instead
of storing them in an intermediate structure. Values are stored on a
per-connector basis in the intel_dp struct.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/i915_debugfs.c | 35 +--
drivers/gpu/drm
() function after vlv_wait_port_ready() and only when the PHYs
are ready
helps ensure reliable operation of the Displayport link.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_display.c | 8 ++--
drivers/gpu/drm/i915/intel_dp.c | 10 --
drivers
successful link training. This patch
updates
the link training functions and where/how they're used to be more intelligent
about
failures and to stop trying to train the link when it's a lost cause.
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_ddi.c | 25
On 10/10/14 1:04 AM, Jani Nikula wrote:
On Thu, 09 Oct 2014, Todd Previtetprev...@gmail.com wrote:
Reorder the function calls in chv/vlv_pre_enable_dp() such that link training
is not initiated
before the PHYs come up out of reset. Also check the status of
vlv_wait_port_ready() and
only
On 10/9/14 8:38 PM, Dave Airlie wrote:
On 10 October 2014 01:49, Chris Wilson ch...@chris-wilson.co.uk wrote:
On Thu, Oct 09, 2014 at 08:38:10AM -0700, Todd Previte wrote:
The hot plug function for DP appears to have been broken somewhere along the
way. Without
this function being operational
for this problem, though
investigating the actual root cause might be worthwhile.
Reviewed-by: Todd Previte tprev...@gmail.com
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On 10/17/2014 1:43 AM, Ville Syrjälä wrote:
On Thu, Oct 16, 2014 at 12:38:55PM -0700, Todd Previte wrote:
On 10/16/2014 10:46 AM, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Turning vdd on/off can generate a long hpd pulse on eDP ports. In order
On 10/17/2014 1:43 AM, Jani Nikula wrote:
On Thu, 16 Oct 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Sometimes we seem to get utter garbage from DPCD reads. The resulting
buffer is filled with the same byte, and the operation completed without
On 10/17/2014 2:06 AM, Ville Syrjälä wrote:
On Thu, Oct 16, 2014 at 12:39:29PM -0700, Todd Previte wrote:
On 10/16/2014 10:46 AM, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Sometimes we seem to get utter garbage from DPCD reads. The resulting
On 10/17/2014 1:59 AM, Ville Syrjälä wrote:
On Fri, Oct 17, 2014 at 11:43:21AM +0300, Jani Nikula wrote:
On Thu, 16 Oct 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Sometimes we seem to get utter garbage from DPCD reads. The resulting
buffer is
().
Signed-off-by: Todd Previte tprev...@gmail.com
---
drivers/gpu/drm/i915/intel_display.c | 8 ++--
drivers/gpu/drm/i915/intel_dp.c | 16
drivers/gpu/drm/i915/intel_drv.h | 2 +-
3 files changed, 15 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915
V2 changes:
- Moved the intel_dp_enable_port() call out of intel_dp_enable() and placed it
before the calls to intel_dp_enable() and vlv_wait_port_ready()
- Cleaned up a spacing issues with the code indents
- Amended the commit message to be under 80 characters per line and expanded
on the
On 10/16/2014 11:27 AM, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
There's no point in checking if the data lanes came out of reset after
link training. If the data lanes aren't ready link training will fail
anyway.
Suggested-by: Todd Previte tprev
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