Re: [Intel-gfx] [PATCH 06/19] drm/i915/gt: Schedule request retirement when submission idles

2019-11-19 Thread Chris Wilson
Quoting Chris Wilson (2019-11-19 16:42:28) > Quoting Tvrtko Ursulin (2019-11-19 16:33:18) > > I also wonder if the current flush_submission wasn't the reason for > > performance regression you were seeing with this? It makes this tasklet > > wait for all other engi

Re: [Intel-gfx] [PATCH 15/19] drm/i915/gt: Flush the requests after wedging on suspend

2019-11-19 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-11-19 16:12:18) > > On 18/11/2019 23:02, Chris Wilson wrote: > > Retire all requests if we resort to wedged the driver on suspend. They > > will now be idle, so we might as we free them before shutting down. > > > > Signed-off-by: Chris

Re: [Intel-gfx] [PATCH 06/19] drm/i915/gt: Schedule request retirement when submission idles

2019-11-19 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-11-19 16:33:18) > > On 19/11/2019 16:20, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2019-11-19 15:04:46) > >> > >> On 18/11/2019 23:02, Chris Wilson wrote: > >>> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c &

Re: [Intel-gfx] [PATCH 09/17] drm/i915: Wait until the intel_wakeref idle callback is complete

2019-11-19 Thread Chris Wilson
Quoting Mika Kuoppala (2019-11-19 16:12:18) > Chris Wilson writes: > > > When waiting for idle, serialise with any ongoing callback so that it > > will have completed before completing the wait. > > Might be come apparent and evident when reading th

[Intel-gfx] [CI 2/2] drm/i915/gt: Schedule next retirement worker first

2019-11-19 Thread Chris Wilson
As we may park the gt during request retirement, we may then cancel the retirement worker only to then program the delayed worker once more. If we schedule the next delayed retirement worker first, if we then park the gt, the work remain cancelled [until we unpark]. Signed-off-by: Chris Wilson

[Intel-gfx] [CI 1/2] drm/i915/gt: Move new timelines to the end of active_list

2019-11-19 Thread Chris Wilson
uests in intel_gt_retire_requests()") Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_timeline.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeli

Re: [Intel-gfx] [PATCH 06/19] drm/i915/gt: Schedule request retirement when submission idles

2019-11-19 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-11-19 15:04:46) > > On 18/11/2019 23:02, Chris Wilson wrote: > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c > > b/drivers/gpu/drm/i915/gt/intel_lrc.c > > index 33ce258d484f..f7c8fec436a9 100644 > > --- a/drivers/gpu/drm/i915/gt/int

Re: [Intel-gfx] [PATCH 07/19] drm/i915: Mark up the calling context for intel_wakeref_put()

2019-11-19 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-11-19 15:57:24) > > On 18/11/2019 23:02, Chris Wilson wrote: > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c > > b/drivers/gpu/drm/i915/gt/intel_lrc.c > > index f7c8fec436a9..fec46afb9264 100644 > > --- a/drivers/gpu/drm/i915/gt/int

[Intel-gfx] [CI] drm/i915/selftests: Exercise rc6 w/a handling

2019-11-19 Thread Chris Wilson
Reading from CTX_INFO upsets rc6, requiring us to detect and prevent possible rc6 context corruption. Poke at the bear! Signed-off-by: Chris Wilson Cc: Imre Deak Cc: Mika Kuoppala Reviewed-by: Andi Shyti Tested-by: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_rc6.c | 4

Re: [Intel-gfx] [PATCH 17/17] drm/i915/selftests: Exercise rc6 handling

2019-11-19 Thread Chris Wilson
Quoting Andi Shyti (2019-11-19 15:24:59) > Hi Chris, > > On Tue, Nov 19, 2019 at 10:09:29AM +0000, Chris Wilson wrote: > > Reading from CTX_INFO upsets rc6, requiring us to detect and prevent > > possible rc6 context corruption. Poke at the bear! > > > > Signed-o

Re: [Intel-gfx] [PATCH] drm/i915: make pool objects read-only

2019-11-19 Thread Chris Wilson
Quoting Matthew Auld (2019-11-19 15:01:54) > For our current users we don't expect pool objects to be writable from > the gpu. > Fixes: 4f7af1948abc ("drm/i915: Support ro ppgtt mapped cmdparser shadow buffers") > Signed-off-by: Matthew Auld > Cc: Chris Wilson

[Intel-gfx] [PATCH] drm/i915/gt: Unlock engine-pm after queuing the kernel context switch

2019-11-19 Thread Chris Wilson
_gt_retire_requests() for future reference. Fixes: a79ca656b648 ("drm/i915: Push the wakeref->count deferral to the backend") Signed-off-by: Chris Wilson Cc: Mika Kuoppala Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 31 ++- 1 file changed, 25 ins

Re: [Intel-gfx] [PATCH 04/19] drm/i915/gt: Unlock engine-pm after queuing the kernel context switch

2019-11-19 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-11-19 14:35:04) > > On 18/11/2019 23:02, Chris Wilson wrote: > > In commit a79ca656b648 ("drm/i915: Push the wakeref->count deferral to > > the backend"), I erroneously concluded that we last modify the engine > > inside __i915_r

Re: [Intel-gfx] [PATCH 03/19] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests

2019-11-19 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-11-19 14:15:49) > > On 18/11/2019 23:02, Chris Wilson wrote: > > The general concept was that intel_timeline.active_count was locked by > > the intel_timeline.mutex. The exception was for power management, where > > the engine->ker

[Intel-gfx] [PATCH i-g-t] i915/gem_mmap_gtt: Exercise many, many mappings of the same objects

2019-11-19 Thread Chris Wilson
Fork and remap the same object into a new process space under a new file descriptor. Principally to check list management and find scaling issues in using such lists. Signed-off-by: Chris Wilson Cc: Abdiel Janulgue --- tests/i915/gem_mmap_gtt.c | 72 ++- 1

[Intel-gfx] [PATCH] drm/i915/gem: Track ggtt writes from userspace on the bound vma

2019-11-19 Thread Chris Wilson
When userspace writes into the GTT itself, it is supposed to call set-domain to let the kernel keep track and so manage the CPU/GPU caches. As we track writes on the individual i915_vma, we should also be sure to mark them as dirty. Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu

Re: [Intel-gfx] [PATCH 06/17] drm/i915/gem: Merge GGTT vma flush into a single loop

2019-11-19 Thread Chris Wilson
Quoting Mika Kuoppala (2019-11-19 10:48:22) > Chris Wilson writes: > > > We only need the one loop to find the dirty vma flush them, and their > > chipset. > > > > Signed-off-by: Chris Wilson > > Cc: Tvrtko Ursulin > > --- > >

[Intel-gfx] [PATCH 17/17] drm/i915/selftests: Exercise rc6 handling

2019-11-19 Thread Chris Wilson
Reading from CTX_INFO upsets rc6, requiring us to detect and prevent possible rc6 context corruption. Poke at the bear! Signed-off-by: Chris Wilson Cc: Imre Deak Cc: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_rc6.c | 4 + drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 13

[Intel-gfx] [PATCH 10/17] drm/i915/gt: Declare timeline.lock to be irq-free

2019-11-19 Thread Chris Wilson
Now that we never allow the intel_wakeref callbacks to be invoked from interrupt context, we do not need the irqsafe spinlock for the timeline. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 9 - drivers/gpu/drm/i915/gt/intel_reset.c | 9

[Intel-gfx] [PATCH 13/17] drm/i915/gt: Flush the requests after wedging on suspend

2019-11-19 Thread Chris Wilson
Retire all requests if we resort to wedged the driver on suspend. They will now be idle, so we might as we free them before shutting down. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt_pm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/gt

[Intel-gfx] [PATCH 16/17] drm/i915/selftests: Be explicit in ERR_PTR handling

2019-11-19 Thread Chris Wilson
When setting up a full GGTT, we expect the next insert to fail with -ENOSPC. Simplify the use of ERR_PTR to not confuse either the reader or smatch. Reported-by: Dan Carpenter References: f40a7b7558ef ("drm/i915: Initial selftests for exercising eviction") Signed-off-by: Ch

[Intel-gfx] [PATCH 14/17] drm/i915/selftests: Force bonded submission to overlap

2019-11-19 Thread Chris Wilson
pairs, meaning that it could indeed complete before we submitted the bonds. Those bonds were then free to select any available engine in their virtual set, and not the one expected by the test. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/selftest_lrc.c | 23

[Intel-gfx] [PATCH 05/17] drm/i915: Mark up the calling context for intel_wakeref_put()

2019-11-19 Thread Chris Wilson
;) References: https://bugs.freedesktop.org/show_bug.cgi?id=111626 Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_pm.c| 3 +- drivers/gpu/drm/i915/gt/intel_engine_pm.h| 10 + drivers/gpu/drm/i915/gt/intel_gt_pm.c| 1 - drivers/gpu/drm/i915/gt/intel

[Intel-gfx] [PATCH 11/17] drm/i915/gt: Move new timelines to the end of active_list

2019-11-19 Thread Chris Wilson
t;) Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_timeline.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c index bd973d950064..b190a5d9ab02 100644 --- a/d

[Intel-gfx] [PATCH 06/17] drm/i915/gem: Merge GGTT vma flush into a single loop

2019-11-19 Thread Chris Wilson
We only need the one loop to find the dirty vma flush them, and their chipset. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 12 +++- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/gem

[Intel-gfx] [PATCH 12/17] drm/i915/gt: Schedule next retirement worker first

2019-11-19 Thread Chris Wilson
As we may park the gt during request retirement, we may then cancel the retirement worker only to then program the delayed worker once more. If we schedule the next delayed retirement worker first, if we then park the gt, the work remain cancelled [until we unpark]. Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 08/17] drm/i915: Protect the obj->vma.list during iteration

2019-11-19 Thread Chris Wilson
l Trace: <4>[ 347.821555] i915_gem_object_prepare_read+0xea/0x2a0 [i915] <4>[ 347.821706] intel_engine_cmd_parser+0x5ce/0xe90 [i915] <4>[ 347.821834] ? __i915_sw_fence_complete+0x1a0/0x250 [i915] <4>[ 347.821990] i915_gem_do_execbuffer+0xb4c/0x2550 [i915] Signed-o

[Intel-gfx] [PATCH 04/17] drm/i915/gt: Make intel_ring_unpin() safe for concurrent pint

2019-11-19 Thread Chris Wilson
d so could leave the ring in disarray. Fixes: 09c5ab384f6f ("drm/i915: Keep rings pinned while the context is active") Signed-off-by: Chris Wilson Cc: Mika Kuoppala Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_ring.c | 13 - 1 file changed, 4 insertions(+), 9 dele

[Intel-gfx] [PATCH 03/17] drm/i915/gt: Unlock engine-pm after queuing the kernel context switch

2019-11-19 Thread Chris Wilson
wakeref->count deferral to the backend") Signed-off-by: Chris Wilson Cc: Mika Kuoppala Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm

[Intel-gfx] [PATCH 01/17] drm/i915/gem: Manually dump the debug trace on GEM_BUG_ON

2019-11-19 Thread Chris Wilson
Since igt now defaults to not enabling ftrace-on-oops, we need to manually invoke GEM_TRACE_DUMP() to see the debug log prior to a GEM_BUG_ON panicking. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 02/17] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests

2019-11-19 Thread Chris Wilson
t request retirement with timeline->mutex") Signed-off-by: Chris Wilson Cc: Matthew Auld Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 8 ++--- drivers/gpu/drm/i915/gt/intel_timeline.c | 34 +++ .../gpu/drm/i915/gt/intel_timeline_types.h

[Intel-gfx] [PATCH 07/17] drm/i915/gt: Only wait for register chipset flush if active

2019-11-19 Thread Chris Wilson
Only serialise with the chipset using an mmio if the chipset is currently active. We expect that any writes into the chipset range will simply be forgotten until it wakes up. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion

[Intel-gfx] [PATCH 09/17] drm/i915: Wait until the intel_wakeref idle callback is complete

2019-11-19 Thread Chris Wilson
When waiting for idle, serialise with any ongoing callback so that it will have completed before completing the wait. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_wakeref.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 15/17] drm/i915/selftests: Flush the active callbacks

2019-11-19 Thread Chris Wilson
Before checking the current i915_active state for the asynchronous work we submitted, flush any ongoing callback. This ensures that our sampling is robust and does not sporadically fail due to bad timing as the work is running on another cpu. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 03/19] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests

2019-11-18 Thread Chris Wilson
t request retirement with timeline->mutex") Signed-off-by: Chris Wilson Cc: Matthew Auld Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 8 ++--- drivers/gpu/drm/i915/gt/intel_timeline.c | 34 +++ .../gpu/drm/i915/gt/intel_timeline_types.h

[Intel-gfx] [PATCH 04/19] drm/i915/gt: Unlock engine-pm after queuing the kernel context switch

2019-11-18 Thread Chris Wilson
wakeref->count deferral to the backend") Signed-off-by: Chris Wilson Cc: Mika Kuoppala Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm

[Intel-gfx] [PATCH 15/19] drm/i915/gt: Flush the requests after wedging on suspend

2019-11-18 Thread Chris Wilson
Retire all requests if we resort to wedged the driver on suspend. They will now be idle, so we might as we free them before shutting down. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt_pm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/gt

[Intel-gfx] [PATCH 06/19] drm/i915/gt: Schedule request retirement when submission idles

2019-11-18 Thread Chris Wilson
kloads, we will do much more work to idle the GPU faster... Hopefully with commensurate power saving! References: https://bugs.freedesktop.org/show_bug.cgi?id=112315 References: 7e34f4e4aad3 ("drm/i915/gen8+: Add RC6 CTX corruption WA") Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin ---

[Intel-gfx] [PATCH 18/19] drm/i915/selftests: Exercise rc6 handling

2019-11-18 Thread Chris Wilson
Reading from CTX_INFO upsets rc6, requiring us to detect and prevent possible rc6 context corruption. Poke at the bear! Signed-off-by: Chris Wilson Cc: Imre Deak Cc: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_rc6.c | 4 + drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 13

[Intel-gfx] [PATCH 10/19] drm/i915: Protect the obj->vma.list during iteration

2019-11-18 Thread Chris Wilson
l Trace: <4>[ 347.821555] i915_gem_object_prepare_read+0xea/0x2a0 [i915] <4>[ 347.821706] intel_engine_cmd_parser+0x5ce/0xe90 [i915] <4>[ 347.821834] ? __i915_sw_fence_complete+0x1a0/0x250 [i915] <4>[ 347.821990] i915_gem_do_execbuffer+0xb4c/0x2550 [i915] Signed-o

[Intel-gfx] [PATCH 11/19] drm/i915: Wait until the intel_wakeref idle callback is complete

2019-11-18 Thread Chris Wilson
When waiting for idle, serialise with any ongoing callback so that it will have completed before completing the wait. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_wakeref.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 09/19] drm/i915/gt: Only wait for register chipset flush if active

2019-11-18 Thread Chris Wilson
Only serialise with the chipset using an mmio if the chipset is currently active. We expect that any writes into the chipset range will simply be forgotten until it wakes up. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion

[Intel-gfx] [PATCH 17/19] drm/i915/selftests: Be explicit in ERR_PTR handling

2019-11-18 Thread Chris Wilson
When setting up a full GGTT, we expect the next insert to fail with -ENOSPC. Simplify the use of ERR_PTR to not confuse either the reader or smatch. Reported-by: Dan Carpenter References: f40a7b7558ef ("drm/i915: Initial selftests for exercising eviction") Signed-off-by: Ch

[Intel-gfx] [PATCH 01/19] drm/i915/selftests: Force bonded submission to overlap

2019-11-18 Thread Chris Wilson
pairs, meaning that it could indeed complete before we submitted the bonds. Those bonds were then free to select any available engine in their virtual set, and not the one expected by the test. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/selftest_lrc.c | 23

[Intel-gfx] [PATCH 02/19] drm/i915/gem: Manually dump the debug trace on GEM_BUG_ON

2019-11-18 Thread Chris Wilson
Since igt now defaults to not enabling ftrace-on-oops, we need to manually invoke GEM_TRACE_DUMP() to see the debug log prior to a GEM_BUG_ON panicking. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 07/19] drm/i915: Mark up the calling context for intel_wakeref_put()

2019-11-18 Thread Chris Wilson
;) References: https://bugs.freedesktop.org/show_bug.cgi?id=111626 Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_pm.c| 3 +- drivers/gpu/drm/i915/gt/intel_engine_pm.h| 10 + drivers/gpu/drm/i915/gt/intel_gt_pm.c| 1 - drivers/gpu/drm/i915/gt/intel

[Intel-gfx] [PATCH 08/19] drm/i915/gem: Merge GGTT vma flush into a single loop

2019-11-18 Thread Chris Wilson
We only need the one loop to find the dirty vma flush them, and their chipset. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 12 +++- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/gem

[Intel-gfx] [PATCH 16/19] drm/i915/selftests: Flush the active callbacks

2019-11-18 Thread Chris Wilson
Before checking the current i915_active state for the asynchronous work we submitted, flush any ongoing callback. This ensures that our sampling is robust and does not sporadically fail due to bad timing as the work is running on another cpu. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 12/19] drm/i915/gt: Declare timeline.lock to be irq-free

2019-11-18 Thread Chris Wilson
Now that we never allow the intel_wakeref callbacks to be invoked from interrupt context, we do not need the irqsafe spinlock for the timeline. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 9 - drivers/gpu/drm/i915/gt/intel_reset.c | 9

[Intel-gfx] [PATCH 13/19] drm/i915/gt: Move new timelines to the end of active_list

2019-11-18 Thread Chris Wilson
t;) Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_timeline.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c index bd973d950064..b190a5d9ab02 100644 --- a/d

[Intel-gfx] [PATCH 14/19] drm/i915/gt: Schedule next retirement worker first

2019-11-18 Thread Chris Wilson
As we may park the gt during request retirement, we may then cancel the retirement worker only to then program the delayed worker once more. If we schedule the next delayed retirement worker first, if we then park the gt, the work remain cancelled [until we unpark]. Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 05/19] drm/i915/gt: Make intel_ring_unpin() safe for concurrent pint

2019-11-18 Thread Chris Wilson
d so could leave the ring in disarray. Fixes: 09c5ab384f6f ("drm/i915: Keep rings pinned while the context is active") Signed-off-by: Chris Wilson Cc: Mika Kuoppala Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_ring.c | 13 - 1 file changed, 4 insertions(+), 9 dele

[Intel-gfx] [PATCH 19/19] drm/i915/gt: Track engine round-trip times

2019-11-18 Thread Chris Wilson
6 CTX corruption WA") Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Stuart Summers --- drivers/gpu/drm/i915/gt/intel_engine_cs.c| 2 ++ drivers/gpu/drm/i915/gt/intel_engine_pm.c| 37 +++- drivers/gpu/drm/i915/gt/intel_engine_types.h | 11 ++ drivers/gpu/d

[Intel-gfx] Fast soft-rc6

2019-11-18 Thread Chris Wilson
In my very simple testing of scrolling through firefox, this brings up back into line with HW rc6 energy usage, a substantial improvement over current -tip. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org

[Intel-gfx] [PATCH 09/18] drm/i915: Protect the obj->vma.list during iteration

2019-11-18 Thread Chris Wilson
l Trace: <4>[ 347.821555] i915_gem_object_prepare_read+0xea/0x2a0 [i915] <4>[ 347.821706] intel_engine_cmd_parser+0x5ce/0xe90 [i915] <4>[ 347.821834] ? __i915_sw_fence_complete+0x1a0/0x250 [i915] <4>[ 347.821990] i915_gem_do_execbuffer+0xb4c/0x2550 [i915] Signed-o

[Intel-gfx] [PATCH 02/18] drm/i915/gem: Manually dump the debug trace on GEM_BUG_ON

2019-11-18 Thread Chris Wilson
Since igt now defaults to not enabling ftrace-on-oops, we need to manually invoke GEM_TRACE_DUMP() to see the debug log prior to a GEM_BUG_ON panicking. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 11/18] drm/i915/gt: Declare timeline.lock to be irq-free

2019-11-18 Thread Chris Wilson
Now that we never allow the intel_wakeref callbacks to be invoked from interrupt context, we do not need the irqsafe spinlock for the timeline. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 9 - drivers/gpu/drm/i915/gt/intel_reset.c | 9

[Intel-gfx] [PATCH 05/18] drm/i915/gt: Schedule request retirement when submission idles

2019-11-18 Thread Chris Wilson
kloads, we will do much more work to idle the GPU faster... Hopefully with commensurate power saving! References: https://bugs.freedesktop.org/show_bug.cgi?id=112315 References: 7e34f4e4aad3 ("drm/i915/gen8+: Add RC6 CTX corruption WA") Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin ---

[Intel-gfx] [PATCH 08/18] drm/i915/gt: Only wait for register chipset flush if active

2019-11-18 Thread Chris Wilson
Only serialise with the chipset using an mmio if the chipset is currently active. We expect that any writes into the chipset range will simply be forgotten until it wakes up. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion

[Intel-gfx] [PATCH 17/18] drm/i915/selftests: Exercise rc6 handling

2019-11-18 Thread Chris Wilson
Reading from CTX_INFO upsets rc6, requiring us to detect and prevent possible rc6 context corruption. Poke at the bear! Signed-off-by: Chris Wilson Cc: Imre Deak Cc: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_rc6.c | 4 + drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 13

[Intel-gfx] [PATCH 12/18] drm/i915/gt: Move new timelines to the end of active_list

2019-11-18 Thread Chris Wilson
t;) Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_timeline.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c index bd973d950064..b190a5d9ab02 100644 --- a/d

[Intel-gfx] [PATCH 10/18] drm/i915: Wait until the intel_wakeref idle callback is complete

2019-11-18 Thread Chris Wilson
When waiting for idle, serialise with any ongoing callback so that it will have completed before completing the wait. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_wakeref.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 06/18] drm/i915: Mark up the calling context for intel_wakeref_put()

2019-11-18 Thread Chris Wilson
;) References: https://bugs.freedesktop.org/show_bug.cgi?id=111626 Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_pm.c| 3 +- drivers/gpu/drm/i915/gt/intel_engine_pm.h| 10 + drivers/gpu/drm/i915/gt/intel_gt_pm.c| 1 - drivers/gpu/drm/i915/gt/intel

[Intel-gfx] [PATCH 14/18] drm/i915/gt: Flush the requests after wedging on suspend

2019-11-18 Thread Chris Wilson
Retire all requests if we resort to wedged the driver on suspend. They will now be idle, so we might as we free them before shutting down. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt_pm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/gt

[Intel-gfx] [PATCH 16/18] drm/i915/selftests: Be explicit in ERR_PTR handling

2019-11-18 Thread Chris Wilson
When setting up a full GGTT, we expect the next insert to fail with -ENOSPC. Simplify the use of ERR_PTR to not confuse either the reader or smatch. Reported-by: Dan Carpenter References: f40a7b7558ef ("drm/i915: Initial selftests for exercising eviction") Signed-off-by: Ch

[Intel-gfx] [PATCH 01/18] drm/i915/selftests: Force bonded submission to overlap

2019-11-18 Thread Chris Wilson
pairs, meaning that it could indeed complete before we submitted the bonds. Those bonds were then free to select any available engine in their virtual set, and not the one expected by the test. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/selftest_lrc.c | 23

[Intel-gfx] [PATCH 04/18] drm/i915/gt: Unlock engine-pm after queuing the kernel context switch

2019-11-18 Thread Chris Wilson
wakeref->count deferral to the backend") Signed-off-by: Chris Wilson Cc: Mika Kuoppala Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm

[Intel-gfx] [PATCH 07/18] drm/i915/gem: Merge GGTT vma flush into a single loop

2019-11-18 Thread Chris Wilson
We only need the one loop to find the dirty vma flush them, and their chipset. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 12 +++- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/gem

[Intel-gfx] [PATCH 03/18] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests

2019-11-18 Thread Chris Wilson
t request retirement with timeline->mutex") Signed-off-by: Chris Wilson Cc: Matthew Auld Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 8 ++--- drivers/gpu/drm/i915/gt/intel_timeline.c | 34 +++ .../gpu/drm/i915/gt/intel_timeline_types.h

[Intel-gfx] [PATCH 13/18] drm/i915/gt: Schedule next retirement worker first

2019-11-18 Thread Chris Wilson
As we may park the gt during request retirement, we may then cancel the retirement worker only to then program the delayed worker once more. If we schedule the next delayed retirement worker first, if we then park the gt, the work remain cancelled [until we unpark]. Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 15/18] drm/i915/selftests: Flush the active callbacks

2019-11-18 Thread Chris Wilson
Before checking the current i915_active state for the asynchronous work we submitted, flush any ongoing callback. This ensures that our sampling is robust and does not sporadically fail due to bad timing as the work is running on another cpu. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 18/18] drm/i915/gt: Track engine round-trip times

2019-11-18 Thread Chris Wilson
6 CTX corruption WA") Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Stuart Summers --- drivers/gpu/drm/i915/gt/intel_engine_cs.c| 2 ++ drivers/gpu/drm/i915/gt/intel_engine_pm.c| 37 +++- drivers/gpu/drm/i915/gt/intel_engine_types.h | 11 ++ drivers/gpu/d

Re: [Intel-gfx] Failed cherry-picks on drm-intel-fixes

2019-11-18 Thread Chris Wilson
> 3cac195875ef ("drm/i915: Leave the aliasing-ppgtt size alone") That seems to be actually the fault of commit 8f5e2b306b4e26db0ec65e0a27b232b179c9122b Author: Chris Wilson Date: Mon Sep 2 05:02:43 2019 +0100 drm/i915: Restrict the aliasing-ppgtt to

Re: [Intel-gfx] Failed cherry-picks on drm-intel-fixes

2019-11-18 Thread Chris Wilson
Quoting Rodrigo Vivi (2019-11-18 17:39:55) > Hi Chris, > > 2 fixes failed on this cherry-pick round. > > 8eb4704b124c ("drm/i915: Protect request peeking with RCU") > 3cac195875ef ("drm/i915: Leave the aliasing-ppgtt size alone") > > The second is strange because git complain about the > empty

Re: [Intel-gfx] [PATCH] drm/i915/gt: Unlock engine-pm after queuing the kernel context switch

2019-11-18 Thread Chris Wilson
Quoting Chris Wilson (2019-11-18 16:23:42) > In commit a79ca656b648 ("drm/i915: Push the wakeref->count deferral to > the backend"), I erroneously concluded that we last modify the engine > inside __i915_request_commit() meaning that we could enable concurrent > submi

[Intel-gfx] [PATCH] drm/i915/gt: Unlock engine-pm after queuing the kernel context switch

2019-11-18 Thread Chris Wilson
equence requests. As such we need to hold onto the effective engine->kernel_context mutex lock (via the engine pm mutex proxy) until we have finish queuing the request to the engine. Fixes: a79ca656b648 ("drm/i915: Push the wakeref->count deferral to the backend") Signed-off-by: Chr

Re: [Intel-gfx] [PATCH] drm/i915/gt: Schedule request retirement when submission idles

2019-11-18 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-11-18 15:12:17) > > On 18/11/2019 14:46, Chris Wilson wrote: > > The major drawback of commit 7e34f4e4aad3 ("drm/i915/gen8+: Add RC6 CTX > > corruption WA") is that it disables RC6 while Skylake (and friends) is > > active, and we

[Intel-gfx] [PATCH] drm/i915/gt: Schedule request retirement when submission idles

2019-11-18 Thread Chris Wilson
kloads, we will do much more work to idle the GPU faster... Hopefully with commensurate power saving! References: https://bugs.freedesktop.org/show_bug.cgi?id=112315 References: 7e34f4e4aad3 ("drm/i915/gen8+: Add RC6 CTX corruption WA") Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin ---

[Intel-gfx] [PATCH] drm/i915/gt: Schedule request retirement when submission idles

2019-11-18 Thread Chris Wilson
kloads, we will do much more work to idle the GPU faster... Hopefully with commensurate power saving! References: https://bugs.freedesktop.org/show_bug.cgi?id=112315 References: 7e34f4e4aad3 ("drm/i915/gen8+: Add RC6 CTX corruption WA") Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin ---

Re: [Intel-gfx] [PATCH 03/15] drm/i915: Remove dma_buf_kmap selftest

2019-11-18 Thread Chris Wilson
e a whole-object-at-a-time interface as we may have to deal with objects larger than the aperture, or even larger than system memory. I feel we have a bridge to cross in future... Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list

Re: [Intel-gfx] [PATCH 06/15] drm/i915: Drop dma_buf->k(un)map

2019-11-18 Thread Chris Wilson
Quoting Daniel Vetter (2019-11-18 10:35:27) > No in-tree users left. Fair enough then, Reviewed-by: Chris Wilson > Aside, I think mock_dmabuf would be a nice addition to drm > mock/selftest helpers (we have some already), with an > EXPORT_SYMBOL_FOR_TESTS_ONLY. We've also sta

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Allow userspace to specify ringsize on construction

2019-11-18 Thread Chris Wilson
Quoting Janusz Krzysztofik (2019-11-18 11:14:12) > Hi Chris, > > Only some minor comments from me, mostly out of my curiosity. > > On Friday, November 15, 2019 5:05:45 PM CET Chris Wilson wrote: > > No good reason why we must always use a static ringsize, so let > >

[Intel-gfx] [PATCH] drm/i915/gem: Manually dump the debug trace on GEM_BUG_ON

2019-11-18 Thread Chris Wilson
Since igt now defaults to not enabling ftrace-on-oops, we need to manually invoke GEM_TRACE_DUMP() to see the debug log prior to a GEM_BUG_ON panicking. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH] drm/i915/selftests: Add intel_gt_driver_late_release for mock device

2019-11-18 Thread Chris Wilson
initialization to a separate file") Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/selftests/mock_gem_device.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c b/drivers/gpu/drm/i915/selftests/mock_gem_device.

[Intel-gfx] [PATCH 11/14] drm/i915/selftests: Flush the active callbacks

2019-11-17 Thread Chris Wilson
Before checking the current i915_active state for the asynchronous work we submitted, flush any ongoing callback. This ensures that our sampling is robust and does not sporadically fail due to bad timing as the work is running on another cpu. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 02/14] drm/i915: Mark up the calling context for intel_wakeref_put()

2019-11-17 Thread Chris Wilson
;) References: https://bugs.freedesktop.org/show_bug.cgi?id=111626 Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_pm.c| 3 +- drivers/gpu/drm/i915/gt/intel_engine_pm.h| 10 + drivers/gpu/drm/i915/gt/intel_gt_pm.c| 1 - drivers/gpu/drm/i915/gt/intel

[Intel-gfx] [PATCH 03/14] drm/i915/gem: Merge GGTT vma flush into a single loop

2019-11-17 Thread Chris Wilson
We only need the one loop to find the dirty vma flush them, and their chipset. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 12 +++- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/gem

[Intel-gfx] [PATCH 08/14] drm/i915/gt: Move new timelines to the end of active_list

2019-11-17 Thread Chris Wilson
t;) Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_timeline.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c index bd973d950064..b190a5d9ab02 100644 --- a/d

[Intel-gfx] [PATCH 10/14] drm/i915/gt: Flush the requests after wedging on suspend

2019-11-17 Thread Chris Wilson
Retire all requests if we resort to wedged the driver on suspend. They will now be idle, so we might as we free them before shutting down. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt_pm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/gt

[Intel-gfx] [PATCH 06/14] drm/i915: Wait until the intel_wakeref idle callback is complete

2019-11-17 Thread Chris Wilson
When waiting for idle, serialise with any ongoing callback so that it will have completed before completing the wait. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_wakeref.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 14/14] drm/i915/gt: Track engine round-trip times

2019-11-17 Thread Chris Wilson
6 CTX corruption WA") Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Stuart Summers --- drivers/gpu/drm/i915/gt/intel_engine_cs.c| 2 ++ drivers/gpu/drm/i915/gt/intel_engine_pm.c| 36 +++- drivers/gpu/drm/i915/gt/intel_engine_types.h | 11 ++ drivers/gpu/d

[Intel-gfx] [PATCH 07/14] drm/i915/gt: Declare timeline.lock to be irq-free

2019-11-17 Thread Chris Wilson
Now that we never allow the intel_wakeref callbacks to be invoked from interrupt context, we do not need the irqsafe spinlock for the timeline. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 9 - drivers/gpu/drm/i915/gt/intel_reset.c | 9

[Intel-gfx] [PATCH 13/14] drm/i915/selftests: Exercise rc6 handling

2019-11-17 Thread Chris Wilson
Reading from CTX_INFO upsets rc6, requiring us to detect and prevent possible rc6 context corruption. Poke at the bear! Signed-off-by: Chris Wilson Cc: Imre Deak Cc: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_rc6.c | 4 + drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 13

[Intel-gfx] [PATCH 09/14] drm/i915/gt: Schedule next retirement worker first

2019-11-17 Thread Chris Wilson
As we may park the gt during request retirement, we may then cancel the retirement worker only to then program the delayed worker once more. If we schedule the next delayed retirement worker first, if we then park the gt, the work remain cancelled [until we unpark]. Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 01/14] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests

2019-11-17 Thread Chris Wilson
t request retirement with timeline->mutex") Signed-off-by: Chris Wilson Cc: Matthew Auld Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 8 ++--- drivers/gpu/drm/i915/gt/intel_timeline.c | 34 +++ .../gpu/drm/i915/gt/intel_timeline_types.h

[Intel-gfx] [PATCH 12/14] drm/i915/selftests: Be explicit in ERR_PTR handling

2019-11-17 Thread Chris Wilson
When setting up a full GGTT, we expect the next insert to fail with -ENOSPC. Simplify the use of ERR_PTR to not confuse either the reader or smatch. Reported-by: Dan Carpenter References: f40a7b7558ef ("drm/i915: Initial selftests for exercising eviction") Signed-off-by: Ch

[Intel-gfx] [PATCH 05/14] drm/i915: Protect the obj->vma.list during iteration

2019-11-17 Thread Chris Wilson
l Trace: <4>[ 347.821555] i915_gem_object_prepare_read+0xea/0x2a0 [i915] <4>[ 347.821706] intel_engine_cmd_parser+0x5ce/0xe90 [i915] <4>[ 347.821834] ? __i915_sw_fence_complete+0x1a0/0x250 [i915] <4>[ 347.821990] i915_gem_do_execbuffer+0xb4c/0x2550 [i915] Signed-o

[Intel-gfx] [PATCH 04/14] drm/i915/gt: Only wait for register chipset flush if active

2019-11-17 Thread Chris Wilson
Only serialise with the chipset using an mmio if the chipset is currently active. We expect that any writes into the chipset range will simply be forgotten until it wakes up. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion

[Intel-gfx] [PATCH] drm/i915: Mark up the calling context for intel_wakeref_put()

2019-11-16 Thread Chris Wilson
;) References: https://bugs.freedesktop.org/show_bug.cgi?id=111626 Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_pm.h | 5 +++ drivers/gpu/drm/i915/gt/intel_gt_pm.c | 1 - drivers/gpu/drm/i915/gt/intel_gt_pm.h | 5 +++ drivers/gpu/drm/i915/gt/intel_lrc.c

Re: [Intel-gfx] [PATCH 01/11] drm/i915/gt: Close race between engine_park and intel_gt_retire_requests

2019-11-16 Thread Chris Wilson
Quoting Chris Wilson (2019-11-16 17:54:38) > Quoting Chris Wilson (2019-11-16 17:51:29) > > The general concept was that intel_timeline.active_count was locked by > > the intel_timeline.mutex. The exception was for power management, where > > the engine->kernel

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