Re: [Intel-gfx] [RFC 1/2] drm/i915: Engine discovery uAPI

t;dmitry.v.rogozh...@intel.com>; Mateo Lozano, Oscar <oscar.ma...@intel.com>; >Gong, Zhipeng <zhipeng.g...@intel.com>; intel-vaapi-me...@lists.01.org; >mesa-...@lists.freedesktop.org Subject: [RFC 1/2] drm/i915: Engine discovery uAPI >+u8 user_class_map[DRM_I915_ENGINE_CLASS_

[Intel-gfx] SKL GT4e can not hit the max frequency

We have two kinds of GT4e machines: One has the maximum frequency of 800MHZ and the actual freq only hits 600MHZ. The other has maximum frequency of 950MHZ and the actual freq only hits only hits 800MHZ. Even if the gt_min_freq_mhz is set to the same value as gt_max_freq_mhz, the actual freq

Re: [Intel-gfx] [PATCH v2] drm/i915: Decouple execbuf uAPI from internal implementation

> On Fri, Jan 15, 2016 at 03:12:50PM +, Tvrtko Ursulin wrote: > > From: Tvrtko Ursulin > > + if (user_ring_id == I915_EXEC_BSD && HAS_BSD2(dev_priv)) { > > + unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK; > > + > > + if (bsd_idx ==

[Intel-gfx] Question about LR context on VCS

Hello Intel MOCS/WA registers got initialized when LR context of RCS ring is created. When one context uses only VCS ring and LR context of RCS ring is not created, what will the value of Intel MOCS/WA registers be? Undefined? ___ Intel-gfx mailing

Re: [Intel-gfx] Question about LR context on VCS

> -Original Message- > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] > Sent: Thursday, January 07, 2016 3:43 PM > > On Thu, Jan 07, 2016 at 05:35:13AM +, Gong, Zhipeng wrote: > > Hello > > > > Intel MOCS/WA registers got initialized when LR

Re: [Intel-gfx] [PATCH] RFC drm/i915: Slaughter the thundering i915_wait_request herd

> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] > > Do you also have a relative perf statistics like op/s we can compare to make > sure we aren't just stalling the whole system? > Could you please provide the commands about how to check it? > > How much cpu time is left in the

Re: [Intel-gfx] [PATCH] RFC drm/i915: Slaughter the thundering i915_wait_request herd

> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] > On Tue, Nov 03, 2015 at 01:31:22PM +, Gong, Zhipeng wrote: > > > > > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] > > > > > > Do you also have a relative perf statistics like op/s we can co

Re: [Intel-gfx] [PATCH] RFC drm/i915: Slaughter the thundering i915_wait_request herd

> -Original Message- > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] > Sent: Monday, November 02, 2015 5:59 PM > To: Gong, Zhipeng > Cc: intel-gfx@lists.freedesktop.org; Rogozhkin, Dmitry V > Subject: Re: [PATCH] RFC drm/i915: Slaughter the thundering > i

Re: [Intel-gfx] [PATCH] RFC drm/i915: Slaughter the thundering i915_wait_request herd

patch -- BDW async 1 | 116% | 95% BDW async 5 | 111% | 91% > -Original Message- > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] > Sent: Tuesday, November 03, 2015 4:59 AM > To: Gong, Zhipeng; intel-gfx@lis

Re: [Intel-gfx] [PATCH] RFC drm/i915: Slaughter the thundering i915_wait_request herd

> Sent: Saturday, October 31, 2015 6:35 PM > To: intel-gfx@lists.freedesktop.org > Cc: Chris Wilson; Rogozhkin, Dmitry V; Gong, Zhipeng > Subject: [PATCH] RFC drm/i915: Slaughter the thundering i915_wait_request > herd > > One particularly stressful scenario consists of

Re: [Intel-gfx] [PATCH 2/3] tests/gem_exec_params: check the invalid flags for dual bsd ring

-Original Message- From: Rodrigo Vivi [mailto:rodrigo.v...@gmail.com] Sent: Wednesday, January 21, 2015 5:44 AM To: Gong, Zhipeng Cc: intel-gfx; Vivi, Rodrigo Subject: Re: [Intel-gfx] [PATCH 2/3] tests/gem_exec_params: check the invalid flags for dual bsd ring I couldn't save

Re: [Intel-gfx] [PATCH 3/3] test/gem_dummy_reloc_loop: add tests for dual bsd ring

-Original Message- From: Rodrigo Vivi [mailto:rodrigo.v...@gmail.com] Sent: Wednesday, January 21, 2015 5:49 AM To: Gong, Zhipeng Cc: intel-gfx; Vivi, Rodrigo Subject: Re: [Intel-gfx] [PATCH 3/3] test/gem_dummy_reloc_loop: add tests for dual bsd ring On Mon, Jan 12, 2015 at 4

Re: [Intel-gfx] [PATCH 1/7] drm/i915: Specify bsd rings through exec flag

On Tue, 2014-12-09 at 10:46 +0100, Daniel Vetter wrote: On Mon, Dec 08, 2014 at 01:55:56PM -0800, Rodrigo Vivi wrote: On Tue, Nov 25, 2014 at 5:04 AM, Daniel Vetter dan...@ffwll.ch wrote: On Mon, Nov 24, 2014 at 08:29:40AM -0800, Rodrigo Vivi wrote: From: Zhipeng Gong

Re: [Intel-gfx] [PATCH] drm/i915: Specify bsd rings through exec flag

On Tue, Aug 05, 2014 at 03:54:04PM +0800, Zhipeng Gong wrote: On Broadwell GT3 we have 2 Video Command Streamers (VCS), but userspace has no control when using VCS1 or VCS2. This patch introduces a mechanism to avoid the default ping-pong mode and use one specific ring through