Re: [Intel-gfx] [RESEND RFC 08/18] drm/display/dp_mst: Add nonblocking helpers for DP MST

2022-06-29 Thread Jani Nikula
On Tue, 07 Jun 2022, Lyude Paul  wrote:
> As Daniel Vetter pointed out, if we only use the atomic modesetting locks
> with MST it's technically possible for a driver with non-blocking modesets
> to race when it comes to MST displays - as we make the mistake of not doing
> our own CRTC commit tracking in the topology_state object.
>
> This could potentially cause problems if something like this happens:
>
> * User starts non-blocking commit to disable CRTC-1 on MST topology 1
> * User starts non-blocking commit to enable CRTC-2 on MST topology 1
>
> There's no guarantee here that the commit for disabling CRTC-2 will only
> occur after CRTC-1 has finished, since neither commit shares a CRTC - only
> the private modesetting object for MST. Keep in mind this likely isn't a
> problem for blocking modesets, only non-blocking.
>
> So, begin fixing this by keeping track of which CRTCs on a topology have
> changed by keeping track of which CRTCs we release or allocate timeslots
> on. As well, add some helpers for:
>
> * Setting up the drm_crtc_commit structs in the ->commit_setup hook
> * Waiting for any CRTC dependencies from the previous topology state
>
> Signed-off-by: Lyude Paul 
> Cc: Wayne Lin 
> Cc: Ville Syrjälä 
> Cc: Fangzhi Zuo 
> Cc: Jani Nikula 
> Cc: Imre Deak 
> Cc: Daniel Vetter 
> Cc: Sean Paul 
> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  9 +-
>  drivers/gpu/drm/display/drm_dp_mst_topology.c | 93 +++
>  drivers/gpu/drm/i915/display/intel_display.c  | 11 +++
>  drivers/gpu/drm/nouveau/dispnv50/disp.c   | 12 +++
>  include/drm/display/drm_dp_mst_helper.h   | 15 +++
>  5 files changed, 139 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index f84a4ad736d8..d9c7393ef151 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -211,6 +211,7 @@ static int amdgpu_dm_encoder_init(struct drm_device *dev,
>  static int amdgpu_dm_connector_get_modes(struct drm_connector *connector);
>  
>  static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state);
> +static int amdgpu_dm_atomic_setup_commit(struct drm_atomic_state *state);
>  
>  static int amdgpu_dm_atomic_check(struct drm_device *dev,
> struct drm_atomic_state *state);
> @@ -2808,7 +2809,8 @@ static const struct drm_mode_config_funcs 
> amdgpu_dm_mode_funcs = {
>  };
>  
>  static struct drm_mode_config_helper_funcs amdgpu_dm_mode_config_helperfuncs 
> = {
> - .atomic_commit_tail = amdgpu_dm_atomic_commit_tail
> + .atomic_commit_tail = amdgpu_dm_atomic_commit_tail,
> + .atomic_commit_setup = amdgpu_dm_atomic_setup_commit,
>  };
>  
>  static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
> @@ -9558,6 +9560,7 @@ static void amdgpu_dm_atomic_commit_tail(struct 
> drm_atomic_state *state)
>   DRM_ERROR("Waiting for fences timed out!");
>  
>   drm_atomic_helper_update_legacy_modeset_state(dev, state);
> + drm_dp_mst_atomic_wait_for_dependencies(state);
>  
>   dm_state = dm_atomic_get_new_state(state);
>   if (dm_state && dm_state->context) {
> @@ -9958,6 +9961,10 @@ static void amdgpu_dm_atomic_commit_tail(struct 
> drm_atomic_state *state)
>   dc_release_state(dc_state_temp);
>  }
>  
> +static int amdgpu_dm_atomic_setup_commit(struct drm_atomic_state *state)
> +{
> + return drm_dp_mst_atomic_setup_commit(state);
> +}

I guess all the driver specific wrappers for setup commit could be
dropped in favor of directly using drm_dp_mst_atomic_setup_commit?

BR,
Jani.

>  
>  static int dm_force_atomic_commit(struct drm_connector *connector)
>  {
> diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c 
> b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> index 0bc2c7a90c37..a0ed29f83556 100644
> --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> @@ -4395,12 +4395,16 @@ int drm_dp_atomic_find_time_slots(struct 
> drm_atomic_state *state,
>  {
>   struct drm_dp_mst_topology_state *topology_state;
>   struct drm_dp_mst_atomic_payload *payload = NULL;
> + struct drm_connector_state *conn_state;
>   int prev_slots = 0, prev_bw = 0, req_slots;
>  
>   topology_state = drm_atomic_get_mst_topology_state(state, mgr);
>   if (IS_ERR(topology_state))
>   return PTR_ERR(topology_state);
>  
> + conn_state = drm_atomic_get_new_connector_state(state, port->connector);
> + topology_state-&

[Intel-gfx] [PULL] drm-intel-fixes

2022-06-29 Thread Jani Nikula


Hi Dave & Daniel -

drm-intel-fixes-2022-06-29:
drm/i915 fixes for v5.19-rc5:
- Fix ioctl argument error return
- Fix d3cold disable to allow PCI upstream bridge D3 transition
- Fix setting cache_dirty for dma-buf objects on discrete


Rodrigo will cover the remaining fixes until v5.19 final.


BR,
Jani.

The following changes since commit 03c765b0e3b4cb5063276b086c76f7a612856a9a:

  Linux 5.19-rc4 (2022-06-26 14:22:10 -0700)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-fixes-2022-06-29

for you to fetch changes up to 79538490fd7ade244dba400923e792519a2bdfea:

  drm/i915: tweak the ordering in cpu_write_needs_clflush (2022-06-27 18:12:10 
+0300)


drm/i915 fixes for v5.19-rc5:
- Fix ioctl argument error return
- Fix d3cold disable to allow PCI upstream bridge D3 transition
- Fix setting cache_dirty for dma-buf objects on discrete


Anshuman Gupta (1):
  drm/i915/dgfx: Disable d3cold at gfx root port

Matthew Auld (1):
  drm/i915: tweak the ordering in cpu_write_needs_clflush

katrinzhou (1):
  drm/i915/gem: add missing else

 drivers/gpu/drm/i915/gem/i915_gem_context.c |  5 +++--
 drivers/gpu/drm/i915/gem/i915_gem_domain.c  |  6 ++---
 drivers/gpu/drm/i915/i915_driver.c  | 34 +
 3 files changed, 21 insertions(+), 24 deletions(-)

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [RFC PATCH 2/2] drm/i915: Enabling WD Transcoder

2022-06-29 Thread Jani Nikula
On Wed, 01 Jun 2022, Suraj Kandpal  wrote:
> Adding support for writeback transcoder to start capturing frames using
> interrupt mechanism.

Some notes inline based on our discussion off-list.

>
> Signed-off-by: Suraj Kandpal 
> ---
>  drivers/gpu/drm/i915/Makefile |   1 +
>  drivers/gpu/drm/i915/display/intel_acpi.c |   1 +
>  drivers/gpu/drm/i915/display/intel_display.c  | 369 +++--
>  drivers/gpu/drm/i915/display/intel_display.h  |  17 +
>  .../drm/i915/display/intel_display_types.h|  29 +
>  drivers/gpu/drm/i915/display/intel_dpll.c |   6 +
>  drivers/gpu/drm/i915/display/intel_opregion.c |   3 +
>  .../gpu/drm/i915/display/intel_wb_connector.h |  20 +
>  drivers/gpu/drm/i915/display/intel_wd.c   | 748 ++
>  drivers/gpu/drm/i915/display/intel_wd.h   |  84 ++
>  drivers/gpu/drm/i915/i915_drv.h   |   4 +
>  drivers/gpu/drm/i915/i915_irq.c   |   8 +-
>  drivers/gpu/drm/i915/i915_pci.c   |   7 +-
>  drivers/gpu/drm/i915/i915_reg.h   | 137 
>  14 files changed, 1386 insertions(+), 48 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/display/intel_wb_connector.h
>  create mode 100644 drivers/gpu/drm/i915/display/intel_wd.c
>  create mode 100644 drivers/gpu/drm/i915/display/intel_wd.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index d2b18f03a33c..8f1ef2bbb851 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -298,6 +298,7 @@ i915-y += \
>   display/intel_tv.o \
>   display/intel_vdsc.o \
>   display/intel_vrr.o \
> + display/intel_wd.o \
>   display/vlv_dsi.o \
>   display/vlv_dsi_pll.o
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_acpi.c 
> b/drivers/gpu/drm/i915/display/intel_acpi.c
> index e78430001f07..ae08db164f73 100644
> --- a/drivers/gpu/drm/i915/display/intel_acpi.c
> +++ b/drivers/gpu/drm/i915/display/intel_acpi.c
> @@ -247,6 +247,7 @@ static u32 acpi_display_type(struct intel_connector 
> *connector)
>   case DRM_MODE_CONNECTOR_LVDS:
>   case DRM_MODE_CONNECTOR_eDP:
>   case DRM_MODE_CONNECTOR_DSI:
> + case DRM_MODE_CONNECTOR_WRITEBACK:
>   display_type = ACPI_DISPLAY_TYPE_INTERNAL_DIGITAL;
>   break;
>   case DRM_MODE_CONNECTOR_Unknown:
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index e71b69425309..bebc8caa9596 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -113,6 +113,7 @@
>  #include "intel_sprite.h"
>  #include "intel_tc.h"
>  #include "intel_vga.h"
> +#include "intel_wd.h"
>  #include "i9xx_plane.h"
>  #include "skl_scaler.h"
>  #include "skl_universal_plane.h"
> @@ -1551,6 +1552,141 @@ static void intel_encoders_update_complete(struct 
> intel_atomic_state *state)
>   }
>  }
>  
> +static void intel_queue_writeback_job(struct intel_atomic_state *state,
> + struct intel_crtc *intel_crtc, struct intel_crtc_state 
> *crtc_state)
> +{
> + struct drm_connector_state *new_conn_state;
> + struct drm_connector *connector;
> + struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
> + struct intel_wd *intel_wd;
> + //struct intel_encoder *encoder;
> + int i;
> +
> + //for_each_intel_encoder_with_wd(_priv->drm, encoder) {
> + //  intel_wd = enc_to_intel_wd(encoder);
> +
> + //  if (intel_wd->wd_crtc != intel_crtc)
> + //  return;
> +
> + //}

Please remove commented out code, even for RFC patches.

> +
> + for_each_new_connector_in_state(>base, connector, new_conn_state,
> + i) {
> + intel_wd = 
> conn_to_intel_wd(drm_connector_to_writeback(connector));
> +
> + if (intel_wd->wd_crtc != intel_crtc)
> + return;
> +
> + if (!new_conn_state->writeback_job)
> + continue;
> +
> + drm_writeback_queue_job(_wd->wb_conn, new_conn_state);
> + drm_dbg_kms(_priv->drm, "queueing writeback job\n");
> + }
> +}
> +
> +static void intel_wd_encoder_funcs(struct intel_atomic_state *state,
> + struct intel_crtc *intel_crtc, struct intel_crtc_state 
> *crtc_state)
> +{
> + struct drm_connector_state *new_conn_state;
> + struct drm_connector *connector;
> + struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
> + struct intel_wd *intel_wd;
> + //struct intel_encoder *encoder;
> + int i;
> +
> + //for_each_intel_encoder_with_wd(_priv->drm, encoder) {
> + //  intel_wd = enc_to_intel_wd(encoder);
> +
> + //  if (intel_wd->wd_crtc != intel_crtc)
> + //  return;
> +
> + //}
> +
> + for_each_new_connector_in_state(>base, connector, new_conn_state,
> + i) {
> + 

[Intel-gfx] [CI RESEND 10/10] drm/edid: take HF-EEODB extension count into account

2022-06-29 Thread Jani Nikula
Take the HF-EEODB extension count override into account.

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_edid.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index fa3a3e294560..bbc25e3b7220 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -1629,6 +1629,19 @@ static int drm_edid_block_count(const struct drm_edid 
*drm_edid)
/* Starting point */
num_blocks = edid_block_count(drm_edid->edid);
 
+   /* HF-EEODB override */
+   if (drm_edid->size >= edid_size_by_blocks(2)) {
+   int eeodb;
+
+   /*
+* Note: HF-EEODB may specify a smaller extension count than the
+* regular one. Unlike in buffer allocation, here we can use it.
+*/
+   eeodb = edid_hfeeodb_block_count(drm_edid->edid);
+   if (eeodb)
+   num_blocks = eeodb;
+   }
+
/* Limit by allocated size */
num_blocks = min(num_blocks, (int)drm_edid->size / EDID_LENGTH);
 
-- 
2.30.2



[Intel-gfx] [CI RESEND 09/10] drm/edid: add HF-EEODB support to EDID read and allocation

2022-06-29 Thread Jani Nikula
HDMI 2.1 section 10.3.6 defines an HDMI Forum EDID Extension Override
Data Block, which may contain a different extension count than the base
block claims. Add support for reading more EDID data if available. The
extra blocks aren't parsed yet, though.

Hard-coding the EEODB parsing instead of using the iterators we have is
a bit of a bummer, but we have to be able to do this on a partially
allocated EDID while reading it.

v2:
- Check for CEA Data Block Collection size (Ville)
- Amend commit message and comment about hard-coded parsing

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_edid.c | 89 --
 1 file changed, 86 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index a80ea0aa7b32..fa3a3e294560 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -1581,6 +1581,15 @@ static bool version_greater(const struct drm_edid 
*drm_edid,
(edid->version == version && edid->revision > revision);
 }
 
+static int edid_hfeeodb_extension_block_count(const struct edid *edid);
+
+static int edid_hfeeodb_block_count(const struct edid *edid)
+{
+   int eeodb = edid_hfeeodb_extension_block_count(edid);
+
+   return eeodb ? eeodb + 1 : 0;
+}
+
 static int edid_extension_block_count(const struct edid *edid)
 {
return edid->extensions;
@@ -2026,6 +2035,11 @@ static struct edid *edid_filter_invalid_blocks(struct 
edid *edid,
struct edid *new;
int i, valid_blocks = 0;
 
+   /*
+* Note: If the EDID uses HF-EEODB, but has invalid blocks, we'll revert
+* back to regular extension count here. We don't want to start
+* modifying the HF-EEODB extension too.
+*/
for (i = 0; i < edid_block_count(edid); i++) {
const void *src_block = edid_block_data(edid, i);
 
@@ -2261,7 +2275,7 @@ static struct edid *_drm_do_get_edid(struct drm_connector 
*connector,
 size_t *size)
 {
enum edid_block_status status;
-   int i, invalid_blocks = 0;
+   int i, num_blocks, invalid_blocks = 0;
struct edid *edid, *new;
size_t alloc_size = EDID_LENGTH;
 
@@ -2303,7 +2317,8 @@ static struct edid *_drm_do_get_edid(struct drm_connector 
*connector,
goto fail;
edid = new;
 
-   for (i = 1; i < edid_block_count(edid); i++) {
+   num_blocks = edid_block_count(edid);
+   for (i = 1; i < num_blocks; i++) {
void *block = (void *)edid_block_data(edid, i);
 
status = edid_block_read(block, i, read_block, context);
@@ -2314,11 +2329,31 @@ static struct edid *_drm_do_get_edid(struct 
drm_connector *connector,
if (status == EDID_BLOCK_READ_FAIL)
goto fail;
invalid_blocks++;
+   } else if (i == 1) {
+   /*
+* If the first EDID extension is a CTA extension, and
+* the first Data Block is HF-EEODB, override the
+* extension block count.
+*
+* Note: HF-EEODB could specify a smaller extension
+* count too, but we can't risk allocating a smaller
+* amount.
+*/
+   int eeodb = edid_hfeeodb_block_count(edid);
+
+   if (eeodb > num_blocks) {
+   num_blocks = eeodb;
+   alloc_size = edid_size_by_blocks(num_blocks);
+   new = krealloc(edid, alloc_size, GFP_KERNEL);
+   if (!new)
+   goto fail;
+   edid = new;
+   }
}
}
 
if (invalid_blocks) {
-   connector_bad_edid(connector, edid, edid_block_count(edid));
+   connector_bad_edid(connector, edid, num_blocks);
 
edid = edid_filter_invalid_blocks(edid, _size);
}
@@ -3851,6 +3886,7 @@ static int add_detailed_modes(struct drm_connector 
*connector,
 #define CTA_EXT_DB_HDR_STATIC_METADATA 6
 #define CTA_EXT_DB_420_VIDEO_DATA  14
 #define CTA_EXT_DB_420_VIDEO_CAP_MAP   15
+#define CTA_EXT_DB_HF_EEODB0x78
 #define CTA_EXT_DB_HF_SCDB 0x79
 
 #define EDID_BASIC_AUDIO   (1 << 6)
@@ -4910,6 +4946,12 @@ static bool cea_db_is_hdmi_forum_vsdb(const struct 
cea_db *db)
cea_db_payload_len(db) >= 7;
 }
 
+static bool cea_db_is_hdmi_forum_eeodb(const void *db)
+{
+   return cea_db_is_extended_tag(db, CTA_EXT_DB_HF_EEODB) &&
+   cea_db_payload_len(db) >= 2;
+}
+
 static bool cea_db_is_microsoft_vsdb(const struct cea_db *db)
 {
return ce

[Intel-gfx] [CI RESEND 08/10] drm/edid: do invalid block filtering in-place

2022-06-29 Thread Jani Nikula
Rewrite edid_filter_invalid_blocks() to filter invalid blocks
in-place. The main motivation is to not rely on passed in information on
invalid block count or the allocation size, which will be helpful in
follow-up work on HF-EEODB.

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_edid.c | 43 --
 1 file changed, 23 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 1c761e12820e..a80ea0aa7b32 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2020,33 +2020,37 @@ bool drm_edid_is_valid(struct edid *edid)
 }
 EXPORT_SYMBOL(drm_edid_is_valid);
 
-static struct edid *edid_filter_invalid_blocks(const struct edid *edid,
-  int invalid_blocks,
+static struct edid *edid_filter_invalid_blocks(struct edid *edid,
   size_t *alloc_size)
 {
-   struct edid *new, *dest_block;
-   int valid_extensions = edid->extensions - invalid_blocks;
-   int i;
+   struct edid *new;
+   int i, valid_blocks = 0;
 
-   *alloc_size = edid_size_by_blocks(valid_extensions + 1);
+   for (i = 0; i < edid_block_count(edid); i++) {
+   const void *src_block = edid_block_data(edid, i);
 
-   new = kmalloc(*alloc_size, GFP_KERNEL);
-   if (!new)
-   goto out;
+   if (edid_block_valid(src_block, i == 0)) {
+   void *dst_block = (void *)edid_block_data(edid, 
valid_blocks);
 
-   dest_block = new;
-   for (i = 0; i < edid_block_count(edid); i++) {
-   const void *block = edid_block_data(edid, i);
+   memmove(dst_block, src_block, EDID_LENGTH);
+   valid_blocks++;
+   }
+   }
 
-   if (edid_block_valid(block, i == 0))
-   memcpy(dest_block++, block, EDID_LENGTH);
+   /* We already trusted the base block to be valid here... */
+   if (WARN_ON(!valid_blocks)) {
+   kfree(edid);
+   return NULL;
}
 
-   new->extensions = valid_extensions;
-   new->checksum = edid_block_compute_checksum(new);
+   edid->extensions = valid_blocks - 1;
+   edid->checksum = edid_block_compute_checksum(edid);
 
-out:
-   kfree(edid);
+   *alloc_size = edid_size_by_blocks(valid_blocks);
+
+   new = krealloc(edid, *alloc_size, GFP_KERNEL);
+   if (!new)
+   kfree(edid);
 
return new;
 }
@@ -2316,8 +2320,7 @@ static struct edid *_drm_do_get_edid(struct drm_connector 
*connector,
if (invalid_blocks) {
connector_bad_edid(connector, edid, edid_block_count(edid));
 
-   edid = edid_filter_invalid_blocks(edid, invalid_blocks,
- _size);
+   edid = edid_filter_invalid_blocks(edid, _size);
}
 
 ok:
-- 
2.30.2



[Intel-gfx] [CI RESEND 07/10] drm/edid: add drm_edid_raw() to access the raw EDID data

2022-06-29 Thread Jani Nikula
Unfortunately, there are still plenty of interfaces around that require
a struct edid pointer, and it's impossible to change them all at
once. Add an accessor to the raw EDID data to help the transition.

While there are no such cases now, be defensive against raw EDID
extension count indicating bigger EDID than is actually allocated.

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_edid.c | 26 ++
 include/drm/drm_edid.h |  1 +
 2 files changed, 27 insertions(+)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 41b3de52b8f1..1c761e12820e 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2359,6 +2359,32 @@ struct edid *drm_do_get_edid(struct drm_connector 
*connector,
 }
 EXPORT_SYMBOL_GPL(drm_do_get_edid);
 
+/**
+ * drm_edid_raw - Get a pointer to the raw EDID data.
+ * @drm_edid: drm_edid container
+ *
+ * Get a pointer to the raw EDID data.
+ *
+ * This is for transition only. Avoid using this like the plague.
+ *
+ * Return: Pointer to raw EDID data.
+ */
+const struct edid *drm_edid_raw(const struct drm_edid *drm_edid)
+{
+   if (!drm_edid || !drm_edid->size)
+   return NULL;
+
+   /*
+* Do not return pointers where relying on EDID extension count would
+* lead to buffer overflow.
+*/
+   if (WARN_ON(edid_size(drm_edid->edid) > drm_edid->size))
+   return NULL;
+
+   return drm_edid->edid;
+}
+EXPORT_SYMBOL(drm_edid_raw);
+
 /* Allocate struct drm_edid container *without* duplicating the edid data */
 static const struct drm_edid *_drm_edid_alloc(const void *edid, size_t size)
 {
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index aeb2fa95bc04..2181977ae683 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -597,6 +597,7 @@ drm_display_mode_from_cea_vic(struct drm_device *dev,
 const struct drm_edid *drm_edid_alloc(const void *edid, size_t size);
 const struct drm_edid *drm_edid_dup(const struct drm_edid *drm_edid);
 void drm_edid_free(const struct drm_edid *drm_edid);
+const struct edid *drm_edid_raw(const struct drm_edid *drm_edid);
 const struct drm_edid *drm_edid_read(struct drm_connector *connector);
 const struct drm_edid *drm_edid_read_ddc(struct drm_connector *connector,
 struct i2c_adapter *adapter);
-- 
2.30.2



[Intel-gfx] [CI RESEND 06/10] drm/probe-helper: add drm_connector_helper_get_modes()

2022-06-29 Thread Jani Nikula
Add a helper function to be used as the "default" .get_modes()
hook. This also works as an example of what the driver .get_modes()
hooks are supposed to do regarding the new drm_edid_read*() and
drm_edid_connector_update() calls.

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_probe_helper.c | 34 ++
 include/drm/drm_probe_helper.h |  1 +
 2 files changed, 35 insertions(+)

diff --git a/drivers/gpu/drm/drm_probe_helper.c 
b/drivers/gpu/drm/drm_probe_helper.c
index a8d26b29bfa0..bb427c5a4f1f 100644
--- a/drivers/gpu/drm/drm_probe_helper.c
+++ b/drivers/gpu/drm/drm_probe_helper.c
@@ -1049,3 +1049,37 @@ int drm_connector_helper_get_modes_from_ddc(struct 
drm_connector *connector)
return count;
 }
 EXPORT_SYMBOL(drm_connector_helper_get_modes_from_ddc);
+
+/**
+ * drm_connector_helper_get_modes - Read EDID and update connector.
+ * @connector: The connector
+ *
+ * Read the EDID using drm_edid_read() (which requires that connector->ddc is
+ * set), and update the connector using the EDID.
+ *
+ * This can be used as the "default" connector helper .get_modes() hook if the
+ * driver does not need any special processing. This is sets the example what
+ * custom .get_modes() hooks should do regarding EDID read and connector 
update.
+ *
+ * Returns: Number of modes.
+ */
+int drm_connector_helper_get_modes(struct drm_connector *connector)
+{
+   const struct drm_edid *drm_edid;
+   int count;
+
+   drm_edid = drm_edid_read(connector);
+
+   /*
+* Unconditionally update the connector. If the EDID was read
+* successfully, fill in the connector information derived from the
+* EDID. Otherwise, if the EDID is NULL, clear the connector
+* information.
+*/
+   count = drm_edid_connector_update(connector, drm_edid);
+
+   drm_edid_free(drm_edid);
+
+   return count;
+}
+EXPORT_SYMBOL(drm_connector_helper_get_modes);
diff --git a/include/drm/drm_probe_helper.h b/include/drm/drm_probe_helper.h
index c80cab7a53b7..8075e02aa865 100644
--- a/include/drm/drm_probe_helper.h
+++ b/include/drm/drm_probe_helper.h
@@ -27,5 +27,6 @@ void drm_kms_helper_poll_enable(struct drm_device *dev);
 bool drm_kms_helper_is_poll_worker(void);
 
 int drm_connector_helper_get_modes_from_ddc(struct drm_connector *connector);
+int drm_connector_helper_get_modes(struct drm_connector *connector);
 
 #endif
-- 
2.30.2



[Intel-gfx] [CI RESEND 05/10] drm/edid: add drm_edid_connector_update()

2022-06-29 Thread Jani Nikula
Add a new function drm_edid_connector_update() to replace the
combination of calls drm_connector_update_edid_property() and
drm_add_edid_modes(). Usually they are called in the drivers in this
order, however the former needs information from the latter.

Since the new drm_edid_read*() functions no longer call the connector
updates directly, and the read and update are separated, we'll need this
new function for the connector update.

This is all in drm_edid.c simply to keep struct drm_edid opaque.

v2:
- Share code with drm_connector_update_edid_property() (Ville)
- Add comment about override EDID handling

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_edid.c | 103 -
 include/drm/drm_edid.h |   2 +
 2 files changed, 81 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index c3f0f0a5a8a9..41b3de52b8f1 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -6160,8 +6160,8 @@ static int add_displayid_detailed_modes(struct 
drm_connector *connector,
return num_modes;
 }
 
-static int drm_edid_connector_update(struct drm_connector *connector,
-const struct drm_edid *drm_edid)
+static int _drm_edid_connector_update(struct drm_connector *connector,
+ const struct drm_edid *drm_edid)
 {
int num_modes = 0;
u32 quirks;
@@ -6227,31 +6227,12 @@ static int drm_edid_connector_update(struct 
drm_connector *connector,
 static void _drm_update_tile_info(struct drm_connector *connector,
  const struct drm_edid *drm_edid);
 
-static int _drm_connector_update_edid_property(struct drm_connector *connector,
+static int _drm_edid_connector_property_update(struct drm_connector *connector,
   const struct drm_edid *drm_edid)
 {
struct drm_device *dev = connector->dev;
int ret;
 
-   /* ignore requests to set edid when overridden */
-   if (connector->override_edid)
-   return 0;
-
-   /*
-* Set the display info, using edid if available, otherwise resetting
-* the values to defaults. This duplicates the work done in
-* drm_add_edid_modes, but that function is not consistently called
-* before this one in all drivers and the computation is cheap enough
-* that it seems better to duplicate it rather than attempt to ensure
-* some arbitrary ordering of calls.
-*/
-   if (drm_edid)
-   update_display_info(connector, drm_edid);
-   else
-   drm_reset_display_info(connector);
-
-   _drm_update_tile_info(connector, drm_edid);
-
if (connector->edid_blob_ptr) {
const struct edid *old_edid = connector->edid_blob_ptr->data;
 
@@ -6297,6 +6278,76 @@ static int _drm_connector_update_edid_property(struct 
drm_connector *connector,
return ret;
 }
 
+/**
+ * drm_edid_connector_update - Update connector information from EDID
+ * @connector: Connector
+ * @drm_edid: EDID
+ *
+ * Update the connector mode list, display info, ELD, HDR metadata, relevant
+ * properties, etc. from the passed in EDID.
+ *
+ * If EDID is NULL, reset the information.
+ *
+ * Return: The number of modes added or 0 if we couldn't find any.
+ */
+int drm_edid_connector_update(struct drm_connector *connector,
+ const struct drm_edid *drm_edid)
+{
+   int count;
+
+   /*
+* FIXME: Reconcile the differences in override_edid handling between
+* this and drm_connector_update_edid_property().
+*
+* If override_edid is set, and the EDID passed in here originates from
+* drm_edid_read() and friends, it will be the override EDID, and there
+* are no issues. drm_connector_update_edid_property() ignoring requests
+* to set the EDID dates back to a time when override EDID was not
+* handled at the low level EDID read.
+*
+* The only way the EDID passed in here can be different from the
+* override EDID is when a driver passes in an EDID that does *not*
+* originate from drm_edid_read() and friends, or passes in a stale
+* cached version. This, in turn, is a question of when an override EDID
+* set via debugfs should take effect.
+*/
+
+   count = _drm_edid_connector_update(connector, drm_edid);
+
+   _drm_update_tile_info(connector, drm_edid);
+
+   /* Note: Ignore errors for now. */
+   _drm_edid_connector_property_update(connector, drm_edid);
+
+   return count;
+}
+EXPORT_SYMBOL(drm_edid_connector_update);
+
+static int _drm_connector_update_edid_property(struct drm_connector *connector,
+  const struct drm_edid *drm_edid)
+{
+   /* ignore requests to set edid 

[Intel-gfx] [CI RESEND 04/10] drm/edid: abstract debugfs override EDID set/reset

2022-06-29 Thread Jani Nikula
Add functions drm_edid_override_set() and drm_edid_override_reset() to
support "edid_override" connector debugfs, and to hide the details about
it in drm_edid.c. No functional changes at this time.

Also note in the connector.override_edid flag kernel-doc that this is
only supposed to be modified by the code doing debugfs EDID override
handling. Currently, it is still being modified by amdgpu in
create_eml_sink() and handle_edid_mgmt() for reasons unknown. This was
added in commit 4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")
and later moved to amdgpu_dm.c in commit e7b07ceef2a6 ("drm/amd/display:
Merge amdgpu_dm_types and amdgpu_dm").

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_crtc_internal.h |  2 ++
 drivers/gpu/drm/drm_debugfs.c   | 21 +
 drivers/gpu/drm/drm_edid.c  | 26 ++
 include/drm/drm_connector.h |  6 +-
 4 files changed, 38 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/drm_crtc_internal.h 
b/drivers/gpu/drm/drm_crtc_internal.h
index aecab5308bae..56041b604881 100644
--- a/drivers/gpu/drm/drm_crtc_internal.h
+++ b/drivers/gpu/drm/drm_crtc_internal.h
@@ -286,3 +286,5 @@ int drm_mode_page_flip_ioctl(struct drm_device *dev,
 
 /* drm_edid.c */
 void drm_mode_fixup_1366x768(struct drm_display_mode *mode);
+int drm_edid_override_set(struct drm_connector *connector, const void *edid, 
size_t size);
+int drm_edid_override_reset(struct drm_connector *connector);
diff --git a/drivers/gpu/drm/drm_debugfs.c b/drivers/gpu/drm/drm_debugfs.c
index fb04b7a984de..493922069c90 100644
--- a/drivers/gpu/drm/drm_debugfs.c
+++ b/drivers/gpu/drm/drm_debugfs.c
@@ -350,31 +350,20 @@ static ssize_t edid_write(struct file *file, const char 
__user *ubuf,
struct seq_file *m = file->private_data;
struct drm_connector *connector = m->private;
char *buf;
-   struct edid *edid;
int ret;
 
buf = memdup_user(ubuf, len);
if (IS_ERR(buf))
return PTR_ERR(buf);
 
-   edid = (struct edid *) buf;
-
-   if (len == 5 && !strncmp(buf, "reset", 5)) {
-   connector->override_edid = false;
-   ret = drm_connector_update_edid_property(connector, NULL);
-   } else if (len < EDID_LENGTH ||
-  EDID_LENGTH * (1 + edid->extensions) > len)
-   ret = -EINVAL;
-   else {
-   connector->override_edid = false;
-   ret = drm_connector_update_edid_property(connector, edid);
-   if (!ret)
-   connector->override_edid = true;
-   }
+   if (len == 5 && !strncmp(buf, "reset", 5))
+   ret = drm_edid_override_reset(connector);
+   else
+   ret = drm_edid_override_set(connector, buf, len);
 
kfree(buf);
 
-   return (ret) ? ret : len;
+   return ret ? ret : len;
 }
 
 /*
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index e360e1a269f4..c3f0f0a5a8a9 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2161,6 +2161,32 @@ static struct edid *drm_get_override_edid(struct 
drm_connector *connector,
return IS_ERR(override) ? NULL : override;
 }
 
+/* For debugfs edid_override implementation */
+int drm_edid_override_set(struct drm_connector *connector, const void *edid,
+ size_t size)
+{
+   int ret;
+
+   if (size < EDID_LENGTH || edid_size(edid) > size)
+   return -EINVAL;
+
+   connector->override_edid = false;
+
+   ret = drm_connector_update_edid_property(connector, edid);
+   if (!ret)
+   connector->override_edid = true;
+
+   return ret;
+}
+
+/* For debugfs edid_override implementation */
+int drm_edid_override_reset(struct drm_connector *connector)
+{
+   connector->override_edid = false;
+
+   return drm_connector_update_edid_property(connector, NULL);
+}
+
 /**
  * drm_add_override_edid_modes - add modes from override/firmware EDID
  * @connector: connector we're probing
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 94b422b55cc1..a1705d6b3fba 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -1527,7 +1527,11 @@ struct drm_connector {
struct drm_cmdline_mode cmdline_mode;
/** @force: a DRM_FORCE_ state for forced mode sets */
enum drm_connector_force force;
-   /** @override_edid: has the EDID been overwritten through debugfs for 
testing? */
+   /**
+* @override_edid: has the EDID been overwritten through debugfs for
+* testing? Do not modify outside of drm_edid_override_set() and
+* drm_edid_override_reset().
+*/
bool override_edid;
/** @epoch_counter: used to detect any other changes in connector, 
besides status */
u64 epoch_counter;
-- 
2.30.2



[Intel-gfx] [CI RESEND 02/10] drm/edid: convert drm_connector_update_edid_property() to struct drm_edid

2022-06-29 Thread Jani Nikula
Make drm_connector_update_edid_property() a thin wrapper around a struct
drm_edid based version of the same.

This lets us remove the legacy drm_update_tile_info() and
drm_add_display_info() functions altogether.

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_edid.c | 81 --
 1 file changed, 35 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 36bf7b0fe8d9..62967db78139 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -6042,14 +6042,6 @@ static u32 update_display_info(struct drm_connector 
*connector,
return quirks;
 }
 
-static u32 drm_add_display_info(struct drm_connector *connector, const struct 
edid *edid)
-{
-   struct drm_edid drm_edid;
-
-   return update_display_info(connector,
-  drm_edid_legacy_init(_edid, edid));
-}
-
 static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device 
*dev,
struct 
displayid_detailed_timings_1 *timings,
bool type_7)
@@ -6206,38 +6198,19 @@ static int drm_edid_connector_update(struct 
drm_connector *connector,
return num_modes;
 }
 
-static void drm_update_tile_info(struct drm_connector *connector,
-const struct edid *edid);
+static void _drm_update_tile_info(struct drm_connector *connector,
+ const struct drm_edid *drm_edid);
 
-/**
- * drm_connector_update_edid_property - update the edid property of a connector
- * @connector: drm connector
- * @edid: new value of the edid property
- *
- * This function creates a new blob modeset object and assigns its id to the
- * connector's edid property.
- * Since we also parse tile information from EDID's displayID block, we also
- * set the connector's tile property here. See 
drm_connector_set_tile_property()
- * for more details.
- *
- * Returns:
- * Zero on success, negative errno on failure.
- */
-int drm_connector_update_edid_property(struct drm_connector *connector,
-  const struct edid *edid)
+static int _drm_connector_update_edid_property(struct drm_connector *connector,
+  const struct drm_edid *drm_edid)
 {
struct drm_device *dev = connector->dev;
-   size_t size = 0;
int ret;
-   const struct edid *old_edid;
 
/* ignore requests to set edid when overridden */
if (connector->override_edid)
return 0;
 
-   if (edid)
-   size = EDID_LENGTH * (1 + edid->extensions);
-
/*
 * Set the display info, using edid if available, otherwise resetting
 * the values to defaults. This duplicates the work done in
@@ -6246,17 +6219,18 @@ int drm_connector_update_edid_property(struct 
drm_connector *connector,
 * that it seems better to duplicate it rather than attempt to ensure
 * some arbitrary ordering of calls.
 */
-   if (edid)
-   drm_add_display_info(connector, edid);
+   if (drm_edid)
+   update_display_info(connector, drm_edid);
else
drm_reset_display_info(connector);
 
-   drm_update_tile_info(connector, edid);
+   _drm_update_tile_info(connector, drm_edid);
 
if (connector->edid_blob_ptr) {
-   old_edid = (const struct edid *)connector->edid_blob_ptr->data;
+   const struct edid *old_edid = connector->edid_blob_ptr->data;
+
if (old_edid) {
-   if (!drm_edid_are_equal(edid, old_edid)) {
+   if (!drm_edid_are_equal(drm_edid ? drm_edid->edid : 
NULL, old_edid)) {
DRM_DEBUG_KMS("[CONNECTOR:%d:%s] Edid was 
changed.\n",
  connector->base.id, 
connector->name);
 
@@ -6273,14 +6247,37 @@ int drm_connector_update_edid_property(struct 
drm_connector *connector,
 
ret = drm_property_replace_global_blob(dev,
   >edid_blob_ptr,
-  size,
-  edid,
+  drm_edid ? drm_edid->size : 0,
+  drm_edid ? drm_edid->edid : NULL,
   >base,
   dev->mode_config.edid_property);
if (ret)
return ret;
return drm_connector_set_tile_property(connector);
 }
+
+/**
+ * drm_connector_update_edid_property - update the edid property of a connector
+ * @connector: drm connector
+ * @edid: new value of the edid property
+ *
+ * This fun

[Intel-gfx] [CI RESEND 03/10] drm/edid: clean up connector update error handling and debug logging

2022-06-29 Thread Jani Nikula
Bail out on all errors, debug log all errors, and convert to drm device
based debug logging.

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_edid.c | 41 ++
 1 file changed, 28 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 62967db78139..e360e1a269f4 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -6231,29 +6231,44 @@ static int _drm_connector_update_edid_property(struct 
drm_connector *connector,
 
if (old_edid) {
if (!drm_edid_are_equal(drm_edid ? drm_edid->edid : 
NULL, old_edid)) {
-   DRM_DEBUG_KMS("[CONNECTOR:%d:%s] Edid was 
changed.\n",
- connector->base.id, 
connector->name);
-
-   connector->epoch_counter += 1;
-   DRM_DEBUG_KMS("Updating change counter to 
%llu\n",
- connector->epoch_counter);
+   connector->epoch_counter++;
+   drm_dbg_kms(dev, "[CONNECTOR:%d:%s] EDID 
changed, epoch counter %llu\n",
+   connector->base.id, connector->name,
+   connector->epoch_counter);
}
}
}
 
-   drm_object_property_set_value(>base,
- dev->mode_config.non_desktop_property,
- connector->display_info.non_desktop);
-
ret = drm_property_replace_global_blob(dev,
   >edid_blob_ptr,
   drm_edid ? drm_edid->size : 0,
   drm_edid ? drm_edid->edid : NULL,
   >base,
   dev->mode_config.edid_property);
-   if (ret)
-   return ret;
-   return drm_connector_set_tile_property(connector);
+   if (ret) {
+   drm_dbg_kms(dev, "[CONNECTOR:%d:%s] EDID property update failed 
(%d)\n",
+   connector->base.id, connector->name, ret);
+   goto out;
+   }
+
+   ret = drm_object_property_set_value(>base,
+   
dev->mode_config.non_desktop_property,
+   
connector->display_info.non_desktop);
+   if (ret) {
+   drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Non-desktop property update 
failed (%d)\n",
+   connector->base.id, connector->name, ret);
+   goto out;
+   }
+
+   ret = drm_connector_set_tile_property(connector);
+   if (ret) {
+   drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Tile property update failed 
(%d)\n",
+   connector->base.id, connector->name, ret);
+   goto out;
+   }
+
+out:
+   return ret;
 }
 
 /**
-- 
2.30.2



[Intel-gfx] [CI RESEND 01/10] drm/edid: move drm_connector_update_edid_property() to drm_edid.c

2022-06-29 Thread Jani Nikula
The function needs access to drm_edid.c internals more than
drm_connector.c. We can make drm_reset_display_info(),
drm_add_display_info() and drm_update_tile_info() static. There will be
more benefits with follow-up struct drm_edid refactoring.

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_connector.c | 74 -
 drivers/gpu/drm/drm_crtc_internal.h |  3 -
 drivers/gpu/drm/drm_edid.c  | 86 +++--
 3 files changed, 81 insertions(+), 82 deletions(-)

diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index c7ca435ceb95..7b1b61183747 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -2077,80 +2077,6 @@ int drm_connector_set_tile_property(struct drm_connector 
*connector)
 }
 EXPORT_SYMBOL(drm_connector_set_tile_property);
 
-/**
- * drm_connector_update_edid_property - update the edid property of a connector
- * @connector: drm connector
- * @edid: new value of the edid property
- *
- * This function creates a new blob modeset object and assigns its id to the
- * connector's edid property.
- * Since we also parse tile information from EDID's displayID block, we also
- * set the connector's tile property here. See 
drm_connector_set_tile_property()
- * for more details.
- *
- * Returns:
- * Zero on success, negative errno on failure.
- */
-int drm_connector_update_edid_property(struct drm_connector *connector,
-  const struct edid *edid)
-{
-   struct drm_device *dev = connector->dev;
-   size_t size = 0;
-   int ret;
-   const struct edid *old_edid;
-
-   /* ignore requests to set edid when overridden */
-   if (connector->override_edid)
-   return 0;
-
-   if (edid)
-   size = EDID_LENGTH * (1 + edid->extensions);
-
-   /* Set the display info, using edid if available, otherwise
-* resetting the values to defaults. This duplicates the work
-* done in drm_add_edid_modes, but that function is not
-* consistently called before this one in all drivers and the
-* computation is cheap enough that it seems better to
-* duplicate it rather than attempt to ensure some arbitrary
-* ordering of calls.
-*/
-   if (edid)
-   drm_add_display_info(connector, edid);
-   else
-   drm_reset_display_info(connector);
-
-   drm_update_tile_info(connector, edid);
-
-   if (connector->edid_blob_ptr) {
-   old_edid = (const struct edid *)connector->edid_blob_ptr->data;
-   if (old_edid) {
-   if (!drm_edid_are_equal(edid, old_edid)) {
-   DRM_DEBUG_KMS("[CONNECTOR:%d:%s] Edid was 
changed.\n",
- connector->base.id, 
connector->name);
-
-   connector->epoch_counter += 1;
-   DRM_DEBUG_KMS("Updating change counter to 
%llu\n",
- connector->epoch_counter);
-   }
-   }
-   }
-
-   drm_object_property_set_value(>base,
- dev->mode_config.non_desktop_property,
- connector->display_info.non_desktop);
-
-   ret = drm_property_replace_global_blob(dev,
-  >edid_blob_ptr,
-  size,
-  edid,
-  >base,
-  dev->mode_config.edid_property);
-   if (ret)
-   return ret;
-   return drm_connector_set_tile_property(connector);
-}
-EXPORT_SYMBOL(drm_connector_update_edid_property);
-
 /**
  * drm_connector_set_link_status_property - Set link status property of a 
connector
  * @connector: drm connector
diff --git a/drivers/gpu/drm/drm_crtc_internal.h 
b/drivers/gpu/drm/drm_crtc_internal.h
index 63279e984342..aecab5308bae 100644
--- a/drivers/gpu/drm/drm_crtc_internal.h
+++ b/drivers/gpu/drm/drm_crtc_internal.h
@@ -286,6 +286,3 @@ int drm_mode_page_flip_ioctl(struct drm_device *dev,
 
 /* drm_edid.c */
 void drm_mode_fixup_1366x768(struct drm_display_mode *mode);
-void drm_reset_display_info(struct drm_connector *connector);
-u32 drm_add_display_info(struct drm_connector *connector, const struct edid 
*edid);
-void drm_update_tile_info(struct drm_connector *connector, const struct edid 
*edid);
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 2bdaf1e34a9d..36bf7b0fe8d9 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5928,8 +5928,7 @@ static void drm_update_mso(struct drm_connector 
*connector,
 /* A connector has no EDID info

[Intel-gfx] [CI RESEND 00/10] drm/edid: expand on struct drm_edid usage

2022-06-29 Thread Jani Nikula
Resend of [1] for CI, also sending without the i915 changes, to be
merged on top.

BR,
Jani.

[1] https://patchwork.freedesktop.org/series/104309/


Jani Nikula (10):
  drm/edid: move drm_connector_update_edid_property() to drm_edid.c
  drm/edid: convert drm_connector_update_edid_property() to struct
drm_edid
  drm/edid: clean up connector update error handling and debug logging
  drm/edid: abstract debugfs override EDID set/reset
  drm/edid: add drm_edid_connector_update()
  drm/probe-helper: add drm_connector_helper_get_modes()
  drm/edid: add drm_edid_raw() to access the raw EDID data
  drm/edid: do invalid block filtering in-place
  drm/edid: add HF-EEODB support to EDID read and allocation
  drm/edid: take HF-EEODB extension count into account

 drivers/gpu/drm/drm_connector.c |  74 --
 drivers/gpu/drm/drm_crtc_internal.h |   5 +-
 drivers/gpu/drm/drm_debugfs.c   |  21 +-
 drivers/gpu/drm/drm_edid.c  | 376 
 drivers/gpu/drm/drm_probe_helper.c  |  34 +++
 include/drm/drm_connector.h |   6 +-
 include/drm/drm_edid.h  |   3 +
 include/drm/drm_probe_helper.h  |   1 +
 8 files changed, 381 insertions(+), 139 deletions(-)

-- 
2.30.2



Re: [Intel-gfx] [PATCH 01/16] drm/i915: use GRAPHICS_VER() instead of accessing match_info directly

2022-06-28 Thread Jani Nikula
On Thu, 23 Jun 2022, Ville Syrjälä  wrote:
> On Mon, Jun 20, 2022 at 11:37:40AM +0300, Jani Nikula wrote:
>> We've just set up device info in i915_driver_create() so we can use
>> GRAPHICS_VER() intead of looking at match_info directly.
>> 
>> Signed-off-by: Jani Nikula 
>> ---
>>  drivers/gpu/drm/i915/i915_driver.c | 4 +---
>>  1 file changed, 1 insertion(+), 3 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_driver.c 
>> b/drivers/gpu/drm/i915/i915_driver.c
>> index d26dcca7e654..aeec3dfe3ebf 100644
>> --- a/drivers/gpu/drm/i915/i915_driver.c
>> +++ b/drivers/gpu/drm/i915/i915_driver.c
>> @@ -829,8 +829,6 @@ i915_driver_create(struct pci_dev *pdev, const struct 
>> pci_device_id *ent)
>>   */
>>  int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
>>  {
>> -const struct intel_device_info *match_info =
>> -(struct intel_device_info *)ent->driver_data;
>>  struct drm_i915_private *i915;
>>  int ret;
>>  
>> @@ -839,7 +837,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct 
>> pci_device_id *ent)
>>  return PTR_ERR(i915);
>>  
>>  /* Disable nuclear pageflip by default on pre-ILK */
>> -if (!i915->params.nuclear_pageflip && match_info->graphics.ver < 5)
>> +if (!i915->params.nuclear_pageflip && GRAPHICS_VER(i915) < 5)
>
> Should also be switched to DISPLAY_VER(), but that could be done as a
> separate patch too.
>
> Reviewed-by: Ville Syrjälä 

Thanks, I've sent this separately with s/GRAPHICS_VER/DISPLAY_VER/.

BR,
Jani.


>
>>  i915->drm.driver_features &= ~DRIVER_ATOMIC;
>>  
>>  ret = pci_enable_device(pdev);
>> -- 
>> 2.30.2

-- 
Jani Nikula, Intel Open Source Graphics Center


[Intel-gfx] [PATCH v2] drm/i915: use DISPLAY_VER() instead of accessing match_info directly

2022-06-28 Thread Jani Nikula
We've just set up device info in i915_driver_create() so we can use
DISPLAY_VER() intead of looking at match_info directly.

Semantically we want to check the display version instead of the
graphics version, and for the earlier platforms they are always the
same.

v2: Use DISPLAY_VER() instead of GRAPHICS_VER() (Ville)

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/i915_driver.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_driver.c 
b/drivers/gpu/drm/i915/i915_driver.c
index 6e5849c1086f..b2e14cd76d7e 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -847,8 +847,6 @@ i915_driver_create(struct pci_dev *pdev, const struct 
pci_device_id *ent)
  */
 int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
-   const struct intel_device_info *match_info =
-   (struct intel_device_info *)ent->driver_data;
struct drm_i915_private *i915;
int ret;
 
@@ -857,7 +855,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct 
pci_device_id *ent)
return PTR_ERR(i915);
 
/* Disable nuclear pageflip by default on pre-ILK */
-   if (!i915->params.nuclear_pageflip && match_info->graphics.ver < 5)
+   if (!i915->params.nuclear_pageflip && DISPLAY_VER(i915) < 5)
i915->drm.driver_features &= ~DRIVER_ATOMIC;
 
ret = pci_enable_device(pdev);
-- 
2.30.2



Re: [Intel-gfx] [PATCH v2 9/9] drm/i915: Enable atomic by default on ctg/elk

2022-06-23 Thread Jani Nikula
On Wed, 22 Jun 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> The watermark code for ctg/elk has been atomic ready for a long time
> so let's just flip the switch now that some of the last CxSR issues
> have been sorted out (which granted was a problem for vlv/chv as well
> despite them already having atomic enabled by default).
>
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/i915_driver.c | 7 +--
>  1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c 
> b/drivers/gpu/drm/i915/i915_driver.c
> index 0e224761d0ed..d4e544d6b28f 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -841,8 +841,11 @@ int i915_driver_probe(struct pci_dev *pdev, const struct 
> pci_device_id *ent)
>   if (IS_ERR(i915))
>   return PTR_ERR(i915);
>  
> - /* Disable nuclear pageflip by default on pre-ILK */
> - if (!i915->params.nuclear_pageflip && match_info->graphics.ver < 5)
> + /* Disable nuclear pageflip by default on pre-CTG/ELK */
> + if (!i915->params.nuclear_pageflip &&
> + match_info->display.ver < 5 &&
> + match_info->platform != INTEL_G45 &&
> + match_info->platform != INTEL_GM45)

There's no reason to use match_info here, at all. See [1]. So this could
just be IS_G4X(i915).

BR,
Jani.


[1] 
https://lore.kernel.org/r/473e9c4d9c5a21d742b72dad27cca87402796abb.1655712106.git.jani.nik...@intel.com

>   i915->drm.driver_features &= ~DRIVER_ATOMIC;
>  
>   ret = pci_enable_device(pdev);

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH 0/9] drm/i915: Display info cleanup

2022-06-23 Thread Jani Nikula
On Thu, 23 Jun 2022, Jani Nikula  wrote:
> On Thu, 23 Jun 2022, Ville Syrjala  wrote:
>> From: Ville Syrjälä 
>>
>> Collect more stuff under INTEL_INFO->display, and clean up
>> some messy stuff in the related register macros.
>
> Makes me wonder if we should have DISPLAY_INFO(i915) macro that returns
> a pointer to the display sub-struct.
>
> Anyway, the series is
>
> Reviewed-by: Jani Nikula 

PS. Here's a somewhat related device info cleanup:

https://patchwork.freedesktop.org/series/105358/


>
>
>>
>> Ville Syrjälä (9):
>>   drm/i915: Move dbuf details to INTEL_INFO->display
>>   drm/i195: Move pipe_offsets[] & co. to INTEL_INFO->display
>>   drm/i915: Move display_mmio_offset under INTEL_INFO->display
>>   drm/i915: Make pipe_offsets[] & co. u32
>>   drm/i915: s/_CURSOR2/_MMIO_CURSOR2//
>>   drm/i915: Use _MMIO_TRANS2() where appropriate
>>   drm/i915: Use _MMIO_PIPE2() where appropriate
>>   drm/i915: Get rid of XE_LPD_CURSOR_OFFSETS
>>   drm/i915: Move the color stuff under INTEL_INFO->display
>>
>>  drivers/gpu/drm/i915/display/intel_color.c|  28 ++---
>>  drivers/gpu/drm/i915/display/intel_display.h  |   2 +-
>>  .../drm/i915/display/intel_display_power.c|   2 +-
>>  drivers/gpu/drm/i915/i915_pci.c   | 112 +-
>>  drivers/gpu/drm/i915/i915_reg.h   |  47 
>>  drivers/gpu/drm/i915/intel_device_info.h  |  39 +++---
>>  drivers/gpu/drm/i915/intel_pm.c   |   8 +-
>>  7 files changed, 117 insertions(+), 121 deletions(-)

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH 0/9] drm/i915: Display info cleanup

2022-06-23 Thread Jani Nikula
On Thu, 23 Jun 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Collect more stuff under INTEL_INFO->display, and clean up
> some messy stuff in the related register macros.

Makes me wonder if we should have DISPLAY_INFO(i915) macro that returns
a pointer to the display sub-struct.

Anyway, the series is

Reviewed-by: Jani Nikula 


>
> Ville Syrjälä (9):
>   drm/i915: Move dbuf details to INTEL_INFO->display
>   drm/i195: Move pipe_offsets[] & co. to INTEL_INFO->display
>   drm/i915: Move display_mmio_offset under INTEL_INFO->display
>   drm/i915: Make pipe_offsets[] & co. u32
>   drm/i915: s/_CURSOR2/_MMIO_CURSOR2//
>   drm/i915: Use _MMIO_TRANS2() where appropriate
>   drm/i915: Use _MMIO_PIPE2() where appropriate
>   drm/i915: Get rid of XE_LPD_CURSOR_OFFSETS
>   drm/i915: Move the color stuff under INTEL_INFO->display
>
>  drivers/gpu/drm/i915/display/intel_color.c|  28 ++---
>  drivers/gpu/drm/i915/display/intel_display.h  |   2 +-
>  .../drm/i915/display/intel_display_power.c|   2 +-
>  drivers/gpu/drm/i915/i915_pci.c   | 112 +-
>  drivers/gpu/drm/i915/i915_reg.h   |  47 
>  drivers/gpu/drm/i915/intel_device_info.h  |  39 +++---
>  drivers/gpu/drm/i915/intel_pm.c   |   8 +-
>  7 files changed, 117 insertions(+), 121 deletions(-)

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH 04/11] drm/i915: Added is_intel_rpm_allowed helper

2022-06-23 Thread Jani Nikula
On Thu, 23 Jun 2022, "Tangudu, Tilak"  wrote:
>> -Original Message-
>> From: Vivi, Rodrigo 
>> Sent: Thursday, June 23, 2022 2:11 AM
>> To: Jani Nikula 
>> Cc: Tangudu, Tilak ; Gupta, Anshuman
>> ; intel-gfx@lists.freedesktop.org; Ewins, Jon
>> ; Belgaumkar, Vinay ;
>> Wilson, Chris P ; Dixit, Ashutosh
>> ; Nilawar, Badal ;
>> Roper, Matthew D ; Gupta, saurabhg
>> ; Iddamsetty, Aravind
>> ; Sundaresan, Sujaritha
>> ; Deak, Imre 
>> Subject: Re: [Intel-gfx] [PATCH 04/11] drm/i915: Added is_intel_rpm_allowed
>> helper
>> 
>> On Wed, Jun 22, 2022 at 03:55:03PM +0300, Jani Nikula wrote:
>> > On Tue, 21 Jun 2022, "Tangudu, Tilak"  wrote:
>> > >> -Original Message-
>> > >> From: Gupta, Anshuman 
>> > >> Sent: Tuesday, June 21, 2022 7:47 PM
>> > >> To: Tangudu, Tilak ;
>> > >> intel-gfx@lists.freedesktop.org; Ewins, Jon ;
>> > >> Vivi, Rodrigo ; Belgaumkar, Vinay
>> > >> ; Wilson, Chris P
>> > >> ; Dixit, Ashutosh
>> > >> ; Nilawar, Badal
>> > >> ; Roper, Matthew D
>> > >> ; Gupta, saurabhg
>> > >> ; Iddamsetty, Aravind
>> > >> ; Sundaresan, Sujaritha
>> > >> 
>> > >> Subject: RE: [PATCH 04/11] drm/i915: Added is_intel_rpm_allowed
>> > >> helper
>> > >>
>> > >>
>> > >>
>> > >> > -Original Message-
>> > >> > From: Tangudu, Tilak 
>> > >> > Sent: Tuesday, June 21, 2022 6:05 PM
>> > >> > To: intel-gfx@lists.freedesktop.org; Ewins, Jon
>> > >> > ; Vivi, Rodrigo ;
>> > >> > Belgaumkar, Vinay ; Wilson, Chris P
>> > >> > ; Dixit, Ashutosh
>> > >> > ; Nilawar, Badal
>> > >> > ; Gupta, Anshuman
>> > >> > ; Tangudu, Tilak
>> > >> > ; Roper, Matthew D
>> > >> > ; Gupta, saurabhg
>> > >> > ; Iddamsetty, Aravind
>> > >> > ; Sundaresan, Sujaritha
>> > >> > 
>> > >> > Subject: [PATCH 04/11] drm/i915: Added is_intel_rpm_allowed
>> > >> > helper
>> > >> >
>> > >> > Added is_intel_rpm_allowed function to query the runtime_pm
>> > >> > status and disllow during suspending and resuming.
>> > >> This seems a hack,
>> > >> Not sure if we have better way to handle it.
>> > >> May be check this in intel_pm_runtime_{get,put} to keep entire code
>> simple ?
>> > > Yes, that would be simple without code refactoring.
>> > > Checked the same with Chris, he suggested unbalancing of wakeref
>> > > might popup If used at intel_pm_runtime_{get,put}  . So used like
>> > > this,  @Wilson, Chris P , Please comment .
>> > > @Vivi, Rodrigo , Any suggestion ?
>> >
>> > One option would be to track this in intel_wakeref_t, i.e. _get flags
>> > the case in the returned wakeref and _put skips in that case.
>
> @Jani Nikula 
>
> I did not understand the suggestion, Can you please elaborate ?
> Did you mean below or something more ? please help clarify.

The code below will lead to get/put inbalance if is_intel_rpm_allowed()
status changes between the get/put calls. I don't know how likely that
is, but if it happens it's nasty.

intel_wakeref_t is depot_stack_handle_t, which is actually just u32. We
already abuse -1 value to not track wakeref (when
CONFIG_DRM_I915_DEBUG_RUNTIME_PM=n or track_intel_runtime_pm_wakeref()
fails.

It's a bit of a hack, but we could have __intel_runtime_pm_get() early
return -2 as the wakeref when !is_intel_rpm_allowed(), and
intel_runtime_pm_put() (both versions for both kconfig option values!)
ignore the put when the passed in wakeref == -2.

This requires no changes in the calling code anywhere, even though the
implementation is a hack. A pedantically correct implementation would
turn intel_wakeref_t into a struct that wraps depot_stack_handle_t
inside, and has a separate field for validity, but that probably has a
non-trivial code size penalty.


BR,
Jani.


>
> 8< --
> linux-desk:~/Code/drm-tip$ git diff
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
> b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 3759a8596084..ce272c569a89 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -369,12 +369,16 @@ static intel_wakeref_t __intel_runtime_pm_get(struct 
> intel_

Re: [Intel-gfx] [PATCH] drm/i915/bios: debug log ddi port info after parsing

2022-06-23 Thread Jani Nikula
On Thu, 23 Jun 2022, Ville Syrjälä  wrote:
> On Tue, Jun 21, 2022 at 03:37:32PM +0300, Jani Nikula wrote:
>> The ddc pin and aux channel sanitization may disable DVI/HDMI and DP,
>> respectively, of ports parsed earlier, in "last one wins" fashion. With
>> parsing and printing interleaved, we'll end up logging support first and
>> disabling later anyway.
>> 
>> Now that we've split ddi port info parsing and printing, take it further
>> by doing the printing in a separate loop, fixing the logging.
>> 
>> Cc: Ville Syrjälä 
>> Signed-off-by: Jani Nikula 
>
> Reviewed-by: Ville Syrjälä 

Just realized this also changes the printing order from VBT child device
order to port number order. Is that a bug or a feature?

BR,
Jani.

>
>> ---
>>  drivers/gpu/drm/i915/display/intel_bios.c | 8 ++--
>>  1 file changed, 6 insertions(+), 2 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
>> b/drivers/gpu/drm/i915/display/intel_bios.c
>> index ab23324c0402..51dde5bfd956 100644
>> --- a/drivers/gpu/drm/i915/display/intel_bios.c
>> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
>> @@ -2670,8 +2670,6 @@ static void parse_ddi_port(struct 
>> intel_bios_encoder_data *devdata)
>>  
>>  sanitize_device_type(devdata, port);
>>  
>> -print_ddi_port(devdata, port);
>> -
>>  if (intel_bios_encoder_supports_dvi(devdata))
>>  sanitize_ddc_pin(devdata, port);
>>  
>> @@ -2689,12 +2687,18 @@ static bool has_ddi_port_info(struct 
>> drm_i915_private *i915)
>>  static void parse_ddi_ports(struct drm_i915_private *i915)
>>  {
>>  struct intel_bios_encoder_data *devdata;
>> +enum port port;
>>  
>>  if (!has_ddi_port_info(i915))
>>  return;
>>  
>>  list_for_each_entry(devdata, >vbt.display_devices, node)
>>  parse_ddi_port(devdata);
>> +
>> +for_each_port(port) {
>> +if (i915->vbt.ports[port])
>> +print_ddi_port(i915->vbt.ports[port], port);
>> +}
>>  }
>>  
>>  static void
>> -- 
>> 2.30.2

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH] GPU: drm: i915: drop unexpected word 'for' in comments

2022-06-23 Thread Jani Nikula
On Thu, 23 Jun 2022, Jiang Jian  wrote:
> there is an unexpected word 'for' in the comments that need to be dropped

While it's also unexpected, it's really *duplicated* word.

> file - drivers/gpu/drm/i915/i915_reg.h
> line - 2537
>
>  * Please check the detailed lore in the commit message for for experimental
>
> changed to:
>
>  * Please check the detailed lore in the commit message for experimental
>

The above is just duplication of the patch itself, and completely
unnecessary.

The patch subject prefix should be something like "drm/i915:" or
"drm/i915/reg:".

Pro-tip for figuring out good guesses of what the subject prefix should
be:

$ git log --since={5-year} --no-merges --pretty=format:%s -- 
drivers/gpu/drm/i915/i915_reg.h | sed 's/:.*//' | sort | uniq -c | sort -rn | 
head
312 drm/i915
113 drm/i915/icl
 57 drm/i915/tgl
 26 drm/i915/cnl
 25 drm/i915/display
 22 drm/i915/dg2
 16 drm/i915/psr
 14 drm/i915/gt
 14 drm/i915/adl_p
 12 drm/i915/dg1

The patch itself is fine, but I'm nitpicking on the commit message
because I've seen lots of patches like this, with the same kind of stuff
in the commit messages.

BR,
Jani.


> Signed-off-by: Jiang Jian 
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 616164fa2e32..738c020396af 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2534,7 +2534,7 @@
>   * HDMI/DP bits are g4x+
>   *
>   * WARNING: Bspec for hpd status bits on gen4 seems to be completely 
> confused.
> - * Please check the detailed lore in the commit message for for experimental
> + * Please check the detailed lore in the commit message for experimental
>   * evidence.
>   */
>  /* Bspec says GM45 should match G4X/VLV/CHV, but reality disagrees */

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PULL] drm-misc-next

2022-06-23 Thread Jani Nikula
On Thu, 23 Jun 2022, Thomas Zimmermann  wrote:
> Hi
>
> Am 23.06.22 um 10:26 schrieb Jani Nikula:
>> On Thu, 23 Jun 2022, Thomas Zimmermann  wrote:
>>> I forgot to mention that we backmerged v5.19-rc2. That's why the list of
>>> changed files is so long.
>> 
>> I thought we should only backmerge Linus' tree via backmerging drm-next,
>> which avoids this problem altogether.
>
> I did backmerge via drm-next.

Then I'm confused how it all shows up the the diffstat. If you backmerge
drm-next to drm-misc-next, and then generate your drm-misc-next pull
request against drm-next (dim pull-request drm-misc-next drm/drm-next),
I don't think it should show up.

BR,
Jani.


>
> Best regards
> Thomas
>
>> 
>> BR,
>> Jani.
>> 
>> 

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PULL] drm-misc-next

2022-06-23 Thread Jani Nikula
On Thu, 23 Jun 2022, Thomas Zimmermann  wrote:
> I forgot to mention that we backmerged v5.19-rc2. That's why the list of 
> changed files is so long.

I thought we should only backmerge Linus' tree via backmerging drm-next,
which avoids this problem altogether.

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH v3 08/13] drm/i915/edid: convert DP, HDMI and LVDS to drm_edid

2022-06-23 Thread Jani Nikula
On Wed, 22 Jun 2022, Ville Syrjälä  wrote:
> On Wed, Jun 22, 2022 at 01:59:22PM +0300, Jani Nikula wrote:
>> @@ -948,27 +948,30 @@ void intel_lvds_init(struct drm_i915_private *dev_priv)
>>   * preferred mode is the right one.
>>   */
>>  mutex_lock(>mode_config.mutex);
>> -if (vga_switcheroo_handler_flags() & VGA_SWITCHEROO_CAN_SWITCH_DDC)
>> +if (vga_switcheroo_handler_flags() & VGA_SWITCHEROO_CAN_SWITCH_DDC) {
>> +const struct edid *edid;
>> +
>> +/* FIXME: Make drm_get_edid_switcheroo() return drm_edid */
>>  edid = drm_get_edid_switcheroo(connector,
>> -intel_gmbus_get_adapter(dev_priv, pin));
>> -else
>> -edid = drm_get_edid(connector,
>> -intel_gmbus_get_adapter(dev_priv, pin));
>> -if (edid) {
>> -if (drm_add_edid_modes(connector, edid)) {
>> -drm_connector_update_edid_property(connector,
>> -edid);
>> -} else {
>> -kfree(edid);
>> -edid = ERR_PTR(-EINVAL);
>> +   
>> intel_gmbus_get_adapter(dev_priv, pin));
>> +if (edid)
>> +drm_edid = drm_edid_alloc(edid, (edid->extensions + 1) 
>> * EDID_LENGTH);
>
> This one still seems to leak.

Damn, only fixed the DP one. Thanks! New patch in-reply.

BR,
Jani.


>
>> +} else {
>> +drm_edid = drm_edid_read_ddc(connector,
>> + intel_gmbus_get_adapter(dev_priv, 
>> pin));
>> +}
>> +if (drm_edid) {
>> +if (!drm_edid_connector_update(connector, drm_edid)) {
>> +drm_edid_free(drm_edid);
>> +drm_edid = ERR_PTR(-EINVAL);
>>  }
>>  } else {
>> -edid = ERR_PTR(-ENOENT);
>> +drm_edid = ERR_PTR(-ENOENT);
>>  }
>> -intel_connector->edid = edid;
>> +intel_connector->edid = drm_edid;
>>  
>>  intel_bios_init_panel(dev_priv, _connector->panel, NULL,
>> -  IS_ERR(edid) ? NULL : edid);
>> +  IS_ERR_OR_NULL(drm_edid) ? NULL : 
>> drm_edid_raw(drm_edid));
>>  
>>  /* Try EDID first */
>>  intel_panel_add_edid_fixed_modes(intel_connector,
>> -- 
>> 2.30.2

-- 
Jani Nikula, Intel Open Source Graphics Center


[Intel-gfx] [PATCH] drm/i915/edid: convert DP, HDMI and LVDS to drm_edid

2022-06-23 Thread Jani Nikula
Convert all the connectors that use cached connector edid and
detect_edid to drm_edid.

v3: Don't leak vga switcheroo EDID in LVDS init (Ville)

v2: Don't leak opregion fallback EDID (Ville)

Signed-off-by: Jani Nikula 
---
 .../gpu/drm/i915/display/intel_connector.c|  4 +-
 .../drm/i915/display/intel_display_types.h|  4 +-
 drivers/gpu/drm/i915/display/intel_dp.c   | 77 +++
 drivers/gpu/drm/i915/display/intel_hdmi.c | 26 ---
 drivers/gpu/drm/i915/display/intel_lvds.c | 37 +
 5 files changed, 82 insertions(+), 66 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_connector.c 
b/drivers/gpu/drm/i915/display/intel_connector.c
index 1dcc268927a2..d83b2a64f618 100644
--- a/drivers/gpu/drm/i915/display/intel_connector.c
+++ b/drivers/gpu/drm/i915/display/intel_connector.c
@@ -95,12 +95,12 @@ void intel_connector_destroy(struct drm_connector 
*connector)
 {
struct intel_connector *intel_connector = to_intel_connector(connector);
 
-   kfree(intel_connector->detect_edid);
+   drm_edid_free(intel_connector->detect_edid);
 
intel_hdcp_cleanup(intel_connector);
 
if (!IS_ERR_OR_NULL(intel_connector->edid))
-   kfree(intel_connector->edid);
+   drm_edid_free(intel_connector->edid);
 
intel_panel_fini(intel_connector);
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 0da9b208d56e..d476df0ac9df 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -592,8 +592,8 @@ struct intel_connector {
struct intel_panel panel;
 
/* Cached EDID for eDP and LVDS. May hold ERR_PTR for invalid EDID. */
-   struct edid *edid;
-   struct edid *detect_edid;
+   const struct drm_edid *edid;
+   const struct drm_edid *detect_edid;
 
/* Number of times hotplug detection was tried after an HPD interrupt */
int hotplug_retries;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 32292c0be2bd..4ee35317cf2a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3577,12 +3577,11 @@ static u8 intel_dp_autotest_edid(struct intel_dp 
*intel_dp)
intel_dp->aux.i2c_defer_count);
intel_dp->compliance.test_data.edid = 
INTEL_DP_RESOLUTION_FAILSAFE;
} else {
-   struct edid *block = intel_connector->detect_edid;
+   /* FIXME: Get rid of drm_edid_raw() */
+   const struct edid *block = 
drm_edid_raw(intel_connector->detect_edid);
 
-   /* We have to write the checksum
-* of the last block read
-*/
-   block += intel_connector->detect_edid->extensions;
+   /* We have to write the checksum of the last block read */
+   block += block->extensions;
 
if (drm_dp_dpcd_writeb(_dp->aux, DP_TEST_EDID_CHECKSUM,
   block->checksum) <= 0)
@@ -4461,7 +4460,7 @@ bool intel_digital_port_connected(struct intel_encoder 
*encoder)
return is_connected;
 }
 
-static struct edid *
+static const struct drm_edid *
 intel_dp_get_edid(struct intel_dp *intel_dp)
 {
struct intel_connector *intel_connector = intel_dp->attached_connector;
@@ -4472,18 +4471,22 @@ intel_dp_get_edid(struct intel_dp *intel_dp)
if (IS_ERR(intel_connector->edid))
return NULL;
 
-   return drm_edid_duplicate(intel_connector->edid);
+   return drm_edid_dup(intel_connector->edid);
} else
-   return drm_get_edid(_connector->base,
-   _dp->aux.ddc);
+   return drm_edid_read_ddc(_connector->base,
+_dp->aux.ddc);
 }
 
 static void
 intel_dp_update_dfp(struct intel_dp *intel_dp,
-   const struct edid *edid)
+   const struct drm_edid *drm_edid)
 {
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
struct intel_connector *connector = intel_dp->attached_connector;
+   const struct edid *edid;
+
+   /* FIXME: Get rid of drm_edid_raw() */
+   edid = drm_edid_raw(drm_edid);
 
intel_dp->dfp.max_bpc =
drm_dp_downstream_max_bpc(intel_dp->dpcd,
@@ -4583,21 +4586,24 @@ intel_dp_set_edid(struct intel_dp *intel_dp)
 {
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
struct intel_connector *connector = intel_dp->attached_connector;
-   struct edid *edid;
+   const struct drm_edid *drm_edid;
+   const struct edid *edid;
bool vrr_capable;
 
intel_dp_unset_edid(intel_dp);
-   edid = int

Re: [Intel-gfx] [PATCH 04/11] drm/i915: Added is_intel_rpm_allowed helper

2022-06-22 Thread Jani Nikula
On Tue, 21 Jun 2022, "Tangudu, Tilak"  wrote:
>> -Original Message-
>> From: Gupta, Anshuman 
>> Sent: Tuesday, June 21, 2022 7:47 PM
>> To: Tangudu, Tilak ; 
>> intel-gfx@lists.freedesktop.org;
>> Ewins, Jon ; Vivi, Rodrigo ;
>> Belgaumkar, Vinay ; Wilson, Chris P
>> ; Dixit, Ashutosh ;
>> Nilawar, Badal ; Roper, Matthew D
>> ; Gupta, saurabhg
>> ; Iddamsetty, Aravind
>> ; Sundaresan, Sujaritha
>> 
>> Subject: RE: [PATCH 04/11] drm/i915: Added is_intel_rpm_allowed helper
>> 
>> 
>> 
>> > -Original Message-
>> > From: Tangudu, Tilak 
>> > Sent: Tuesday, June 21, 2022 6:05 PM
>> > To: intel-gfx@lists.freedesktop.org; Ewins, Jon ;
>> > Vivi, Rodrigo ; Belgaumkar, Vinay
>> > ; Wilson, Chris P
>> > ; Dixit, Ashutosh
>> > ; Nilawar, Badal ;
>> > Gupta, Anshuman ; Tangudu, Tilak
>> > ; Roper, Matthew D
>> > ; Gupta, saurabhg
>> > ; Iddamsetty, Aravind
>> > ; Sundaresan, Sujaritha
>> > 
>> > Subject: [PATCH 04/11] drm/i915: Added is_intel_rpm_allowed helper
>> >
>> > Added is_intel_rpm_allowed function to query the runtime_pm status and
>> > disllow during suspending and resuming.
>> This seems a hack,
>> Not sure if we have better way to handle it.
>> May be check this in intel_pm_runtime_{get,put} to keep entire code simple ?
> Yes, that would be simple without code refactoring.
> Checked the same with Chris, he suggested unbalancing of wakeref might popup
> If used at intel_pm_runtime_{get,put}  . So used like this,
>  @Wilson, Chris P , Please comment .
> @Vivi, Rodrigo , Any suggestion ?

One option would be to track this in intel_wakeref_t, i.e. _get flags
the case in the returned wakeref and _put skips in that case.

BR,
Jani.


>  
>> >
>> > Signed-off-by: Tilak Tangudu 
>> > ---
>> >  drivers/gpu/drm/i915/intel_runtime_pm.c | 15 +++
>> > drivers/gpu/drm/i915/intel_runtime_pm.h |  1 +
>> >  2 files changed, 16 insertions(+)
>> >
>> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
>> > b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> > index 6ed5786bcd29..3759a8596084 100644
>> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
>> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> > @@ -320,6 +320,21 @@ untrack_all_intel_runtime_pm_wakerefs(struct
>> > intel_runtime_pm *rpm)  }
>> >
>> >  #endif
>> > +static int intel_runtime_pm_status(struct intel_runtime_pm *rpm) {
>> > +return rpm->kdev->power.runtime_status; }
>> This is racy in principal, we need a kdev->power lock here.
>> Regards,
>> Anshuman Gupta.
>> > +
>> > +bool is_intel_rpm_allowed(struct intel_runtime_pm *rpm) { int
>> > +rpm_status;
>> > +
>> > +rpm_status = intel_runtime_pm_status(rpm); if (rpm_status ==
>> > +RPM_RESUMING || rpm_status ==
>> > RPM_SUSPENDING)
>> > +return false;
>> > +else
>> > +return true;
>> > +}
>> >
>> >  static void
>> >  intel_runtime_pm_acquire(struct intel_runtime_pm *rpm, bool wakelock)
>> > diff -- git a/drivers/gpu/drm/i915/intel_runtime_pm.h
>> > b/drivers/gpu/drm/i915/intel_runtime_pm.h
>> > index d9160e3ff4af..99418c3a934a 100644
>> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.h
>> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.h
>> > @@ -173,6 +173,7 @@ void intel_runtime_pm_init_early(struct
>> > intel_runtime_pm *rpm);  void intel_runtime_pm_enable(struct
>> > intel_runtime_pm *rpm);  void intel_runtime_pm_disable(struct
>> > intel_runtime_pm *rpm);  void intel_runtime_pm_driver_release(struct
>> > intel_runtime_pm *rpm);
>> > +bool is_intel_rpm_allowed(struct intel_runtime_pm *rpm);
>> >
>> >  intel_wakeref_t intel_runtime_pm_get(struct intel_runtime_pm *rpm);
>> > intel_wakeref_t intel_runtime_pm_get_if_in_use(struct intel_runtime_pm
>> > *rpm);
>> > --
>> > 2.25.1
>> 
>

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH 05/11] drm/i915: Guard rpm helpers in gt helpers functions

2022-06-22 Thread Jani Nikula
On Tue, 21 Jun 2022, Tilak Tangudu  wrote:
> Guard rpm helpers in gt_sanitize and intel_gt_set_wedged
> with is_intel_rpm_allowed
>
> Acquire rpm wakeref for higherlevel function i915_gem_resume
>
> Signed-off-by: Tilak Tangudu 
> ---
>  drivers/gpu/drm/i915/gt/intel_gt_pm.c | 12 ++--
>  drivers/gpu/drm/i915/gt/intel_reset.c | 10 +++---
>  drivers/gpu/drm/i915/i915_driver.c|  4 +++-
>  3 files changed, 16 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c 
> b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> index be99b01a0984..9857b91194b7 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> @@ -163,12 +163,14 @@ static void gt_sanitize(struct intel_gt *gt, bool force)
>  {
>   struct intel_engine_cs *engine;
>   enum intel_engine_id id;
> - intel_wakeref_t wakeref;
> + intel_wakeref_t wakeref = 0;

We've got intel_wakeref_t to hide what it actually is. You shouldn't
assume you can assign 0 to it or use wakeref in an if condition. You
should treat it as opaque. You should assume the typedef could be
switched to a struct and you shouldn't have to change the code using it.

BR,
Jani.

>  
>   GT_TRACE(gt, "force:%s", str_yes_no(force));
>  
>   /* Use a raw wakeref to avoid calling intel_display_power_get early */
> - wakeref = intel_runtime_pm_get(gt->uncore->rpm);
> + if (is_intel_rpm_allowed(gt->uncore->rpm))
> + wakeref = intel_runtime_pm_get(gt->uncore->rpm);
> +
>   intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL);
>  
>   intel_gt_check_clock_frequency(gt);
> @@ -207,7 +209,8 @@ static void gt_sanitize(struct intel_gt *gt, bool force)
>   intel_rps_sanitize(>rps);
>  
>   intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL);
> - intel_runtime_pm_put(gt->uncore->rpm, wakeref);
> + if (wakeref)
> + intel_runtime_pm_put(gt->uncore->rpm, wakeref);
>  }
>  
>  void intel_gt_pm_fini(struct intel_gt *gt)
> @@ -226,7 +229,6 @@ int intel_gt_resume(struct intel_gt *gt)
>   return err;
>  
>   GT_TRACE(gt, "\n");
> -
>   /*
>* After resume, we may need to poke into the pinned kernel
>* contexts to paper over any damage caused by the sudden suspend.
> @@ -259,10 +261,8 @@ int intel_gt_resume(struct intel_gt *gt)
>  
>   for_each_engine(engine, gt, id) {
>   intel_engine_pm_get(engine);
> -
>   engine->serial++; /* kernel context lost */
>   err = intel_engine_resume(engine);
> -
>   intel_engine_pm_put(engine);
>   if (err) {
>   drm_err(>i915->drm,
> diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c 
> b/drivers/gpu/drm/i915/gt/intel_reset.c
> index c8e05b48c14f..55a1fd38c7c4 100644
> --- a/drivers/gpu/drm/i915/gt/intel_reset.c
> +++ b/drivers/gpu/drm/i915/gt/intel_reset.c
> @@ -901,12 +901,14 @@ static void __intel_gt_set_wedged(struct intel_gt *gt)
>  
>  void intel_gt_set_wedged(struct intel_gt *gt)
>  {
> - intel_wakeref_t wakeref;
> + intel_wakeref_t wakeref = 0;
>  
>   if (test_bit(I915_WEDGED, >reset.flags))
>   return;
>  
> - wakeref = intel_runtime_pm_get(gt->uncore->rpm);
> + if (is_intel_rpm_allowed(gt->uncore->rpm))
> + wakeref = intel_runtime_pm_get(gt->uncore->rpm);
> +
>   mutex_lock(>reset.mutex);
>  
>   if (GEM_SHOW_DEBUG()) {
> @@ -926,7 +928,9 @@ void intel_gt_set_wedged(struct intel_gt *gt)
>   __intel_gt_set_wedged(gt);
>  
>   mutex_unlock(>reset.mutex);
> - intel_runtime_pm_put(gt->uncore->rpm, wakeref);
> +
> + if (wakeref)
> + intel_runtime_pm_put(gt->uncore->rpm, wakeref);
>  }
>  
>  static bool __intel_gt_unset_wedged(struct intel_gt *gt)
> diff --git a/drivers/gpu/drm/i915/i915_driver.c 
> b/drivers/gpu/drm/i915/i915_driver.c
> index d26dcca7e654..60f6fcc6b71d 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -1263,6 +1263,7 @@ int i915_driver_suspend_switcheroo(struct 
> drm_i915_private *i915,
>  static int i915_drm_resume(struct drm_device *dev)
>  {
>   struct drm_i915_private *dev_priv = to_i915(dev);
> + intel_wakeref_t wakeref;
>   int ret;
>  
>   disable_rpm_wakeref_asserts(_priv->runtime_pm);
> @@ -1303,7 +1304,8 @@ static int i915_drm_resume(struct drm_device *dev)
>   if (HAS_DISPLAY(dev_priv))
>   drm_mode_config_reset(dev);
>  
> - i915_gem_resume(dev_priv);
> + with_intel_runtime_pm(_priv->runtime_pm, wakeref)
> + i915_gem_resume(dev_priv);
>  
>   intel_modeset_init_hw(dev_priv);
>   intel_init_clock_gating(dev_priv);

-- 
Jani Nikula, Intel Open Source Graphics Center


[Intel-gfx] [PULL] drm-intel-fixes

2022-06-22 Thread Jani Nikula


Hi Dave & Daniel -

drm-intel-fixes-2022-06-22:
drm/i915 fixes for v5.19-rc4:
- Revert low voltage SKU check removal to fix display issues
- Apply PLL DCO fraction workaround for ADL-S
- Don't show engine classes not present in client fdinfo

BR,
Jani.

The following changes since commit a111daf0c53ae91e71fd2bfe7497862d14132e3e:

  Linux 5.19-rc3 (2022-06-19 15:06:47 -0500)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-fixes-2022-06-22

for you to fetch changes up to c7b28f52f406bc89d15ca0ccbc47994f979f2fcd:

  drm/i915/display: Re-add check for low voltage sku for max dp source rate 
(2022-06-20 19:39:00 +0300)


drm/i915 fixes for v5.19-rc4:
- Revert low voltage SKU check removal to fix display issues
- Apply PLL DCO fraction workaround for ADL-S
- Don't show engine classes not present in client fdinfo


Jason A. Donenfeld (1):
  drm/i915/display: Re-add check for low voltage sku for max dp source rate

Tvrtko Ursulin (1):
  drm/i915/fdinfo: Don't show engine classes not present

Ville Syrjälä (1):
  drm/i915: Implement w/a 22010492432 for adl-s

 drivers/gpu/drm/i915/display/intel_dp.c   | 32 ---
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c |  4 ++--
 drivers/gpu/drm/i915/i915_drm_client.c|  5 +++--
 3 files changed, 34 insertions(+), 7 deletions(-)

-- 
Jani Nikula, Intel Open Source Graphics Center


[Intel-gfx] [PATCH v3 13/13] drm/todo: add entry for converting the subsystem to struct drm_edid

2022-06-22 Thread Jani Nikula
We need to stop duplicating EDID validation and parsing all over the
subsystem in various broken ways.

v2: Update to reflect drm_connector_helper_get_modes()

Cc: David Airlie 
Cc: Daniel Vetter 
Signed-off-by: Jani Nikula 
---
 Documentation/gpu/todo.rst | 25 +
 1 file changed, 25 insertions(+)

diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst
index 513b20ccef1e..04ef31e3405f 100644
--- a/Documentation/gpu/todo.rst
+++ b/Documentation/gpu/todo.rst
@@ -480,6 +480,31 @@ Contact: Thomas Zimmermann 
 
 Level: Starter
 
+Convert core and drivers from struct edid to struct drm_edid
+
+
+Go through all drivers and drm core KMS code to convert all raw struct edid
+usage to the opaque struct drm_edid. See commit e4ccf9a777d3 ("drm/edid: add
+struct drm_edid container") for rationale.
+
+Convert drm_get_edid() and drm_do_get_edid() usage to drm_edid_read(),
+drm_edid_read_ddc(), or drm_edid_read_custom().
+
+Convert drm_add_edid_modes() and drm_connector_update_edid_property() to
+drm_edid_connector_update(). See drm_connector_helper_get_modes() for reference
+for converting the ->get_modes() hooks.
+
+Convert decentralized, direct struct edid parsing to centralized parsing in
+drm_edid.c. Prefer one-time parsing as part of drm_edid_connector_update() and
+storing the result in drm_connector->display_info over adding individual,
+exported parser functions.
+
+During the transition period, it may be necessary to use drm_edid_raw(), but do
+use it sparingly. Eventually, all of them need to go.
+
+Contact: Jani Nikula 
+
+Level: Intermediate
 
 Core refactorings
 =
-- 
2.30.2



[Intel-gfx] [PATCH v3 12/13] drm/edid: take HF-EEODB extension count into account

2022-06-22 Thread Jani Nikula
Take the HF-EEODB extension count override into account.

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_edid.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index fa3a3e294560..bbc25e3b7220 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -1629,6 +1629,19 @@ static int drm_edid_block_count(const struct drm_edid 
*drm_edid)
/* Starting point */
num_blocks = edid_block_count(drm_edid->edid);
 
+   /* HF-EEODB override */
+   if (drm_edid->size >= edid_size_by_blocks(2)) {
+   int eeodb;
+
+   /*
+* Note: HF-EEODB may specify a smaller extension count than the
+* regular one. Unlike in buffer allocation, here we can use it.
+*/
+   eeodb = edid_hfeeodb_block_count(drm_edid->edid);
+   if (eeodb)
+   num_blocks = eeodb;
+   }
+
/* Limit by allocated size */
num_blocks = min(num_blocks, (int)drm_edid->size / EDID_LENGTH);
 
-- 
2.30.2



[Intel-gfx] [PATCH v3 11/13] drm/edid: add HF-EEODB support to EDID read and allocation

2022-06-22 Thread Jani Nikula
HDMI 2.1 section 10.3.6 defines an HDMI Forum EDID Extension Override
Data Block, which may contain a different extension count than the base
block claims. Add support for reading more EDID data if available. The
extra blocks aren't parsed yet, though.

Hard-coding the EEODB parsing instead of using the iterators we have is
a bit of a bummer, but we have to be able to do this on a partially
allocated EDID while reading it.

v2:
- Check for CEA Data Block Collection size (Ville)
- Amend commit message and comment about hard-coded parsing

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_edid.c | 89 --
 1 file changed, 86 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index a80ea0aa7b32..fa3a3e294560 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -1581,6 +1581,15 @@ static bool version_greater(const struct drm_edid 
*drm_edid,
(edid->version == version && edid->revision > revision);
 }
 
+static int edid_hfeeodb_extension_block_count(const struct edid *edid);
+
+static int edid_hfeeodb_block_count(const struct edid *edid)
+{
+   int eeodb = edid_hfeeodb_extension_block_count(edid);
+
+   return eeodb ? eeodb + 1 : 0;
+}
+
 static int edid_extension_block_count(const struct edid *edid)
 {
return edid->extensions;
@@ -2026,6 +2035,11 @@ static struct edid *edid_filter_invalid_blocks(struct 
edid *edid,
struct edid *new;
int i, valid_blocks = 0;
 
+   /*
+* Note: If the EDID uses HF-EEODB, but has invalid blocks, we'll revert
+* back to regular extension count here. We don't want to start
+* modifying the HF-EEODB extension too.
+*/
for (i = 0; i < edid_block_count(edid); i++) {
const void *src_block = edid_block_data(edid, i);
 
@@ -2261,7 +2275,7 @@ static struct edid *_drm_do_get_edid(struct drm_connector 
*connector,
 size_t *size)
 {
enum edid_block_status status;
-   int i, invalid_blocks = 0;
+   int i, num_blocks, invalid_blocks = 0;
struct edid *edid, *new;
size_t alloc_size = EDID_LENGTH;
 
@@ -2303,7 +2317,8 @@ static struct edid *_drm_do_get_edid(struct drm_connector 
*connector,
goto fail;
edid = new;
 
-   for (i = 1; i < edid_block_count(edid); i++) {
+   num_blocks = edid_block_count(edid);
+   for (i = 1; i < num_blocks; i++) {
void *block = (void *)edid_block_data(edid, i);
 
status = edid_block_read(block, i, read_block, context);
@@ -2314,11 +2329,31 @@ static struct edid *_drm_do_get_edid(struct 
drm_connector *connector,
if (status == EDID_BLOCK_READ_FAIL)
goto fail;
invalid_blocks++;
+   } else if (i == 1) {
+   /*
+* If the first EDID extension is a CTA extension, and
+* the first Data Block is HF-EEODB, override the
+* extension block count.
+*
+* Note: HF-EEODB could specify a smaller extension
+* count too, but we can't risk allocating a smaller
+* amount.
+*/
+   int eeodb = edid_hfeeodb_block_count(edid);
+
+   if (eeodb > num_blocks) {
+   num_blocks = eeodb;
+   alloc_size = edid_size_by_blocks(num_blocks);
+   new = krealloc(edid, alloc_size, GFP_KERNEL);
+   if (!new)
+   goto fail;
+   edid = new;
+   }
}
}
 
if (invalid_blocks) {
-   connector_bad_edid(connector, edid, edid_block_count(edid));
+   connector_bad_edid(connector, edid, num_blocks);
 
edid = edid_filter_invalid_blocks(edid, _size);
}
@@ -3851,6 +3886,7 @@ static int add_detailed_modes(struct drm_connector 
*connector,
 #define CTA_EXT_DB_HDR_STATIC_METADATA 6
 #define CTA_EXT_DB_420_VIDEO_DATA  14
 #define CTA_EXT_DB_420_VIDEO_CAP_MAP   15
+#define CTA_EXT_DB_HF_EEODB0x78
 #define CTA_EXT_DB_HF_SCDB 0x79
 
 #define EDID_BASIC_AUDIO   (1 << 6)
@@ -4910,6 +4946,12 @@ static bool cea_db_is_hdmi_forum_vsdb(const struct 
cea_db *db)
cea_db_payload_len(db) >= 7;
 }
 
+static bool cea_db_is_hdmi_forum_eeodb(const void *db)
+{
+   return cea_db_is_extended_tag(db, CTA_EXT_DB_HF_EEODB) &&
+   cea_db_payload_len(db) >= 2;
+}
+
 static bool cea_db_is_microsoft_vsdb(const struct cea_db *db)
 {
return ce

[Intel-gfx] [PATCH v3 10/13] drm/edid: do invalid block filtering in-place

2022-06-22 Thread Jani Nikula
Rewrite edid_filter_invalid_blocks() to filter invalid blocks
in-place. The main motivation is to not rely on passed in information on
invalid block count or the allocation size, which will be helpful in
follow-up work on HF-EEODB.

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_edid.c | 43 --
 1 file changed, 23 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 1c761e12820e..a80ea0aa7b32 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2020,33 +2020,37 @@ bool drm_edid_is_valid(struct edid *edid)
 }
 EXPORT_SYMBOL(drm_edid_is_valid);
 
-static struct edid *edid_filter_invalid_blocks(const struct edid *edid,
-  int invalid_blocks,
+static struct edid *edid_filter_invalid_blocks(struct edid *edid,
   size_t *alloc_size)
 {
-   struct edid *new, *dest_block;
-   int valid_extensions = edid->extensions - invalid_blocks;
-   int i;
+   struct edid *new;
+   int i, valid_blocks = 0;
 
-   *alloc_size = edid_size_by_blocks(valid_extensions + 1);
+   for (i = 0; i < edid_block_count(edid); i++) {
+   const void *src_block = edid_block_data(edid, i);
 
-   new = kmalloc(*alloc_size, GFP_KERNEL);
-   if (!new)
-   goto out;
+   if (edid_block_valid(src_block, i == 0)) {
+   void *dst_block = (void *)edid_block_data(edid, 
valid_blocks);
 
-   dest_block = new;
-   for (i = 0; i < edid_block_count(edid); i++) {
-   const void *block = edid_block_data(edid, i);
+   memmove(dst_block, src_block, EDID_LENGTH);
+   valid_blocks++;
+   }
+   }
 
-   if (edid_block_valid(block, i == 0))
-   memcpy(dest_block++, block, EDID_LENGTH);
+   /* We already trusted the base block to be valid here... */
+   if (WARN_ON(!valid_blocks)) {
+   kfree(edid);
+   return NULL;
}
 
-   new->extensions = valid_extensions;
-   new->checksum = edid_block_compute_checksum(new);
+   edid->extensions = valid_blocks - 1;
+   edid->checksum = edid_block_compute_checksum(edid);
 
-out:
-   kfree(edid);
+   *alloc_size = edid_size_by_blocks(valid_blocks);
+
+   new = krealloc(edid, *alloc_size, GFP_KERNEL);
+   if (!new)
+   kfree(edid);
 
return new;
 }
@@ -2316,8 +2320,7 @@ static struct edid *_drm_do_get_edid(struct drm_connector 
*connector,
if (invalid_blocks) {
connector_bad_edid(connector, edid, edid_block_count(edid));
 
-   edid = edid_filter_invalid_blocks(edid, invalid_blocks,
- _size);
+   edid = edid_filter_invalid_blocks(edid, _size);
}
 
 ok:
-- 
2.30.2



[Intel-gfx] [PATCH v3 09/13] drm/i915/bios: convert intel_bios_init_panel() to drm_edid

2022-06-22 Thread Jani Nikula
Try to use struct drm_edid where possible, even if having to fall back
to looking into struct edid down low via drm_edid_raw().

v2: Rebase

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_bios.c | 19 ++-
 drivers/gpu/drm/i915/display/intel_bios.h |  4 ++--
 drivers/gpu/drm/i915/display/intel_dp.c   |  2 +-
 drivers/gpu/drm/i915/display/intel_lvds.c |  2 +-
 4 files changed, 14 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
b/drivers/gpu/drm/i915/display/intel_bios.c
index ab23324c0402..553fdb3a4be7 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -606,14 +606,14 @@ get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
 
 static int opregion_get_panel_type(struct drm_i915_private *i915,
   const struct intel_bios_encoder_data 
*devdata,
-  const struct edid *edid)
+  const struct drm_edid *drm_edid)
 {
return intel_opregion_get_panel_type(i915);
 }
 
 static int vbt_get_panel_type(struct drm_i915_private *i915,
  const struct intel_bios_encoder_data *devdata,
- const struct edid *edid)
+ const struct drm_edid *drm_edid)
 {
const struct bdb_lvds_options *lvds_options;
 
@@ -638,12 +638,13 @@ static int vbt_get_panel_type(struct drm_i915_private 
*i915,
 
 static int pnpid_get_panel_type(struct drm_i915_private *i915,
const struct intel_bios_encoder_data *devdata,
-   const struct edid *edid)
+   const struct drm_edid *drm_edid)
 {
const struct bdb_lvds_lfp_data *data;
const struct bdb_lvds_lfp_data_ptrs *ptrs;
const struct lvds_pnp_id *edid_id;
struct lvds_pnp_id edid_id_nodate;
+   const struct edid *edid = drm_edid_raw(drm_edid); /* FIXME */
int i, best = -1;
 
if (!edid)
@@ -685,7 +686,7 @@ static int pnpid_get_panel_type(struct drm_i915_private 
*i915,
 
 static int fallback_get_panel_type(struct drm_i915_private *i915,
   const struct intel_bios_encoder_data 
*devdata,
-  const struct edid *edid)
+  const struct drm_edid *drm_edid)
 {
return 0;
 }
@@ -699,13 +700,13 @@ enum panel_type {
 
 static int get_panel_type(struct drm_i915_private *i915,
  const struct intel_bios_encoder_data *devdata,
- const struct edid *edid)
+ const struct drm_edid *drm_edid)
 {
struct {
const char *name;
int (*get_panel_type)(struct drm_i915_private *i915,
  const struct intel_bios_encoder_data 
*devdata,
- const struct edid *edid);
+ const struct drm_edid *drm_edid);
int panel_type;
} panel_types[] = {
[PANEL_TYPE_OPREGION] = {
@@ -728,7 +729,7 @@ static int get_panel_type(struct drm_i915_private *i915,
int i;
 
for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
-   panel_types[i].panel_type = panel_types[i].get_panel_type(i915, 
devdata, edid);
+   panel_types[i].panel_type = panel_types[i].get_panel_type(i915, 
devdata, drm_edid);
 
drm_WARN_ON(>drm, panel_types[i].panel_type > 0xf &&
panel_types[i].panel_type != 0xff);
@@ -3140,11 +3141,11 @@ void intel_bios_init(struct drm_i915_private *i915)
 void intel_bios_init_panel(struct drm_i915_private *i915,
   struct intel_panel *panel,
   const struct intel_bios_encoder_data *devdata,
-  const struct edid *edid)
+  const struct drm_edid *drm_edid)
 {
init_vbt_panel_defaults(panel);
 
-   panel->vbt.panel_type = get_panel_type(i915, devdata, edid);
+   panel->vbt.panel_type = get_panel_type(i915, devdata, drm_edid);
 
parse_panel_options(i915, panel);
parse_generic_dtd(i915, panel);
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h 
b/drivers/gpu/drm/i915/display/intel_bios.h
index e47582b0de0a..defea578a768 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -32,8 +32,8 @@
 
 #include 
 
+struct drm_edid;
 struct drm_i915_private;
-struct edid;
 struct intel_bios_encoder_data;
 struct intel_crtc_state;
 struct intel_encoder;
@@ -235,7 +235,7 @@ void intel_bios_init(struct drm_i915_private *dev_priv);
 void intel_bios_init_panel(struct drm_i915_private *dev_priv,
   struct intel_panel *panel,

[Intel-gfx] [PATCH v3 08/13] drm/i915/edid: convert DP, HDMI and LVDS to drm_edid

2022-06-22 Thread Jani Nikula
Convert all the connectors that use cached connector edid and
detect_edid to drm_edid.

v2: Don't leak opregion fallback EDID (Ville)

Signed-off-by: Jani Nikula 
---
 .../gpu/drm/i915/display/intel_connector.c|  4 +-
 .../drm/i915/display/intel_display_types.h|  4 +-
 drivers/gpu/drm/i915/display/intel_dp.c   | 77 +++
 drivers/gpu/drm/i915/display/intel_hdmi.c | 26 ---
 drivers/gpu/drm/i915/display/intel_lvds.c | 37 +
 5 files changed, 81 insertions(+), 67 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_connector.c 
b/drivers/gpu/drm/i915/display/intel_connector.c
index 1dcc268927a2..d83b2a64f618 100644
--- a/drivers/gpu/drm/i915/display/intel_connector.c
+++ b/drivers/gpu/drm/i915/display/intel_connector.c
@@ -95,12 +95,12 @@ void intel_connector_destroy(struct drm_connector 
*connector)
 {
struct intel_connector *intel_connector = to_intel_connector(connector);
 
-   kfree(intel_connector->detect_edid);
+   drm_edid_free(intel_connector->detect_edid);
 
intel_hdcp_cleanup(intel_connector);
 
if (!IS_ERR_OR_NULL(intel_connector->edid))
-   kfree(intel_connector->edid);
+   drm_edid_free(intel_connector->edid);
 
intel_panel_fini(intel_connector);
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 0da9b208d56e..d476df0ac9df 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -592,8 +592,8 @@ struct intel_connector {
struct intel_panel panel;
 
/* Cached EDID for eDP and LVDS. May hold ERR_PTR for invalid EDID. */
-   struct edid *edid;
-   struct edid *detect_edid;
+   const struct drm_edid *edid;
+   const struct drm_edid *detect_edid;
 
/* Number of times hotplug detection was tried after an HPD interrupt */
int hotplug_retries;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 32292c0be2bd..4ee35317cf2a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3577,12 +3577,11 @@ static u8 intel_dp_autotest_edid(struct intel_dp 
*intel_dp)
intel_dp->aux.i2c_defer_count);
intel_dp->compliance.test_data.edid = 
INTEL_DP_RESOLUTION_FAILSAFE;
} else {
-   struct edid *block = intel_connector->detect_edid;
+   /* FIXME: Get rid of drm_edid_raw() */
+   const struct edid *block = 
drm_edid_raw(intel_connector->detect_edid);
 
-   /* We have to write the checksum
-* of the last block read
-*/
-   block += intel_connector->detect_edid->extensions;
+   /* We have to write the checksum of the last block read */
+   block += block->extensions;
 
if (drm_dp_dpcd_writeb(_dp->aux, DP_TEST_EDID_CHECKSUM,
   block->checksum) <= 0)
@@ -4461,7 +4460,7 @@ bool intel_digital_port_connected(struct intel_encoder 
*encoder)
return is_connected;
 }
 
-static struct edid *
+static const struct drm_edid *
 intel_dp_get_edid(struct intel_dp *intel_dp)
 {
struct intel_connector *intel_connector = intel_dp->attached_connector;
@@ -4472,18 +4471,22 @@ intel_dp_get_edid(struct intel_dp *intel_dp)
if (IS_ERR(intel_connector->edid))
return NULL;
 
-   return drm_edid_duplicate(intel_connector->edid);
+   return drm_edid_dup(intel_connector->edid);
} else
-   return drm_get_edid(_connector->base,
-   _dp->aux.ddc);
+   return drm_edid_read_ddc(_connector->base,
+_dp->aux.ddc);
 }
 
 static void
 intel_dp_update_dfp(struct intel_dp *intel_dp,
-   const struct edid *edid)
+   const struct drm_edid *drm_edid)
 {
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
struct intel_connector *connector = intel_dp->attached_connector;
+   const struct edid *edid;
+
+   /* FIXME: Get rid of drm_edid_raw() */
+   edid = drm_edid_raw(drm_edid);
 
intel_dp->dfp.max_bpc =
drm_dp_downstream_max_bpc(intel_dp->dpcd,
@@ -4583,21 +4586,24 @@ intel_dp_set_edid(struct intel_dp *intel_dp)
 {
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
struct intel_connector *connector = intel_dp->attached_connector;
-   struct edid *edid;
+   const struct drm_edid *drm_edid;
+   const struct edid *edid;
bool vrr_capable;
 
intel_dp_unset_edid(intel_dp);
-   edid = intel_dp_get_edid(intel_dp);
-   connector->detect_edid = edid;
+

[Intel-gfx] [PATCH v3 07/13] drm/edid: add drm_edid_raw() to access the raw EDID data

2022-06-22 Thread Jani Nikula
Unfortunately, there are still plenty of interfaces around that require
a struct edid pointer, and it's impossible to change them all at
once. Add an accessor to the raw EDID data to help the transition.

While there are no such cases now, be defensive against raw EDID
extension count indicating bigger EDID than is actually allocated.

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_edid.c | 26 ++
 include/drm/drm_edid.h |  1 +
 2 files changed, 27 insertions(+)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 41b3de52b8f1..1c761e12820e 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2359,6 +2359,32 @@ struct edid *drm_do_get_edid(struct drm_connector 
*connector,
 }
 EXPORT_SYMBOL_GPL(drm_do_get_edid);
 
+/**
+ * drm_edid_raw - Get a pointer to the raw EDID data.
+ * @drm_edid: drm_edid container
+ *
+ * Get a pointer to the raw EDID data.
+ *
+ * This is for transition only. Avoid using this like the plague.
+ *
+ * Return: Pointer to raw EDID data.
+ */
+const struct edid *drm_edid_raw(const struct drm_edid *drm_edid)
+{
+   if (!drm_edid || !drm_edid->size)
+   return NULL;
+
+   /*
+* Do not return pointers where relying on EDID extension count would
+* lead to buffer overflow.
+*/
+   if (WARN_ON(edid_size(drm_edid->edid) > drm_edid->size))
+   return NULL;
+
+   return drm_edid->edid;
+}
+EXPORT_SYMBOL(drm_edid_raw);
+
 /* Allocate struct drm_edid container *without* duplicating the edid data */
 static const struct drm_edid *_drm_edid_alloc(const void *edid, size_t size)
 {
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index aeb2fa95bc04..2181977ae683 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -597,6 +597,7 @@ drm_display_mode_from_cea_vic(struct drm_device *dev,
 const struct drm_edid *drm_edid_alloc(const void *edid, size_t size);
 const struct drm_edid *drm_edid_dup(const struct drm_edid *drm_edid);
 void drm_edid_free(const struct drm_edid *drm_edid);
+const struct edid *drm_edid_raw(const struct drm_edid *drm_edid);
 const struct drm_edid *drm_edid_read(struct drm_connector *connector);
 const struct drm_edid *drm_edid_read_ddc(struct drm_connector *connector,
 struct i2c_adapter *adapter);
-- 
2.30.2



[Intel-gfx] [PATCH v3 06/13] drm/probe-helper: add drm_connector_helper_get_modes()

2022-06-22 Thread Jani Nikula
Add a helper function to be used as the "default" .get_modes()
hook. This also works as an example of what the driver .get_modes()
hooks are supposed to do regarding the new drm_edid_read*() and
drm_edid_connector_update() calls.

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_probe_helper.c | 34 ++
 include/drm/drm_probe_helper.h |  1 +
 2 files changed, 35 insertions(+)

diff --git a/drivers/gpu/drm/drm_probe_helper.c 
b/drivers/gpu/drm/drm_probe_helper.c
index a8d26b29bfa0..bb427c5a4f1f 100644
--- a/drivers/gpu/drm/drm_probe_helper.c
+++ b/drivers/gpu/drm/drm_probe_helper.c
@@ -1049,3 +1049,37 @@ int drm_connector_helper_get_modes_from_ddc(struct 
drm_connector *connector)
return count;
 }
 EXPORT_SYMBOL(drm_connector_helper_get_modes_from_ddc);
+
+/**
+ * drm_connector_helper_get_modes - Read EDID and update connector.
+ * @connector: The connector
+ *
+ * Read the EDID using drm_edid_read() (which requires that connector->ddc is
+ * set), and update the connector using the EDID.
+ *
+ * This can be used as the "default" connector helper .get_modes() hook if the
+ * driver does not need any special processing. This is sets the example what
+ * custom .get_modes() hooks should do regarding EDID read and connector 
update.
+ *
+ * Returns: Number of modes.
+ */
+int drm_connector_helper_get_modes(struct drm_connector *connector)
+{
+   const struct drm_edid *drm_edid;
+   int count;
+
+   drm_edid = drm_edid_read(connector);
+
+   /*
+* Unconditionally update the connector. If the EDID was read
+* successfully, fill in the connector information derived from the
+* EDID. Otherwise, if the EDID is NULL, clear the connector
+* information.
+*/
+   count = drm_edid_connector_update(connector, drm_edid);
+
+   drm_edid_free(drm_edid);
+
+   return count;
+}
+EXPORT_SYMBOL(drm_connector_helper_get_modes);
diff --git a/include/drm/drm_probe_helper.h b/include/drm/drm_probe_helper.h
index c80cab7a53b7..8075e02aa865 100644
--- a/include/drm/drm_probe_helper.h
+++ b/include/drm/drm_probe_helper.h
@@ -27,5 +27,6 @@ void drm_kms_helper_poll_enable(struct drm_device *dev);
 bool drm_kms_helper_is_poll_worker(void);
 
 int drm_connector_helper_get_modes_from_ddc(struct drm_connector *connector);
+int drm_connector_helper_get_modes(struct drm_connector *connector);
 
 #endif
-- 
2.30.2



[Intel-gfx] [PATCH v3 05/13] drm/edid: add drm_edid_connector_update()

2022-06-22 Thread Jani Nikula
Add a new function drm_edid_connector_update() to replace the
combination of calls drm_connector_update_edid_property() and
drm_add_edid_modes(). Usually they are called in the drivers in this
order, however the former needs information from the latter.

Since the new drm_edid_read*() functions no longer call the connector
updates directly, and the read and update are separated, we'll need this
new function for the connector update.

This is all in drm_edid.c simply to keep struct drm_edid opaque.

v2:
- Share code with drm_connector_update_edid_property() (Ville)
- Add comment about override EDID handling

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 103 -
 include/drm/drm_edid.h |   2 +
 2 files changed, 81 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index c3f0f0a5a8a9..41b3de52b8f1 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -6160,8 +6160,8 @@ static int add_displayid_detailed_modes(struct 
drm_connector *connector,
return num_modes;
 }
 
-static int drm_edid_connector_update(struct drm_connector *connector,
-const struct drm_edid *drm_edid)
+static int _drm_edid_connector_update(struct drm_connector *connector,
+ const struct drm_edid *drm_edid)
 {
int num_modes = 0;
u32 quirks;
@@ -6227,31 +6227,12 @@ static int drm_edid_connector_update(struct 
drm_connector *connector,
 static void _drm_update_tile_info(struct drm_connector *connector,
  const struct drm_edid *drm_edid);
 
-static int _drm_connector_update_edid_property(struct drm_connector *connector,
+static int _drm_edid_connector_property_update(struct drm_connector *connector,
   const struct drm_edid *drm_edid)
 {
struct drm_device *dev = connector->dev;
int ret;
 
-   /* ignore requests to set edid when overridden */
-   if (connector->override_edid)
-   return 0;
-
-   /*
-* Set the display info, using edid if available, otherwise resetting
-* the values to defaults. This duplicates the work done in
-* drm_add_edid_modes, but that function is not consistently called
-* before this one in all drivers and the computation is cheap enough
-* that it seems better to duplicate it rather than attempt to ensure
-* some arbitrary ordering of calls.
-*/
-   if (drm_edid)
-   update_display_info(connector, drm_edid);
-   else
-   drm_reset_display_info(connector);
-
-   _drm_update_tile_info(connector, drm_edid);
-
if (connector->edid_blob_ptr) {
const struct edid *old_edid = connector->edid_blob_ptr->data;
 
@@ -6297,6 +6278,76 @@ static int _drm_connector_update_edid_property(struct 
drm_connector *connector,
return ret;
 }
 
+/**
+ * drm_edid_connector_update - Update connector information from EDID
+ * @connector: Connector
+ * @drm_edid: EDID
+ *
+ * Update the connector mode list, display info, ELD, HDR metadata, relevant
+ * properties, etc. from the passed in EDID.
+ *
+ * If EDID is NULL, reset the information.
+ *
+ * Return: The number of modes added or 0 if we couldn't find any.
+ */
+int drm_edid_connector_update(struct drm_connector *connector,
+ const struct drm_edid *drm_edid)
+{
+   int count;
+
+   /*
+* FIXME: Reconcile the differences in override_edid handling between
+* this and drm_connector_update_edid_property().
+*
+* If override_edid is set, and the EDID passed in here originates from
+* drm_edid_read() and friends, it will be the override EDID, and there
+* are no issues. drm_connector_update_edid_property() ignoring requests
+* to set the EDID dates back to a time when override EDID was not
+* handled at the low level EDID read.
+*
+* The only way the EDID passed in here can be different from the
+* override EDID is when a driver passes in an EDID that does *not*
+* originate from drm_edid_read() and friends, or passes in a stale
+* cached version. This, in turn, is a question of when an override EDID
+* set via debugfs should take effect.
+*/
+
+   count = _drm_edid_connector_update(connector, drm_edid);
+
+   _drm_update_tile_info(connector, drm_edid);
+
+   /* Note: Ignore errors for now. */
+   _drm_edid_connector_property_update(connector, drm_edid);
+
+   return count;
+}
+EXPORT_SYMBOL(drm_edid_connector_update);
+
+static int _drm_connector_update_edid_property(struct drm_connector *connector,
+  const struct drm_edid *drm_edid)
+{
+   /* ignore requests to set edid when overridden */
+   if (connector

[Intel-gfx] [PATCH v3 04/13] drm/edid: abstract debugfs override EDID set/reset

2022-06-22 Thread Jani Nikula
Add functions drm_edid_override_set() and drm_edid_override_reset() to
support "edid_override" connector debugfs, and to hide the details about
it in drm_edid.c. No functional changes at this time.

Also note in the connector.override_edid flag kernel-doc that this is
only supposed to be modified by the code doing debugfs EDID override
handling. Currently, it is still being modified by amdgpu in
create_eml_sink() and handle_edid_mgmt() for reasons unknown. This was
added in commit 4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")
and later moved to amdgpu_dm.c in commit e7b07ceef2a6 ("drm/amd/display:
Merge amdgpu_dm_types and amdgpu_dm").

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_crtc_internal.h |  2 ++
 drivers/gpu/drm/drm_debugfs.c   | 21 +
 drivers/gpu/drm/drm_edid.c  | 26 ++
 include/drm/drm_connector.h |  6 +-
 4 files changed, 38 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/drm_crtc_internal.h 
b/drivers/gpu/drm/drm_crtc_internal.h
index aecab5308bae..56041b604881 100644
--- a/drivers/gpu/drm/drm_crtc_internal.h
+++ b/drivers/gpu/drm/drm_crtc_internal.h
@@ -286,3 +286,5 @@ int drm_mode_page_flip_ioctl(struct drm_device *dev,
 
 /* drm_edid.c */
 void drm_mode_fixup_1366x768(struct drm_display_mode *mode);
+int drm_edid_override_set(struct drm_connector *connector, const void *edid, 
size_t size);
+int drm_edid_override_reset(struct drm_connector *connector);
diff --git a/drivers/gpu/drm/drm_debugfs.c b/drivers/gpu/drm/drm_debugfs.c
index fb04b7a984de..493922069c90 100644
--- a/drivers/gpu/drm/drm_debugfs.c
+++ b/drivers/gpu/drm/drm_debugfs.c
@@ -350,31 +350,20 @@ static ssize_t edid_write(struct file *file, const char 
__user *ubuf,
struct seq_file *m = file->private_data;
struct drm_connector *connector = m->private;
char *buf;
-   struct edid *edid;
int ret;
 
buf = memdup_user(ubuf, len);
if (IS_ERR(buf))
return PTR_ERR(buf);
 
-   edid = (struct edid *) buf;
-
-   if (len == 5 && !strncmp(buf, "reset", 5)) {
-   connector->override_edid = false;
-   ret = drm_connector_update_edid_property(connector, NULL);
-   } else if (len < EDID_LENGTH ||
-  EDID_LENGTH * (1 + edid->extensions) > len)
-   ret = -EINVAL;
-   else {
-   connector->override_edid = false;
-   ret = drm_connector_update_edid_property(connector, edid);
-   if (!ret)
-   connector->override_edid = true;
-   }
+   if (len == 5 && !strncmp(buf, "reset", 5))
+   ret = drm_edid_override_reset(connector);
+   else
+   ret = drm_edid_override_set(connector, buf, len);
 
kfree(buf);
 
-   return (ret) ? ret : len;
+   return ret ? ret : len;
 }
 
 /*
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index e360e1a269f4..c3f0f0a5a8a9 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2161,6 +2161,32 @@ static struct edid *drm_get_override_edid(struct 
drm_connector *connector,
return IS_ERR(override) ? NULL : override;
 }
 
+/* For debugfs edid_override implementation */
+int drm_edid_override_set(struct drm_connector *connector, const void *edid,
+ size_t size)
+{
+   int ret;
+
+   if (size < EDID_LENGTH || edid_size(edid) > size)
+   return -EINVAL;
+
+   connector->override_edid = false;
+
+   ret = drm_connector_update_edid_property(connector, edid);
+   if (!ret)
+   connector->override_edid = true;
+
+   return ret;
+}
+
+/* For debugfs edid_override implementation */
+int drm_edid_override_reset(struct drm_connector *connector)
+{
+   connector->override_edid = false;
+
+   return drm_connector_update_edid_property(connector, NULL);
+}
+
 /**
  * drm_add_override_edid_modes - add modes from override/firmware EDID
  * @connector: connector we're probing
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 94b422b55cc1..a1705d6b3fba 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -1527,7 +1527,11 @@ struct drm_connector {
struct drm_cmdline_mode cmdline_mode;
/** @force: a DRM_FORCE_ state for forced mode sets */
enum drm_connector_force force;
-   /** @override_edid: has the EDID been overwritten through debugfs for 
testing? */
+   /**
+* @override_edid: has the EDID been overwritten through debugfs for
+* testing? Do not modify outside of drm_edid_override_set() and
+* drm_edid_override_reset().
+*/
bool override_edid;
/** @epoch_counter: used to detect any other changes in connector, 
besides status */
u64 epoch_counter;
-- 
2.30.2



[Intel-gfx] [PATCH v3 03/13] drm/edid: clean up connector update error handling and debug logging

2022-06-22 Thread Jani Nikula
Bail out on all errors, debug log all errors, and convert to drm device
based debug logging.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 41 ++
 1 file changed, 28 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 62967db78139..e360e1a269f4 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -6231,29 +6231,44 @@ static int _drm_connector_update_edid_property(struct 
drm_connector *connector,
 
if (old_edid) {
if (!drm_edid_are_equal(drm_edid ? drm_edid->edid : 
NULL, old_edid)) {
-   DRM_DEBUG_KMS("[CONNECTOR:%d:%s] Edid was 
changed.\n",
- connector->base.id, 
connector->name);
-
-   connector->epoch_counter += 1;
-   DRM_DEBUG_KMS("Updating change counter to 
%llu\n",
- connector->epoch_counter);
+   connector->epoch_counter++;
+   drm_dbg_kms(dev, "[CONNECTOR:%d:%s] EDID 
changed, epoch counter %llu\n",
+   connector->base.id, connector->name,
+   connector->epoch_counter);
}
}
}
 
-   drm_object_property_set_value(>base,
- dev->mode_config.non_desktop_property,
- connector->display_info.non_desktop);
-
ret = drm_property_replace_global_blob(dev,
   >edid_blob_ptr,
   drm_edid ? drm_edid->size : 0,
   drm_edid ? drm_edid->edid : NULL,
   >base,
   dev->mode_config.edid_property);
-   if (ret)
-   return ret;
-   return drm_connector_set_tile_property(connector);
+   if (ret) {
+   drm_dbg_kms(dev, "[CONNECTOR:%d:%s] EDID property update failed 
(%d)\n",
+   connector->base.id, connector->name, ret);
+   goto out;
+   }
+
+   ret = drm_object_property_set_value(>base,
+   
dev->mode_config.non_desktop_property,
+   
connector->display_info.non_desktop);
+   if (ret) {
+   drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Non-desktop property update 
failed (%d)\n",
+   connector->base.id, connector->name, ret);
+   goto out;
+   }
+
+   ret = drm_connector_set_tile_property(connector);
+   if (ret) {
+   drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Tile property update failed 
(%d)\n",
+   connector->base.id, connector->name, ret);
+   goto out;
+   }
+
+out:
+   return ret;
 }
 
 /**
-- 
2.30.2



[Intel-gfx] [PATCH v3 02/13] drm/edid: convert drm_connector_update_edid_property() to struct drm_edid

2022-06-22 Thread Jani Nikula
Make drm_connector_update_edid_property() a thin wrapper around a struct
drm_edid based version of the same.

This lets us remove the legacy drm_update_tile_info() and
drm_add_display_info() functions altogether.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 81 --
 1 file changed, 35 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 36bf7b0fe8d9..62967db78139 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -6042,14 +6042,6 @@ static u32 update_display_info(struct drm_connector 
*connector,
return quirks;
 }
 
-static u32 drm_add_display_info(struct drm_connector *connector, const struct 
edid *edid)
-{
-   struct drm_edid drm_edid;
-
-   return update_display_info(connector,
-  drm_edid_legacy_init(_edid, edid));
-}
-
 static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device 
*dev,
struct 
displayid_detailed_timings_1 *timings,
bool type_7)
@@ -6206,38 +6198,19 @@ static int drm_edid_connector_update(struct 
drm_connector *connector,
return num_modes;
 }
 
-static void drm_update_tile_info(struct drm_connector *connector,
-const struct edid *edid);
+static void _drm_update_tile_info(struct drm_connector *connector,
+ const struct drm_edid *drm_edid);
 
-/**
- * drm_connector_update_edid_property - update the edid property of a connector
- * @connector: drm connector
- * @edid: new value of the edid property
- *
- * This function creates a new blob modeset object and assigns its id to the
- * connector's edid property.
- * Since we also parse tile information from EDID's displayID block, we also
- * set the connector's tile property here. See 
drm_connector_set_tile_property()
- * for more details.
- *
- * Returns:
- * Zero on success, negative errno on failure.
- */
-int drm_connector_update_edid_property(struct drm_connector *connector,
-  const struct edid *edid)
+static int _drm_connector_update_edid_property(struct drm_connector *connector,
+  const struct drm_edid *drm_edid)
 {
struct drm_device *dev = connector->dev;
-   size_t size = 0;
int ret;
-   const struct edid *old_edid;
 
/* ignore requests to set edid when overridden */
if (connector->override_edid)
return 0;
 
-   if (edid)
-   size = EDID_LENGTH * (1 + edid->extensions);
-
/*
 * Set the display info, using edid if available, otherwise resetting
 * the values to defaults. This duplicates the work done in
@@ -6246,17 +6219,18 @@ int drm_connector_update_edid_property(struct 
drm_connector *connector,
 * that it seems better to duplicate it rather than attempt to ensure
 * some arbitrary ordering of calls.
 */
-   if (edid)
-   drm_add_display_info(connector, edid);
+   if (drm_edid)
+   update_display_info(connector, drm_edid);
else
drm_reset_display_info(connector);
 
-   drm_update_tile_info(connector, edid);
+   _drm_update_tile_info(connector, drm_edid);
 
if (connector->edid_blob_ptr) {
-   old_edid = (const struct edid *)connector->edid_blob_ptr->data;
+   const struct edid *old_edid = connector->edid_blob_ptr->data;
+
if (old_edid) {
-   if (!drm_edid_are_equal(edid, old_edid)) {
+   if (!drm_edid_are_equal(drm_edid ? drm_edid->edid : 
NULL, old_edid)) {
DRM_DEBUG_KMS("[CONNECTOR:%d:%s] Edid was 
changed.\n",
  connector->base.id, 
connector->name);
 
@@ -6273,14 +6247,37 @@ int drm_connector_update_edid_property(struct 
drm_connector *connector,
 
ret = drm_property_replace_global_blob(dev,
   >edid_blob_ptr,
-  size,
-  edid,
+  drm_edid ? drm_edid->size : 0,
+  drm_edid ? drm_edid->edid : NULL,
   >base,
   dev->mode_config.edid_property);
if (ret)
return ret;
return drm_connector_set_tile_property(connector);
 }
+
+/**
+ * drm_connector_update_edid_property - update the edid property of a connector
+ * @connector: drm connector
+ * @edid: new value of the edid property
+ *
+ * This function creates a new blob mod

[Intel-gfx] [PATCH v3 01/13] drm/edid: move drm_connector_update_edid_property() to drm_edid.c

2022-06-22 Thread Jani Nikula
The function needs access to drm_edid.c internals more than
drm_connector.c. We can make drm_reset_display_info(),
drm_add_display_info() and drm_update_tile_info() static. There will be
more benefits with follow-up struct drm_edid refactoring.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_connector.c | 74 -
 drivers/gpu/drm/drm_crtc_internal.h |  3 -
 drivers/gpu/drm/drm_edid.c  | 86 +++--
 3 files changed, 81 insertions(+), 82 deletions(-)

diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 28ea0f8196b9..2b9a8972eff1 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -2078,80 +2078,6 @@ int drm_connector_set_tile_property(struct drm_connector 
*connector)
 }
 EXPORT_SYMBOL(drm_connector_set_tile_property);
 
-/**
- * drm_connector_update_edid_property - update the edid property of a connector
- * @connector: drm connector
- * @edid: new value of the edid property
- *
- * This function creates a new blob modeset object and assigns its id to the
- * connector's edid property.
- * Since we also parse tile information from EDID's displayID block, we also
- * set the connector's tile property here. See 
drm_connector_set_tile_property()
- * for more details.
- *
- * Returns:
- * Zero on success, negative errno on failure.
- */
-int drm_connector_update_edid_property(struct drm_connector *connector,
-  const struct edid *edid)
-{
-   struct drm_device *dev = connector->dev;
-   size_t size = 0;
-   int ret;
-   const struct edid *old_edid;
-
-   /* ignore requests to set edid when overridden */
-   if (connector->override_edid)
-   return 0;
-
-   if (edid)
-   size = EDID_LENGTH * (1 + edid->extensions);
-
-   /* Set the display info, using edid if available, otherwise
-* resetting the values to defaults. This duplicates the work
-* done in drm_add_edid_modes, but that function is not
-* consistently called before this one in all drivers and the
-* computation is cheap enough that it seems better to
-* duplicate it rather than attempt to ensure some arbitrary
-* ordering of calls.
-*/
-   if (edid)
-   drm_add_display_info(connector, edid);
-   else
-   drm_reset_display_info(connector);
-
-   drm_update_tile_info(connector, edid);
-
-   if (connector->edid_blob_ptr) {
-   old_edid = (const struct edid *)connector->edid_blob_ptr->data;
-   if (old_edid) {
-   if (!drm_edid_are_equal(edid, old_edid)) {
-   DRM_DEBUG_KMS("[CONNECTOR:%d:%s] Edid was 
changed.\n",
- connector->base.id, 
connector->name);
-
-   connector->epoch_counter += 1;
-   DRM_DEBUG_KMS("Updating change counter to 
%llu\n",
- connector->epoch_counter);
-   }
-   }
-   }
-
-   drm_object_property_set_value(>base,
- dev->mode_config.non_desktop_property,
- connector->display_info.non_desktop);
-
-   ret = drm_property_replace_global_blob(dev,
-  >edid_blob_ptr,
-  size,
-  edid,
-  >base,
-  dev->mode_config.edid_property);
-   if (ret)
-   return ret;
-   return drm_connector_set_tile_property(connector);
-}
-EXPORT_SYMBOL(drm_connector_update_edid_property);
-
 /**
  * drm_connector_set_link_status_property - Set link status property of a 
connector
  * @connector: drm connector
diff --git a/drivers/gpu/drm/drm_crtc_internal.h 
b/drivers/gpu/drm/drm_crtc_internal.h
index 63279e984342..aecab5308bae 100644
--- a/drivers/gpu/drm/drm_crtc_internal.h
+++ b/drivers/gpu/drm/drm_crtc_internal.h
@@ -286,6 +286,3 @@ int drm_mode_page_flip_ioctl(struct drm_device *dev,
 
 /* drm_edid.c */
 void drm_mode_fixup_1366x768(struct drm_display_mode *mode);
-void drm_reset_display_info(struct drm_connector *connector);
-u32 drm_add_display_info(struct drm_connector *connector, const struct edid 
*edid);
-void drm_update_tile_info(struct drm_connector *connector, const struct edid 
*edid);
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 2bdaf1e34a9d..36bf7b0fe8d9 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5928,8 +5928,7 @@ static void drm_update_mso(struct drm_connector 
*connector,
 /* A connector has no EDID information, so we've got no EDID to compute

[Intel-gfx] [PATCH v3 00/13] drm/edid: expand on struct drm_edid usage

2022-06-22 Thread Jani Nikula
v3 of [1], addressing review comments. I'm adding some code movement and
refactoring in the beginning to reuse code between
drm_connector_update_edid_property() and drm_edid_connector_update()
which was a concern Ville raised [2].

BR,
Jani.


[1] https://patchwork.freedesktop.org/series/104309/
[2] https://lore.kernel.org/r/yqoyojtsboqho...@intel.com

Jani Nikula (13):
  drm/edid: move drm_connector_update_edid_property() to drm_edid.c
  drm/edid: convert drm_connector_update_edid_property() to struct
drm_edid
  drm/edid: clean up connector update error handling and debug logging
  drm/edid: abstract debugfs override EDID set/reset
  drm/edid: add drm_edid_connector_update()
  drm/probe-helper: add drm_connector_helper_get_modes()
  drm/edid: add drm_edid_raw() to access the raw EDID data
  drm/i915/edid: convert DP, HDMI and LVDS to drm_edid
  drm/i915/bios: convert intel_bios_init_panel() to drm_edid
  drm/edid: do invalid block filtering in-place
  drm/edid: add HF-EEODB support to EDID read and allocation
  drm/edid: take HF-EEODB extension count into account
  drm/todo: add entry for converting the subsystem to struct drm_edid

 Documentation/gpu/todo.rst|  25 ++
 drivers/gpu/drm/drm_connector.c   |  74 
 drivers/gpu/drm/drm_crtc_internal.h   |   5 +-
 drivers/gpu/drm/drm_debugfs.c |  21 +-
 drivers/gpu/drm/drm_edid.c| 376 +++---
 drivers/gpu/drm/drm_probe_helper.c|  34 ++
 drivers/gpu/drm/i915/display/intel_bios.c |  19 +-
 drivers/gpu/drm/i915/display/intel_bios.h |   4 +-
 .../gpu/drm/i915/display/intel_connector.c|   4 +-
 .../drm/i915/display/intel_display_types.h|   4 +-
 drivers/gpu/drm/i915/display/intel_dp.c   |  77 ++--
 drivers/gpu/drm/i915/display/intel_hdmi.c |  26 +-
 drivers/gpu/drm/i915/display/intel_lvds.c |  37 +-
 include/drm/drm_connector.h   |   6 +-
 include/drm/drm_edid.h|   3 +
 include/drm/drm_probe_helper.h|   1 +
 16 files changed, 499 insertions(+), 217 deletions(-)

-- 
2.30.2



[Intel-gfx] [PATCH] drm/i915/bios: debug log ddi port info after parsing

2022-06-21 Thread Jani Nikula
The ddc pin and aux channel sanitization may disable DVI/HDMI and DP,
respectively, of ports parsed earlier, in "last one wins" fashion. With
parsing and printing interleaved, we'll end up logging support first and
disabling later anyway.

Now that we've split ddi port info parsing and printing, take it further
by doing the printing in a separate loop, fixing the logging.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_bios.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
b/drivers/gpu/drm/i915/display/intel_bios.c
index ab23324c0402..51dde5bfd956 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2670,8 +2670,6 @@ static void parse_ddi_port(struct intel_bios_encoder_data 
*devdata)
 
sanitize_device_type(devdata, port);
 
-   print_ddi_port(devdata, port);
-
if (intel_bios_encoder_supports_dvi(devdata))
sanitize_ddc_pin(devdata, port);
 
@@ -2689,12 +2687,18 @@ static bool has_ddi_port_info(struct drm_i915_private 
*i915)
 static void parse_ddi_ports(struct drm_i915_private *i915)
 {
struct intel_bios_encoder_data *devdata;
+   enum port port;
 
if (!has_ddi_port_info(i915))
return;
 
list_for_each_entry(devdata, >vbt.display_devices, node)
parse_ddi_port(devdata);
+
+   for_each_port(port) {
+   if (i915->vbt.ports[port])
+   print_ddi_port(i915->vbt.ports[port], port);
+   }
 }
 
 static void
-- 
2.30.2



Re: [Intel-gfx] [PATCH v5] drm/i915/dsi: add payload receiving code

2022-06-21 Thread Jani Nikula
On Mon, 20 Jun 2022, William Tseng  wrote:
> To support Host to read data from Peripheral after
> a DCS read command is sent over DSI.

So the spec isn't all that clear on all the small details here. Since
this pretty much doesn't interfere with other code, I'll put more weight
on test results. If it works, great. If not, needs more work.

Currently we don't have a device in CI that would use this; we need a
Tested-by from whoever has a device.

Detailed comments inline.

>
> v1: initial version.
> v2:
> - adding error message when failing to place BTA.
> - returning byte number instead of 0 for the read
> function dsi_read_pkt_payld().
> v3: fixing coding style warning.
> v4:
> - correcting the data type of returning data for
> the read function dsi_read_pkt_payld().
> v5: adding change history as part of commit messages.
>
> Cc: Jani Nikula 
> Cc: Ville Syrjälä 
> Cc: Vandita Kulkarni 
> Cc: Lee Shawn C 
> Signed-off-by: William Tseng 
> ---
>  drivers/gpu/drm/i915/display/icl_dsi.c  | 75 +++--
>  drivers/gpu/drm/i915/display/icl_dsi_regs.h | 13 
>  2 files changed, 83 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c 
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 19bf717fd4cb..b2aa3c7902f3 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -201,6 +201,69 @@ static int dsi_send_pkt_hdr(struct intel_dsi_host *host,
>   return 0;
>  }
>  
> +static int dsi_read_pkt_payld(struct intel_dsi_host *host,
> +   u8 *rx_buf, size_t rx_len)
> +{
> + struct intel_dsi *intel_dsi = host->intel_dsi;
> + struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev);
> + enum transcoder dsi_trans = dsi_port_to_transcoder(host->port);
> + u32 tmp, /*hdr_data, */payld_data;

Please drop the commented out stuff.

> + u32 payld_dw;
> + size_t payld_read;
> + u8 i;

Please use int for loop variables.

> +
> + /* step2: place a BTA reque */
> + /* check if header credit available */
> + if (!wait_for_header_credits(dev_priv, dsi_trans, 1)) {
> + drm_err(_priv->drm, "not ready to recive payload\n");
> + return -EBUSY;
> + }
> +
> + /* place BTA request */
> + tmp = intel_de_read(dev_priv, DSI_LP_MSG(dsi_trans));
> + tmp |= LINK_BTA;
> + intel_de_write(dev_priv, DSI_LP_MSG(dsi_trans), tmp);

Please use intel_de_rmw() for read-modify-write. Ditto below.

> +
> + tmp = intel_de_read(dev_priv, DSI_LP_MSG(dsi_trans));

Please use intel_de_posting_read() for posting reads. Ditto below.

> +
> + /* step2a:  */
> + /* step2ai: set Turn-Around Timeout */
> + tmp = intel_de_read(dev_priv, DSI_TA_TO(dsi_trans));
> + tmp &= ~TA_TIMEOUT_VALUE_MASK;
> + tmp |= TA_TIMEOUT_VALUE(intel_dsi->turn_arnd_val);
> + intel_de_write(dev_priv, DSI_TA_TO(dsi_trans), tmp);
> +
> + tmp = intel_de_read(dev_priv, DSI_TA_TO(dsi_trans));
> +
> + /* step2aii: set maximum allowed time */
> + tmp = intel_de_read(dev_priv, DSI_LPRX_HOST_TO(dsi_trans));
> + tmp &= ~LPRX_TIMEOUT_VALUE_MASK;
> + tmp |= LPRX_TIMEOUT_VALUE(intel_dsi->lp_rx_timeout);
> + intel_de_write(dev_priv, DSI_LPRX_HOST_TO(dsi_trans), tmp);
> +
> + tmp = intel_de_read(dev_priv, DSI_LPRX_HOST_TO(dsi_trans));

Bspec 20597 says, "Prior to this SW should have set up the following",
meaning the above should happen before DSI_LP_MSG update.

I think the whole BTA stuff should be split out to a separate function,
keeping the actual payload receive very clean, similar to
dsi_send_pkt_payld().

> +
> + /* step4a: wait and read payload */
> + if (wait_for_us(((intel_de_read(dev_priv, DSI_CMD_RXCTL(dsi_trans)) &
> + NUMBER_RX_PLOAD_DW_MASK) >> NUMBER_RX_PLOAD_DW_SHIFT) > 0, 
> 10)) {
> + drm_err(_priv->drm, "DSI fails to receive payload\n");
> + return -EBUSY;
> + }
> +
> + tmp = intel_de_read(dev_priv, DSI_CMD_RXCTL(dsi_trans));
> + payld_dw = (tmp & NUMBER_RX_PLOAD_DW_MASK) >> NUMBER_RX_PLOAD_DW_SHIFT;
> + payld_read = min(rx_len, (size_t)(4 * payld_dw));
> +
> + for (i = 0; i < payld_read; i++) {
> + if ((i % 4) == 0)
> + payld_data = intel_de_read(dev_priv, 
> DSI_CMD_RXPYLD(dsi_trans));

Might be prudent to explicitly clear the READ_UNLOADS_DW bit of
DSI_CMD_RXCTL beforehand.

> +
> + *(rx_buf + i) = (payld_data >> (8 * (i % 4))) & 0xff;
> + }

Please use similar loop as in dsi_send_pkt_payld(). It's confusing to
have one (

Re: [Intel-gfx] [RFC PATCH 4/5] drm/i915/display: prepend connector name to the backlight

2022-06-21 Thread Jani Nikula
On Tue, 21 Jun 2022, "Murthy, Arun R"  wrote:
>> On Fri, 03 Jun 2022, "Murthy, Arun R"  wrote:
>> >> On Thu, 02 Jun 2022, Animesh Manna 
>> wrote:
>> >> > From: Arun R Murthy 
>> >> >
>> >> > With the enablement of dual eDP, there will have to exist two
>> >> > entries of backlight sysfs file. In order to avoid sysfs file name
>> >> > duplication, the file names are prepended with the connector name.
>> >>
>> >> Fixed by 20f85ef89d94 ("drm/i915/backlight: use unique backlight
>> >> device
>> >> names") about a year ago.
>> >>
>> > This patches checks if the return value is -EEXIST and then acts 
>> > accordingly,
>> but -EEXIST is not returned.
>> > struct kernfs_node *__kernfs_create_file(struct kernfs_node *parent,
>> >  const char *name,
>> >  umode_t mode, kuid_t uid, kgid_t 
>> > gid,
>> >  loff_t size,
>> >  const struct kernfs_ops *ops,
>> >  void *priv, const void *ns,
>> >  struct lock_class_key *key) {
>> > struct kernfs_node *kn;
>> > unsigned flags;
>> > int rc;
>> >
>> > flags = KERNFS_FILE;
>> >
>> > kn = kernfs_new_node(parent, name, (mode & S_IALLUGO) | S_IFREG,
>> >  uid, gid, flags);
>> > if (!kn)
>> > return ERR_PTR(-ENOMEM);
>> >
>> > So the condition check with not be satisfied and the backlight registration
>> will fail for the 2nd backlight device.
>>
>> But the file isn't added by kernfs_new_node(), it just allocates the node. 
>> See
>> the kernfs_add_one() later in __kernfs_create_file().
>>
> Moreover now that we will be supporting dual display, wouldn't it
> be better to have the same file naming convention for both the
> displays?
> Without this patch, the first backlight would create an interface
> with name intel_backlight and for the second it would create as
> "cardXX-XXX-backlight". There wont be any similarities in the
> backlight naming convention.
> Would it be better to maintain the same naming convention
> across the displays?

The old name can't be changed.

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH v3 03/17] drm/i915: Extract HAS_DOUBLE_BUFFERED_M_N()

2022-06-20 Thread Jani Nikula
On Mon, 20 Jun 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> We have a couple of places that want to make distinction between
> double buffered M/N registers vs. the split M1/N1+M2/N2 registers.
> Add a helper for that.
>
> v2: Turn into a HAS_ macro (Jani)
>
> Reviewed-by: Jani Nikula  #v1
> Signed-off-by: Ville Syrjälä 

I'm fine with this, obviously, but also started wondering about the
other direction [1].

BR,
Jani.


[1] 
https://patchwork.freedesktop.org/patch/msgid/dc7e02a24fc231ef0fa3c4e84c01ebf19d61de2f.1655748056.git.jani.nik...@intel.com

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 2 +-
>  drivers/gpu/drm/i915/display/intel_dp.c  | 3 +--
>  drivers/gpu/drm/i915/i915_drv.h  | 2 ++
>  3 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 6b549aadca13..0384af821ee5 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5760,7 +5760,7 @@ intel_pipe_config_compare(const struct intel_crtc_state 
> *current_config,
>   PIPE_CONF_CHECK_I(lane_count);
>   PIPE_CONF_CHECK_X(lane_lat_optim_mask);
>  
> - if (DISPLAY_VER(dev_priv) >= 9 || IS_BROADWELL(dev_priv)) {
> + if (HAS_DOUBLE_BUFFERED_M_N(dev_priv)) {
>   PIPE_CONF_CHECK_M_N_ALT(dp_m_n, dp_m2_n2);
>   } else {
>   PIPE_CONF_CHECK_M_N(dp_m_n);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index e0891b31f089..cf7e4e105891 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1868,8 +1868,7 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct 
> intel_dp *intel_dp,
>  static bool cpu_transcoder_has_drrs(struct drm_i915_private *i915,
>   enum transcoder cpu_transcoder)
>  {
> - /* M1/N1 is double buffered */
> - if (DISPLAY_VER(i915) >= 9 || IS_BROADWELL(i915))
> + if (HAS_DOUBLE_BUFFERED_M_N(i915))
>   return true;
>  
>   return intel_cpu_transcoder_has_m2_n2(i915, cpu_transcoder);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index c22f29c3faa0..805ae6ca7486 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1252,6 +1252,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  #define HAS_DP_MST(dev_priv) (INTEL_INFO(dev_priv)->display.has_dp_mst)
>  #define HAS_DP20(dev_priv)   (IS_DG2(dev_priv))
>  
> +#define HAS_DOUBLE_BUFFERED_M_N(dev_priv)(DISPLAY_VER(dev_priv) >= 9 || 
> IS_BROADWELL(dev_priv))
> +
>  #define HAS_CDCLK_CRAWL(dev_priv) 
> (INTEL_INFO(dev_priv)->display.has_cdclk_crawl)
>  #define HAS_DDI(dev_priv) (INTEL_INFO(dev_priv)->display.has_ddi)
>  #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) 
> (INTEL_INFO(dev_priv)->display.has_fpga_dbg)

-- 
Jani Nikula, Intel Open Source Graphics Center


[Intel-gfx] [RFC 2/2] drm/i915/display: add intel_display_features.h for feature check macros

2022-06-20 Thread Jani Nikula
Group widely used display feature check macros together in one place.

Signed-off-by: Jani Nikula 
---
 .../drm/i915/display/intel_display_features.h | 37 +++
 .../i915/display/intel_display_power_map.c|  5 +--
 .../drm/i915/display/intel_display_types.h|  1 +
 .../gpu/drm/i915/display/intel_lpe_audio.c|  1 +
 drivers/gpu/drm/i915/i915_drv.h   | 35 --
 drivers/gpu/drm/i915/i915_suspend.c   |  1 +
 drivers/gpu/drm/i915/intel_device_info.c  |  1 +
 drivers/gpu/drm/i915/intel_dram.c |  1 +
 drivers/gpu/drm/i915/intel_pch.c  |  1 +
 9 files changed, 45 insertions(+), 38 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_display_features.h

diff --git a/drivers/gpu/drm/i915/display/intel_display_features.h 
b/drivers/gpu/drm/i915/display/intel_display_features.h
new file mode 100644
index ..019ee4c10252
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_display_features.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2022 Intel Corporation
+ */
+
+#ifndef __INTEL_DISPLAY_FEATURES_H__
+#define __INTEL_DISPLAY_FEATURES_H__
+
+/* Platform based conditions */
+#define HAS_ASYNC_FLIPS(__i915)(DISPLAY_VER(__i915) >= 5)
+#define HAS_D12_PLANE_MINIMIZATION(__i915) (IS_ROCKETLAKE(__i915) || 
IS_ALDERLAKE_S(__i915))
+#define HAS_DP20(__i915)   (IS_DG2(__i915))
+#define HAS_HW_SAGV_WM(__i915) (DISPLAY_VER(__i915) >= 13 && 
!IS_DGFX(__i915))
+#define HAS_IPS(__i915)(IS_HSW_ULT(__i915) || 
IS_BROADWELL(__i915))
+#define HAS_MSO(__i915)(DISPLAY_VER(__i915) >= 12)
+#define HAS_VRR(__i915)(DISPLAY_VER(__i915) >= 11)
+
+/* Device info flags */
+#define HAS_DDI(__i915)
(INTEL_INFO(__i915)->display.has_ddi)
+#define HAS_DISPLAY(__i915)(INTEL_INFO(__i915)->display.pipe_mask 
!= 0)
+#define HAS_DP_MST(__i915) (INTEL_INFO(__i915)->display.has_dp_mst)
+#define HAS_FBC(__i915)
(INTEL_INFO(__i915)->display.fbc_mask != 0)
+#define HAS_GMCH(__i915)   (INTEL_INFO(__i915)->display.has_gmch)
+#define HAS_IPC(__i915)
(INTEL_INFO(__i915)->display.has_ipc)
+#define HAS_PSR(__i915)
(INTEL_INFO(__i915)->display.has_psr)
+#define HAS_TRANSCODER(__i915, trans)  
((INTEL_INFO(__i915)->display.cpu_transcoder_mask & BIT(trans)) != 0)
+#define I915_HAS_HOTPLUG(__i915)   
(INTEL_INFO(__i915)->display.has_hotplug)
+#define INTEL_NUM_PIPES(__i915)
(hweight8(INTEL_INFO(__i915)->display.pipe_mask))
+#define SUPPORTS_TV(__i915)
(INTEL_INFO(__i915)->display.supports_tv)
+
+/* Only valid when HAS_DISPLAY() is true */
+#define INTEL_DISPLAY_ENABLED(__i915) \
+   (drm_WARN_ON(&(__i915)->drm, !HAS_DISPLAY(__i915)), \
+!(__i915)->params.disable_display &&   \
+!intel_opregion_headless_sku(__i915))
+
+#endif /* __INTEL_DISPLAY_FEATURES_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_map.c 
b/drivers/gpu/drm/i915/display/intel_display_power_map.c
index 97b367f39f35..d84fdcdea588 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_map.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c
@@ -5,11 +5,10 @@
 
 #include "i915_drv.h"
 #include "i915_reg.h"
-
-#include "vlv_sideband_reg.h"
-
+#include "intel_display_features.h"
 #include "intel_display_power_map.h"
 #include "intel_display_power_well.h"
+#include "vlv_sideband_reg.h"
 
 #define __LIST_INLINE_ELEMS(__elem_type, ...) \
((__elem_type[]) { __VA_ARGS__ })
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 8b0949b6dc75..9dd008c7b4ec 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -49,6 +49,7 @@
 #include "i915_vma_types.h"
 #include "intel_bios.h"
 #include "intel_display.h"
+#include "intel_display_features.h"
 #include "intel_display_power.h"
 #include "intel_dpll_mgr.h"
 #include "intel_pm_types.h"
diff --git a/drivers/gpu/drm/i915/display/intel_lpe_audio.c 
b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
index 4970bf146c4a..9c89801ebaa7 100644
--- a/drivers/gpu/drm/i915/display/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
@@ -72,6 +72,7 @@
 
 #include "i915_drv.h"
 #include "intel_de.h"
+#include "intel_display_features.h"
 #include "intel_lpe_audio.h"
 
 #define HAS_LPE_AUDIO(dev_priv) ((dev_priv)->audio.lpe.platdev != NULL)
diff --git a/drivers/gpu/

[Intel-gfx] [RFC 1/2] drm/i915/display: spread out HAS_*() feature macros

2022-06-20 Thread Jani Nikula
Expand single-use display feature macros around device info flags
in-place, and remove the macros.

Move display feature macros used in one file only into that file.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_bios.c|  2 ++
 drivers/gpu/drm/i915/display/intel_cdclk.c   |  2 ++
 drivers/gpu/drm/i915/display/intel_cursor.c  |  2 ++
 drivers/gpu/drm/i915/display/intel_dmc.c |  2 ++
 drivers/gpu/drm/i915/display/intel_dsb.c |  2 +-
 drivers/gpu/drm/i915/display/intel_gmbus.c   |  4 
 drivers/gpu/drm/i915/display/intel_overlay.c |  5 ++--
 drivers/gpu/drm/i915/display/intel_psr.c |  3 +++
 drivers/gpu/drm/i915/i915_drv.h  | 25 
 drivers/gpu/drm/i915/intel_pm.c  |  4 
 10 files changed, 23 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
b/drivers/gpu/drm/i915/display/intel_bios.c
index e97f1f979a48..2786a2226d78 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -60,6 +60,8 @@
  * that.
  */
 
+#define HAS_LSPCON(__i915) (IS_DISPLAY_VER(__i915, 9, 10))
+
 /* Wrapper for VBT child device config */
 struct intel_bios_encoder_data {
struct drm_i915_private *i915;
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c 
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 6e80162632dd..1ba70d47407f 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -66,6 +66,8 @@
  * dividers can be programmed correctly.
  */
 
+#define HAS_CDCLK_CRAWL(__i915) (INTEL_INFO(__i915)->display.has_cdclk_crawl)
+
 struct intel_cdclk_funcs {
void (*get_cdclk)(struct drm_i915_private *i915,
  struct intel_cdclk_config *cdclk_config);
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c 
b/drivers/gpu/drm/i915/display/intel_cursor.c
index 8c80de877605..9b38a61b7a6a 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -23,6 +23,8 @@
 #include "intel_psr.h"
 #include "intel_sprite.h"
 
+#define HAS_CUR_FBC(__i915) (!HAS_GMCH(__i915) && DISPLAY_VER(__i915) >= 7)
+
 /* Cursor formats */
 static const u32 intel_cursor_formats[] = {
DRM_FORMAT_ARGB,
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c 
b/drivers/gpu/drm/i915/display/intel_dmc.c
index fa9ef591b885..0480866f61d4 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -38,6 +38,8 @@
  * low-power state and comes back to normal.
  */
 
+#define HAS_DMC(__i915) (INTEL_INFO(__i915)->display.has_dmc)
+
 #define DMC_VERSION(major, minor)  ((major) << 16 | (minor))
 #define DMC_VERSION_MAJOR(version) ((version) >> 16)
 #define DMC_VERSION_MINOR(version) ((version) & 0x)
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c 
b/drivers/gpu/drm/i915/display/intel_dsb.c
index c4affcb216fd..f94235fbd100 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -270,7 +270,7 @@ void intel_dsb_prepare(struct intel_crtc_state *crtc_state)
u32 *buf;
intel_wakeref_t wakeref;
 
-   if (!HAS_DSB(i915))
+   if (!INTEL_INFO(i915)->display.has_dsb)
return;
 
dsb = kmalloc(sizeof(*dsb), GFP_KERNEL);
diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c 
b/drivers/gpu/drm/i915/display/intel_gmbus.c
index a6ba7fb72339..b08e193777ce 100644
--- a/drivers/gpu/drm/i915/display/intel_gmbus.c
+++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
@@ -38,6 +38,10 @@
 #include "intel_display_types.h"
 #include "intel_gmbus.h"
 
+#define HAS_GMBUS_IRQ(__i915) (DISPLAY_VER(__i915) >= 4)
+#define HAS_GMBUS_BURST_READ(__i915) \
+   (DISPLAY_VER(__i915) >= 11 || IS_GEMINILAKE(__i915) || 
IS_KABYLAKE(__i915))
+
 struct intel_gmbus {
struct i2c_adapter adapter;
 #define GMBUS_FORCE_BIT_RETRY (1U << 31)
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c 
b/drivers/gpu/drm/i915/display/intel_overlay.c
index 79ed8bd04a07..fb67da08624a 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -1386,7 +1386,7 @@ void intel_overlay_setup(struct drm_i915_private 
*dev_priv)
struct intel_engine_cs *engine;
int ret;
 
-   if (!HAS_OVERLAY(dev_priv))
+   if (!INTEL_INFO(dev_priv)->display.has_overlay)
return;
 
engine = to_gt(dev_priv)->engine[RCS0];
@@ -1408,7 +1408,8 @@ void intel_overlay_setup(struct drm_i915_private 
*dev_priv)
i915_active_init(>last_flip,
 NULL, intel_overlay_last_flip_retire, 0);
 
-   ret = get_registers(overlay, OVERLAY_NEEDS_PHYSICAL(dev_priv));
+   ret = get_registers(overlay,
+   
INTEL_INFO(dev_priv)->display.overlay_

[Intel-gfx] [RFC 0/2] drm/i915: move display feature check macros out of i915_drv.h

2022-06-20 Thread Jani Nikula
Started pondering about this based on [1]. Spread out single-use and
single-file-use HAS_*() macros, and move display macros to
display/intel_display_features.h.

Food for thought at least. Doesn't look too bad tbh.

BR,
Jani.


[1] https://lore.kernel.org/r/yrcoxugseuzl+...@intel.com

Jani Nikula (2):
  drm/i915/display: spread out HAS_*() feature macros
  drm/i915/display: add intel_display_features.h for feature check
macros

 drivers/gpu/drm/i915/display/intel_bios.c |  2 +
 drivers/gpu/drm/i915/display/intel_cdclk.c|  2 +
 drivers/gpu/drm/i915/display/intel_cursor.c   |  2 +
 .../drm/i915/display/intel_display_features.h | 37 
 .../i915/display/intel_display_power_map.c|  5 +-
 .../drm/i915/display/intel_display_types.h|  1 +
 drivers/gpu/drm/i915/display/intel_dmc.c  |  2 +
 drivers/gpu/drm/i915/display/intel_dsb.c  |  2 +-
 drivers/gpu/drm/i915/display/intel_gmbus.c|  4 ++
 .../gpu/drm/i915/display/intel_lpe_audio.c|  1 +
 drivers/gpu/drm/i915/display/intel_overlay.c  |  5 +-
 drivers/gpu/drm/i915/display/intel_psr.c  |  3 +
 drivers/gpu/drm/i915/i915_drv.h   | 60 ---
 drivers/gpu/drm/i915/i915_suspend.c   |  1 +
 drivers/gpu/drm/i915/intel_device_info.c  |  1 +
 drivers/gpu/drm/i915/intel_dram.c |  1 +
 drivers/gpu/drm/i915/intel_pch.c  |  1 +
 drivers/gpu/drm/i915/intel_pm.c   |  4 ++
 18 files changed, 68 insertions(+), 66 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_display_features.h

-- 
2.30.2



Re: [Intel-gfx] [PATCH v4] drm/i915/bios: calculate panel type as per child device index in VBT

2022-06-20 Thread Jani Nikula
On Mon, 20 Jun 2022, Jani Nikula  wrote:
> On Mon, 20 Jun 2022, Animesh Manna  wrote:
>> Each LFP may have different panel type which is stored in LFP data
>> data block. Based on the child device index respective panel-type/
>> panel-type2 field will be used.
>>
>> v1: Initial rfc verion.
>> v2: Based on review comments from Jani,
>> - Used panel-type instead addition panel-index variable.
>> - DEVICE_HANDLE_* name changed and placed before DEVICE_TYPE_*
>> macro.
>> v3:
>> - passing intel_bios_encoder_data as argument of
>> intel_bios_init_panel(). Passing NULL to indicate encoder is not
>> initialized yet for dsi as current focus is to enable dual EDP. [Jani]
>> v4:
>> - encoder->devdata used which is initialized before from vbt
>> structure. [Jani]
>>
>> Signed-off-by: Animesh Manna 
>
> LGTM, but I'd also like an ack from Ville too as he's been doing a bunch
> of changes around this lately.
>
> Reviewed-by: Jani Nikula 

And pushed to drm-intel-next with Ville's IRC ack.

BR,
Jani.


>
>
>> ---
>>  drivers/gpu/drm/i915/display/icl_dsi.c|  2 +-
>>  drivers/gpu/drm/i915/display/intel_bios.c | 16 ++--
>>  drivers/gpu/drm/i915/display/intel_bios.h |  1 +
>>  drivers/gpu/drm/i915/display/intel_dp.c   |  3 ++-
>>  drivers/gpu/drm/i915/display/intel_lvds.c |  2 +-
>>  drivers/gpu/drm/i915/display/intel_sdvo.c |  2 +-
>>  drivers/gpu/drm/i915/display/intel_vbt_defs.h |  4 
>>  drivers/gpu/drm/i915/display/vlv_dsi.c|  2 +-
>>  8 files changed, 25 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c 
>> b/drivers/gpu/drm/i915/display/icl_dsi.c
>> index 3b5305c219ba..5dcfa7feffa9 100644
>> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
>> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
>> @@ -2050,7 +2050,7 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
>>  /* attach connector to encoder */
>>  intel_connector_attach_encoder(intel_connector, encoder);
>>  
>> -intel_bios_init_panel(dev_priv, _connector->panel, NULL);
>> +intel_bios_init_panel(dev_priv, _connector->panel, NULL, NULL);
>>  
>>  mutex_lock(>mode_config.mutex);
>>  intel_panel_add_vbt_lfp_fixed_mode(intel_connector);
>> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
>> b/drivers/gpu/drm/i915/display/intel_bios.c
>> index 76e86358adb9..e97f1f979a48 100644
>> --- a/drivers/gpu/drm/i915/display/intel_bios.c
>> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
>> @@ -604,12 +604,14 @@ get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
>>  }
>>  
>>  static int opregion_get_panel_type(struct drm_i915_private *i915,
>> +   const struct intel_bios_encoder_data 
>> *devdata,
>> const struct edid *edid)
>>  {
>>  return intel_opregion_get_panel_type(i915);
>>  }
>>  
>>  static int vbt_get_panel_type(struct drm_i915_private *i915,
>> +  const struct intel_bios_encoder_data *devdata,
>>const struct edid *edid)
>>  {
>>  const struct bdb_lvds_options *lvds_options;
>> @@ -625,10 +627,16 @@ static int vbt_get_panel_type(struct drm_i915_private 
>> *i915,
>>  return -1;
>>  }
>>  
>> +if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2)
>> +return lvds_options->panel_type2;
>> +
>> +drm_WARN_ON(>drm, devdata && devdata->child.handle != 
>> DEVICE_HANDLE_LFP1);
>> +
>>  return lvds_options->panel_type;
>>  }
>>  
>>  static int pnpid_get_panel_type(struct drm_i915_private *i915,
>> +const struct intel_bios_encoder_data *devdata,
>>  const struct edid *edid)
>>  {
>>  const struct bdb_lvds_lfp_data *data;
>> @@ -675,6 +683,7 @@ static int pnpid_get_panel_type(struct drm_i915_private 
>> *i915,
>>  }
>>  
>>  static int fallback_get_panel_type(struct drm_i915_private *i915,
>> +   const struct intel_bios_encoder_data 
>> *devdata,
>> const struct edid *edid)
>>  {
>>  return 0;
>> @@ -688,11 +697,13 @@ enum panel_type {
>>  };
>>  
>>  static int get_panel_type(struct drm_i915_private *i915,
>> +  const struct intel_bios_encoder_data *devdata,
>>const s

Re: [Intel-gfx] [PATCH 1/2] drm/i915/display: split out hw state readout and sanitize

2022-06-20 Thread Jani Nikula
On Fri, 17 Jun 2022, Jani Nikula  wrote:
> Split out the modeset hardware state readout and sanitize, or state
> setup, to a separate file.
>
> Do some drive-by checkpatch fixes while at it.
>
> v2: Rebase
>
> Signed-off-by: Jani Nikula 
> Reviewed-by: Ville Syrjälä  # v1

Both patches pushed to drm-intel-next, thanks for the review.

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/Makefile |   1 +
>  drivers/gpu/drm/i915/display/intel_display.c  | 739 +-
>  drivers/gpu/drm/i915/display/intel_display.h  |  12 +
>  .../drm/i915/display/intel_modeset_setup.c| 736 +
>  .../drm/i915/display/intel_modeset_setup.h|  15 +
>  5 files changed, 778 insertions(+), 725 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/display/intel_modeset_setup.c
>  create mode 100644 drivers/gpu/drm/i915/display/intel_modeset_setup.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 37a8ea56f7d6..c84a9cd8440d 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -244,6 +244,7 @@ i915-y += \
>   display/intel_hotplug.o \
>   display/intel_lpe_audio.o \
>   display/intel_modeset_verify.o \
> + display/intel_modeset_setup.o \
>   display/intel_overlay.o \
>   display/intel_pch_display.o \
>   display/intel_pch_refclk.o \
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 90bd26431e31..710a51f14649 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -101,6 +101,7 @@
>  #include "intel_hdcp.h"
>  #include "intel_hotplug.h"
>  #include "intel_modeset_verify.h"
> +#include "intel_modeset_setup.h"
>  #include "intel_overlay.h"
>  #include "intel_panel.h"
>  #include "intel_pch_display.h"
> @@ -130,8 +131,6 @@ static void ilk_set_pipeconf(const struct 
> intel_crtc_state *crtc_state);
>  static void hsw_set_transconf(const struct intel_crtc_state *crtc_state);
>  static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state);
>  static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state);
> -static void intel_modeset_setup_hw_state(struct drm_device *dev,
> -  struct drm_modeset_acquire_ctx *ctx);
>  
>  /**
>   * intel_update_watermarks - update FIFO watermark values based on current 
> modes
> @@ -166,7 +165,7 @@ static void intel_modeset_setup_hw_state(struct 
> drm_device *dev,
>   * We don't use the sprite, so we can ignore that.  And on Crestline we have
>   * to set the non-SR watermarks to 8.
>   */
> -static void intel_update_watermarks(struct drm_i915_private *dev_priv)
> +void intel_update_watermarks(struct drm_i915_private *dev_priv)
>  {
>   if (dev_priv->wm_disp->update_wm)
>   dev_priv->wm_disp->update_wm(dev_priv);
> @@ -733,10 +732,9 @@ u32 intel_plane_fb_max_stride(struct drm_i915_private 
> *dev_priv,
>DRM_MODE_ROTATE_0);
>  }
>  
> -static void
> -intel_set_plane_visible(struct intel_crtc_state *crtc_state,
> - struct intel_plane_state *plane_state,
> - bool visible)
> +void intel_set_plane_visible(struct intel_crtc_state *crtc_state,
> +  struct intel_plane_state *plane_state,
> +  bool visible)
>  {
>   struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
>  
> @@ -748,7 +746,7 @@ intel_set_plane_visible(struct intel_crtc_state 
> *crtc_state,
>   crtc_state->uapi.plane_mask &= ~drm_plane_mask(>base);
>  }
>  
> -static void fixup_plane_bitmasks(struct intel_crtc_state *crtc_state)
> +void intel_plane_fixup_bitmasks(struct intel_crtc_state *crtc_state)
>  {
>   struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
>   struct drm_plane *plane;
> @@ -783,7 +781,7 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc,
>   crtc->base.base.id, crtc->base.name);
>  
>   intel_set_plane_visible(crtc_state, plane_state, false);
> - fixup_plane_bitmasks(crtc_state);
> + intel_plane_fixup_bitmasks(crtc_state);
>   crtc_state->data_rate[plane->id] = 0;
>   crtc_state->data_rate_y[plane->id] = 0;
>   crtc_state->rel_data_rate[plane->id] = 0;
> @@ -2209,9 +2207,8 @@ static void get_crtc_power_domains(struct 
> intel_crtc_state *crtc_state,
>   set_bit(intel_dsc_power_domain(crtc, cpu_transcoder), 
> mask->bits);

Re: [Intel-gfx] [PATCH] drm/i915/display: Re-add check for low voltage sku for max dp source rate

2022-06-20 Thread Jani Nikula
On Mon, 20 Jun 2022, "Jason A. Donenfeld"  wrote:
> Hi Jani,
>
> On Mon, Jun 20, 2022 at 07:10:30PM +0300, Jani Nikula wrote:
>> On Mon, 20 Jun 2022, "Jason A. Donenfeld"  wrote:
>> > Hi Jani,
>> >
>> > Do you plan to merge this revert?
>> 
>> Yes, I've done that now, thanks for the bisection and the patch.
>
> Thanks!
>
> I see that this went into `drm-intel-next`, but shouldn't it go into
> `drm-intel-fixes`, so that it makes it into 5.19-rc4?

All of our commits go to drm-intel-next first. I'll pick it up for fixes
later.

BR,
Jani.



-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH] drm/i915/display: Re-add check for low voltage sku for max dp source rate

2022-06-20 Thread Jani Nikula
On Mon, 20 Jun 2022, "Jason A. Donenfeld"  wrote:
> Hi Jani,
>
> Do you plan to merge this revert?

Yes, I've done that now, thanks for the bisection and the patch.

Ankit, Imre, we need to figure out what to do with [1] now.

BR,
Jani.


[1] https://gitlab.freedesktop.org/drm/intel/-/issues/5272



-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH] drm/i915/gem: remove unused assignments

2022-06-20 Thread Jani Nikula
On Mon, 20 Jun 2022, zys.zlj...@gmail.com wrote:
> From: katrinzhou 
>
> The variable ret is reassigned and the value EINVAL is never used.
> Thus, remove the unused assignments.

It's obviously a bug, but it's not obvious just throwing the code away
is the fix. Maybe there's a missing "else" instead.

BR,
Jani.


>
> Addresses-Coverity: ("Unused value")
> Fixes: d4433c7600f7 ("drm/i915/gem: Use the proto-context to handle create 
> parameters (v5)")
> Signed-off-by: katrinzhou 
> ---
>  drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
> b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index ab4c5ab28e4d..d5ef5243673a 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -931,8 +931,6 @@ static int set_proto_ctx_param(struct 
> drm_i915_file_private *fpriv,
>   break;
>  
>   case I915_CONTEXT_PARAM_PERSISTENCE:
> - if (args->size)
> - ret = -EINVAL;
>   ret = proto_context_set_persistence(fpriv->dev_priv, pc,
>   args->value);
>   break;

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH v2 03/16] drm/i915: Extract has_double_buffered_m_n()

2022-06-20 Thread Jani Nikula
On Fri, 17 Jun 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> We have a couple of places that want to make distinction between
> double buffered M/N registers vs. the split M1/N1+M2/N2 registers.
> Add a helper for that.
>
> Signed-off-by: Ville Syrjälä 

Mhh. So why a function in intel_display.c instead of a macro in
i915_drv.h? Both are kind of cluttered, but at least in i915_drv.h it
would be among others.

I do think we should have a separate file for display feature check
macros, and move most if not all of the display related HAS_*() stuff
there from i915_drv.h.

So technically this does what it says on the box, and in that sense,

Reviewed-by: Jani Nikula 

but I don't much like the example and precedence this function sets.


> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 7 ++-
>  drivers/gpu/drm/i915/display/intel_display.h | 1 +
>  drivers/gpu/drm/i915/display/intel_dp.c  | 3 +--
>  3 files changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index b24784c4522d..5559688047b3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2798,6 +2798,11 @@ static int intel_crtc_compute_config(struct 
> intel_atomic_state *state,
>   return 0;
>  }
>  
> +bool has_double_buffered_m_n(struct drm_i915_private *i915)
> +{
> + return DISPLAY_VER(i915) >= 9 || IS_BROADWELL(i915);
> +}
> +
>  static void
>  intel_reduce_m_n_ratio(u32 *num, u32 *den)
>  {
> @@ -5900,7 +5905,7 @@ intel_pipe_config_compare(const struct intel_crtc_state 
> *current_config,
>   PIPE_CONF_CHECK_I(lane_count);
>   PIPE_CONF_CHECK_X(lane_lat_optim_mask);
>  
> - if (DISPLAY_VER(dev_priv) >= 9 || IS_BROADWELL(dev_priv)) {
> + if (has_double_buffered_m_n(dev_priv)) {
>   PIPE_CONF_CHECK_M_N_ALT(dp_m_n, dp_m2_n2);
>   } else {
>   PIPE_CONF_CHECK_M_N(dp_m_n);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h 
> b/drivers/gpu/drm/i915/display/intel_display.h
> index 2feb8ae5d5d4..44c88aadfc30 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -543,6 +543,7 @@ int intel_atomic_add_affected_planes(struct 
> intel_atomic_state *state,
>struct intel_crtc *crtc);
>  u8 intel_calc_active_pipes(struct intel_atomic_state *state,
>  u8 active_pipes);
> +bool has_double_buffered_m_n(struct drm_i915_private *i915);
>  void intel_link_compute_m_n(u16 bpp, int nlanes,
>   int pixel_clock, int link_clock,
>   struct intel_link_m_n *m_n,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 2fac76bcf06d..75645508080a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1842,8 +1842,7 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct 
> intel_dp *intel_dp,
>  static bool cpu_transcoder_has_drrs(struct drm_i915_private *i915,
>   enum transcoder cpu_transcoder)
>  {
> - /* M1/N1 is double buffered */
> -     if (DISPLAY_VER(i915) >= 9 || IS_BROADWELL(i915))
> + if (has_double_buffered_m_n(i915))
>   return true;
>  
>   return intel_cpu_transcoder_has_m2_n2(i915, cpu_transcoder);

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH v2 02/16] drm/i915: Shuffle some PLL code around

2022-06-20 Thread Jani Nikula
On Fri, 17 Jun 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Shuffle some PLL functions around a bit to avoid ugle
> forward declarations later on. No functional changes.
>
> Signed-off-by: Ville Syrjälä 

Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 176 +-
>  1 file changed, 88 insertions(+), 88 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c 
> b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index ddae7e42ac46..bfccc96f16fe 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -905,37 +905,6 @@ hsw_ddi_calculate_wrpll(int clock /* in Hz */,
>   *r2_out = best.r2;
>  }
>  
> -static int
> -hsw_ddi_wrpll_compute_dpll(struct intel_atomic_state *state,
> -struct intel_crtc *crtc)
> -{
> - struct intel_crtc_state *crtc_state =
> - intel_atomic_get_new_crtc_state(state, crtc);
> - unsigned int p, n2, r2;
> -
> - hsw_ddi_calculate_wrpll(crtc_state->port_clock * 1000, , , );
> -
> - crtc_state->dpll_hw_state.wrpll =
> - WRPLL_PLL_ENABLE | WRPLL_REF_LCPLL |
> - WRPLL_DIVIDER_REFERENCE(r2) | WRPLL_DIVIDER_FEEDBACK(n2) |
> - WRPLL_DIVIDER_POST(p);
> -
> - return 0;
> -}
> -
> -static struct intel_shared_dpll *
> -hsw_ddi_wrpll_get_dpll(struct intel_atomic_state *state,
> -struct intel_crtc *crtc)
> -{
> - struct intel_crtc_state *crtc_state =
> - intel_atomic_get_new_crtc_state(state, crtc);
> -
> - return intel_find_shared_dpll(state, crtc,
> -   _state->dpll_hw_state,
> -   BIT(DPLL_ID_WRPLL2) |
> -   BIT(DPLL_ID_WRPLL1));
> -}
> -
>  static int hsw_ddi_wrpll_get_freq(struct drm_i915_private *dev_priv,
> const struct intel_shared_dpll *pll,
> const struct intel_dpll_hw_state *pll_state)
> @@ -976,6 +945,37 @@ static int hsw_ddi_wrpll_get_freq(struct 
> drm_i915_private *dev_priv,
>   return (refclk * n / 10) / (p * r) * 2;
>  }
>  
> +static int
> +hsw_ddi_wrpll_compute_dpll(struct intel_atomic_state *state,
> +struct intel_crtc *crtc)
> +{
> + struct intel_crtc_state *crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> + unsigned int p, n2, r2;
> +
> + hsw_ddi_calculate_wrpll(crtc_state->port_clock * 1000, , , );
> +
> + crtc_state->dpll_hw_state.wrpll =
> + WRPLL_PLL_ENABLE | WRPLL_REF_LCPLL |
> + WRPLL_DIVIDER_REFERENCE(r2) | WRPLL_DIVIDER_FEEDBACK(n2) |
> + WRPLL_DIVIDER_POST(p);
> +
> + return 0;
> +}
> +
> +static struct intel_shared_dpll *
> +hsw_ddi_wrpll_get_dpll(struct intel_atomic_state *state,
> +struct intel_crtc *crtc)
> +{
> + struct intel_crtc_state *crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> +
> + return intel_find_shared_dpll(state, crtc,
> +   _state->dpll_hw_state,
> +   BIT(DPLL_ID_WRPLL2) |
> +   BIT(DPLL_ID_WRPLL1));
> +}
> +
>  static int
>  hsw_ddi_lcpll_compute_dpll(struct intel_crtc_state *crtc_state)
>  {
> @@ -1618,43 +1618,6 @@ skl_ddi_calculate_wrpll(int clock /* in Hz */,
>   return 0;
>  }
>  
> -static int skl_ddi_hdmi_pll_dividers(struct intel_crtc_state *crtc_state)
> -{
> - struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
> - struct skl_wrpll_params wrpll_params = {};
> - u32 ctrl1, cfgcr1, cfgcr2;
> - int ret;
> -
> - /*
> -  * See comment in intel_dpll_hw_state to understand why we always use 0
> -  * as the DPLL id in this function.
> -  */
> - ctrl1 = DPLL_CTRL1_OVERRIDE(0);
> -
> - ctrl1 |= DPLL_CTRL1_HDMI_MODE(0);
> -
> - ret = skl_ddi_calculate_wrpll(crtc_state->port_clock * 1000,
> -   i915->dpll.ref_clks.nssc, _params);
> - if (ret)
> - return ret;
> -
> - cfgcr1 = DPLL_CFGCR1_FREQ_ENABLE |
> - DPLL_CFGCR1_DCO_FRACTION(wrpll_params.dco_fraction) |
> - wrpll_params.dco_integer;
> -
> - cfgcr2 = DPLL_CFGCR2_QDIV_RATIO(wrpll_params.qdiv_ratio) |
> - DPLL_CFGCR2_QDIV_MODE(wrpll_params.qdiv_mode) |
> - DPLL_CFGCR2_KDIV(wrpll_params.kdiv) |
> - DPLL_CFGCR2_PDIV(wrpll_params.pdiv) |
> 

Re: [Intel-gfx] [PATCH v2 01/16] drm/i915: Relocate intel_crtc_dotclock()

2022-06-20 Thread Jani Nikula
On Fri, 17 Jun 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> intel_crtc_dotclock() is a bit misplaced. In lieu of a better
> place let's just move it next to its friends in intel_display.c.

With hopes we'll find a better place than intel_display.c for this and
its friends in the future,

Reviewed-by: Jani Nikula 


>
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 22 
>  drivers/gpu/drm/i915/display/intel_display.c | 22 
>  2 files changed, 22 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 272e1bf6006b..51bf26dcb209 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -323,28 +323,6 @@ static int icl_calc_tbt_pll_link(struct drm_i915_private 
> *dev_priv,
>   }
>  }
>  
> -int intel_crtc_dotclock(const struct intel_crtc_state *pipe_config)
> -{
> - int dotclock;
> -
> - if (intel_crtc_has_dp_encoder(pipe_config))
> - dotclock = intel_dotclock_calculate(pipe_config->port_clock,
> - _config->dp_m_n);
> - else if (pipe_config->has_hdmi_sink && pipe_config->pipe_bpp > 24)
> - dotclock = pipe_config->port_clock * 24 / pipe_config->pipe_bpp;
> - else
> - dotclock = pipe_config->port_clock;
> -
> - if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 &&
> - !intel_crtc_has_dp_encoder(pipe_config))
> - dotclock *= 2;
> -
> - if (pipe_config->pixel_multiplier)
> - dotclock /= pipe_config->pixel_multiplier;
> -
> - return dotclock;
> -}
> -
>  static void ddi_dotclock_get(struct intel_crtc_state *pipe_config)
>  {
>   /* CRT dotclock is determined via other means */
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 90bd26431e31..b24784c4522d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4569,6 +4569,28 @@ int intel_dotclock_calculate(int link_freq,
>   return div_u64(mul_u32_u32(m_n->link_m, link_freq), m_n->link_n);
>  }
>  
> +int intel_crtc_dotclock(const struct intel_crtc_state *pipe_config)
> +{
> + int dotclock;
> +
> + if (intel_crtc_has_dp_encoder(pipe_config))
> + dotclock = intel_dotclock_calculate(pipe_config->port_clock,
> + _config->dp_m_n);
> + else if (pipe_config->has_hdmi_sink && pipe_config->pipe_bpp > 24)
> + dotclock = pipe_config->port_clock * 24 / pipe_config->pipe_bpp;
> + else
> + dotclock = pipe_config->port_clock;
> +
> + if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 &&
> + !intel_crtc_has_dp_encoder(pipe_config))
> + dotclock *= 2;
> +
> + if (pipe_config->pixel_multiplier)
> + dotclock /= pipe_config->pixel_multiplier;
> +
> + return dotclock;
> +}
> +
>  /* Returns the currently programmed mode of the given encoder. */
>  struct drm_display_mode *
>  intel_encoder_current_mode(struct intel_encoder *encoder)

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH 00/16] drm/i915: stop modifying "const" device info

2022-06-20 Thread Jani Nikula
On Mon, 20 Jun 2022, Jani Nikula  wrote:
> Move any device info that gets modified runtime into runtime info,
> making device info a const pointer. Finally throw mkwrite_device_info()
> into the curb.

Had some SMTP issues sending this series, sorry if you got multiple
copies of some patches.

BR,
Jani.

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH v4] drm/i915/bios: calculate panel type as per child device index in VBT

2022-06-20 Thread Jani Nikula
On Mon, 20 Jun 2022, Animesh Manna  wrote:
> Each LFP may have different panel type which is stored in LFP data
> data block. Based on the child device index respective panel-type/
> panel-type2 field will be used.
>
> v1: Initial rfc verion.
> v2: Based on review comments from Jani,
> - Used panel-type instead addition panel-index variable.
> - DEVICE_HANDLE_* name changed and placed before DEVICE_TYPE_*
> macro.
> v3:
> - passing intel_bios_encoder_data as argument of
> intel_bios_init_panel(). Passing NULL to indicate encoder is not
> initialized yet for dsi as current focus is to enable dual EDP. [Jani]
> v4:
> - encoder->devdata used which is initialized before from vbt
> structure. [Jani]
>
> Signed-off-by: Animesh Manna 

LGTM, but I'd also like an ack from Ville too as he's been doing a bunch
of changes around this lately.

Reviewed-by: Jani Nikula 


> ---
>  drivers/gpu/drm/i915/display/icl_dsi.c|  2 +-
>  drivers/gpu/drm/i915/display/intel_bios.c | 16 ++--
>  drivers/gpu/drm/i915/display/intel_bios.h |  1 +
>  drivers/gpu/drm/i915/display/intel_dp.c   |  3 ++-
>  drivers/gpu/drm/i915/display/intel_lvds.c |  2 +-
>  drivers/gpu/drm/i915/display/intel_sdvo.c |  2 +-
>  drivers/gpu/drm/i915/display/intel_vbt_defs.h |  4 
>  drivers/gpu/drm/i915/display/vlv_dsi.c|  2 +-
>  8 files changed, 25 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c 
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 3b5305c219ba..5dcfa7feffa9 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -2050,7 +2050,7 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
>   /* attach connector to encoder */
>   intel_connector_attach_encoder(intel_connector, encoder);
>  
> - intel_bios_init_panel(dev_priv, _connector->panel, NULL);
> + intel_bios_init_panel(dev_priv, _connector->panel, NULL, NULL);
>  
>   mutex_lock(>mode_config.mutex);
>   intel_panel_add_vbt_lfp_fixed_mode(intel_connector);
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 76e86358adb9..e97f1f979a48 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -604,12 +604,14 @@ get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
>  }
>  
>  static int opregion_get_panel_type(struct drm_i915_private *i915,
> +const struct intel_bios_encoder_data 
> *devdata,
>  const struct edid *edid)
>  {
>   return intel_opregion_get_panel_type(i915);
>  }
>  
>  static int vbt_get_panel_type(struct drm_i915_private *i915,
> +   const struct intel_bios_encoder_data *devdata,
> const struct edid *edid)
>  {
>   const struct bdb_lvds_options *lvds_options;
> @@ -625,10 +627,16 @@ static int vbt_get_panel_type(struct drm_i915_private 
> *i915,
>   return -1;
>   }
>  
> + if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2)
> + return lvds_options->panel_type2;
> +
> + drm_WARN_ON(>drm, devdata && devdata->child.handle != 
> DEVICE_HANDLE_LFP1);
> +
>   return lvds_options->panel_type;
>  }
>  
>  static int pnpid_get_panel_type(struct drm_i915_private *i915,
> + const struct intel_bios_encoder_data *devdata,
>   const struct edid *edid)
>  {
>   const struct bdb_lvds_lfp_data *data;
> @@ -675,6 +683,7 @@ static int pnpid_get_panel_type(struct drm_i915_private 
> *i915,
>  }
>  
>  static int fallback_get_panel_type(struct drm_i915_private *i915,
> +const struct intel_bios_encoder_data 
> *devdata,
>  const struct edid *edid)
>  {
>   return 0;
> @@ -688,11 +697,13 @@ enum panel_type {
>  };
>  
>  static int get_panel_type(struct drm_i915_private *i915,
> +   const struct intel_bios_encoder_data *devdata,
> const struct edid *edid)
>  {
>   struct {
>   const char *name;
>   int (*get_panel_type)(struct drm_i915_private *i915,
> +   const struct intel_bios_encoder_data 
> *devdata,
> const struct edid *edid);
>   int panel_type;
>   } panel_types[] = {
> @@ -716,7 +727,7 @@ static int get_panel_type(struct drm_i915_private *i915,
>   int i;
>  
>   for (i = 0; i <

[Intel-gfx] [PATCH 16/16] drm/i915: make device info a pointer to static const data

2022-06-20 Thread Jani Nikula
Now that the device info is no longer modified runtime, we don't need to
make a copy of it, and we can convert i915->__info into a pointer to
static const data. Also remove mkwrite_device_info().

This does increase the text size slightly.

Signed-off-by: Jani Nikula 

---

An alternative is to keep copying device info, but casting away the
const only once at the copy time, removing mkwrite_device_info().
---
 drivers/gpu/drm/i915/i915_driver.c |  8 ++--
 drivers/gpu/drm/i915/i915_drv.h| 11 ++-
 2 files changed, 4 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_driver.c 
b/drivers/gpu/drm/i915/i915_driver.c
index 5969cc7805d3..9c9c492e97a8 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -793,9 +793,6 @@ static void i915_welcome_messages(struct drm_i915_private 
*dev_priv)
 static struct drm_i915_private *
 i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
-   const struct intel_device_info *match_info =
-   (struct intel_device_info *)ent->driver_data;
-   struct intel_device_info *device_info;
struct intel_runtime_info *runtime;
struct drm_i915_private *i915;
 
@@ -809,9 +806,8 @@ i915_driver_create(struct pci_dev *pdev, const struct 
pci_device_id *ent)
/* Device parameters start as a copy of module parameters. */
i915_params_copy(>params, _modparams);
 
-   /* Setup the write-once "constant" device info */
-   device_info = mkwrite_device_info(i915);
-   memcpy(device_info, match_info, sizeof(*device_info));
+   /* Static const device info. */
+   i915->__info = (const struct intel_device_info *)ent->driver_data;
 
/* Initialize initial runtime info from static const data and pdev. */
runtime = RUNTIME_INFO(i915);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 89472440947c..a2a57f07c5be 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -380,7 +380,7 @@ struct drm_i915_private {
/* i915 device parameters */
struct i915_params params;
 
-   const struct intel_device_info __info; /* Use INTEL_INFO() to access. */
+   const struct intel_device_info *__info; /* Use INTEL_INFO() to access. 
*/
struct intel_runtime_info __runtime; /* Use RUNTIME_INFO() to access. */
struct intel_driver_caps caps;
 
@@ -848,7 +848,7 @@ static inline struct intel_gt *to_gt(struct 
drm_i915_private *i915)
GENMASK(INTEL_FRONTBUFFER_BITS_PER_PIPE * ((pipe) + 1) - 1, \
INTEL_FRONTBUFFER_BITS_PER_PIPE * (pipe))
 
-#define INTEL_INFO(dev_priv)   (&(dev_priv)->__info)
+#define INTEL_INFO(__i915) (__i915->__info)
 #define RUNTIME_INFO(dev_priv) (&(dev_priv)->__runtime)
 #define DRIVER_CAPS(dev_priv)  (&(dev_priv)->caps)
 
@@ -1432,13 +1432,6 @@ void i915_gem_driver_release(struct drm_i915_private 
*dev_priv);
 
 int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file);
 
-/* intel_device_info.c */
-static inline struct intel_device_info *
-mkwrite_device_info(struct drm_i915_private *dev_priv)
-{
-   return (struct intel_device_info *)INTEL_INFO(dev_priv);
-}
-
 static inline enum i915_map_type
 i915_coherent_map_type(struct drm_i915_private *i915,
   struct drm_i915_gem_object *obj, bool always_coherent)
-- 
2.30.2



[Intel-gfx] [PATCH 15/16] drm/i915: stop resetting display info to zero for no display

2022-06-20 Thread Jani Nikula
This is the last blocker in making device info a pointer to const
data. Hopefully resetting pipe_mask to 0 and thus ensuring HAS_DISPLAY()
is false is enough, and we don't go ahead and do something with the
display info regardless. Fingers crossed.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/intel_device_info.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
b/drivers/gpu/drm/i915/intel_device_info.c
index 12c776900a40..84e6a54c82ff 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -283,7 +283,6 @@ void intel_device_info_subplatform_init(struct 
drm_i915_private *i915)
  */
 void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
 {
-   struct intel_device_info *info = mkwrite_device_info(dev_priv);
struct intel_runtime_info *runtime = RUNTIME_INFO(dev_priv);
enum pipe pipe;
 
@@ -409,7 +408,6 @@ void intel_device_info_runtime_init(struct drm_i915_private 
*dev_priv)
if (!HAS_DISPLAY(dev_priv)) {
dev_priv->drm.driver_features &= ~(DRIVER_MODESET |
   DRIVER_ATOMIC);
-   memset(>display, 0, sizeof(info->display));
memset(runtime->num_sprites, 0, sizeof(runtime->num_sprites));
memset(runtime->num_scalers, 0, sizeof(runtime->num_scalers));
}
-- 
2.30.2



[Intel-gfx] [PATCH 14/16] drm/i915: move has_dsc to runtime info

2022-06-20 Thread Jani Nikula
If it's modified runtime, it's runtime info.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 2 +-
 drivers/gpu/drm/i915/i915_pci.c   | 4 ++--
 drivers/gpu/drm/i915/intel_device_info.c  | 3 ++-
 drivers/gpu/drm/i915/intel_device_info.h  | 2 +-
 4 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c 
b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 43e1bbc1e303..bb5c5fa3f157 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -344,7 +344,7 @@ bool intel_dsc_source_support(const struct intel_crtc_state 
*crtc_state)
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 
-   if (!INTEL_INFO(i915)->display.has_dsc)
+   if (!RUNTIME_INFO(i915)->has_dsc)
return false;
 
if (DISPLAY_VER(i915) >= 12)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index c6637a4982ed..687b49549d13 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -829,7 +829,7 @@ static const struct intel_device_info cml_gt2_info = {
ICL_COLORS, \
.dbuf.size = 2048, \
.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \
-   .display.has_dsc = 1, \
+   .__runtime.has_dsc = 1, \
.has_coherent_ggtt = false, \
.has_logical_ring_elsq = 1
 
@@ -958,7 +958,7 @@ static const struct intel_device_info adl_s_info = {
.__runtime.has_dmc = 1, 
\
.display.has_dp_mst = 1,
\
.display.has_dsb = 1,   
\
-   .display.has_dsc = 1,   
\
+   .__runtime.has_dsc = 1, 
\
.__runtime.fbc_mask = BIT(INTEL_FBC_A), 
\
.display.has_fpga_dbg = 1,  
\
.__runtime.has_hdcp = 1,
\
diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
b/drivers/gpu/drm/i915/intel_device_info.c
index ed5ad5c60db6..12c776900a40 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -127,6 +127,7 @@ void intel_device_info_print(const struct intel_device_info 
*info,
 
drm_printf(p, "has_hdcp: %s\n", str_yes_no(runtime->has_hdcp));
drm_printf(p, "has_dmc: %s\n", str_yes_no(runtime->has_dmc));
+   drm_printf(p, "has_dsc: %s\n", str_yes_no(runtime->has_dsc));
 
drm_printf(p, "rawclk rate: %u kHz\n", runtime->rawclk_freq);
 }
@@ -393,7 +394,7 @@ void intel_device_info_runtime_init(struct drm_i915_private 
*dev_priv)
 
if (DISPLAY_VER(dev_priv) >= 10 &&
(dfsm & GLK_DFSM_DISPLAY_DSC_DISABLE))
-   info->display.has_dsc = 0;
+   runtime->has_dsc = 0;
}
 
if (GRAPHICS_VER(dev_priv) == 6 && i915_vtd_active(dev_priv)) {
diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
b/drivers/gpu/drm/i915/intel_device_info.h
index 0a3c925d02b7..daeaaad325b7 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -176,7 +176,6 @@ enum intel_ppgtt_type {
func(has_ddi); \
func(has_dp_mst); \
func(has_dsb); \
-   func(has_dsc); \
func(has_fpga_dbg); \
func(has_gmch); \
func(has_hotplug); \
@@ -236,6 +235,7 @@ struct intel_runtime_info {
 
bool has_hdcp;
bool has_dmc;
+   bool has_dsc;
};
 };
 
-- 
2.30.2



[Intel-gfx] [PATCH 13/16] drm/i915: move has_dmc to runtime info

2022-06-20 Thread Jani Nikula
If it's modified runtime, it's runtime info.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_drv.h  | 2 +-
 drivers/gpu/drm/i915/i915_pci.c  | 6 +++---
 drivers/gpu/drm/i915/intel_device_info.c | 3 ++-
 drivers/gpu/drm/i915/intel_device_info.h | 2 +-
 4 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5bb1f0e9368c..89472440947c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1267,7 +1267,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_RPS(dev_priv)  (INTEL_INFO(dev_priv)->has_rps)
 
-#define HAS_DMC(dev_priv)  (INTEL_INFO(dev_priv)->display.has_dmc)
+#define HAS_DMC(dev_priv)  (RUNTIME_INFO(dev_priv)->has_dmc)
 
 #define HAS_HECI_PXP(dev_priv) \
(INTEL_INFO(dev_priv)->has_heci_pxp)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 11c236b6a017..c6637a4982ed 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -650,7 +650,7 @@ static const struct intel_device_info chv_info = {
GEN8_FEATURES, \
GEN(9), \
GEN9_DEFAULT_PAGE_SIZES, \
-   .display.has_dmc = 1, \
+   .__runtime.has_dmc = 1, \
.has_gt_uc = 1, \
.__runtime.has_hdcp = 1, \
.display.has_ipc = 1, \
@@ -708,7 +708,7 @@ static const struct intel_device_info skl_gt4_info = {
.display.has_psr = 1, \
.display.has_psr_hw_tracking = 1, \
.has_runtime_pm = 1, \
-   .display.has_dmc = 1, \
+   .__runtime.has_dmc = 1, \
.has_rc6 = 1, \
.has_rps = true, \
.display.has_dp_mst = 1, \
@@ -955,7 +955,7 @@ static const struct intel_device_info adl_s_info = {
.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | 
\
BIT(DBUF_S4),   
\
.display.has_ddi = 1,   
\
-   .display.has_dmc = 1,   
\
+   .__runtime.has_dmc = 1, 
\
.display.has_dp_mst = 1,
\
.display.has_dsb = 1,   
\
.display.has_dsc = 1,   
\
diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
b/drivers/gpu/drm/i915/intel_device_info.c
index 26c883c05e44..ed5ad5c60db6 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -126,6 +126,7 @@ void intel_device_info_print(const struct intel_device_info 
*info,
 #undef PRINT_FLAG
 
drm_printf(p, "has_hdcp: %s\n", str_yes_no(runtime->has_hdcp));
+   drm_printf(p, "has_dmc: %s\n", str_yes_no(runtime->has_dmc));
 
drm_printf(p, "rawclk rate: %u kHz\n", runtime->rawclk_freq);
 }
@@ -388,7 +389,7 @@ void intel_device_info_runtime_init(struct drm_i915_private 
*dev_priv)
runtime->fbc_mask = 0;
 
if (DISPLAY_VER(dev_priv) >= 11 && (dfsm & 
ICL_DFSM_DMC_DISABLE))
-   info->display.has_dmc = 0;
+   runtime->has_dmc = 0;
 
if (DISPLAY_VER(dev_priv) >= 10 &&
(dfsm & GLK_DFSM_DISPLAY_DSC_DISABLE))
diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
b/drivers/gpu/drm/i915/intel_device_info.h
index 76317db394b7..0a3c925d02b7 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -173,7 +173,6 @@ enum intel_ppgtt_type {
/* Keep in alphabetical order */ \
func(cursor_needs_physical); \
func(has_cdclk_crawl); \
-   func(has_dmc); \
func(has_ddi); \
func(has_dp_mst); \
func(has_dsb); \
@@ -236,6 +235,7 @@ struct intel_runtime_info {
u8 fbc_mask;
 
bool has_hdcp;
+   bool has_dmc;
};
 };
 
-- 
2.30.2



[Intel-gfx] [PATCH 12/16] drm/i915: move has_hdcp to runtime info

2022-06-20 Thread Jani Nikula
If it's modified runtime, it's runtime info.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_hdcp.c | 4 ++--
 drivers/gpu/drm/i915/i915_pci.c   | 6 +++---
 drivers/gpu/drm/i915/intel_device_info.c  | 4 +++-
 drivers/gpu/drm/i915/intel_device_info.h  | 3 ++-
 4 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c 
b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 8ea66a2e1b09..123aecde7a2a 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1109,8 +1109,8 @@ static void intel_hdcp_prop_work(struct work_struct *work)
 
 bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port)
 {
-   return INTEL_INFO(dev_priv)->display.has_hdcp &&
-   (DISPLAY_VER(dev_priv) >= 12 || port < PORT_E);
+   return RUNTIME_INFO(dev_priv)->has_hdcp &&
+   (DISPLAY_VER(dev_priv) >= 12 || port < PORT_E);
 }
 
 static int
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index e9e036bec732..11c236b6a017 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -652,7 +652,7 @@ static const struct intel_device_info chv_info = {
GEN9_DEFAULT_PAGE_SIZES, \
.display.has_dmc = 1, \
.has_gt_uc = 1, \
-   .display.has_hdcp = 1, \
+   .__runtime.has_hdcp = 1, \
.display.has_ipc = 1, \
.display.has_psr = 1, \
.display.has_psr_hw_tracking = 1, \
@@ -704,7 +704,7 @@ static const struct intel_device_info skl_gt4_info = {
.display.has_ddi = 1, \
.display.has_fpga_dbg = 1, \
.__runtime.fbc_mask = BIT(INTEL_FBC_A), \
-   .display.has_hdcp = 1, \
+   .__runtime.has_hdcp = 1, \
.display.has_psr = 1, \
.display.has_psr_hw_tracking = 1, \
.has_runtime_pm = 1, \
@@ -961,7 +961,7 @@ static const struct intel_device_info adl_s_info = {
.display.has_dsc = 1,   
\
.__runtime.fbc_mask = BIT(INTEL_FBC_A), 
\
.display.has_fpga_dbg = 1,  
\
-   .display.has_hdcp = 1,  
\
+   .__runtime.has_hdcp = 1,
\
.display.has_hotplug = 1,   
\
.display.has_ipc = 1,   
\
.display.has_psr = 1,   
\
diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
b/drivers/gpu/drm/i915/intel_device_info.c
index 166d1d74b885..26c883c05e44 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -125,6 +125,8 @@ void intel_device_info_print(const struct intel_device_info 
*info,
DEV_INFO_DISPLAY_FOR_EACH_FLAG(PRINT_FLAG);
 #undef PRINT_FLAG
 
+   drm_printf(p, "has_hdcp: %s\n", str_yes_no(runtime->has_hdcp));
+
drm_printf(p, "rawclk rate: %u kHz\n", runtime->rawclk_freq);
 }
 
@@ -380,7 +382,7 @@ void intel_device_info_runtime_init(struct drm_i915_private 
*dev_priv)
}
 
if (dfsm & SKL_DFSM_DISPLAY_HDCP_DISABLE)
-   info->display.has_hdcp = 0;
+   runtime->has_hdcp = 0;
 
if (dfsm & SKL_DFSM_DISPLAY_PM_DISABLE)
runtime->fbc_mask = 0;
diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
b/drivers/gpu/drm/i915/intel_device_info.h
index d78fe045a499..76317db394b7 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -180,7 +180,6 @@ enum intel_ppgtt_type {
func(has_dsc); \
func(has_fpga_dbg); \
func(has_gmch); \
-   func(has_hdcp); \
func(has_hotplug); \
func(has_hti); \
func(has_ipc); \
@@ -235,6 +234,8 @@ struct intel_runtime_info {
u8 num_scalers[I915_MAX_PIPES];
 
u8 fbc_mask;
+
+   bool has_hdcp;
};
 };
 
-- 
2.30.2



[Intel-gfx] [PATCH 10/16] drm/i915: move graphics.ver and graphics.rel to runtime info

2022-06-20 Thread Jani Nikula
If it's modified runtime, it's runtime info.

mock_gem_device() is the only one that modifies them. If that could be
fixed, we wouldn't have to do this.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_drv.h  |  6 +++---
 drivers/gpu/drm/i915/i915_pci.c  | 12 ++--
 drivers/gpu/drm/i915/intel_device_info.c |  8 
 drivers/gpu/drm/i915/intel_device_info.h |  3 ++-
 drivers/gpu/drm/i915/selftests/mock_gem_device.c |  2 +-
 5 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6ad71a859cd5..1343350b4dfc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -856,9 +856,9 @@ static inline struct intel_gt *to_gt(struct 
drm_i915_private *i915)
 
 #define IP_VER(ver, rel)   ((ver) << 8 | (rel))
 
-#define GRAPHICS_VER(i915) (INTEL_INFO(i915)->graphics.ver)
-#define GRAPHICS_VER_FULL(i915)
IP_VER(INTEL_INFO(i915)->graphics.ver, \
-  INTEL_INFO(i915)->graphics.rel)
+#define GRAPHICS_VER(i915) (RUNTIME_INFO(i915)->graphics.ver)
+#define GRAPHICS_VER_FULL(i915)
IP_VER(RUNTIME_INFO(i915)->graphics.ver, \
+  RUNTIME_INFO(i915)->graphics.rel)
 #define IS_GRAPHICS_VER(i915, from, until) \
(GRAPHICS_VER(i915) >= (from) && GRAPHICS_VER(i915) <= (until))
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 64794063860c..1a75acfd1fc1 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -33,7 +33,7 @@
 
 #define PLATFORM(x) .platform = (x)
 #define GEN(x) \
-   .graphics.ver = (x), \
+   .__runtime.graphics.ver = (x), \
.media.ver = (x), \
.display.ver = (x)
 
@@ -915,7 +915,7 @@ static const struct intel_device_info rkl_info = {
 static const struct intel_device_info dg1_info = {
GEN12_FEATURES,
DGFX_FEATURES,
-   .graphics.rel = 10,
+   .__runtime.graphics.rel = 10,
PLATFORM(INTEL_DG1),
.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | 
BIT(PIPE_D),
.require_force_probe = 1,
@@ -1009,8 +1009,8 @@ static const struct intel_device_info adl_p_info = {
I915_GTT_PAGE_SIZE_2M
 
 #define XE_HP_FEATURES \
-   .graphics.ver = 12, \
-   .graphics.rel = 50, \
+   .__runtime.graphics.ver = 12, \
+   .__runtime.graphics.rel = 50, \
XE_HP_PAGE_SIZES, \
.dma_mask_size = 46, \
.has_3d_pipeline = 1, \
@@ -1056,7 +1056,7 @@ static const struct intel_device_info xehpsdv_info = {
XE_HP_FEATURES, \
XE_HPM_FEATURES, \
DGFX_FEATURES, \
-   .graphics.rel = 55, \
+   .__runtime.graphics.rel = 55, \
.media.rel = 55, \
PLATFORM(INTEL_DG2), \
.has_4tile = 1, \
@@ -1099,7 +1099,7 @@ static const struct intel_device_info pvc_info = {
XE_HPC_FEATURES,
XE_HPM_FEATURES,
DGFX_FEATURES,
-   .graphics.rel = 60,
+   .__runtime.graphics.rel = 60,
.media.rel = 60,
PLATFORM(INTEL_PONTEVECCHIO),
.display = { 0 },
diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
b/drivers/gpu/drm/i915/intel_device_info.c
index f9280f6f66d2..43fefcc52ef1 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -91,11 +91,11 @@ void intel_device_info_print(const struct intel_device_info 
*info,
 const struct intel_runtime_info *runtime,
 struct drm_printer *p)
 {
-   if (info->graphics.rel)
-   drm_printf(p, "graphics version: %u.%02u\n", info->graphics.ver,
-  info->graphics.rel);
+   if (runtime->graphics.rel)
+   drm_printf(p, "graphics version: %u.%02u\n", 
runtime->graphics.ver,
+  runtime->graphics.rel);
else
-   drm_printf(p, "graphics version: %u\n", info->graphics.ver);
+   drm_printf(p, "graphics version: %u\n", runtime->graphics.ver);
 
if (info->media.rel)
drm_printf(p, "media version: %u.%02u\n", info->media.ver, 
info->media.rel);
diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
b/drivers/gpu/drm/i915/intel_device_info.h
index 8724621944a9..c354afd1c842 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -197,6 +197,8 @@ struct ip_version {
 };
 
 struct intel_runtime_info {
+   struct ip_version graphics;
+
/*
 * Platform mask is used for optimizing or-ed IS_PLATFORM calls into
 * into single runtime conditionals, and also to provide groundwork
@@ -234,7 +

[Intel-gfx] [PATCH 11/16] drm/i915: move pipe_mask and cpu_transcoder_mask to runtime info

2022-06-20 Thread Jani Nikula
If it's modified runtime, it's runtime info.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_display.h |  4 +-
 drivers/gpu/drm/i915/i915_drv.h  |  6 +-
 drivers/gpu/drm/i915/i915_pci.c  | 66 ++--
 drivers/gpu/drm/i915/intel_device_info.c | 24 +++
 drivers/gpu/drm/i915/intel_device_info.h |  5 +-
 5 files changed, 53 insertions(+), 52 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.h 
b/drivers/gpu/drm/i915/display/intel_display.h
index 2feb8ae5d5d4..3a06fcb51c9b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -374,7 +374,7 @@ enum hpd_pin {
 
 #define for_each_pipe(__dev_priv, __p) \
for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
-   for_each_if(INTEL_INFO(__dev_priv)->display.pipe_mask & 
BIT(__p))
+   for_each_if(RUNTIME_INFO(__dev_priv)->pipe_mask & BIT(__p))
 
 #define for_each_pipe_masked(__dev_priv, __p, __mask) \
for_each_pipe(__dev_priv, __p) \
@@ -382,7 +382,7 @@ enum hpd_pin {
 
 #define for_each_cpu_transcoder(__dev_priv, __t) \
for ((__t) = 0; (__t) < I915_MAX_TRANSCODERS; (__t)++)  \
-   for_each_if 
(INTEL_INFO(__dev_priv)->display.cpu_transcoder_mask & BIT(__t))
+   for_each_if (RUNTIME_INFO(__dev_priv)->cpu_transcoder_mask & 
BIT(__t))
 
 #define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
for_each_cpu_transcoder(__dev_priv, __t) \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1343350b4dfc..5bb1f0e9368c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1259,7 +1259,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define HAS_PSR_HW_TRACKING(dev_priv) \
(INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
 #define HAS_PSR2_SEL_FETCH(dev_priv)(DISPLAY_VER(dev_priv) >= 12)
-#define HAS_TRANSCODER(dev_priv, trans) 
((INTEL_INFO(dev_priv)->display.cpu_transcoder_mask & BIT(trans)) != 0)
+#define HAS_TRANSCODER(dev_priv, trans) 
((RUNTIME_INFO(dev_priv)->cpu_transcoder_mask & BIT(trans)) != 0)
 
 #define HAS_RC6(dev_priv)   (INTEL_INFO(dev_priv)->has_rc6)
 #define HAS_RC6p(dev_priv)  (INTEL_INFO(dev_priv)->has_rc6p)
@@ -1330,9 +1330,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define GT_FREQUENCY_MULTIPLIER 50
 #define GEN9_FREQ_SCALER 3
 
-#define INTEL_NUM_PIPES(dev_priv) 
(hweight8(INTEL_INFO(dev_priv)->display.pipe_mask))
+#define INTEL_NUM_PIPES(dev_priv) (hweight8(RUNTIME_INFO(dev_priv)->pipe_mask))
 
-#define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->display.pipe_mask != 0)
+#define HAS_DISPLAY(dev_priv) (RUNTIME_INFO(dev_priv)->pipe_mask != 0)
 
 #define HAS_VRR(i915)  (DISPLAY_VER(i915) >= 11)
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 1a75acfd1fc1..e9e036bec732 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -164,8 +164,8 @@
 #define I830_FEATURES \
GEN(2), \
.is_mobile = 1, \
-   .display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
-   .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
+   .__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
+   .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), 
\
.display.has_overlay = 1, \
.display.cursor_needs_physical = 1, \
.display.overlay_needs_physical = 1, \
@@ -186,8 +186,8 @@
 
 #define I845_FEATURES \
GEN(2), \
-   .display.pipe_mask = BIT(PIPE_A), \
-   .display.cpu_transcoder_mask = BIT(TRANSCODER_A), \
+   .__runtime.pipe_mask = BIT(PIPE_A), \
+   .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A), \
.display.has_overlay = 1, \
.display.overlay_needs_physical = 1, \
.display.has_gmch = 1, \
@@ -229,8 +229,8 @@ static const struct intel_device_info i865g_info = {
 
 #define GEN3_FEATURES \
GEN(3), \
-   .display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
-   .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
+   .__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
+   .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), 
\
.display.has_gmch = 1, \
.gpu_reset_clobbers_display = true, \
.__runtime.platform_engine_mask = BIT(RCS0), \
@@ -320,8 +320,8 @@ static const struct intel_device_info pnv_m_info = {
 
 #define GEN4_FEATURES \
GEN(4), \
-   .display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
-   .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
+   .__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
+   .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), 
\
.display.has_hotplug 

[Intel-gfx] [PATCH 09/16] drm/i915: move platform_engine_mask to runtime info

2022-06-20 Thread Jani Nikula
If it's modified runtime, it's runtime info.

mock_gem_device() is the only one that modifies it. If that could be
fixed, we wouldn't have to do this.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |  2 +-
 drivers/gpu/drm/i915/i915_pci.c   | 56 +--
 drivers/gpu/drm/i915/intel_device_info.h  |  4 +-
 drivers/gpu/drm/i915/intel_uncore.c   |  2 +-
 .../gpu/drm/i915/selftests/mock_gem_device.c  |  2 +-
 5 files changed, 33 insertions(+), 33 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 136cc44c3deb..77b6eeaf679d 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -736,7 +736,7 @@ static intel_engine_mask_t init_engine_mask(struct intel_gt 
*gt)
u16 vdbox_mask;
u16 vebox_mask;
 
-   info->engine_mask = INTEL_INFO(i915)->platform_engine_mask;
+   info->engine_mask = RUNTIME_INFO(i915)->platform_engine_mask;
 
if (GRAPHICS_VER(i915) < 11)
return info->engine_mask;
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 345d39d54bc9..64794063860c 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -174,7 +174,7 @@
.has_3d_pipeline = 1, \
.hws_needs_physical = 1, \
.unfenced_needs_alignment = 1, \
-   .platform_engine_mask = BIT(RCS0), \
+   .__runtime.platform_engine_mask = BIT(RCS0), \
.has_snoop = true, \
.has_coherent_ggtt = false, \
.dma_mask_size = 32, \
@@ -195,7 +195,7 @@
.gpu_reset_clobbers_display = true, \
.hws_needs_physical = 1, \
.unfenced_needs_alignment = 1, \
-   .platform_engine_mask = BIT(RCS0), \
+   .__runtime.platform_engine_mask = BIT(RCS0), \
.has_snoop = true, \
.has_coherent_ggtt = false, \
.dma_mask_size = 32, \
@@ -233,7 +233,7 @@ static const struct intel_device_info i865g_info = {
.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
.display.has_gmch = 1, \
.gpu_reset_clobbers_display = true, \
-   .platform_engine_mask = BIT(RCS0), \
+   .__runtime.platform_engine_mask = BIT(RCS0), \
.has_3d_pipeline = 1, \
.has_snoop = true, \
.has_coherent_ggtt = true, \
@@ -325,7 +325,7 @@ static const struct intel_device_info pnv_m_info = {
.display.has_hotplug = 1, \
.display.has_gmch = 1, \
.gpu_reset_clobbers_display = true, \
-   .platform_engine_mask = BIT(RCS0), \
+   .__runtime.platform_engine_mask = BIT(RCS0), \
.has_3d_pipeline = 1, \
.has_snoop = true, \
.has_coherent_ggtt = true, \
@@ -358,7 +358,7 @@ static const struct intel_device_info i965gm_info = {
 static const struct intel_device_info g45_info = {
GEN4_FEATURES,
PLATFORM(INTEL_G45),
-   .platform_engine_mask = BIT(RCS0) | BIT(VCS0),
+   .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0),
.gpu_reset_clobbers_display = false,
 };
 
@@ -368,7 +368,7 @@ static const struct intel_device_info gm45_info = {
.is_mobile = 1,
.__runtime.fbc_mask = BIT(INTEL_FBC_A),
.display.supports_tv = 1,
-   .platform_engine_mask = BIT(RCS0) | BIT(VCS0),
+   .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0),
.gpu_reset_clobbers_display = false,
 };
 
@@ -377,7 +377,7 @@ static const struct intel_device_info gm45_info = {
.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
.display.has_hotplug = 1, \
-   .platform_engine_mask = BIT(RCS0) | BIT(VCS0), \
+   .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0), \
.has_3d_pipeline = 1, \
.has_snoop = true, \
.has_coherent_ggtt = true, \
@@ -409,7 +409,7 @@ static const struct intel_device_info ilk_m_info = {
.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
.display.has_hotplug = 1, \
.__runtime.fbc_mask = BIT(INTEL_FBC_A), \
-   .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
+   .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
.has_3d_pipeline = 1, \
.has_coherent_ggtt = true, \
.has_llc = 1, \
@@ -461,7 +461,7 @@ static const struct intel_device_info snb_m_gt2_info = {
.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | 
BIT(TRANSCODER_C), \
.display.has_hotplug = 1, \
.__runtime.fbc_mask = BIT(INTEL_FBC_A), \
-   .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
+   .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
.has_3d_pipeline = 1, \
.has_coherent_ggtt = true, \
.has_llc = 1, \
@@ -535,7 +535,7 @@ s

[Intel-gfx] [PATCH 08/16] drm/i915: move memory_regions to runtime info

2022-06-20 Thread Jani Nikula
If it's modified runtime, it's runtime info.

mock_gem_device() is the only one that modifies it. If that could be
fixed, we wouldn't have to do this.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_drv.h  | 2 +-
 drivers/gpu/drm/i915/i915_pci.c  | 4 ++--
 drivers/gpu/drm/i915/intel_device_info.c | 2 +-
 drivers/gpu/drm/i915/intel_device_info.h | 4 ++--
 drivers/gpu/drm/i915/selftests/mock_gem_device.c | 2 +-
 5 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6ba1d528863c..6ad71a859cd5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1297,7 +1297,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_IPC(dev_priv)   (INTEL_INFO(dev_priv)->display.has_ipc)
 
-#define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i))
+#define HAS_REGION(i915, i) (RUNTIME_INFO(i915)->memory_regions & (i))
 #define HAS_LMEM(i915) HAS_REGION(i915, REGION_LMEM)
 
 /*
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 1e9a17062d64..345d39d54bc9 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -159,7 +159,7 @@
.__runtime.page_sizes = I915_GTT_PAGE_SIZE_4K
 
 #define GEN_DEFAULT_REGIONS \
-   .memory_regions = REGION_SMEM | REGION_STOLEN_SMEM
+   .__runtime.memory_regions = REGION_SMEM | REGION_STOLEN_SMEM
 
 #define I830_FEATURES \
GEN(2), \
@@ -905,7 +905,7 @@ static const struct intel_device_info rkl_info = {
 };
 
 #define DGFX_FEATURES \
-   .memory_regions = REGION_SMEM | REGION_LMEM | REGION_STOLEN_LMEM, \
+   .__runtime.memory_regions = REGION_SMEM | REGION_LMEM | 
REGION_STOLEN_LMEM, \
.has_llc = 0, \
.has_pxp = 0, \
.has_snoop = 1, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
b/drivers/gpu/drm/i915/intel_device_info.c
index 0ebb359a7791..f9280f6f66d2 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -108,7 +108,7 @@ void intel_device_info_print(const struct intel_device_info 
*info,
drm_printf(p, "display version: %u\n", info->display.ver);
 
drm_printf(p, "gt: %d\n", info->gt);
-   drm_printf(p, "memory-regions: %x\n", info->memory_regions);
+   drm_printf(p, "memory-regions: %x\n", runtime->memory_regions);
drm_printf(p, "page-sizes: %x\n", runtime->page_sizes);
drm_printf(p, "platform: %s\n", intel_platform_name(info->platform));
drm_printf(p, "ppgtt-size: %d\n", runtime->ppgtt_size);
diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
b/drivers/gpu/drm/i915/intel_device_info.h
index 2025afa9ec71..1a2d19156410 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -218,6 +218,8 @@ struct intel_runtime_info {
enum intel_ppgtt_type ppgtt_type;
unsigned int ppgtt_size; /* log2, e.g. 31/32/48 bits */
 
+   u32 memory_regions; /* regions supported by the HW */
+
bool has_pooled_eu;
 
/* display */
@@ -239,8 +241,6 @@ struct intel_device_info {
 
unsigned int dma_mask_size; /* available DMA address bits */
 
-   u32 memory_regions; /* regions supported by the HW */
-
u32 display_mmio_offset;
 
u8 gt; /* GT number, 0 if undefined */
diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c 
b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
index 4853b5804474..3f05e870dc68 100644
--- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
+++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
@@ -179,7 +179,7 @@ struct drm_i915_private *mock_gem_device(void)
I915_GTT_PAGE_SIZE_64K |
I915_GTT_PAGE_SIZE_2M;
 
-   mkwrite_device_info(i915)->memory_regions = REGION_SMEM;
+   RUNTIME_INFO(i915)->memory_regions = REGION_SMEM;
intel_memory_regions_hw_probe(i915);
 
spin_lock_init(>gpu_error.lock);
-- 
2.30.2



[Intel-gfx] [PATCH 07/16] drm/i915: move has_pooled_eu to runtime info

2022-06-20 Thread Jani Nikula
If it's modified runtime, it's runtime info.

Curiously, the flag was never initialized statically.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/gt/intel_sseu.c | 5 ++---
 drivers/gpu/drm/i915/i915_drv.h  | 2 +-
 drivers/gpu/drm/i915/intel_device_info.c | 2 ++
 drivers/gpu/drm/i915/intel_device_info.h | 3 ++-
 4 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.c 
b/drivers/gpu/drm/i915/gt/intel_sseu.c
index c6d3050604c8..66f21c735d54 100644
--- a/drivers/gpu/drm/i915/gt/intel_sseu.c
+++ b/drivers/gpu/drm/i915/gt/intel_sseu.c
@@ -382,7 +382,6 @@ static void cherryview_sseu_info_init(struct intel_gt *gt)
 static void gen9_sseu_info_init(struct intel_gt *gt)
 {
struct drm_i915_private *i915 = gt->i915;
-   struct intel_device_info *info = mkwrite_device_info(i915);
struct sseu_dev_info *sseu = >info.sseu;
struct intel_uncore *uncore = gt->uncore;
u32 fuse2, eu_disable, subslice_mask;
@@ -471,10 +470,10 @@ static void gen9_sseu_info_init(struct intel_gt *gt)
 
if (IS_GEN9_LP(i915)) {
 #define IS_SS_DISABLED(ss) (!(sseu->subslice_mask.hsw[0] & BIT(ss)))
-   info->has_pooled_eu = hweight8(sseu->subslice_mask.hsw[0]) == 3;
+   RUNTIME_INFO(i915)->has_pooled_eu = 
hweight8(sseu->subslice_mask.hsw[0]) == 3;
 
sseu->min_eu_in_pool = 0;
-   if (info->has_pooled_eu) {
+   if (HAS_POOLED_EU(i915)) {
if (IS_SS_DISABLED(2) || IS_SS_DISABLED(0))
sseu->min_eu_in_pool = 3;
else if (IS_SS_DISABLED(1))
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 282a8103ed33..6ba1d528863c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1308,7 +1308,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_GT_UC(dev_priv)(INTEL_INFO(dev_priv)->has_gt_uc)
 
-#define HAS_POOLED_EU(dev_priv)(INTEL_INFO(dev_priv)->has_pooled_eu)
+#define HAS_POOLED_EU(dev_priv)(RUNTIME_INFO(dev_priv)->has_pooled_eu)
 
 #define HAS_GLOBAL_MOCS_REGISTERS(dev_priv)
(INTEL_INFO(dev_priv)->has_global_mocs)
 
diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
b/drivers/gpu/drm/i915/intel_device_info.c
index d1f5af57736c..0ebb359a7791 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -119,6 +119,8 @@ void intel_device_info_print(const struct intel_device_info 
*info,
DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG);
 #undef PRINT_FLAG
 
+   drm_printf(p, "has_pooled_eu: %s\n", 
str_yes_no(runtime->has_pooled_eu));
+
 #define PRINT_FLAG(name) drm_printf(p, "%s: %s\n", #name, 
str_yes_no(info->display.name))
DEV_INFO_DISPLAY_FOR_EACH_FLAG(PRINT_FLAG);
 #undef PRINT_FLAG
diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
b/drivers/gpu/drm/i915/intel_device_info.h
index 019f30c9e633..2025afa9ec71 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -159,7 +159,6 @@ enum intel_ppgtt_type {
func(has_media_ratio_mode); \
func(has_mslice_steering); \
func(has_one_eu_per_fuse_bit); \
-   func(has_pooled_eu); \
func(has_pxp); \
func(has_rc6); \
func(has_rc6p); \
@@ -219,6 +218,8 @@ struct intel_runtime_info {
enum intel_ppgtt_type ppgtt_type;
unsigned int ppgtt_size; /* log2, e.g. 31/32/48 bits */
 
+   bool has_pooled_eu;
+
/* display */
struct {
u8 num_sprites[I915_MAX_PIPES];
-- 
2.30.2



[Intel-gfx] [PATCH 06/16] drm/i915: move ppgtt_type and ppgtt_size to runtime info

2022-06-20 Thread Jani Nikula
If it's modified runtime, it's runtime info.

Signed-off-by: Jani Nikula 
---
 .../gpu/drm/i915/gem/selftests/huge_pages.c   |  4 +--
 drivers/gpu/drm/i915/gt/intel_ppgtt.c |  2 +-
 drivers/gpu/drm/i915/i915_drv.h   |  2 +-
 drivers/gpu/drm/i915/i915_pci.c   | 36 +--
 drivers/gpu/drm/i915/intel_device_info.c  |  6 ++--
 drivers/gpu/drm/i915/intel_device_info.h  |  6 ++--
 6 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c 
b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
index 488a10c20b85..c8c1842e8b7b 100644
--- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
@@ -1759,8 +1759,8 @@ int i915_gem_huge_page_mock_selftests(void)
return -ENOMEM;
 
/* Pretend to be a device which supports the 48b PPGTT */
-   mkwrite_device_info(dev_priv)->ppgtt_type = INTEL_PPGTT_FULL;
-   mkwrite_device_info(dev_priv)->ppgtt_size = 48;
+   RUNTIME_INFO(dev_priv)->ppgtt_type = INTEL_PPGTT_FULL;
+   RUNTIME_INFO(dev_priv)->ppgtt_size = 48;
 
ppgtt = i915_ppgtt_create(to_gt(dev_priv), 0);
if (IS_ERR(ppgtt)) {
diff --git a/drivers/gpu/drm/i915/gt/intel_ppgtt.c 
b/drivers/gpu/drm/i915/gt/intel_ppgtt.c
index d8b94d638559..bf8570ae749a 100644
--- a/drivers/gpu/drm/i915/gt/intel_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ppgtt.c
@@ -308,7 +308,7 @@ void ppgtt_init(struct i915_ppgtt *ppgtt, struct intel_gt 
*gt,
ppgtt->vm.gt = gt;
ppgtt->vm.i915 = i915;
ppgtt->vm.dma = i915->drm.dev;
-   ppgtt->vm.total = BIT_ULL(INTEL_INFO(i915)->ppgtt_size);
+   ppgtt->vm.total = BIT_ULL(RUNTIME_INFO(i915)->ppgtt_size);
ppgtt->vm.lmem_pt_obj_flags = lmem_pt_obj_flags;
 
dma_resv_init(>vm._resv);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9529add807f5..282a8103ed33 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1205,7 +1205,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_EXECLISTS(dev_priv) HAS_LOGICAL_RING_CONTEXTS(dev_priv)
 
-#define INTEL_PPGTT(dev_priv) (INTEL_INFO(dev_priv)->ppgtt_type)
+#define INTEL_PPGTT(dev_priv) (RUNTIME_INFO(dev_priv)->ppgtt_type)
 #define HAS_PPGTT(dev_priv) \
(INTEL_PPGTT(dev_priv) != INTEL_PPGTT_NONE)
 #define HAS_FULL_PPGTT(dev_priv) \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 0f888d044bc3..1e9a17062d64 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -417,8 +417,8 @@ static const struct intel_device_info ilk_m_info = {
.has_rc6p = 1, \
.has_rps = true, \
.dma_mask_size = 40, \
-   .ppgtt_type = INTEL_PPGTT_ALIASING, \
-   .ppgtt_size = 31, \
+   .__runtime.ppgtt_type = INTEL_PPGTT_ALIASING, \
+   .__runtime.ppgtt_size = 31, \
I9XX_PIPE_OFFSETS, \
I9XX_CURSOR_OFFSETS, \
ILK_COLORS, \
@@ -470,8 +470,8 @@ static const struct intel_device_info snb_m_gt2_info = {
.has_reset_engine = true, \
.has_rps = true, \
.dma_mask_size = 40, \
-   .ppgtt_type = INTEL_PPGTT_ALIASING, \
-   .ppgtt_size = 31, \
+   .__runtime.ppgtt_type = INTEL_PPGTT_ALIASING, \
+   .__runtime.ppgtt_size = 31, \
IVB_PIPE_OFFSETS, \
IVB_CURSOR_OFFSETS, \
IVB_COLORS, \
@@ -531,8 +531,8 @@ static const struct intel_device_info vlv_info = {
.display.has_gmch = 1,
.display.has_hotplug = 1,
.dma_mask_size = 40,
-   .ppgtt_type = INTEL_PPGTT_ALIASING,
-   .ppgtt_size = 31,
+   .__runtime.ppgtt_type = INTEL_PPGTT_ALIASING,
+   .__runtime.ppgtt_size = 31,
.has_snoop = true,
.has_coherent_ggtt = false,
.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0),
@@ -581,8 +581,8 @@ static const struct intel_device_info hsw_gt3_info = {
GEN(8), \
.has_logical_ring_contexts = 1, \
.dma_mask_size = 39, \
-   .ppgtt_type = INTEL_PPGTT_FULL, \
-   .ppgtt_size = 48, \
+   .__runtime.ppgtt_type = INTEL_PPGTT_FULL, \
+   .__runtime.ppgtt_size = 48, \
.has_64bit_reloc = 1
 
 #define BDW_PLATFORM \
@@ -629,8 +629,8 @@ static const struct intel_device_info chv_info = {
.has_logical_ring_contexts = 1,
.display.has_gmch = 1,
.dma_mask_size = 39,
-   .ppgtt_type = INTEL_PPGTT_FULL,
-   .ppgtt_size = 32,
+   .__runtime.ppgtt_type = INTEL_PPGTT_FULL,
+   .__runtime.ppgtt_size = 32,
.has_reset_engine = 1,
.has_snoop = true,
.has_coherent_ggtt = false,
@@ -715,8 +715,8 @@ static const struct intel_device_info skl_gt4_info = {
.has_logical_ring_contexts = 1, \
.has_gt_uc = 1, \
.dma_mask_size = 39, \
-   .ppgtt_typ

[Intel-gfx] [PATCH 05/16] drm/i915: move page_sizes to runtime info

2022-06-20 Thread Jani Nikula
If it's modified runtime, it's runtime info.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/gem/i915_gem_pages.c  |  2 +-
 .../gpu/drm/i915/gem/selftests/huge_pages.c| 14 +++---
 drivers/gpu/drm/i915/i915_drv.h|  2 +-
 drivers/gpu/drm/i915/i915_gem.c|  3 +--
 drivers/gpu/drm/i915/i915_pci.c| 18 +-
 drivers/gpu/drm/i915/intel_device_info.c   |  2 +-
 drivers/gpu/drm/i915/intel_device_info.h   |  4 ++--
 .../gpu/drm/i915/selftests/mock_gem_device.c   |  2 +-
 8 files changed, 23 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 97c820eee115..0325ffa54e37 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -19,7 +19,7 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object 
*obj,
 unsigned int sg_page_sizes)
 {
struct drm_i915_private *i915 = to_i915(obj->base.dev);
-   unsigned long supported = INTEL_INFO(i915)->page_sizes;
+   unsigned long supported = RUNTIME_INFO(i915)->page_sizes;
bool shrinkable;
int i;
 
diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c 
b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
index ef15967be51a..488a10c20b85 100644
--- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
@@ -358,7 +358,7 @@ fake_huge_pages_object(struct drm_i915_private *i915, u64 
size, bool single)
 static int igt_check_page_sizes(struct i915_vma *vma)
 {
struct drm_i915_private *i915 = vma->vm->i915;
-   unsigned int supported = INTEL_INFO(i915)->page_sizes;
+   unsigned int supported = RUNTIME_INFO(i915)->page_sizes;
struct drm_i915_gem_object *obj = vma->obj;
int err;
 
@@ -419,7 +419,7 @@ static int igt_mock_exhaust_device_supported_pages(void 
*arg)
 {
struct i915_ppgtt *ppgtt = arg;
struct drm_i915_private *i915 = ppgtt->vm.i915;
-   unsigned int saved_mask = INTEL_INFO(i915)->page_sizes;
+   unsigned int saved_mask = RUNTIME_INFO(i915)->page_sizes;
struct drm_i915_gem_object *obj;
struct i915_vma *vma;
int i, j, single;
@@ -438,7 +438,7 @@ static int igt_mock_exhaust_device_supported_pages(void 
*arg)
combination |= page_sizes[j];
}
 
-   mkwrite_device_info(i915)->page_sizes = combination;
+   RUNTIME_INFO(i915)->page_sizes = combination;
 
for (single = 0; single <= 1; ++single) {
obj = fake_huge_pages_object(i915, combination, 
!!single);
@@ -485,7 +485,7 @@ static int igt_mock_exhaust_device_supported_pages(void 
*arg)
 out_put:
i915_gem_object_put(obj);
 out_device:
-   mkwrite_device_info(i915)->page_sizes = saved_mask;
+   RUNTIME_INFO(i915)->page_sizes = saved_mask;
 
return err;
 }
@@ -495,7 +495,7 @@ static int igt_mock_memory_region_huge_pages(void *arg)
const unsigned int flags[] = { 0, I915_BO_ALLOC_CONTIGUOUS };
struct i915_ppgtt *ppgtt = arg;
struct drm_i915_private *i915 = ppgtt->vm.i915;
-   unsigned long supported = INTEL_INFO(i915)->page_sizes;
+   unsigned long supported = RUNTIME_INFO(i915)->page_sizes;
struct intel_memory_region *mem;
struct drm_i915_gem_object *obj;
struct i915_vma *vma;
@@ -573,7 +573,7 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
 {
struct i915_ppgtt *ppgtt = arg;
struct drm_i915_private *i915 = ppgtt->vm.i915;
-   unsigned long supported = INTEL_INFO(i915)->page_sizes;
+   unsigned long supported = RUNTIME_INFO(i915)->page_sizes;
struct drm_i915_gem_object *obj;
int bit;
int err;
@@ -1390,7 +1390,7 @@ static int igt_ppgtt_smoke_huge(void *arg)
 static int igt_ppgtt_sanity_check(void *arg)
 {
struct drm_i915_private *i915 = arg;
-   unsigned int supported = INTEL_INFO(i915)->page_sizes;
+   unsigned int supported = RUNTIME_INFO(i915)->page_sizes;
struct {
igt_create_fn fn;
unsigned int flags;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f4aa31499fd4..9529add807f5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1213,7 +1213,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_PAGE_SIZES(dev_priv, sizes) ({ \
GEM_BUG_ON((sizes) == 0); \
-   ((sizes) & ~INTEL_INFO(dev_priv)->page_sizes) == 0; \
+   ((sizes) & ~RUNTIME_INFO(dev_priv)->page_sizes) == 0; \
 })
 
 #define HAS_OVERLAY(dev_priv)   
(INTEL_INFO(dev_priv)->display.has_overlay)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_

[Intel-gfx] [PATCH 04/16] drm/i915: move fbc_mask to runtime info

2022-06-20 Thread Jani Nikula
If it's modified runtime, it's runtime info.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_fbc.c  |  6 ++---
 .../drm/i915/display/skl_universal_plane.c|  2 +-
 drivers/gpu/drm/i915/i915_drv.h   |  2 +-
 drivers/gpu/drm/i915/i915_pci.c   | 22 +--
 drivers/gpu/drm/i915/intel_device_info.c  |  6 ++---
 drivers/gpu/drm/i915/intel_device_info.h  | 12 ++
 6 files changed, 27 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c 
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 8b807284cde1..deb0bfabd25d 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -54,7 +54,7 @@
 
 #define for_each_fbc_id(__dev_priv, __fbc_id) \
for ((__fbc_id) = INTEL_FBC_A; (__fbc_id) < I915_MAX_FBCS; 
(__fbc_id)++) \
-   for_each_if(INTEL_INFO(__dev_priv)->display.fbc_mask & 
BIT(__fbc_id))
+   for_each_if(RUNTIME_INFO(__dev_priv)->fbc_mask & BIT(__fbc_id))
 
 #define for_each_intel_fbc(__dev_priv, __fbc, __fbc_id) \
for_each_fbc_id((__dev_priv), (__fbc_id)) \
@@ -1703,10 +1703,10 @@ void intel_fbc_init(struct drm_i915_private *i915)
enum intel_fbc_id fbc_id;
 
if (!drm_mm_initialized(>mm.stolen))
-   mkwrite_device_info(i915)->display.fbc_mask = 0;
+   RUNTIME_INFO(i915)->fbc_mask = 0;
 
if (need_fbc_vtd_wa(i915))
-   mkwrite_device_info(i915)->display.fbc_mask = 0;
+   RUNTIME_INFO(i915)->fbc_mask = 0;
 
i915->params.enable_fbc = intel_sanitize_fbc_option(i915);
drm_dbg_kms(>drm, "Sanitized enable_fbc value: %d\n",
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index caa03324a733..0492596d1837 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1928,7 +1928,7 @@ static enum intel_fbc_id skl_fbc_id_for_pipe(enum pipe 
pipe)
 static bool skl_plane_has_fbc(struct drm_i915_private *dev_priv,
  enum intel_fbc_id fbc_id, enum plane_id plane_id)
 {
-   if ((INTEL_INFO(dev_priv)->display.fbc_mask & BIT(fbc_id)) == 0)
+   if ((RUNTIME_INFO(dev_priv)->fbc_mask & BIT(fbc_id)) == 0)
return false;
 
return plane_id == PLANE_PRIMARY;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c22f29c3faa0..f4aa31499fd4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1244,7 +1244,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define I915_HAS_HOTPLUG(dev_priv) 
(INTEL_INFO(dev_priv)->display.has_hotplug)
 
 #define HAS_FW_BLC(dev_priv)   (DISPLAY_VER(dev_priv) > 2)
-#define HAS_FBC(dev_priv)  (INTEL_INFO(dev_priv)->display.fbc_mask != 0)
+#define HAS_FBC(dev_priv)  (RUNTIME_INFO(dev_priv)->fbc_mask != 0)
 #define HAS_CUR_FBC(dev_priv)  (!HAS_GMCH(dev_priv) && DISPLAY_VER(dev_priv) 
>= 7)
 
 #define HAS_IPS(dev_priv)  (IS_HSW_ULT(dev_priv) || IS_BROADWELL(dev_priv))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 5e51fc29bb8b..fb063284befa 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -218,13 +218,13 @@ static const struct intel_device_info i845g_info = {
 static const struct intel_device_info i85x_info = {
I830_FEATURES,
PLATFORM(INTEL_I85X),
-   .display.fbc_mask = BIT(INTEL_FBC_A),
+   .__runtime.fbc_mask = BIT(INTEL_FBC_A),
 };
 
 static const struct intel_device_info i865g_info = {
I845_FEATURES,
PLATFORM(INTEL_I865G),
-   .display.fbc_mask = BIT(INTEL_FBC_A),
+   .__runtime.fbc_mask = BIT(INTEL_FBC_A),
 };
 
 #define GEN3_FEATURES \
@@ -263,7 +263,7 @@ static const struct intel_device_info i915gm_info = {
.display.has_overlay = 1,
.display.overlay_needs_physical = 1,
.display.supports_tv = 1,
-   .display.fbc_mask = BIT(INTEL_FBC_A),
+   .__runtime.fbc_mask = BIT(INTEL_FBC_A),
.hws_needs_physical = 1,
.unfenced_needs_alignment = 1,
 };
@@ -288,7 +288,7 @@ static const struct intel_device_info i945gm_info = {
.display.has_overlay = 1,
.display.overlay_needs_physical = 1,
.display.supports_tv = 1,
-   .display.fbc_mask = BIT(INTEL_FBC_A),
+   .__runtime.fbc_mask = BIT(INTEL_FBC_A),
.hws_needs_physical = 1,
.unfenced_needs_alignment = 1,
 };
@@ -348,7 +348,7 @@ static const struct intel_device_info i965gm_info = {
GEN4_FEATURES,
PLATFORM(INTEL_I965GM),
.is_mobile = 1,
-   .display.fbc_mask = BIT(INTEL_FBC_A),
+   .__runtime.fbc_mask = BIT(INTEL_FBC_A),
.display.has_overlay = 1,
.display.supports_tv = 1,
 

[Intel-gfx] [PATCH 03/16] drm/i915: add initial runtime info into device info

2022-06-20 Thread Jani Nikula
Add initial runtime info that we can copy to runtime info at i915
creation time. This lets us define the initial values for runtime info
statically while making it possible to change them runtime. This will be
the new home for the current "const" device info members that are
modified runtime anyway.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_driver.c   |  7 +++-
 drivers/gpu/drm/i915/intel_device_info.h | 41 +---
 2 files changed, 29 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_driver.c 
b/drivers/gpu/drm/i915/i915_driver.c
index 0b00a05f1a74..5969cc7805d3 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -796,6 +796,7 @@ i915_driver_create(struct pci_dev *pdev, const struct 
pci_device_id *ent)
const struct intel_device_info *match_info =
(struct intel_device_info *)ent->driver_data;
struct intel_device_info *device_info;
+   struct intel_runtime_info *runtime;
struct drm_i915_private *i915;
 
i915 = devm_drm_dev_alloc(>dev, _drm_driver,
@@ -811,7 +812,11 @@ i915_driver_create(struct pci_dev *pdev, const struct 
pci_device_id *ent)
/* Setup the write-once "constant" device info */
device_info = mkwrite_device_info(i915);
memcpy(device_info, match_info, sizeof(*device_info));
-   RUNTIME_INFO(i915)->device_id = pdev->device;
+
+   /* Initialize initial runtime info from static const data and pdev. */
+   runtime = RUNTIME_INFO(i915);
+   memcpy(runtime, _INFO(i915)->__runtime, sizeof(*runtime));
+   runtime->device_id = pdev->device;
 
return i915;
 }
diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
b/drivers/gpu/drm/i915/intel_device_info.h
index b86f68866e35..85385c98b9f4 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -197,6 +197,27 @@ struct ip_version {
u8 rel;
 };
 
+struct intel_runtime_info {
+   /*
+* Platform mask is used for optimizing or-ed IS_PLATFORM calls into
+* into single runtime conditionals, and also to provide groundwork
+* for future per platform, or per SKU build optimizations.
+*
+* Array can be extended when necessary if the corresponding
+* BUILD_BUG_ON is hit.
+*/
+   u32 platform_mask[2];
+
+   u16 device_id;
+
+   u8 num_sprites[I915_MAX_PIPES];
+   u8 num_scalers[I915_MAX_PIPES];
+
+   u32 rawclk_freq;
+
+   struct intel_step_info step;
+};
+
 struct intel_device_info {
struct ip_version graphics;
struct ip_version media;
@@ -252,27 +273,11 @@ struct intel_device_info {
u32 degamma_lut_tests;
u32 gamma_lut_tests;
} color;
-};
 
-struct intel_runtime_info {
/*
-* Platform mask is used for optimizing or-ed IS_PLATFORM calls into
-* into single runtime conditionals, and also to provide groundwork
-* for future per platform, or per SKU build optimizations.
-*
-* Array can be extended when necessary if the corresponding
-* BUILD_BUG_ON is hit.
+* Initial runtime info. Do not access outside of i915_driver_create().
 */
-   u32 platform_mask[2];
-
-   u16 device_id;
-
-   u8 num_sprites[I915_MAX_PIPES];
-   u8 num_scalers[I915_MAX_PIPES];
-
-   u32 rawclk_freq;
-
-   struct intel_step_info step;
+   const struct intel_runtime_info __runtime;
 };
 
 struct intel_driver_caps {
-- 
2.30.2



[Intel-gfx] [PATCH 02/16] drm/i915: combine device info printing into one

2022-06-20 Thread Jani Nikula
We'll be moving info between static and runtime info. Combine the
printing functions into one to keep the output sensible and (mostly)
unchanged in the process.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_debugfs.c  |  3 +--
 drivers/gpu/drm/i915/i915_driver.c   |  4 ++--
 drivers/gpu/drm/i915/i915_gpu_error.c|  3 +--
 drivers/gpu/drm/i915/intel_device_info.c | 11 ---
 drivers/gpu/drm/i915/intel_device_info.h |  7 +++
 5 files changed, 11 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 94e5c29d2ee3..d131703de3d9 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -66,8 +66,7 @@ static int i915_capabilities(struct seq_file *m, void *data)
 
seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(i915));
 
-   intel_device_info_print_static(INTEL_INFO(i915), );
-   intel_device_info_print_runtime(RUNTIME_INFO(i915), );
+   intel_device_info_print(INTEL_INFO(i915), RUNTIME_INFO(i915), );
i915_print_iommu_status(i915, );
intel_gt_info_print(_gt(i915)->info, );
intel_driver_caps_print(>caps, );
diff --git a/drivers/gpu/drm/i915/i915_driver.c 
b/drivers/gpu/drm/i915/i915_driver.c
index aeec3dfe3ebf..0b00a05f1a74 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -775,8 +775,8 @@ static void i915_welcome_messages(struct drm_i915_private 
*dev_priv)
 INTEL_INFO(dev_priv)->platform),
   GRAPHICS_VER(dev_priv));
 
-   intel_device_info_print_static(INTEL_INFO(dev_priv), );
-   intel_device_info_print_runtime(RUNTIME_INFO(dev_priv), );
+   intel_device_info_print(INTEL_INFO(dev_priv),
+   RUNTIME_INFO(dev_priv), );
i915_print_iommu_status(dev_priv, );
intel_gt_info_print(_gt(dev_priv)->info, );
}
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index bff8a111424a..98e77fb02423 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -658,8 +658,7 @@ static void err_print_capabilities(struct 
drm_i915_error_state_buf *m,
 {
struct drm_printer p = i915_error_printer(m);
 
-   intel_device_info_print_static(>device_info, );
-   intel_device_info_print_runtime(>runtime_info, );
+   intel_device_info_print(>device_info, >runtime_info, );
intel_driver_caps_print(>driver_caps, );
 }
 
diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
b/drivers/gpu/drm/i915/intel_device_info.c
index f0bf23726ed8..77f435dd5626 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -87,8 +87,9 @@ const char *intel_platform_name(enum intel_platform platform)
return platform_names[platform];
 }
 
-void intel_device_info_print_static(const struct intel_device_info *info,
-   struct drm_printer *p)
+void intel_device_info_print(const struct intel_device_info *info,
+const struct intel_runtime_info *runtime,
+struct drm_printer *p)
 {
if (info->graphics.rel)
drm_printf(p, "graphics version: %u.%02u\n", info->graphics.ver,
@@ -121,12 +122,8 @@ void intel_device_info_print_static(const struct 
intel_device_info *info,
 #define PRINT_FLAG(name) drm_printf(p, "%s: %s\n", #name, 
str_yes_no(info->display.name))
DEV_INFO_DISPLAY_FOR_EACH_FLAG(PRINT_FLAG);
 #undef PRINT_FLAG
-}
 
-void intel_device_info_print_runtime(const struct intel_runtime_info *info,
-struct drm_printer *p)
-{
-   drm_printf(p, "rawclk rate: %u kHz\n", info->rawclk_freq);
+   drm_printf(p, "rawclk rate: %u kHz\n", runtime->rawclk_freq);
 }
 
 #undef INTEL_VGA_DEVICE
diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
b/drivers/gpu/drm/i915/intel_device_info.h
index 08341174ee0a..b86f68866e35 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -285,10 +285,9 @@ const char *intel_platform_name(enum intel_platform 
platform);
 void intel_device_info_subplatform_init(struct drm_i915_private *dev_priv);
 void intel_device_info_runtime_init(struct drm_i915_private *dev_priv);
 
-void intel_device_info_print_static(const struct intel_device_info *info,
-   struct drm_printer *p);
-void intel_device_info_print_runtime(const struct intel_runtime_info *info,
-struct drm_printer *p);
+void intel_device_info_print(const struct intel_device_info *info,
+const struct intel_runtime_info *runtime,
+  

[Intel-gfx] [PATCH 01/16] drm/i915: use GRAPHICS_VER() instead of accessing match_info directly

2022-06-20 Thread Jani Nikula
We've just set up device info in i915_driver_create() so we can use
GRAPHICS_VER() intead of looking at match_info directly.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_driver.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_driver.c 
b/drivers/gpu/drm/i915/i915_driver.c
index d26dcca7e654..aeec3dfe3ebf 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -829,8 +829,6 @@ i915_driver_create(struct pci_dev *pdev, const struct 
pci_device_id *ent)
  */
 int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
-   const struct intel_device_info *match_info =
-   (struct intel_device_info *)ent->driver_data;
struct drm_i915_private *i915;
int ret;
 
@@ -839,7 +837,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct 
pci_device_id *ent)
return PTR_ERR(i915);
 
/* Disable nuclear pageflip by default on pre-ILK */
-   if (!i915->params.nuclear_pageflip && match_info->graphics.ver < 5)
+   if (!i915->params.nuclear_pageflip && GRAPHICS_VER(i915) < 5)
i915->drm.driver_features &= ~DRIVER_ATOMIC;
 
ret = pci_enable_device(pdev);
-- 
2.30.2



[Intel-gfx] [PATCH 00/16] drm/i915: stop modifying "const" device info

2022-06-20 Thread Jani Nikula
Move any device info that gets modified runtime into runtime info,
making device info a const pointer. Finally throw mkwrite_device_info()
into the curb.

The data size increases by sizeof(struct intel_runtime_info) for each
struct intel_device_info in i915_pci.c.

bloat-o-meter gives chg +0.08% in text size, almost all of which is
caused by the last commit (drm/i915: make device info a pointer to
static const data). IMO the first 14-15 commits separating
static/runtime info are worth it even if we decide the text size penalty
is too much to switch to using a pointer for static device info.

BR,
Jani.


Jani Nikula (16):
  drm/i915: use GRAPHICS_VER() instead of accessing match_info directly
  drm/i915: combine device info printing into one
  drm/i915: add initial runtime info into device info
  drm/i915: move fbc_mask to runtime info
  drm/i915: move page_sizes to runtime info
  drm/i915: move ppgtt_type and ppgtt_size to runtime info
  drm/i915: move has_pooled_eu to runtime info
  drm/i915: move memory_regions to runtime info
  drm/i915: move platform_engine_mask to runtime info
  drm/i915: move graphics.ver and graphics.rel to runtime info
  drm/i915: move pipe_mask and cpu_transcoder_mask to runtime info
  drm/i915: move has_hdcp to runtime info
  drm/i915: move has_dmc to runtime info
  drm/i915: move has_dsc to runtime info
  drm/i915: stop resetting display info to zero for no display
  drm/i915: make device info a pointer to static const data

 drivers/gpu/drm/i915/display/intel_display.h  |   4 +-
 drivers/gpu/drm/i915/display/intel_fbc.c  |   6 +-
 drivers/gpu/drm/i915/display/intel_hdcp.c |   4 +-
 drivers/gpu/drm/i915/display/intel_vdsc.c |   2 +-
 .../drm/i915/display/skl_universal_plane.c|   2 +-
 drivers/gpu/drm/i915/gem/i915_gem_pages.c |   2 +-
 .../gpu/drm/i915/gem/selftests/huge_pages.c   |  18 +-
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |   2 +-
 drivers/gpu/drm/i915/gt/intel_ppgtt.c |   2 +-
 drivers/gpu/drm/i915/gt/intel_sseu.c  |   5 +-
 drivers/gpu/drm/i915/i915_debugfs.c   |   3 +-
 drivers/gpu/drm/i915/i915_driver.c|  23 +-
 drivers/gpu/drm/i915/i915_drv.h   |  35 ++-
 drivers/gpu/drm/i915/i915_gem.c   |   3 +-
 drivers/gpu/drm/i915/i915_gpu_error.c |   3 +-
 drivers/gpu/drm/i915/i915_pci.c   | 230 +-
 drivers/gpu/drm/i915/intel_device_info.c  |  73 +++---
 drivers/gpu/drm/i915/intel_device_info.h  |  82 ---
 drivers/gpu/drm/i915/intel_uncore.c   |   2 +-
 .../gpu/drm/i915/selftests/mock_gem_device.c  |   8 +-
 20 files changed, 255 insertions(+), 254 deletions(-)

-- 
2.30.2



Re: [Intel-gfx] [PATCH v4] drm/i915/dsi: add payload receiving code

2022-06-20 Thread Jani Nikula
On Mon, 20 Jun 2022, William Tseng  wrote:
> To support Host to read data from Peripheral after
> a DCS read command is sent over DSI.

You keep resending this. Are you changing something? If yes, what?
Where's the changelog?

BR,
Jani.


>
> Cc: Jani Nikula 
> Cc: Ville Syrjälä 
> Cc: Vandita Kulkarni 
> Cc: Lee Shawn C 
> Signed-off-by: William Tseng 
> ---
>  drivers/gpu/drm/i915/display/icl_dsi.c  | 75 +++--
>  drivers/gpu/drm/i915/display/icl_dsi_regs.h | 13 
>  2 files changed, 83 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c 
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 19bf717fd4cb..b2aa3c7902f3 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -201,6 +201,69 @@ static int dsi_send_pkt_hdr(struct intel_dsi_host *host,
>   return 0;
>  }
>  
> +static int dsi_read_pkt_payld(struct intel_dsi_host *host,
> +   u8 *rx_buf, size_t rx_len)
> +{
> + struct intel_dsi *intel_dsi = host->intel_dsi;
> + struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev);
> + enum transcoder dsi_trans = dsi_port_to_transcoder(host->port);
> + u32 tmp, /*hdr_data, */payld_data;
> + u32 payld_dw;
> + size_t payld_read;
> + u8 i;
> +
> + /* step2: place a BTA reque */
> + /* check if header credit available */
> + if (!wait_for_header_credits(dev_priv, dsi_trans, 1)) {
> + drm_err(_priv->drm, "not ready to recive payload\n");
> + return -EBUSY;
> + }
> +
> + /* place BTA request */
> + tmp = intel_de_read(dev_priv, DSI_LP_MSG(dsi_trans));
> + tmp |= LINK_BTA;
> + intel_de_write(dev_priv, DSI_LP_MSG(dsi_trans), tmp);
> +
> + tmp = intel_de_read(dev_priv, DSI_LP_MSG(dsi_trans));
> +
> + /* step2a:  */
> + /* step2ai: set Turn-Around Timeout */
> + tmp = intel_de_read(dev_priv, DSI_TA_TO(dsi_trans));
> + tmp &= ~TA_TIMEOUT_VALUE_MASK;
> + tmp |= TA_TIMEOUT_VALUE(intel_dsi->turn_arnd_val);
> + intel_de_write(dev_priv, DSI_TA_TO(dsi_trans), tmp);
> +
> + tmp = intel_de_read(dev_priv, DSI_TA_TO(dsi_trans));
> +
> + /* step2aii: set maximum allowed time */
> + tmp = intel_de_read(dev_priv, DSI_LPRX_HOST_TO(dsi_trans));
> + tmp &= ~LPRX_TIMEOUT_VALUE_MASK;
> + tmp |= LPRX_TIMEOUT_VALUE(intel_dsi->lp_rx_timeout);
> + intel_de_write(dev_priv, DSI_LPRX_HOST_TO(dsi_trans), tmp);
> +
> + tmp = intel_de_read(dev_priv, DSI_LPRX_HOST_TO(dsi_trans));
> +
> + /* step4a: wait and read payload */
> + if (wait_for_us(((intel_de_read(dev_priv, DSI_CMD_RXCTL(dsi_trans)) &
> + NUMBER_RX_PLOAD_DW_MASK) >> NUMBER_RX_PLOAD_DW_SHIFT) > 0, 
> 10)) {
> + drm_err(_priv->drm, "DSI fails to receive payload\n");
> + return -EBUSY;
> + }
> +
> + tmp = intel_de_read(dev_priv, DSI_CMD_RXCTL(dsi_trans));
> + payld_dw = (tmp & NUMBER_RX_PLOAD_DW_MASK) >> NUMBER_RX_PLOAD_DW_SHIFT;
> + payld_read = min(rx_len, (size_t)(4 * payld_dw));
> +
> + for (i = 0; i < payld_read; i++) {
> + if ((i % 4) == 0)
> + payld_data = intel_de_read(dev_priv, 
> DSI_CMD_RXPYLD(dsi_trans));
> +
> + *(rx_buf + i) = (payld_data >> (8 * (i % 4))) & 0xff;
> + }
> +
> + return (int)payld_read;
> +}
> +
>  void icl_dsi_frame_update(struct intel_crtc_state *crtc_state)
>  {
>   struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> @@ -1078,8 +1141,8 @@ static void gen11_dsi_setup_timeouts(struct 
> intel_encoder *encoder,
>   mul = 8 * 100;
>   hs_tx_timeout = DIV_ROUND_UP(intel_dsi->hs_tx_timeout * mul,
>divisor);
> - lp_rx_timeout = DIV_ROUND_UP(intel_dsi->lp_rx_timeout * mul, divisor);
> - ta_timeout = DIV_ROUND_UP(intel_dsi->turn_arnd_val * mul, divisor);
> + lp_rx_timeout = intel_dsi->lp_rx_timeout;
> + ta_timeout = intel_dsi->turn_arnd_val;
>  
>   for_each_dsi_port(port, intel_dsi->ports) {
>   dsi_trans = dsi_port_to_transcoder(port);
> @@ -1837,9 +1900,11 @@ static ssize_t gen11_dsi_host_transfer(struct 
> mipi_dsi_host *host,
>   if (ret < 0)
>   return ret;
>  
> - //TODO: add payload receive code if needed
> -
> - ret = sizeof(dsi_pkt.header) + dsi_pkt.payload_length;
> + /* add payload receive code if needed */
> + if (msg->rx_buf && msg->rx_len > 0)
> + ret = 

Re: [Intel-gfx] [PATCH v3] drm/i915/bios: calculate panel type as per child device index in VBT

2022-06-17 Thread Jani Nikula
evice handle */
> +#define DEVICE_HANDLE_LFP1   0x0008
> +#define DEVICE_HANDLE_LFP2   0x0080
> +
>  /* Pre 915 */
>  #define DEVICE_TYPE_NONE 0x00
>  #define DEVICE_TYPE_CRT  0x01
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c 
> b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index abda0888c8d4..b9b1fed99874 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -1926,7 +1926,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
>  
>   intel_dsi->panel_power_off_time = ktime_get_boottime();
>  
> - intel_bios_init_panel(dev_priv, _connector->panel, NULL);
> + intel_bios_init_panel(dev_priv, _connector->panel, NULL, NULL);
>  
>   if (intel_connector->panel.vbt.dsi.config->dual_link)
>   intel_dsi->ports = BIT(PORT_A) | BIT(PORT_C);

-- 
Jani Nikula, Intel Open Source Graphics Center


[Intel-gfx] [PATCH 2/2] drm/i915/display: convert modeset setup to struct drm_i915_private *i915

2022-06-17 Thread Jani Nikula
Pass struct drm_i915_private * instead of struct drm_device *, and
rename dev_priv to i915.

v2: Rebase

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä  # v1
---
 drivers/gpu/drm/i915/display/intel_display.c  |   4 +-
 .../drm/i915/display/intel_modeset_setup.c| 194 +-
 .../drm/i915/display/intel_modeset_setup.h|   4 +-
 3 files changed, 100 insertions(+), 102 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 710a51f14649..903226e2a626 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -838,7 +838,7 @@ __intel_display_resume(struct drm_i915_private *i915,
struct drm_crtc *crtc;
int i, ret;
 
-   intel_modeset_setup_hw_state(>drm, ctx);
+   intel_modeset_setup_hw_state(i915, ctx);
intel_vga_redisable(i915);
 
if (!state)
@@ -8766,7 +8766,7 @@ int intel_modeset_init_nogem(struct drm_i915_private 
*i915)
intel_setup_outputs(i915);
 
drm_modeset_lock_all(dev);
-   intel_modeset_setup_hw_state(dev, dev->mode_config.acquire_ctx);
+   intel_modeset_setup_hw_state(i915, dev->mode_config.acquire_ctx);
intel_acpi_assign_connector_fwnodes(i915);
drm_modeset_unlock_all(dev);
 
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c 
b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index c340f3393246..f0e04d3904c6 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -28,13 +28,13 @@ static void intel_crtc_disable_noatomic(struct intel_crtc 
*crtc,
struct drm_modeset_acquire_ctx *ctx)
 {
struct intel_encoder *encoder;
-   struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+   struct drm_i915_private *i915 = to_i915(crtc->base.dev);
struct intel_bw_state *bw_state =
-   to_intel_bw_state(dev_priv->bw_obj.state);
+   to_intel_bw_state(i915->bw_obj.state);
struct intel_cdclk_state *cdclk_state =
-   to_intel_cdclk_state(dev_priv->cdclk.obj.state);
+   to_intel_cdclk_state(i915->cdclk.obj.state);
struct intel_dbuf_state *dbuf_state =
-   to_intel_dbuf_state(dev_priv->dbuf.obj.state);
+   to_intel_dbuf_state(i915->dbuf.obj.state);
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
struct intel_plane *plane;
@@ -46,7 +46,7 @@ static void intel_crtc_disable_noatomic(struct intel_crtc 
*crtc,
if (!crtc_state->hw.active)
return;
 
-   for_each_intel_plane_on_crtc(_priv->drm, crtc, plane) {
+   for_each_intel_plane_on_crtc(>drm, crtc, plane) {
const struct intel_plane_state *plane_state =
to_intel_plane_state(plane->base.state);
 
@@ -54,9 +54,9 @@ static void intel_crtc_disable_noatomic(struct intel_crtc 
*crtc,
intel_plane_disable_noatomic(crtc, plane);
}
 
-   state = drm_atomic_state_alloc(_priv->drm);
+   state = drm_atomic_state_alloc(>drm);
if (!state) {
-   drm_dbg_kms(_priv->drm,
+   drm_dbg_kms(>drm,
"failed to disable [CRTC:%d:%s], out of memory",
crtc->base.base.id, crtc->base.name);
return;
@@ -68,20 +68,20 @@ static void intel_crtc_disable_noatomic(struct intel_crtc 
*crtc,
temp_crtc_state = intel_atomic_get_crtc_state(state, crtc);
ret = drm_atomic_add_affected_connectors(state, >base);
 
-   drm_WARN_ON(_priv->drm, IS_ERR(temp_crtc_state) || ret);
+   drm_WARN_ON(>drm, IS_ERR(temp_crtc_state) || ret);
 
-   dev_priv->display->crtc_disable(to_intel_atomic_state(state), crtc);
+   i915->display->crtc_disable(to_intel_atomic_state(state), crtc);
 
drm_atomic_state_put(state);
 
-   drm_dbg_kms(_priv->drm,
+   drm_dbg_kms(>drm,
"[CRTC:%d:%s] hw state adjusted, was enabled, now 
disabled\n",
crtc->base.base.id, crtc->base.name);
 
crtc->active = false;
crtc->base.enabled = false;
 
-   drm_WARN_ON(_priv->drm,
+   drm_WARN_ON(>drm,
drm_atomic_set_mode_for_crtc(_state->uapi, NULL) < 0);
crtc_state->uapi.active = false;
crtc_state->uapi.connector_mask = 0;
@@ -89,14 +89,14 @@ static void intel_crtc_disable_noatomic(struct intel_crtc 
*crtc,
intel_crtc_free_hw_state(crtc_state);
memset(_state->hw, 0, sizeof(crtc_state->hw));
 
-   for_each_encoder_on_crtc(_priv->drm, >base, encoder)
+   for_each_encoder_on_crtc(>drm, >base, encod

[Intel-gfx] [PATCH 1/2] drm/i915/display: split out hw state readout and sanitize

2022-06-17 Thread Jani Nikula
Split out the modeset hardware state readout and sanitize, or state
setup, to a separate file.

Do some drive-by checkpatch fixes while at it.

v2: Rebase

Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä  # v1
---
 drivers/gpu/drm/i915/Makefile |   1 +
 drivers/gpu/drm/i915/display/intel_display.c  | 739 +-
 drivers/gpu/drm/i915/display/intel_display.h  |  12 +
 .../drm/i915/display/intel_modeset_setup.c| 736 +
 .../drm/i915/display/intel_modeset_setup.h|  15 +
 5 files changed, 778 insertions(+), 725 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_modeset_setup.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_modeset_setup.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 37a8ea56f7d6..c84a9cd8440d 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -244,6 +244,7 @@ i915-y += \
display/intel_hotplug.o \
display/intel_lpe_audio.o \
display/intel_modeset_verify.o \
+   display/intel_modeset_setup.o \
display/intel_overlay.o \
display/intel_pch_display.o \
display/intel_pch_refclk.o \
diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 90bd26431e31..710a51f14649 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -101,6 +101,7 @@
 #include "intel_hdcp.h"
 #include "intel_hotplug.h"
 #include "intel_modeset_verify.h"
+#include "intel_modeset_setup.h"
 #include "intel_overlay.h"
 #include "intel_panel.h"
 #include "intel_pch_display.h"
@@ -130,8 +131,6 @@ static void ilk_set_pipeconf(const struct intel_crtc_state 
*crtc_state);
 static void hsw_set_transconf(const struct intel_crtc_state *crtc_state);
 static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state);
 static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state);
-static void intel_modeset_setup_hw_state(struct drm_device *dev,
-struct drm_modeset_acquire_ctx *ctx);
 
 /**
  * intel_update_watermarks - update FIFO watermark values based on current 
modes
@@ -166,7 +165,7 @@ static void intel_modeset_setup_hw_state(struct drm_device 
*dev,
  * We don't use the sprite, so we can ignore that.  And on Crestline we have
  * to set the non-SR watermarks to 8.
  */
-static void intel_update_watermarks(struct drm_i915_private *dev_priv)
+void intel_update_watermarks(struct drm_i915_private *dev_priv)
 {
if (dev_priv->wm_disp->update_wm)
dev_priv->wm_disp->update_wm(dev_priv);
@@ -733,10 +732,9 @@ u32 intel_plane_fb_max_stride(struct drm_i915_private 
*dev_priv,
 DRM_MODE_ROTATE_0);
 }
 
-static void
-intel_set_plane_visible(struct intel_crtc_state *crtc_state,
-   struct intel_plane_state *plane_state,
-   bool visible)
+void intel_set_plane_visible(struct intel_crtc_state *crtc_state,
+struct intel_plane_state *plane_state,
+bool visible)
 {
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
 
@@ -748,7 +746,7 @@ intel_set_plane_visible(struct intel_crtc_state *crtc_state,
crtc_state->uapi.plane_mask &= ~drm_plane_mask(>base);
 }
 
-static void fixup_plane_bitmasks(struct intel_crtc_state *crtc_state)
+void intel_plane_fixup_bitmasks(struct intel_crtc_state *crtc_state)
 {
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
struct drm_plane *plane;
@@ -783,7 +781,7 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc,
crtc->base.base.id, crtc->base.name);
 
intel_set_plane_visible(crtc_state, plane_state, false);
-   fixup_plane_bitmasks(crtc_state);
+   intel_plane_fixup_bitmasks(crtc_state);
crtc_state->data_rate[plane->id] = 0;
crtc_state->data_rate_y[plane->id] = 0;
crtc_state->rel_data_rate[plane->id] = 0;
@@ -2209,9 +2207,8 @@ static void get_crtc_power_domains(struct 
intel_crtc_state *crtc_state,
set_bit(intel_dsc_power_domain(crtc, cpu_transcoder), 
mask->bits);
 }
 
-static void
-modeset_get_crtc_power_domains(struct intel_crtc_state *crtc_state,
-  struct intel_power_domain_mask *old_domains)
+void intel_modeset_get_crtc_power_domains(struct intel_crtc_state *crtc_state,
+ struct intel_power_domain_mask 
*old_domains)
 {
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -2235,8 +2232,8 @@ modeset_get_crtc_power_domains(struct intel_crtc_state 
*crtc_s

Re: [Intel-gfx] [PATCH v2 00/11] drm/i915: drm/i915/display: split out verification, hw readout and dump from intel_display.c

2022-06-17 Thread Jani Nikula
On Thu, 16 Jun 2022, Ville Syrjälä  wrote:
> On Thu, Jun 16, 2022 at 12:48:10PM +0300, Jani Nikula wrote:
>> v2 of [1]. Address review comments, drop crtc state compare move, add hw
>> state readout split, and sprinkle some struct
>> drm_i915_private *i915 cleanups on top.
>> 
>> BR,
>> Jani.
>> 
>> [1] https://patchwork.freedesktop.org/series/105156/
>> 
>> 
>> Jani Nikula (11):
>>   drm/i915/wm: move wm state verification to intel_pm.c
>>   drm/i915/dpll: move shared dpll state verification to intel_dpll_mgr.c
>>   drm/i915/mpllb: use I915_STATE_WARN() for state mismatch warnings
>>   drm/i915/mpllb: move mpllb state check to intel_snps_phy.c
>>   drm/i915/display: split out modeset verification code
>>   drm/i915/display: split out crtc state dump to a separate file
>>   drm/i915/display: change who adds [] around crtc state dump context
>> string
>>   drm/i915/display: rename dev_priv -> i915 in crtc state dump
>>   drm/i915/display: split out hw state readout and sanitize
>>   drm/i915/display: some struct drm_i915_private *i915 conversions
>>   drm/i915/display: convert modeset setup to struct drm_i915_private
>> *i915
>
> Series is
> Reviewed-by: Ville Syrjälä 

Thanks for the review, pushed everything except patches 9 and 11 which
conflicted, will respin those shortly.

BR,
Jani.

>
>> 
>>  drivers/gpu/drm/i915/Makefile |3 +
>>  .../drm/i915/display/intel_crtc_state_dump.c  |  314 +++
>>  .../drm/i915/display/intel_crtc_state_dump.h  |   16 +
>>  drivers/gpu/drm/i915/display/intel_display.c  | 1680 +
>>  drivers/gpu/drm/i915/display/intel_display.h  |   18 +
>>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c |   88 +
>>  drivers/gpu/drm/i915/display/intel_dpll_mgr.h |5 +
>>  .../drm/i915/display/intel_modeset_setup.c|  724 +++
>>  .../drm/i915/display/intel_modeset_setup.h|   15 +
>>  .../drm/i915/display/intel_modeset_verify.c   |  246 +++
>>  .../drm/i915/display/intel_modeset_verify.h   |   21 +
>>  drivers/gpu/drm/i915/display/intel_snps_phy.c |   43 +
>>  drivers/gpu/drm/i915/display/intel_snps_phy.h |5 +-
>>  drivers/gpu/drm/i915/intel_pm.c   |  138 +-
>>  drivers/gpu/drm/i915/intel_pm.h   |   14 +-
>>  15 files changed, 1724 insertions(+), 1606 deletions(-)
>>  create mode 100644 drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
>>  create mode 100644 drivers/gpu/drm/i915/display/intel_crtc_state_dump.h
>>  create mode 100644 drivers/gpu/drm/i915/display/intel_modeset_setup.c
>>  create mode 100644 drivers/gpu/drm/i915/display/intel_modeset_setup.h
>>  create mode 100644 drivers/gpu/drm/i915/display/intel_modeset_verify.c
>>  create mode 100644 drivers/gpu/drm/i915/display/intel_modeset_verify.h
>> 
>> -- 
>> 2.30.2

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH 1/2] drm/i915: Add support for LMEM PCIe resizable bar

2022-06-17 Thread Jani Nikula
On Thu, 16 Jun 2022, priyanka.dandam...@intel.com wrote:
> From: Akeem G Abodunrin 
>
> Add support for the local memory PICe resizable bar, so that
> local memory can be resized to the maximum size supported by the device,
> and mapped correctly to the PCIe memory bar. It is usual that GPU
> devices expose only 256MB BARs primarily to be compatible with 32-bit
> systems. So, those devices cannot claim larger memory BAR windows size due
> to the system BIOS limitation. With this change, it would be possible to
> reprogram the windows of the bridge directly above the requesting device
> on the same BAR type.
>
> Signed-off-by: Akeem G Abodunrin 
> Signed-off-by: Michał Winiarski 
> Cc: Stuart Summers 
> Cc: Michael J Ruhl 
> Cc: Prathap Kumar Valsan 
> Signed-off-by: Priyanka Dandamudi 
> Reviewed-by: Matthew Auld 

Please see https://lore.kernel.org/r/87pmj8vesm@intel.com

> ---
>  drivers/gpu/drm/i915/i915_driver.c | 92 ++
>  1 file changed, 92 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c 
> b/drivers/gpu/drm/i915/i915_driver.c
> index d26dcca7e654..4bdb471cb2e2 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -303,6 +303,95 @@ static void sanitize_gpu(struct drm_i915_private *i915)
>   __intel_gt_reset(to_gt(i915), ALL_ENGINES);
>  }
>  
> +static void __release_bars(struct pci_dev *pdev)
> +{
> + int resno;
> +
> + for (resno = PCI_STD_RESOURCES; resno < PCI_STD_RESOURCE_END; resno++) {
> + if (pci_resource_len(pdev, resno))
> + pci_release_resource(pdev, resno);
> + }
> +}
> +
> +static void
> +__resize_bar(struct drm_i915_private *i915, int resno, resource_size_t size)
> +{
> + struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> + int bar_size = pci_rebar_bytes_to_size(size);
> + int ret;
> +
> + __release_bars(pdev);
> +
> + ret = pci_resize_resource(pdev, resno, bar_size);
> + if (ret) {
> + drm_info(>drm, "Failed to resize BAR%d to %dM (%pe)\n",
> +  resno, 1 << bar_size, ERR_PTR(ret));
> + return;
> + }
> +
> + drm_info(>drm, "BAR%d resized to %dM\n", resno, 1 << bar_size);
> +}
> +
> +/* BAR size starts from 1MB - 2^20 */
> +#define BAR_SIZE_SHIFT 20
> +static resource_size_t
> +__lmem_rebar_size(struct drm_i915_private *i915, int resno)
> +{
> + struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> + u32 rebar = pci_rebar_get_possible_sizes(pdev, resno);
> + resource_size_t size;
> +
> + if (!rebar)
> + return 0;
> +
> + size = 1ULL << (__fls(rebar) + BAR_SIZE_SHIFT);
> +
> + if (size <= pci_resource_len(pdev, resno))
> + return 0;
> +
> + return size;
> +}
> +
> +#define LMEM_BAR_NUM 2
> +static void i915_resize_lmem_bar(struct drm_i915_private *i915)
> +{
> + struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> + struct pci_bus *root = pdev->bus;
> + struct resource *root_res;
> + resource_size_t rebar_size = __lmem_rebar_size(i915, LMEM_BAR_NUM);
> + u32 pci_cmd;
> + int i;
> +
> + if (!rebar_size)
> + return;
> +
> + /* Find out if root bus contains 64bit memory addressing */
> + while (root->parent)
> + root = root->parent;
> +
> + pci_bus_for_each_resource(root, root_res, i) {
> + if (root_res && root_res->flags & (IORESOURCE_MEM |
> + IORESOURCE_MEM_64) && root_res->start > 
> 0x1ull)
> + break;
> + }
> +
> + /* pci_resize_resource will fail anyways */
> + if (!root_res) {
> + drm_info(>drm, "Can't resize LMEM BAR - platform support 
> is missing\n");
> + return;
> + }
> +
> + /* First disable PCI memory decoding references */
> + pci_read_config_dword(pdev, PCI_COMMAND, _cmd);
> + pci_write_config_dword(pdev, PCI_COMMAND,
> +pci_cmd & ~PCI_COMMAND_MEMORY);
> +
> + __resize_bar(i915, LMEM_BAR_NUM, rebar_size);
> +
> + pci_assign_unassigned_bus_resources(pdev->bus);
> + pci_write_config_dword(pdev, PCI_COMMAND, pci_cmd);
> +}
> +
>  /**
>   * i915_driver_early_probe - setup state not requiring device access
>   * @dev_priv: device private
> @@ -852,6 +941,9 @@ int i915_driver_probe(struct pci_dev *pdev, const struct 
> pci_device_id *ent)
>  
>   disable_rpm_wakeref_asserts(>runtime_pm);
>  
> + if (HAS_LMEM(i915))
> + i915_resize_lmem_bar(i915);
> +
>   intel_vgpu_detect(i915);
>  
>   ret = intel_gt_probe_all(i915);

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH i-g-t 1/2] drm/i915: Add support for LMEM PCIe resizable bar

2022-06-16 Thread Jani Nikula
On Thu, 16 Jun 2022, priyanka.dandam...@intel.com wrote:
> From: Akeem G Abodunrin 
>
> This patch adds support for the local memory PICe resizable bar, so that

Please use imperative. "Add support ..."

Please don't refer to "this patch".

Please fix your git settings to not prefix with "i-g-t" when sending
i915 changes.

BR,
Jani.

> local memory can be resized to the maximum size supported by the device,
> and mapped correctly to the PCIe memory bar. It is usual that GPU
> devices expose only 256MB BARs primarily to be compatible with 32-bit
> systems. So, those devices cannot claim larger memory BAR windows size due
> to the system BIOS limitation. With this change, it would be possible to
> reprogram the windows of the bridge directly above the requesting device
> on the same BAR type.
>
> Signed-off-by: Akeem G Abodunrin 
> Signed-off-by: Michał Winiarski 
> Cc: Stuart Summers 
> Cc: Michael J Ruhl 
> Cc: Prathap Kumar Valsan 
> Signed-off-by: Priyanka Dandamudi 
> Reviewed-by: Matthew Auld 
> ---
>  drivers/gpu/drm/i915/i915_driver.c | 92 ++
>  1 file changed, 92 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c 
> b/drivers/gpu/drm/i915/i915_driver.c
> index d26dcca7e654..4bdb471cb2e2 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -303,6 +303,95 @@ static void sanitize_gpu(struct drm_i915_private *i915)
>   __intel_gt_reset(to_gt(i915), ALL_ENGINES);
>  }
>  
> +static void __release_bars(struct pci_dev *pdev)
> +{
> + int resno;
> +
> + for (resno = PCI_STD_RESOURCES; resno < PCI_STD_RESOURCE_END; resno++) {
> + if (pci_resource_len(pdev, resno))
> + pci_release_resource(pdev, resno);
> + }
> +}
> +
> +static void
> +__resize_bar(struct drm_i915_private *i915, int resno, resource_size_t size)
> +{
> + struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> + int bar_size = pci_rebar_bytes_to_size(size);
> + int ret;
> +
> + __release_bars(pdev);
> +
> + ret = pci_resize_resource(pdev, resno, bar_size);
> + if (ret) {
> + drm_info(>drm, "Failed to resize BAR%d to %dM (%pe)\n",
> +  resno, 1 << bar_size, ERR_PTR(ret));
> + return;
> + }
> +
> + drm_info(>drm, "BAR%d resized to %dM\n", resno, 1 << bar_size);
> +}
> +
> +/* BAR size starts from 1MB - 2^20 */
> +#define BAR_SIZE_SHIFT 20
> +static resource_size_t
> +__lmem_rebar_size(struct drm_i915_private *i915, int resno)
> +{
> + struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> + u32 rebar = pci_rebar_get_possible_sizes(pdev, resno);
> + resource_size_t size;
> +
> + if (!rebar)
> + return 0;
> +
> + size = 1ULL << (__fls(rebar) + BAR_SIZE_SHIFT);
> +
> + if (size <= pci_resource_len(pdev, resno))
> + return 0;
> +
> + return size;
> +}
> +
> +#define LMEM_BAR_NUM 2
> +static void i915_resize_lmem_bar(struct drm_i915_private *i915)
> +{
> + struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> + struct pci_bus *root = pdev->bus;
> + struct resource *root_res;
> + resource_size_t rebar_size = __lmem_rebar_size(i915, LMEM_BAR_NUM);
> + u32 pci_cmd;
> + int i;
> +
> + if (!rebar_size)
> + return;
> +
> + /* Find out if root bus contains 64bit memory addressing */
> + while (root->parent)
> + root = root->parent;
> +
> + pci_bus_for_each_resource(root, root_res, i) {
> + if (root_res && root_res->flags & (IORESOURCE_MEM |
> + IORESOURCE_MEM_64) && root_res->start > 
> 0x1ull)
> + break;
> + }
> +
> + /* pci_resize_resource will fail anyways */
> + if (!root_res) {
> + drm_info(>drm, "Can't resize LMEM BAR - platform support 
> is missing\n");
> + return;
> + }
> +
> + /* First disable PCI memory decoding references */
> + pci_read_config_dword(pdev, PCI_COMMAND, _cmd);
> + pci_write_config_dword(pdev, PCI_COMMAND,
> +pci_cmd & ~PCI_COMMAND_MEMORY);
> +
> + __resize_bar(i915, LMEM_BAR_NUM, rebar_size);
> +
> + pci_assign_unassigned_bus_resources(pdev->bus);
> + pci_write_config_dword(pdev, PCI_COMMAND, pci_cmd);
> +}
> +
>  /**
>   * i915_driver_early_probe - setup state not requiring device access
>   * @dev_priv: device private
> @@ -852,6 +941,9 @@ int i915_driver_probe(struct pci_dev *pdev, const struct 
> pci_device_id *ent)
>  
>   disable_rpm_wakeref_asserts(>runtime_pm);
>  
> + if (HAS_LMEM(i915))
> + i915_resize_lmem_bar(i915);
> +
>   intel_vgpu_detect(i915);
>  
>   ret = intel_gt_probe_all(i915);

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH i-g-t 1/2] drm/i915: Add support for LMEM PCIe resizable bar

2022-06-16 Thread Jani Nikula
On Thu, 16 Jun 2022, priyanka.dandam...@intel.com wrote:
> From: Akeem G Abodunrin 
>
> This patch adds support for the local memory PICe resizable bar, so that
> local memory can be resized to the maximum size supported by the device,
> and mapped correctly to the PCIe memory bar. It is usual that GPU
> devices expose only 256MB BARs primarily to be compatible with 32-bit
> systems. So, those devices cannot claim larger memory BAR windows size due
> to the system BIOS limitation. With this change, it would be possible to
> reprogram the windows of the bridge directly above the requesting device
> on the same BAR type.
>
> Signed-off-by: Akeem G Abodunrin 
> Signed-off-by: Michał Winiarski 
> Cc: Stuart Summers 
> Cc: Michael J Ruhl 
> Cc: Prathap Kumar Valsan 
> Signed-off-by: Priyanka Dandamudi 
> Reviewed-by: Matthew Auld 
> ---
>  drivers/gpu/drm/i915/i915_driver.c | 92 ++
>  1 file changed, 92 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c 
> b/drivers/gpu/drm/i915/i915_driver.c
> index d26dcca7e654..4bdb471cb2e2 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -303,6 +303,95 @@ static void sanitize_gpu(struct drm_i915_private *i915)
>   __intel_gt_reset(to_gt(i915), ALL_ENGINES);
>  }
>  
> +static void __release_bars(struct pci_dev *pdev)

What's with the double underscores? 

> +{
> + int resno;
> +
> + for (resno = PCI_STD_RESOURCES; resno < PCI_STD_RESOURCE_END; resno++) {
> + if (pci_resource_len(pdev, resno))
> + pci_release_resource(pdev, resno);
> + }
> +}
> +
> +static void
> +__resize_bar(struct drm_i915_private *i915, int resno, resource_size_t size)
> +{
> + struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> + int bar_size = pci_rebar_bytes_to_size(size);
> + int ret;
> +
> + __release_bars(pdev);
> +
> + ret = pci_resize_resource(pdev, resno, bar_size);
> + if (ret) {
> + drm_info(>drm, "Failed to resize BAR%d to %dM (%pe)\n",
> +  resno, 1 << bar_size, ERR_PTR(ret));
> + return;
> + }
> +
> + drm_info(>drm, "BAR%d resized to %dM\n", resno, 1 << bar_size);
> +}
> +
> +/* BAR size starts from 1MB - 2^20 */
> +#define BAR_SIZE_SHIFT 20
> +static resource_size_t
> +__lmem_rebar_size(struct drm_i915_private *i915, int resno)
> +{
> + struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> + u32 rebar = pci_rebar_get_possible_sizes(pdev, resno);
> + resource_size_t size;
> +
> + if (!rebar)
> + return 0;
> +
> + size = 1ULL << (__fls(rebar) + BAR_SIZE_SHIFT);
> +
> + if (size <= pci_resource_len(pdev, resno))
> + return 0;
> +
> + return size;
> +}
> +
> +#define LMEM_BAR_NUM 2
> +static void i915_resize_lmem_bar(struct drm_i915_private *i915)
> +{
> + struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> + struct pci_bus *root = pdev->bus;
> + struct resource *root_res;
> + resource_size_t rebar_size = __lmem_rebar_size(i915, LMEM_BAR_NUM);
> + u32 pci_cmd;
> + int i;
> +
> + if (!rebar_size)
> + return;
> +
> + /* Find out if root bus contains 64bit memory addressing */
> + while (root->parent)
> + root = root->parent;
> +
> + pci_bus_for_each_resource(root, root_res, i) {
> + if (root_res && root_res->flags & (IORESOURCE_MEM |
> + IORESOURCE_MEM_64) && root_res->start > 
> 0x1ull)
> + break;
> + }
> +
> + /* pci_resize_resource will fail anyways */
> + if (!root_res) {
> + drm_info(>drm, "Can't resize LMEM BAR - platform support 
> is missing\n");
> + return;
> + }
> +
> + /* First disable PCI memory decoding references */
> + pci_read_config_dword(pdev, PCI_COMMAND, _cmd);
> + pci_write_config_dword(pdev, PCI_COMMAND,
> +pci_cmd & ~PCI_COMMAND_MEMORY);
> +
> + __resize_bar(i915, LMEM_BAR_NUM, rebar_size);
> +
> + pci_assign_unassigned_bus_resources(pdev->bus);
> + pci_write_config_dword(pdev, PCI_COMMAND, pci_cmd);
> +}

Doesn't feel like the above code belongs in this file. The file is
supposed to be very high level. The mchbar stuff is the only low level
thing here, and that feels out of place too. Maybe this and the mchbar
stuff belong in a new file.

BR,
Jani.


> +
>  /**
>   * i915_driver_early_probe - setup state not requiring device access
>   * @dev_priv: device private
> @@ -852,6 +941,9 @@ int i915_driver_probe(struct pci_dev *pdev, const struct 
> pci_device_id *ent)
>  
>   disable_rpm_wakeref_asserts(>runtime_pm);
>  
> + if (HAS_LMEM(i915))
> + i915_resize_lmem_bar(i915);
> +
>   intel_vgpu_detect(i915);
>  
>   ret = intel_gt_probe_all(i915);

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH v2 3/9] drm/i915/dg2: Add DG2_NB_MBD subplatform

2022-06-16 Thread Jani Nikula
On Thu, 16 Jun 2022, Tvrtko Ursulin  wrote:
> On 16/06/2022 15:15, Jani Nikula wrote:
>> On Thu, 16 Jun 2022, Tvrtko Ursulin  wrote:
>>> On 16/06/2022 13:01, Anshuman Gupta wrote:
>>>> DG2 NB SKU need to distinguish between MBD and AIC to probe
>>>> the VRAM Self Refresh feature support. Adding those sub platform
>>>> accordingly.
>>>>
>>>> Cc: Matt Roper 
>>>> Signed-off-by: Anshuman Gupta 
>>>> ---
>>>>drivers/gpu/drm/i915/i915_drv.h  |  3 +++
>>>>drivers/gpu/drm/i915/intel_device_info.c | 21 +
>>>>drivers/gpu/drm/i915/intel_device_info.h | 11 +++
>>>>include/drm/i915_pciids.h| 23 ---
>>>>4 files changed, 47 insertions(+), 11 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h 
>>>> b/drivers/gpu/drm/i915/i915_drv.h
>>>> index a5bc6a774c5a..f1f8699eedfd 100644
>>>> --- a/drivers/gpu/drm/i915/i915_drv.h
>>>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>>>> @@ -1007,10 +1007,13 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>>>>#define IS_PONTEVECCHIO(dev_priv) IS_PLATFORM(dev_priv, 
>>>> INTEL_PONTEVECCHIO)
>>>>
>>>>#define IS_DG2_G10(dev_priv) \
>>>> +  IS_SUBPLATFORM(dev_priv, INTEL_DG2, INTEL_SUBPLATFORM_G10_NB_MBD) || \
>>>>IS_SUBPLATFORM(dev_priv, INTEL_DG2, INTEL_SUBPLATFORM_G10)
>>>>#define IS_DG2_G11(dev_priv) \
>>>> +  IS_SUBPLATFORM(dev_priv, INTEL_DG2, INTEL_SUBPLATFORM_G11_NB_MBD) || \
>>>>IS_SUBPLATFORM(dev_priv, INTEL_DG2, INTEL_SUBPLATFORM_G11)
>>>>#define IS_DG2_G12(dev_priv) \
>>>> +  IS_SUBPLATFORM(dev_priv, INTEL_DG2, INTEL_SUBPLATFORM_G12_NB_MBD) || \
>>>>IS_SUBPLATFORM(dev_priv, INTEL_DG2, INTEL_SUBPLATFORM_G12)
>>>>#define IS_ADLS_RPLS(dev_priv) \
>>>>IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_S, 
>>>> INTEL_SUBPLATFORM_RPL)
>>>> diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
>>>> b/drivers/gpu/drm/i915/intel_device_info.c
>>>> index f0bf23726ed8..93da555adc4e 100644
>>>> --- a/drivers/gpu/drm/i915/intel_device_info.c
>>>> +++ b/drivers/gpu/drm/i915/intel_device_info.c
>>>> @@ -187,6 +187,18 @@ static const u16 subplatform_rpl_ids[] = {
>>>>INTEL_RPLP_IDS(0),
>>>>};
>>>>
>>>> +static const u16 subplatform_g10_mb_mbd_ids[] = {
>>>> +  INTEL_DG2_G10_NB_MBD_IDS(0),
>>>> +};
>>>> +
>>>> +static const u16 subplatform_g11_mb_mbd_ids[] = {
>>>> +  INTEL_DG2_G11_NB_MBD_IDS(0),
>>>> +};
>>>> +
>>>> +static const u16 subplatform_g12_mb_mbd_ids[] = {
>>>> +  INTEL_DG2_G12_NB_MBD_IDS(0),
>>>> +};
>>>> +
>>>>static const u16 subplatform_g10_ids[] = {
>>>>INTEL_DG2_G10_IDS(0),
>>>>INTEL_ATS_M150_IDS(0),
>>>> @@ -246,6 +258,15 @@ void intel_device_info_subplatform_init(struct 
>>>> drm_i915_private *i915)
>>>>} else if (find_devid(devid, subplatform_rpl_ids,
>>>>  ARRAY_SIZE(subplatform_rpl_ids))) {
>>>>mask = BIT(INTEL_SUBPLATFORM_RPL);
>>>> +  } else if (find_devid(devid, subplatform_g10_mb_mbd_ids,
>>>> +ARRAY_SIZE(subplatform_g10_mb_mbd_ids))) {
>>>> +  mask = BIT(INTEL_SUBPLATFORM_G10_NB_MBD);
>>>> +  } else if (find_devid(devid, subplatform_g11_mb_mbd_ids,
>>>> +ARRAY_SIZE(subplatform_g11_mb_mbd_ids))) {
>>>> +  mask = BIT(INTEL_SUBPLATFORM_G11_NB_MBD);
>>>> +  } else if (find_devid(devid, subplatform_g12_mb_mbd_ids,
>>>> +ARRAY_SIZE(subplatform_g12_mb_mbd_ids))) {
>>>> +  mask = BIT(INTEL_SUBPLATFORM_G12_NB_MBD);
>>>>} else if (find_devid(devid, subplatform_g10_ids,
>>>>  ARRAY_SIZE(subplatform_g10_ids))) {
>>>>mask = BIT(INTEL_SUBPLATFORM_G10);
>>>> diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
>>>> b/drivers/gpu/drm/i915/intel_device_info.h
>>>> index 08341174ee0a..c929e2d7e59c 100644
>>>> --- a/drivers/gpu/drm/i915/intel_device_info.h
>>>> +++ b/drivers/gpu/drm/i915/in

Re: [Intel-gfx] [PATCH v2 7/9] drm/i915/rpm: Enable D3Cold VRAM SR Support

2022-06-16 Thread Jani Nikula
On Thu, 16 Jun 2022, Anshuman Gupta  wrote:
> Intel Client DGFX card supports D3Cold with two option.
> D3Cold-off zero watt, D3Cold-VRAM Self Refresh.
>
> i915 requires to evict the lmem objects to smem in order to
> support D3Cold-Off, which increases i915 the suspend/resume
> latency. Enabling VRAM Self Refresh feature optimize the
> latency with additional power cost which required to retain
> the lmem.
>
> Adding intel_runtime_idle (runtime_idle callback) to enable
> VRAM_SR, it will be used for policy to choose
> between D3Cold-off vs D3Cold-VRAM_SR.
>
> Since we have introduced i915 runtime_idle callback.
> It need to be warranted that Runtime PM Core invokes runtime_idle
> callback when runtime usages count becomes zero. That requires
> to use pm_runtime_put instead of pm_runtime_put_autosuspend.
>
> TODO: GuC interface state save/restore.
>
> Cc: Rodrigo Vivi 
> Cc: Chris Wilson 
> Signed-off-by: Anshuman Gupta 
> ---
>  drivers/gpu/drm/i915/i915_driver.c  | 26 +
>  drivers/gpu/drm/i915/intel_runtime_pm.c |  3 +--
>  2 files changed, 27 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c 
> b/drivers/gpu/drm/i915/i915_driver.c
> index aa1fb15b1f11..fcff5f3fe05e 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -1557,6 +1557,31 @@ static int i915_pm_restore(struct device *kdev)
>   return i915_pm_resume(kdev);
>  }
>  
> +static int intel_runtime_idle(struct device *kdev)
> +{
> + struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
> + int ret = 1;
> +
> + if (!HAS_LMEM_SR(dev_priv)) {
> + /*TODO: Prepare for D3Cold-Off */
> + goto out;
> + }
> +
> + disable_rpm_wakeref_asserts(_priv->runtime_pm);
> +
> + ret = intel_pm_vram_sr(dev_priv, true);
> + if (!ret)
> + drm_dbg(_priv->drm, "VRAM Self Refresh enabled\n");

Please add the debug in the intel_pm_vram_sr() function instead.

BR,
Jani.

> +
> + enable_rpm_wakeref_asserts(_priv->runtime_pm);
> +
> +out:
> + pm_runtime_mark_last_busy(kdev);
> + pm_runtime_autosuspend(kdev);
> +
> + return ret;
> +}
> +
>  static int intel_runtime_suspend(struct device *kdev)
>  {
>   struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
> @@ -1742,6 +1767,7 @@ const struct dev_pm_ops i915_pm_ops = {
>   .restore = i915_pm_restore,
>  
>   /* S0ix (via runtime suspend) event handlers */
> + .runtime_idle = intel_runtime_idle,
>   .runtime_suspend = intel_runtime_suspend,
>   .runtime_resume = intel_runtime_resume,
>  };
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
> b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 6ed5786bcd29..4dade7e8a795 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -492,8 +492,7 @@ static void __intel_runtime_pm_put(struct 
> intel_runtime_pm *rpm,
>  
>   intel_runtime_pm_release(rpm, wakelock);
>  
> - pm_runtime_mark_last_busy(kdev);
> - pm_runtime_put_autosuspend(kdev);
> + pm_runtime_put(kdev);
>  }
>  
>  /**

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH v2 8/9] drm/i915/xehpsdv: Store lmem region in gt

2022-06-16 Thread Jani Nikula
On Thu, 16 Jun 2022, Anshuman Gupta  wrote:
> From: Tvrtko Ursulin 
>
> Store a pointer to respective local memory region in intel_gt so it can be
> used when memory local to a GT needs to be allocated.
>
> Cc: Andi Shyti 
> Signed-off-by: Tvrtko Ursulin 
> Signed-off-by: Anshuman Gupta 
> ---
>  drivers/gpu/drm/i915/gt/intel_gt.c   | 1 +
>  drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 +++
>  2 files changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c 
> b/drivers/gpu/drm/i915/gt/intel_gt.c
> index f33290358c51..7a535f670ae1 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -91,6 +91,7 @@ static int intel_gt_probe_lmem(struct intel_gt *gt)
>   GEM_BUG_ON(!HAS_REGION(i915, id));
>   GEM_BUG_ON(i915->mm.regions[id]);
>   i915->mm.regions[id] = mem;
> + gt->lmem = mem;
>  
>   return 0;
>  }
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h 
> b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> index df708802889d..cd7744eaaeaa 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> @@ -23,6 +23,7 @@
>  #include "intel_gt_buffer_pool_types.h"
>  #include "intel_hwconfig.h"
>  #include "intel_llc_types.h"
> +#include "intel_memory_region.h"

Please never add includes in headers when a forward declaration is
sufficient. I'm spending a lot of time trying to reduce the include
dependencies we have.

BR,
Jani.

>  #include "intel_reset_types.h"
>  #include "intel_rc6_types.h"
>  #include "intel_rps_types.h"
> @@ -202,6 +203,8 @@ struct intel_gt {
>*/
>   phys_addr_t phys_addr;
>  
> + struct intel_memory_region *lmem;
> +
>   struct intel_gt_info {
>   unsigned int id;

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH v2 9/9] drm/i915/rpm: d3cold Policy

2022-06-16 Thread Jani Nikula
On Thu, 16 Jun 2022, Anshuman Gupta  wrote:
> Add d3cold_sr_lmem_threshold modparam to choose between
> d3cold-off zero watt and d3cold-VRAM Self Refresh.
> i915 requires to evict the lmem objects to smem in order to
> support d3cold-Off.
>
> If gfx root port is not capable of sending PME from d3cold
> then i915 don't need to program d3cold-off/d3cold-vram_sr
> sequence.
>
> FIXME: Eviction of lmem objects in case of D3Cold off is wip.
>
> Cc: Rodrigo Vivi 
> Signed-off-by: Anshuman Gupta 
> ---
>  drivers/gpu/drm/i915/i915_driver.c | 27 ---
>  drivers/gpu/drm/i915/i915_params.c |  4 
>  drivers/gpu/drm/i915/i915_params.h |  3 ++-
>  3 files changed, 30 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c 
> b/drivers/gpu/drm/i915/i915_driver.c
> index fcff5f3fe05e..aef4b17efdbe 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -1560,15 +1560,36 @@ static int i915_pm_restore(struct device *kdev)
>  static int intel_runtime_idle(struct device *kdev)
>  {
>   struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
> + struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
> + u64 lmem_total = to_gt(dev_priv)->lmem->total;
> + u64 lmem_avail = to_gt(dev_priv)->lmem->avail;
> + u64 lmem_used = lmem_total - lmem_avail;
> + struct pci_dev *root_pdev;
>   int ret = 1;
>  
> - if (!HAS_LMEM_SR(dev_priv)) {
> - /*TODO: Prepare for D3Cold-Off */
> + root_pdev = pcie_find_root_port(pdev);
> + if (!root_pdev)
> + goto out;
> +
> + if (!pci_pme_capable(root_pdev, PCI_D3cold))
>   goto out;
> - }
>  
>   disable_rpm_wakeref_asserts(_priv->runtime_pm);
>  
> + if (lmem_used < dev_priv->params.d3cold_sr_lmem_threshold  * 1024 * 
> 1024) {
> + drm_dbg(_priv->drm, "Prepare for D3Cold off\n");
> + pci_d3cold_enable(root_pdev);
> + /* FIXME: Eviction of lmem objects and guc reset is wip */
> + intel_pm_vram_sr(dev_priv, false);
> + enable_rpm_wakeref_asserts(_priv->runtime_pm);
> + goto out;
> + } else if (!HAS_LMEM_SR(dev_priv)) {
> + /* Disable D3Cold to reduce the eviction latency */
> + pci_d3cold_disable(root_pdev);
> + enable_rpm_wakeref_asserts(_priv->runtime_pm);
> + goto out;
> + }

This is *way* too low level code for such high level function. This
needs to be abstracted better.

> +
>   ret = intel_pm_vram_sr(dev_priv, true);
>   if (!ret)
>   drm_dbg(_priv->drm, "VRAM Self Refresh enabled\n");
> diff --git a/drivers/gpu/drm/i915/i915_params.c 
> b/drivers/gpu/drm/i915/i915_params.c
> index 701fbc98afa0..6c6b3c372d4d 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -197,6 +197,10 @@ i915_param_named(enable_gvt, bool, 0400,
>   "Enable support for Intel GVT-g graphics virtualization host 
> support(default:false)");
>  #endif
>  
> +i915_param_named_unsafe(d3cold_sr_lmem_threshold, int, 0400,
> + "Enable Vidoe RAM Self refresh when size of lmem is greater to this 
> threshold. "
> + "It helps to optimize the suspend/resume latecy. (default: 300mb)");
> +
>  #if CONFIG_DRM_I915_REQUEST_TIMEOUT
>  i915_param_named_unsafe(request_timeout_ms, uint, 0600,
>   "Default request/fence/batch buffer expiration 
> timeout.");
> diff --git a/drivers/gpu/drm/i915/i915_params.h 
> b/drivers/gpu/drm/i915/i915_params.h
> index b5e7ea45d191..28f20ebaf41f 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -83,7 +83,8 @@ struct drm_printer;
>   param(bool, verbose_state_checks, true, 0) \
>   param(bool, nuclear_pageflip, false, 0400) \
>   param(bool, enable_dp_mst, true, 0600) \
> - param(bool, enable_gvt, false, IS_ENABLED(CONFIG_DRM_I915_GVT) ? 0400 : 
> 0)
> + param(bool, enable_gvt, false, IS_ENABLED(CONFIG_DRM_I915_GVT) ? 0400 : 
> 0) \
> + param(int, d3cold_sr_lmem_threshold, 300, 0600) \

What's the point of the parameter?

Also, please read the comment /* leave bools at the end to not create
holes */ above.


BR,
Jani.


>  
>  #define MEMBER(T, member, ...) T member;
>  struct i915_params {

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH v2 3/9] drm/i915/dg2: Add DG2_NB_MBD subplatform

2022-06-16 Thread Jani Nikula
NB_MBD2
>> +#define INTEL_SUBPLATFORM_G10   3
>> +#define INTEL_SUBPLATFORM_G11   4
>> +#define INTEL_SUBPLATFORM_G12   5
>
> Ugh I feel this "breaks" the subplatform idea.. feels like it is just 
> too many bits when two separate sets of information get tracked (Gxx 
> plus MBD).

I think they could be specified independent of each other, though. The
subplatform if-else ladder would have to be replaced with independent
ifs. You'd have the G10/G11/G12 and 1 bit separately for MBD.

Only the macros for PCI IDs need to be separate (MBD vs not). You'll
then have:

static const u16 subplatform_g10_ids[] = {
INTEL_DG2_G10_IDS(0),
INTEL_DG2_G10_NB_MBD_IDS(0),
INTEL_ATS_M150_IDS(0),
};

Ditto for g11 and g12, and separately:

static const u16 subplatform_mbd_ids[] = {
INTEL_DG2_G10_NB_MBD_IDS(0),
INTEL_DG2_G11_NB_MBD_IDS(0),
INTEL_DG2_G12_NB_MBD_IDS(0),
};

The IS_DG2_G10() etc. macros would remain unchanged. IS_DG2_MBD() would
only be IS_SUBPLATFORM(dev_priv, INTEL_DG2, INTEL_SUBPLATFORM_MBD).

Main point is, a platform could belong to multiple independent
subplatforms.

Unless I'm missing something. ;)

> How about a separate "is_mbd" flag in runtime_info? You can split the 
> PCI IDs split as you have done, but do a search against the MBD ones and 
> set the flag.

What I dislike about this is that it's really not *runtime* info in any
sense, and it adds another way to define platform features. And we
already have too many.

BR,
Jani.


>
> Regards,
>
> Tvrtko
>
>>   
>>   /* ADL */
>>   #define INTEL_SUBPLATFORM_RPL  0
>> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
>> index 4585fed4e41e..198be417bb2d 100644
>> --- a/include/drm/i915_pciids.h
>> +++ b/include/drm/i915_pciids.h
>> @@ -693,32 +693,41 @@
>>  INTEL_VGA_DEVICE(0xA7A9, info)
>>   
>>   /* DG2 */
>> -#define INTEL_DG2_G10_IDS(info) \
>> +#define INTEL_DG2_G10_NB_MBD_IDS(info) \
>>  INTEL_VGA_DEVICE(0x5690, info), \
>>  INTEL_VGA_DEVICE(0x5691, info), \
>> -INTEL_VGA_DEVICE(0x5692, info), \
>> +INTEL_VGA_DEVICE(0x5692, info)
>> +
>> +#define INTEL_DG2_G11_NB_MBD_IDS(info) \
>> +INTEL_VGA_DEVICE(0x5693, info), \
>> +INTEL_VGA_DEVICE(0x5694, info), \
>> +INTEL_VGA_DEVICE(0x5695, info)
>> +
>> +#define INTEL_DG2_G12_NB_MBD_IDS(info) \
>> +INTEL_VGA_DEVICE(0x5696, info), \
>> +INTEL_VGA_DEVICE(0x5697, info)
>> +
>> +#define INTEL_DG2_G10_IDS(info) \
>>  INTEL_VGA_DEVICE(0x56A0, info), \
>>  INTEL_VGA_DEVICE(0x56A1, info), \
>>  INTEL_VGA_DEVICE(0x56A2, info)
>>   
>>   #define INTEL_DG2_G11_IDS(info) \
>> -    INTEL_VGA_DEVICE(0x5693, info), \
>> -INTEL_VGA_DEVICE(0x5694, info), \
>> -INTEL_VGA_DEVICE(0x5695, info), \
>>  INTEL_VGA_DEVICE(0x56A5, info), \
>>  INTEL_VGA_DEVICE(0x56A6, info), \
>>  INTEL_VGA_DEVICE(0x56B0, info), \
>>  INTEL_VGA_DEVICE(0x56B1, info)
>>   
>>   #define INTEL_DG2_G12_IDS(info) \
>> -INTEL_VGA_DEVICE(0x5696, info), \
>> -INTEL_VGA_DEVICE(0x5697, info), \
>>  INTEL_VGA_DEVICE(0x56A3, info), \
>>  INTEL_VGA_DEVICE(0x56A4, info), \
>>  INTEL_VGA_DEVICE(0x56B2, info), \
>>  INTEL_VGA_DEVICE(0x56B3, info)
>>   
>>   #define INTEL_DG2_IDS(info) \
>> +INTEL_DG2_G10_NB_MBD_IDS(info), \
>> +INTEL_DG2_G11_NB_MBD_IDS(info), \
>> +INTEL_DG2_G12_NB_MBD_IDS(info), \
>>  INTEL_DG2_G10_IDS(info), \
>>  INTEL_DG2_G11_IDS(info), \
>>  INTEL_DG2_G12_IDS(info)

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH v2 2/9] drm/i915/dg1: OpRegion PCON DG1 MBD config support

2022-06-16 Thread Jani Nikula
On Thu, 16 Jun 2022, Anshuman Gupta  wrote:
> DGFX cards support both Add in Card(AIC) and Mother Board Down(MBD)
> configs. MBD config requires HOST BIOS GPIO toggling support
> in order to enable/disable VRAM SR using ACPI OpRegion.
>
> i915 requires to check OpRegion PCON MBD Config bits to
> discover whether Gfx Card is MBD config before enabling
> VRSR.
>
> BSpec: 53440
> Cc: Jani Nikula 
> Cc: Rodrigo Vivi 
> Signed-off-by: Anshuman Gupta 
> ---
>  drivers/gpu/drm/i915/display/intel_opregion.c | 43 +++
>  drivers/gpu/drm/i915/display/intel_opregion.h |  6 +++
>  2 files changed, 49 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c 
> b/drivers/gpu/drm/i915/display/intel_opregion.c
> index 11d8c5bb23ac..c8cdcde89dfc 100644
> --- a/drivers/gpu/drm/i915/display/intel_opregion.c
> +++ b/drivers/gpu/drm/i915/display/intel_opregion.c
> @@ -53,6 +53,8 @@
>  #define MBOX_ASLE_EXTBIT(4)  /* Mailbox #5 */
>  #define MBOX_BACKLIGHT   BIT(5)  /* Mailbox #2 (valid from v3.x) 
> */
>  
> +#define PCON_DG1_MBD_CONFIG  BIT(9)
> +#define PCON_DG1_MBD_CONFIG_FIELD_VALID  BIT(10)
>  #define PCON_DGFX_BIOS_SUPPORTS_VRSR BIT(11)
>  #define PCON_DGFX_BIOS_SUPPORTS_VRSR_FIELD_VALID BIT(12)
>  #define PCON_HEADLESS_SKUBIT(13)
> @@ -1255,6 +1257,44 @@ void intel_opregion_unregister(struct drm_i915_private 
> *i915)
>   opregion->lid_state = NULL;
>  }
>  
> +static bool intel_opregion_dg1_mbd_config(struct drm_i915_private *i915)
> +{
> + struct intel_opregion *opregion = >opregion;
> +
> + if (!IS_DG1(i915))
> + return false;
> +
> + if (!opregion)

Like in previous patch, opregion is always non-NULL. Check for
!opregion->header.

> + return false;
> +
> + if (opregion->header->pcon & PCON_DG1_MBD_CONFIG_FIELD_VALID)
> + return opregion->header->pcon & PCON_DG1_MBD_CONFIG;
> + else
> + return false;
> +}
> +
> +/**
> + * intel_opregion_vram_sr_required().
> + * @i915 i915 device priv data.
> + *
> + * It checks whether a DGFX card is Mother Board Down config depending
> + * on respective discrete platform.
> + *
> + * Returns:
> + * It returns a boolean whether opregion vram_sr support is required.
> + */
> +bool
> +intel_opregion_vram_sr_required(struct drm_i915_private *i915)
> +{
> + if (!IS_DGFX(i915))
> + return false;
> +
> + if (IS_DG1(i915))
> + return intel_opregion_dg1_mbd_config(i915);

Only check for IS_DG1() here or in the function being called, not both.

> +
> + return false;
> +}
> +
>  /**
>   * intel_opregion_bios_supports_vram_sr() get HOST BIOS VRAM Self
>   * Refresh capability support.
> @@ -1298,6 +1338,9 @@ void intel_opregion_vram_sr(struct drm_i915_private 
> *i915, bool enable)
>   if (!opregion)
>   return;
>  
> + if (!intel_opregion_vram_sr_required(i915))
> + return;

Feels like maybe this patch should be combined with the previous patch
due to this dependency.

> +
>   if (drm_WARN(>drm, !opregion->asle, "ASLE MAILBOX3 is not 
> available\n"))
>   return;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_opregion.h 
> b/drivers/gpu/drm/i915/display/intel_opregion.h
> index 73c9d81d5ee6..ad40c97f9565 100644
> --- a/drivers/gpu/drm/i915/display/intel_opregion.h
> +++ b/drivers/gpu/drm/i915/display/intel_opregion.h
> @@ -77,6 +77,7 @@ int intel_opregion_get_panel_type(struct drm_i915_private 
> *dev_priv);
>  struct edid *intel_opregion_get_edid(struct intel_connector *connector);
>  bool intel_opregion_bios_supports_vram_sr(struct drm_i915_private *i915);
>  void intel_opregion_vram_sr(struct drm_i915_private *i915, bool enable);
> +bool intel_opregion_vram_sr_required(struct drm_i915_private *i915);
>  
>  bool intel_opregion_headless_sku(struct drm_i915_private *i915);
>  
> @@ -145,6 +146,11 @@ static void intel_opregion_vram_sr(struct 
> drm_i915_private *i915, bool enable)
>  {
>  }
>  
> +static bool intel_opregion_vram_sr_required(struct drm_i915_private *i915)

static inline.

BR,
Jani.

> +{
> + return false;
> +}
> +
>  #endif /* CONFIG_ACPI */
>  
>  #endif

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH v2 1/9] drm/i915/dgfx: OpRegion VRAM Self Refresh Support

2022-06-16 Thread Jani Nikula
On Thu, 16 Jun 2022, Anshuman Gupta  wrote:
> Intel DGFX cards provides a feature Video Ram Self Refrsh(VRSR).
> DGFX VRSR can be enabled with runtime suspend D3Cold flow and with
> opportunistic S0ix system wide suspend flow as well.
>
> Without VRSR enablement i915 has to evict the lmem objects to
> system memory. Depending on some heuristics driver will evict
> lmem objects without VRSR.
>
> VRSR feature requires Host BIOS support, VRSR will be enable/disable
> by HOST BIOS using ACPI OpRegion.
>
> Adding OpRegion VRSR support in order to enable/disable
> VRSR on discrete cards.
>
> BSpec: 53440
> Cc: Jani Nikula 
> Cc: Rodrigo Vivi 
> Signed-off-by: Anshuman Gupta 
> ---
>  drivers/gpu/drm/i915/display/intel_opregion.c | 62 ++-
>  drivers/gpu/drm/i915/display/intel_opregion.h | 11 
>  2 files changed, 72 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c 
> b/drivers/gpu/drm/i915/display/intel_opregion.c
> index 6876ba30d5a9..11d8c5bb23ac 100644
> --- a/drivers/gpu/drm/i915/display/intel_opregion.c
> +++ b/drivers/gpu/drm/i915/display/intel_opregion.c
> @@ -53,6 +53,8 @@
>  #define MBOX_ASLE_EXTBIT(4)  /* Mailbox #5 */
>  #define MBOX_BACKLIGHT   BIT(5)  /* Mailbox #2 (valid from v3.x) 
> */
>  
> +#define PCON_DGFX_BIOS_SUPPORTS_VRSR BIT(11)
> +#define PCON_DGFX_BIOS_SUPPORTS_VRSR_FIELD_VALID BIT(12)
>  #define PCON_HEADLESS_SKUBIT(13)
>  
>  struct opregion_header {
> @@ -130,7 +132,8 @@ struct opregion_asle {
>   u64 rvda;   /* Physical (2.0) or relative from opregion (2.1+)
>* address of raw VBT data. */
>   u32 rvds;   /* Size of raw vbt data */
> - u8 rsvd[58];
> + u8 vrsr;/* DGFX Video Ram Self Refresh */
> + u8 rsvd[57];
>  } __packed;
>  
>  /* OpRegion mailbox #5: ASLE ext */
> @@ -201,6 +204,9 @@ struct opregion_asle_ext {
>  
>  #define ASLE_PHED_EDID_VALID_MASK0x3
>  
> +/* VRAM SR */
> +#define ASLE_VRSR_ENABLE BIT(0)
> +
>  /* Software System Control Interrupt (SWSCI) */
>  #define SWSCI_SCIC_INDICATOR (1 << 0)
>  #define SWSCI_SCIC_MAIN_FUNCTION_SHIFT   1
> @@ -921,6 +927,8 @@ int intel_opregion_setup(struct drm_i915_private 
> *dev_priv)
>   opregion->header->over.minor,
>   opregion->header->over.revision);
>  
> + drm_dbg(_priv->drm, "OpRegion PCON values 0x%x\n", 
> opregion->header->pcon);
> +
>   mboxes = opregion->header->mboxes;
>   if (mboxes & MBOX_ACPI) {
>   drm_dbg(_priv->drm, "Public ACPI methods supported\n");
> @@ -1246,3 +1254,55 @@ void intel_opregion_unregister(struct drm_i915_private 
> *i915)
>   opregion->vbt = NULL;
>   opregion->lid_state = NULL;
>  }
> +
> +/**
> + * intel_opregion_bios_supports_vram_sr() get HOST BIOS VRAM Self
> + * Refresh capability support.
> + * @i915: pointer to i915 device.
> + *
> + * It checks opregion pcon vram_sr fields to get HOST BIOS vram_sr
> + * capability support. It is only applocable to DGFX.
> + *
> + * Returns:
> + * true when bios supports vram_sr, or false if bios doesn't support.
> + */
> +bool intel_opregion_bios_supports_vram_sr(struct drm_i915_private *i915)
> +{
> + struct intel_opregion *opregion = >opregion;
> +
> + if (!IS_DGFX(i915))
> + return false;
> +
> + if (!opregion)

This is always true. You should check for !opregion->header.

> + return false;
> +
> + if (opregion->header->pcon & PCON_DGFX_BIOS_SUPPORTS_VRSR_FIELD_VALID)
> + return opregion->header->pcon & PCON_DGFX_BIOS_SUPPORTS_VRSR;
> + else
> + return false;
> +}
> +
> +/**
> + * intel_opregion_vram_sr() - enable/disable VRAM Self Refresh.
> + * @i915: pointer to i915 device.
> + * @enable: Argument to enable/disable VRSR.
> + *
> + * It enables/disables vram_sr in opregion ASLE MBOX, based upon that
> + * HOST BIOS will enables and disbales VRAM_SR during
> + * ACPI _PS3/_OFF and _PS/_ON glue method.
> + */
> +void intel_opregion_vram_sr(struct drm_i915_private *i915, bool enable)
> +{
> + struct intel_opregion *opregion = >opregion;
> +
> + if (!opregion)

Same as above.

> + return;
> +
> + if (drm_WARN(>drm, !opregion->asle, "ASLE MAILBOX3 is not 
> available\n"))
> + return;

I'd just bundle !opregion->asle into the early return.

> +
> + if (enable)
> + opregion->asle->vrsr |= ASLE_VRS

Re: [Intel-gfx] [PATCH v2 6/9] drm/i915/dgfx: Setup VRAM SR with D3COLD

2022-06-16 Thread Jani Nikula
On Thu, 16 Jun 2022, Anshuman Gupta  wrote:
> Setup VRAM Self Refresh with D3COLD state.
> VRAM Self Refresh will retain the context of VRAM, driver
> need to save any corresponding hardware state that needs
> to be restore on D3COLD exit, example PCI state.
>
> Cc: Jani Nikula 
> Cc: Rodrigo Vivi 
> Signed-off-by: Anshuman Gupta 
> ---
>  drivers/gpu/drm/i915/i915_driver.c |  2 ++
>  drivers/gpu/drm/i915/i915_drv.h|  7 +
>  drivers/gpu/drm/i915/i915_reg.h|  4 +++
>  drivers/gpu/drm/i915/intel_pcode.c | 28 +++
>  drivers/gpu/drm/i915/intel_pcode.h |  2 ++
>  drivers/gpu/drm/i915/intel_pm.c| 43 ++
>  drivers/gpu/drm/i915/intel_pm.h|  2 ++
>  7 files changed, 88 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c 
> b/drivers/gpu/drm/i915/i915_driver.c
> index d26dcca7e654..aa1fb15b1f11 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -649,6 +649,8 @@ static int i915_driver_hw_probe(struct drm_i915_private 
> *dev_priv)
>   if (ret)
>   goto err_msi;
>  
> + intel_pm_vram_sr_setup(dev_priv);
> +
>   /*
>* Fill the dram structure to get the system dram info. This will be
>* used for memory latency calculation.
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7983b36c1720..09f53aeda8d0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -624,6 +624,13 @@ struct drm_i915_private {
>   u32 bxt_phy_grc;
>  
>   u32 suspend_count;
> +
> + struct {
> + /* lock to protect vram_sr flags */
> + struct mutex lock;
> + bool supported;
> + } vram_sr;
> +
>   struct i915_suspend_saved_registers regfile;
>   struct vlv_s0ix_state *vlv_s0ix_state;
>  
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 932bd6aa4a0a..0e3dc4a8846a 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6766,6 +6766,8 @@
>  #define   DG1_PCODE_STATUS   0x7E
>  #define DG1_UNCORE_GET_INIT_STATUS   0x0
>  #define DG1_UNCORE_INIT_STATUS_COMPLETE  0x1
> +#define   DG1_PCODE_D3_VRAM_SR  0x71
> +#define DG1_ENABLE_SR0x1
>  #define GEN12_PCODE_READ_SAGV_BLOCK_TIME_US  0x23
>  #define   XEHPSDV_PCODE_FREQUENCY_CONFIG 0x6e/* xehpsdv, pvc 
> */
>  /* XEHPSDV_PCODE_FREQUENCY_CONFIG sub-commands (param1) */
> @@ -6779,6 +6781,8 @@
>  #define   GEN6_PCODE_FREQ_IA_RATIO_SHIFT 8
>  #define   GEN6_PCODE_FREQ_RING_RATIO_SHIFT   16
>  #define GEN6_PCODE_DATA1 _MMIO(0x13812C)
> +#define VRAM_CAPABILITY _MMIO(0x138144)
> +#define   VRAM_SUPPORTEDREG_BIT(0)
>  
>  /* IVYBRIDGE DPF */
>  #define GEN7_L3CDERRST1(slice)   _MMIO(0xB008 + (slice) * 0x200) 
> /* L3CD Error Status 1 */
> diff --git a/drivers/gpu/drm/i915/intel_pcode.c 
> b/drivers/gpu/drm/i915/intel_pcode.c
> index a234d9b4ed14..88bd1f44cfb2 100644
> --- a/drivers/gpu/drm/i915/intel_pcode.c
> +++ b/drivers/gpu/drm/i915/intel_pcode.c
> @@ -246,3 +246,31 @@ int snb_pcode_write_p(struct intel_uncore *uncore, u32 
> mbcmd, u32 p1, u32 p2, u3
>  
>   return err;
>  }
> +
> +/**
> + * intel_pcode_enable_vram_sr - Enable pcode vram_sr.
> + * @dev_priv: i915 device
> + *
> + * This function triggers the required pcode flow to enable vram_sr.
> + * This function stictly need to call from rpm handlers, as i915 is
> + * transitioning to rpm idle/suspend, it doesn't require to grab
> + * rpm wakeref.
> + *
> + * Returns:
> + * returns returned value from pcode mbox write.
> + */
> +int intel_pcode_enable_vram_sr(struct drm_i915_private *i915)
> +{
> + int ret = 0;
> +
> + if (!HAS_LMEM_SR(i915))
> + return ret;
> +
> + ret = snb_pcode_write(>uncore,
> +   REG_FIELD_PREP(GEN6_PCODE_MB_COMMAND,
> +   DG1_PCODE_D3_VRAM_SR) |
> +   REG_FIELD_PREP(GEN6_PCODE_MB_PARAM1,
> +   DG1_ENABLE_SR), 0); /* no data needed for this 
> cmd */
> +
> + return ret;
> +}

This function doesn't belong here. intel_pcode.c provides the
*mechanisms* for pcode access, not specific stuff like this. Just put
this near the use in intel_pm.c I think.


> diff --git a/drivers/gpu/drm/i915/intel_pcode.h 
> b/drivers/gpu/drm/i915/intel_pcode.h
> index 8d2198e29422..295594514d49 100644
> --- a/drivers/gpu/drm/i915/int

[Intel-gfx] [PATCH] drm/i915/glk: ECS Liva Q2 needs GLK HDMI port timing quirk

2022-06-16 Thread Jani Nikula
From: Diego Santa Cruz 

The quirk added in upstream commit 90c3e2198777 ("drm/i915/glk: Add
Quirk for GLK NUC HDMI port issues.") is also required on the ECS Liva
Q2.

Note: Would be nicer to figure out the extra delay required for the
retimer without quirks, however don't know how to check for that.

Cc: sta...@vger.kernel.org
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1326
Signed-off-by: Diego Santa Cruz 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_quirks.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c 
b/drivers/gpu/drm/i915/display/intel_quirks.c
index c8488f5ebd04..e415cd7c0b84 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.c
+++ b/drivers/gpu/drm/i915/display/intel_quirks.c
@@ -191,6 +191,9 @@ static struct intel_quirk intel_quirks[] = {
/* ASRock ITX*/
{ 0x3185, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
{ 0x3184, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
+   /* ECS Liva Q2 */
+   { 0x3185, 0x1019, 0xa94d, quirk_increase_ddi_disabled_time },
+   { 0x3184, 0x1019, 0xa94d, quirk_increase_ddi_disabled_time },
 };
 
 void intel_init_quirks(struct drm_i915_private *i915)
-- 
2.30.2



Re: [Intel-gfx] [PATCH 1/2] drm/i915: Extract intel_sanitize_fifo_underrun_reporting()

2022-06-16 Thread Jani Nikula
On Wed, 15 Jun 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Pull the underrun status sanitation into its own helper.
>
> Signed-off-by: Ville Syrjälä 

On the series,

Reviewed-by: Jani Nikula 

I'll respin my state readout extraction on top of this once you've
merged.

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 65 +++-
>  1 file changed, 37 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 7d9c8aeef686..e38d0a85889b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -9897,11 +9897,46 @@ static struct intel_connector 
> *intel_encoder_find_connector(struct intel_encoder
>   return NULL;
>  }
>  
> +static void intel_sanitize_fifo_underrun_reporting(const struct 
> intel_crtc_state *crtc_state)
> +{
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> +
> + if (!crtc_state->hw.active && !HAS_GMCH(i915))
> + return;
> +
> + /*
> +  * We start out with underrun reporting disabled to avoid races.
> +  * For correct bookkeeping mark this on active crtcs.
> +  *
> +  * Also on gmch platforms we dont have any hardware bits to
> +  * disable the underrun reporting. Which means we need to start
> +  * out with underrun reporting disabled also on inactive pipes,
> +  * since otherwise we'll complain about the garbage we read when
> +  * e.g. coming up after runtime pm.
> +  *
> +  * No protection against concurrent access is required - at
> +  * worst a fifo underrun happens which also sets this to false.
> +  */
> + crtc->cpu_fifo_underrun_disabled = true;
> +
> + /*
> +  * We track the PCH trancoder underrun reporting state
> +  * within the crtc. With crtc for pipe A housing the underrun
> +  * reporting state for PCH transcoder A, crtc for pipe B housing
> +  * it for PCH transcoder B, etc. LPT-H has only PCH transcoder A,
> +  * and marking underrun reporting as disabled for the non-existing
> +  * PCH transcoders B and C would prevent enabling the south
> +  * error interrupt (see cpt_can_enable_serr_int()).
> +  */
> + if (intel_has_pch_trancoder(i915, crtc->pipe))
> + crtc->pch_fifo_underrun_disabled = true;
> +}
> +
>  static void intel_sanitize_crtc(struct intel_crtc *crtc,
>   struct drm_modeset_acquire_ctx *ctx)
>  {
>   struct drm_device *dev = crtc->base.dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
>   struct intel_crtc_state *crtc_state = 
> to_intel_crtc_state(crtc->base.state);
>  
>   if (crtc_state->hw.active) {
> @@ -9928,33 +9963,7 @@ static void intel_sanitize_crtc(struct intel_crtc 
> *crtc,
>   !intel_crtc_is_bigjoiner_slave(crtc_state))
>   intel_crtc_disable_noatomic(crtc, ctx);
>  
> - if (crtc_state->hw.active || HAS_GMCH(dev_priv)) {
> - /*
> -  * We start out with underrun reporting disabled to avoid races.
> -  * For correct bookkeeping mark this on active crtcs.
> -  *
> -  * Also on gmch platforms we dont have any hardware bits to
> -  * disable the underrun reporting. Which means we need to start
> -  * out with underrun reporting disabled also on inactive pipes,
> -  * since otherwise we'll complain about the garbage we read when
> -  * e.g. coming up after runtime pm.
> -  *
> -  * No protection against concurrent access is required - at
> -  * worst a fifo underrun happens which also sets this to false.
> -  */
> - crtc->cpu_fifo_underrun_disabled = true;
> - /*
> -  * We track the PCH trancoder underrun reporting state
> -  * within the crtc. With crtc for pipe A housing the underrun
> -  * reporting state for PCH transcoder A, crtc for pipe B housing
> -  * it for PCH transcoder B, etc. LPT-H has only PCH transcoder 
> A,
> -  * and marking underrun reporting as disabled for the 
> non-existing
> -  * PCH transcoders B and C would prevent enabling the south
> -  * error interrupt (see cpt_can_enable_serr_int()).
> -  */
> - if (intel_has_pch_trancoder(dev_priv, crtc->pipe))
> - crtc->pch_fifo_underrun_disabled = true;
> - }
> + intel_sanitize_fifo_underrun_reporting(crtc_state);
>  }
>  
>  static bool has_bogus_dpll_config(const struct intel_crtc_state *crtc_state)

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH 3/3] drm/i915/bios: Introduce panel_bits() and panel_bool()

2022-06-16 Thread Jani Nikula
On Wed, 15 Jun 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Abstract the bit extraction from the VBT per-panel bitfields
> slightly.
>
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 31 +--
>  drivers/gpu/drm/i915/display/intel_vbt_defs.h |  3 --
>  2 files changed, 21 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 807184fd5618..76e86358adb9 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -743,6 +743,16 @@ static int get_panel_type(struct drm_i915_private *i915,
>   return panel_types[i].panel_type;
>  }
>  
> +static unsigned int panel_bits(unsigned int value, int panel_type, int 
> num_bits)
> +{
> + return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1);

Nitpick, this might be easier to parse with GENMASK and friends, but
*shrug*.

Reviewed-by: Jani Nikula 


> +}
> +
> +static bool panel_bool(unsigned int value, int panel_type)
> +{
> + return panel_bits(value, panel_type, 1);
> +}
> +
>  /* Parse general panel options */
>  static void
>  parse_panel_options(struct drm_i915_private *i915,
> @@ -766,8 +776,8 @@ parse_panel_options(struct drm_i915_private *i915,
>   if (get_blocksize(lvds_options) < 16)
>   return;
>  
> - drrs_mode = (lvds_options->dps_panel_type_bits
> - >> (panel_type * 2)) & MODE_MASK;
> + drrs_mode = panel_bits(lvds_options->dps_panel_type_bits,
> +panel_type, 2);
>   /*
>* VBT has static DRRS = 0 and seamless DRRS = 2.
>* The below piece of code is required to adjust vbt.drrs_type
> @@ -1313,7 +1323,7 @@ parse_power_conservation_features(struct 
> drm_i915_private *i915,
>   if (!power)
>   return;
>  
> - panel->vbt.psr.enable = power->psr & BIT(panel_type);
> + panel->vbt.psr.enable = panel_bool(power->psr, panel_type);
>  
>   /*
>* If DRRS is not supported, drrs_type has to be set to 0.
> @@ -1321,22 +1331,23 @@ parse_power_conservation_features(struct 
> drm_i915_private *i915,
>* static DRRS is 0 and DRRS not supported is represented by
>* power->drrs & BIT(panel_type)=false
>*/
> - if (!(power->drrs & BIT(panel_type)) && panel->vbt.drrs_type != 
> DRRS_TYPE_NONE) {
> + if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != 
> DRRS_TYPE_NONE) {
>   /*
>* FIXME Should DMRRS perhaps be treated as seamless
>* but without the automatic downclocking?
>*/
> - if (power->dmrrs & BIT(panel_type))
> + if (panel_bool(power->dmrrs, panel_type))
>   panel->vbt.drrs_type = DRRS_TYPE_STATIC;
>   else
>   panel->vbt.drrs_type = DRRS_TYPE_NONE;
>   }
>  
>   if (i915->vbt.version >= 232)
> - panel->vbt.edp.hobl = power->hobl & BIT(panel_type);
> + panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type);
>  
>   if (i915->vbt.version >= 233)
> - panel->vbt.vrr = power->vrr_feature_enabled & BIT(panel_type);
> + panel->vbt.vrr = panel_bool(power->vrr_feature_enabled,
> + panel_type);
>  }
>  
>  static void
> @@ -1352,7 +1363,7 @@ parse_edp(struct drm_i915_private *i915,
>   if (!edp)
>   return;
>  
> - switch ((edp->color_depth >> (panel_type * 2)) & 3) {
> + switch (panel_bits(edp->color_depth, panel_type, 2)) {
>   case EDP_18BPP:
>   panel->vbt.edp.bpp = 18;
>   break;
> @@ -1463,7 +1474,7 @@ parse_edp(struct drm_i915_private *i915,
>   }
>  
>   panel->vbt.edp.drrs_msa_timing_delay =
> - (edp->sdrrs_msa_timing_delay >> (panel_type * 2)) & 3;
> + panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2);
>  
>   if (i915->vbt.version >= 244)
>   panel->vbt.edp.max_link_rate =
> @@ -1546,7 +1557,7 @@ parse_psr(struct drm_i915_private *i915,
>   if (i915->vbt.version >= 226) {
>   u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
>  
> - wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
> + wakeup_time = panel_bits(wakeup_time, panel_type, 2);
>   s

Re: [Intel-gfx] [PATCH 2/3] drm/i915/bios: Don't parse the DPS panel type when the VBT does not have it

2022-06-16 Thread Jani Nikula
On Wed, 15 Jun 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Older VBTs don't have all the stuff we've defined for the
> LVDS options block (40). In particular we're currently parsing
> the DPS panel type bits even though they may not exist, which
> could mean we end up flagging the machine as supporting static
> DRRS when the VBT declared no such thing.
>
> We don't actually have a clear idea which VBT versions have
> which bits so we rely on the block size instead.
>
> Here's a quick list from my VBT stash:
> mgm version 108 -> 4 bytes
> alv version 120 -> 4 bytes
> cst version 134 -> 14 bytes
> pnv version 144 -> 14 bytes
> cl  version 142 -> 16 bytes
> ctg version 155 -> 24 bytes
>
> Signed-off-by: Ville Syrjälä 

Acked-by: Jani Nikula 

> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 8 
>  1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index df52f406e1ae..807184fd5618 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -758,6 +758,14 @@ parse_panel_options(struct drm_i915_private *i915,
>  
>   panel->vbt.lvds_dither = lvds_options->pixel_dither;
>  
> + /*
> +  * Empirical evidence indicates the block size can be
> +  * either 4,14,16,24+ bytes. For older VBTs no clear
> +  * relationship between the block size vs. BDB version.
> +  */
> + if (get_blocksize(lvds_options) < 16)
> + return;
> +
>   drrs_mode = (lvds_options->dps_panel_type_bits
>   >> (panel_type * 2)) & MODE_MASK;
>   /*

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH 1/3] drm/i915/bios: Move panel_type stuff out of parse_panel_options()

2022-06-16 Thread Jani Nikula
On Wed, 15 Jun 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Parsing the panel_type is a bit special and should be done
> before we parse anything else potentially panel-specific from
> the VBT. So move it out from parse_panel_options(). It doesn't
> neet to be there anyway since it'll do its own LVDS options
> block lookup.
>
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 13 +
>  1 file changed, 5 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index fb5f8a9f5ab5..df52f406e1ae 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -746,11 +746,10 @@ static int get_panel_type(struct drm_i915_private *i915,
>  /* Parse general panel options */
>  static void
>  parse_panel_options(struct drm_i915_private *i915,
> - struct intel_panel *panel,
> - const struct edid *edid)
> + struct intel_panel *panel)
>  {
>   const struct bdb_lvds_options *lvds_options;
> - int panel_type;
> + int panel_type = panel->vbt.panel_type;
>   int drrs_mode;
>  
>   lvds_options = find_section(i915, BDB_LVDS_OPTIONS);
> @@ -759,10 +758,6 @@ parse_panel_options(struct drm_i915_private *i915,
>  
>   panel->vbt.lvds_dither = lvds_options->pixel_dither;
>  
> - panel_type = get_panel_type(i915, edid);
> -
> - panel->vbt.panel_type = panel_type;
> -
>   drrs_mode = (lvds_options->dps_panel_type_bits
>   >> (panel_type * 2)) & MODE_MASK;
>   /*
> @@ -3117,7 +3112,9 @@ void intel_bios_init_panel(struct drm_i915_private 
> *i915,
>  {
>   init_vbt_panel_defaults(panel);
>  
> - parse_panel_options(i915, panel, edid);
> + panel->vbt.panel_type = get_panel_type(i915, edid);
> +

I guess that could be parse_panel_type() that doesn't return
anything. But this is fine too.

Reviewed-by: Jani Nikula 

> + parse_panel_options(i915, panel);
>   parse_generic_dtd(i915, panel);
>   parse_lfp_data(i915, panel);
>   parse_lfp_backlight(i915, panel);

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH] drm/i915: Remove bogus LPT iCLKIP WARN

2022-06-16 Thread Jani Nikula
On Thu, 16 Jun 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> The WARN shouldn't have been added yet. For the moment the
> clock that gets passed here is just what the user has requested
> (via the modeline) and may not be exactly what iCLKIP can
> generate.
>
> Later on the plan is to change things so that we already get
> passed the exact clock here, at which point the WARN should
> be reintroduced.

Hmph, who reviwed that patch anyway?!

Reviewed-by: Jani Nikula 

>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6246
> Fixes: 97708335b04d ("drm/i915: Introduce struct iclkip_params")
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/display/intel_pch_refclk.c | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_pch_refclk.c 
> b/drivers/gpu/drm/i915/display/intel_pch_refclk.c
> index 752dab11667f..9934c8a9e240 100644
> --- a/drivers/gpu/drm/i915/display/intel_pch_refclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_pch_refclk.c
> @@ -179,7 +179,6 @@ void lpt_program_iclkip(const struct intel_crtc_state 
> *crtc_state)
>   lpt_disable_iclkip(dev_priv);
>  
>   lpt_compute_iclkip(, clock);
> - drm_WARN_ON(_priv->drm, lpt_iclkip_freq() != clock);
>  
>   /* This should not happen with any sane values */
>   drm_WARN_ON(_priv->drm, SBI_SSCDIVINTPHASE_DIVSEL(p.divsel) &

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH v3 0/3] Disable connector polling for a headless sku

2022-06-16 Thread Jani Nikula
On Fri, 10 Jun 2022, Jouni Högander  wrote:
> This patch set disables connector polling when entering runtime
> suspend for headless sku to prevent waking it up again when poll
> is performed.

Pushed to drm-intel-next, thanks for the patches.

BR,
Jani.

>
> v3:
>  - dummy intel_opregion_headless_sku is now static inline
> v2:
>  - integrate headless check into INTEL_DISPLAY_ENABLED
>
> Cc: Jani Nikula 
> Cc: José Roberto de Souza 
> Cc: Imre Deak 
> Cc: Anshuman Gupta 
>
>
> Jouni Högander (3):
>   drm/i915/opregion: add function to check if headless sku
>   drm/i915: Do not start connector polling if display is disabled
>   drm/i915: Do not start connector polling on headless sku
>
>  drivers/gpu/drm/i915/display/intel_hotplug.c  |  3 ++-
>  drivers/gpu/drm/i915/display/intel_opregion.c | 14 ++
>  drivers/gpu/drm/i915/display/intel_opregion.h |  7 +++
>  drivers/gpu/drm/i915/i915_drv.h   |  4 +++-
>  4 files changed, 26 insertions(+), 2 deletions(-)

-- 
Jani Nikula, Intel Open Source Graphics Center


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