Re: [PATCH v3 04/21] drm/i915/xe2hpd: Skip CCS modifiers

g fixed here should already be taken care by -- commit cf48bddd31deefb9ab07de9a4d0150da6610198a Author: Juha-Pekka Heikkila Date: Wed Feb 28 16:02:25 2024 +0200 drm/i915/display: Disable AuxCCS framebuffers if built for Xe -- /Juha-Pekka Xe2_HPD, the CCS data is stored in a fixed

Re: [PATCH v3 2/2] drm/i915: Add SIZE_HINTS property for cursors

look all ok to me. Reviewed-by: Juha-Pekka Heikkila On 18.3.2024 22.44, Ville Syrjala wrote: From: Ville Syrjälä Advertize more suitable cursor sizes via the new SIZE_HINTS plane property. We can't really enumerate all supported cursor sizes on the platforms where the cursor height can

[PATCH] drm/i915/display: Disable AuxCCS framebuffers if built for Xe

AuxCCS framebuffers don't work on Xe driver hence disable them from plane capabilities until they are fixed. FlatCCS framebuffers work and they are left enabled. CCS is left untouched for i915 driver. Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/933 Signed-off-by: Juha-Pekka

[PATCH] drm/i915/display: Disable AuxCCS framebuffers if built for Xe

AuxCCS framebuffers don't work on Xe driver hence disable them from plane capabilities until they are fixed. FlatCCS framebuffers work and they are left enabled. CCS is left untouched for i915 driver. Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/933 Signed-off-by: Juha-Pekka

Re: ✗ Fi.CI.IGT: failure for Enable ccs compressed framebuffers on Xe2 (rev5)

these reported regressions have nothing to do with my changes On 6.2.2024 4.14, Patchwork wrote: *Patch Details* *Series:* Enable ccs compressed framebuffers on Xe2 (rev5) *URL:* https://patchwork.freedesktop.org/series/129471/ *State:*

Re: [PATCH] drm/i915/display: Disable AuxCCS framebuffers if built for Xe

On 2.2.2024 22.51, Souza, Jose wrote: On Thu, 2024-01-25 at 08:07 -0800, José Roberto de Souza wrote: On Thu, 2024-01-25 at 17:56 +0200, Juha-Pekka Heikkila wrote: On 25.1.2024 17.28, Souza, Jose wrote: On Thu, 2024-01-25 at 17:25 +0200, Juha-Pekka Heikkila wrote: AuxCCS framebuffers don't

[PATCH 1/1] drm/i915/display: On Xe2 always enable decompression with tile4

With Xe2 always treat tile4 as if it was using flat ccs. Signed-off-by: Juha-Pekka Heikkila Reviewed-by: Mika Kahola --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu

[PATCH 0/1] Enable ccs compressed framebuffers on Xe2

annotation code author for Matthew as it was cut'n'paste from review comment. v4: Drop attempts to control ccs for linear/x-tile. Just unconditionally enable tile4 decompression on display. Juha-Pekka Heikkila (1): drm/i915/display: On Xe2 always enable decompression with tile4 drivers/gpu/drm/i915

Re: [PATCH 2/4] drm/xe: add bind time pat index to xe_bo structure

On 1.2.2024 16.17, Juha-Pekka Heikkila wrote: On 31.1.2024 20.56, Matt Roper wrote: On Tue, Jan 30, 2024 at 09:36:50PM +0200, Juha-Pekka Heikkila wrote: Add BO bind time pat index member to xe_bo structure and store pat index from xe_vma to xe_bo. Signed-off-by: Juha-Pekka Heikkila

Re: [PATCH 2/4] drm/xe: add bind time pat index to xe_bo structure

On 31.1.2024 20.56, Matt Roper wrote: On Tue, Jan 30, 2024 at 09:36:50PM +0200, Juha-Pekka Heikkila wrote: Add BO bind time pat index member to xe_bo structure and store pat index from xe_vma to xe_bo. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/xe/xe_bo_types.h | 12

[PATCH 4/4] drm/i915/display: On Xe2 always enable decompression with tile4

With Xe2 always treat tile4 as if it was using flat ccs. Signed-off-by: Juha-Pekka Heikkila Reviewed-by: Mika Kahola --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu

[PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only

Display engine support ccs only with tile4, prevent other modifiers from using compressed memory. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/xe/display/xe_fb_pin.c | 23 +++ 1 file changed, 23 insertions(+) diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b

[PATCH 2/4] drm/xe: add bind time pat index to xe_bo structure

Add BO bind time pat index member to xe_bo structure and store pat index from xe_vma to xe_bo. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/xe/xe_bo_types.h | 12 drivers/gpu/drm/xe/xe_pt.c | 22 ++ 2 files changed, 30 insertions(+), 4 deletions

[PATCH 1/4] drm/xe/pat: annotate pat index table with compression info

From: Matthew Auld In a future patch we need to be able to determine if a given pat_index enables compression on xe2. Simplest is to annotate the PAT index table with this information. Signed-off-by: Matthew Auld Reviewed-by: Juha-Pekka Heikkila Signed-off-by: Juha-Pekka Heikkila

[PATCH 0/4] Enable ccs compressed framebuffers on Xe2

annotation code author for Matthew as it was cut'n'paste from review comment. Juha-Pekka Heikkila (3): drm/xe: add bind time pat index to xe_bo structure drm/xe/xe2: Limit ccs framebuffers to tile4 only drm/i915/display: On Xe2 always enable decompression with tile4 Matthew Auld (1): drm/xe/pat

Re: [PATCH 4/5] drm/xe/xe2: Limit ccs framebuffers to tile4 only

On 29.1.2024 14.02, Matthew Auld wrote: On 26/01/2024 21:08, Juha-Pekka Heikkila wrote: Display engine support ccs only with tile4, prevent other modifiers from using compressed memory. Store pin time pat index to xe_bo. Signed-off-by: Juha-Pekka Heikkila ---   drivers/gpu/drm/xe/display

Re: [PATCH 3/5] drm/xe: store bind time pat index to xe_bo

On 29.1.2024 13.33, Matthew Auld wrote: On 26/01/2024 21:08, Juha-Pekka Heikkila wrote: Store pat index from xe_vma to xe_bo and check if bo was pinned as framebuffer and verify pat index is not changing for pinned framebuffers. Signed-off-by: Juha-Pekka Heikkila ---   drivers/gpu/drm/xe

[PATCH 2/5] drm/xe: add bind time pat index to xe_bo structure

Add BO bind time pat index member and framebuffer pin time pat index to xe_bo structure. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/xe/xe_bo_types.h | 11 +++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_bo_types.h b/drivers/gpu/drm/xe/xe_bo_types.h

[PATCH 5/5] drm/i915/display: On Xe2 always enable decompression with tile4

With Xe2 always treat tile4 as if it was using flat ccs. Signed-off-by: Juha-Pekka Heikkila Reviewed-by: Mika Kahola --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu

[PATCH 4/5] drm/xe/xe2: Limit ccs framebuffers to tile4 only

Display engine support ccs only with tile4, prevent other modifiers from using compressed memory. Store pin time pat index to xe_bo. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/xe/display/xe_fb_pin.c | 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu

[PATCH 1/5] drm/xe/pat: annotate pat index table with compression information

add compressed member into xe_pat_table_entry which will contain boolean information if given pat_index is compressed or no. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/xe/xe_pat.c | 9 - drivers/gpu/drm/xe/xe_pat.h | 8 2 files changed, 16 insertions(+), 1 deletion

[PATCH 3/5] drm/xe: store bind time pat index to xe_bo

Store pat index from xe_vma to xe_bo and check if bo was pinned as framebuffer and verify pat index is not changing for pinned framebuffers. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/xe/xe_pt.c | 23 +++ 1 file changed, 19 insertions(+), 4 deletions(-) diff

[PATCH 0/5] Enable ccs compressed framebuffers on Xe2

-tiled framebuffers will result in -EINVAL as display does support decompression only on tile4. v2: Add compressed flag into pat index table and use that. Try to avoid situation where framebuffer can be bound with different pat index after it was pinned. Juha-Pekka Heikkila (5): drm/xe/pat

Re: [PATCH] drm/i915/display: Disable AuxCCS framebuffers if built for Xe

On 25.1.2024 17.28, Souza, Jose wrote: On Thu, 2024-01-25 at 17:25 +0200, Juha-Pekka Heikkila wrote: AuxCCS framebuffers don't work on Xe driver hence disable them from plane capabilities until they are fixed. FlatCCS framebuffers work and they are left enabled. CCS is left untouched for i915

[PATCH] drm/i915/display: Disable AuxCCS framebuffers if built for Xe

AuxCCS framebuffers don't work on Xe driver hence disable them from plane capabilities until they are fixed. FlatCCS framebuffers work and they are left enabled. CCS is left untouched for i915 deriver. Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/933 Signed-off-by: Juha-Pekka

Re: [PATCH] drm/xe/display: Disable aux ccs framebuffers

On 23.1.2024 19.57, Jani Nikula wrote: On Tue, 23 Jan 2024, Juha-Pekka Heikkila wrote: On 23.1.2024 12.49, Jani Nikula wrote: On Tue, 02 Jan 2024, Juha-Pekka Heikkila wrote: Aux ccs framebuffers don't work on Xe driver hence disable them from plane capabilities until they are fixed. Flat

Re: [PATCH] drm/xe/display: Disable aux ccs framebuffers

On 23.1.2024 12.49, Jani Nikula wrote: On Tue, 02 Jan 2024, Juha-Pekka Heikkila wrote: Aux ccs framebuffers don't work on Xe driver hence disable them from plane capabilities until they are fixed. Flat ccs framebuffers work and they are left enabled. Here is separated plane capabilities check

Re: [PATCH] drm/xe/display: Disable aux ccs framebuffers

On 23.1.2024 14.50, Ville Syrjälä wrote: On Tue, Jan 02, 2024 at 08:24:22PM +0200, Juha-Pekka Heikkila wrote: Aux ccs framebuffers don't work on Xe driver hence disable them from plane capabilities until they are fixed. Flat ccs framebuffers work and they are left enabled. Here is separated

Re: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only

On 19.1.2024 17.22, Matthew Auld wrote: On 18/01/2024 15:27, Juha-Pekka Heikkila wrote: Display engine support ccs only with tile4, prevent other modifiers from using compressed memory. Signed-off-by: Juha-Pekka Heikkila ---   drivers/gpu/drm/xe/display/xe_fb_pin.c | 17 +   1

Re: [PATCH 2/4] drm/xe: store bind time pat index to xe_bo

Hi Matthew, thanks for looking into these. Below few thoughts. On 19.1.2024 17.45, Matthew Auld wrote: On 18/01/2024 15:27, Juha-Pekka Heikkila wrote: Store pat index from xe_vma to xe_bo Signed-off-by: Juha-Pekka Heikkila ---   drivers/gpu/drm/xe/xe_pt.c | 4   1 file changed, 4

Re: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only

On 19.1.2024 13.48, Jani Nikula wrote: On Thu, 18 Jan 2024, Juha-Pekka Heikkila wrote: Display engine support ccs only with tile4, prevent other modifiers from using compressed memory. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/xe/display/xe_fb_pin.c | 17 + 1

[PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only

Display engine support ccs only with tile4, prevent other modifiers from using compressed memory. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/xe/display/xe_fb_pin.c | 17 + 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b

[PATCH 1/4] drm/xe: add bind time pat index to xe_bo structure

Add BO bind time pat index member to xe_bo structure Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/xe/xe_bo_types.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_bo_types.h b/drivers/gpu/drm/xe/xe_bo_types.h index 14ef13b7b421..1825bf013dd0 100644

[PATCH 4/4] drm/i915/display: On Xe2 always enable decompression with tile4

With Xe2 always treat tile4 as if it was using flat ccs. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display

[PATCH 2/4] drm/xe: store bind time pat index to xe_bo

Store pat index from xe_vma to xe_bo Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/xe/xe_pt.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c index de1030a47588..4b76db698878 100644 --- a/drivers/gpu/drm/xe/xe_pt.c +++ b

[PATCH 0/4] Enable ccs compressed framebuffers on Xe2

-tiled framebuffers will result in -EINVAL as display does support decompression only on tile4. Juha-Pekka Heikkila (4): drm/xe: add bind time pat index to xe_bo structure drm/xe: store bind time pat index to xe_bo drm/xe/xe2: Limit ccs framebuffers to tile4 only drm/i915/display: On Xe2

Re: ✗ Fi.CI.IGT: failure for drm/xe/display: Disable aux ccs framebuffers (rev4)

I don't see how those reported possible regressions would relate to my changes. My changes changed aux ccs behavior on plane capabilities in display code for Xe/i915 and nothing else. /Juha-Pekka On 11.1.2024 17.58, Patchwork wrote: *Patch Details* *Series:* drm/xe/display: Disable aux

[PATCH] drm/xe/display: Disable aux ccs framebuffers

://gitlab.freedesktop.org/drm/xe/kernel/-/issues/933 Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/Makefile | 1 + .../gpu/drm/i915/display/intel_plane_caps.c | 68 +++ .../gpu/drm/i915/display/intel_plane_caps.h | 14 .../drm/i915/display

[PATCH] drm/xe/display: Disable aux ccs framebuffers

://gitlab.freedesktop.org/drm/xe/kernel/-/issues/933 Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/Makefile | 1 + .../gpu/drm/i915/display/intel_plane_caps.c | 68 +++ .../gpu/drm/i915/display/intel_plane_caps.h | 14 .../drm/i915/display

Re: [Intel-gfx] [PATCH] drm/i915: Fix ADL+ tiled plane stride when the POT stride is smaller than the original

I tried a bit if I can break something with ccs but it seemed everything work as expected with this fix. Reviewed-by: Juha-Pekka Heikkila On 4.12.2023 22.24, Ville Syrjala wrote: From: Ville Syrjälä plane_view_scanout_stride() currently assumes that we had to pad the mapping stride

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915/display: Separate xe and i915 common dpt code into own file (rev5)

On 22.11.2023 12.49, Patchwork wrote: *Patch Details* *Series:* series starting with [1/3] drm/i915/display: Separate xe and i915 common dpt code into own file (rev5) *URL:* https://patchwork.freedesktop.org/series/126538/ *State:*

Re: [Intel-gfx] [PATCH 1/3] drm/i915/fbc: Split plane size vs. surface size checks apart

Took a while to comprehend what the spec says and how it translate into code but I think this is correct fix. entire set is Reviewed-by: Juha-Pekka Heikkila On 17.11.2023 19.18, Ville Syrjala wrote: From: Ville Syrjälä Do separate checks for the visible plane size vs. the surface size

[Intel-gfx] [PATCH 1/3] drm/i915/display: Separate xe and i915 common dpt code into own file

Here created intel_dpt_common.c to hold intel_dpt_configure which is needed for both xe and i915. Signed-off-by: Juha-Pekka Heikkila Reviewed-by: Jouni Högander --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/display/intel_display.c | 1 + drivers/gpu/drm/i915

[Intel-gfx] [PATCH 3/3] drm/i915/display: In intel_framebuffer_init switch to use intel_bo_to_drm_bo

We are preparing for Xe driver. I915 and Xe object implementation are differing. Use intel_bo_to_drm_bo instead of >base. Signed-off-by: Juha-Pekka Heikkila Reviewed-by: Jouni Högander Reviewed-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_fb.c | 2 +- 1 file changed, 1 insert

[Intel-gfx] [PATCH 2/3] drm/i915/display: in skl_surf_address check for dpt-vma

touch dpt_vma->node only if dpt-vma is not NULL Signed-off-by: Juha-Pekka Heikkila Reviewed-by: Jouni Högander --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c

[Intel-gfx] [PATCH 3/3] drm/i915/display: In intel_framebuffer_init switch to use intel_bo_to_drm_bo

Use intel_bo_to_drm_bo instead of >base. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/display/intel_fb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c index c1777ea35

[Intel-gfx] [PATCH 2/3] drm/i915/display: in skl_surf_address check for dpt-vma

touch dpt_vma->node only if dpt-vma is not NULL Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/disp

[Intel-gfx] [PATCH 1/3] drm/i915/display: Separate xe and i915 common dpt code into own file

Here created intel_dpt_common.c to hold intel_dpt_configure which is needed for both xe and i915. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/display/intel_display.c | 1 + drivers/gpu/drm/i915/display/intel_dpt.c | 26

Re: [Intel-gfx] [PATCH 2/2] drm/i915/display: Use intel_bo_to_drm_bo instead of obj->base

Reviewed-by: Juha-Pekka Heikkila On 12.10.2023 10.21, Jouni Högander wrote: Xe and i915 objects have differing implementation. Use intel_bo_to_drm_bo instead of obj->base as xe_bo doesn't have base pointer. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_fb.c

Re: [Intel-gfx] [PATCH 1/2] drm/i915/display: Move releasing gem object away from fb tracking

Reviewed-by: Juha-Pekka Heikkila On 12.10.2023 10.21, Jouni Högander wrote: As a preparation for Xe we want to remove all i915_gem_object details away from frontbuffer tacking code. Due to this move releasing gem object reference to i915_gem_object_set_frontbuffer. Signed-off-by: Jouni

Re: [Intel-gfx] [PATCH 1/5] drm/i915/fbc: Remove ancient 16k plane stride limit

All 5 patches look ok to me, I didn't spot anything to comment about. Reviewed-by: Juha-Pekka Heikkila On 14.9.2023 14.38, Ville Syrjala wrote: From: Ville Syrjälä The 16k max plane stride limit seems to be originally from i965gm, and no limit explicit limit has been specified since (g4x

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915: Use vblank worker to unpin old legacy cursor fb safely

I didn't spot anything to nag about. Just hope that warning doesn't become excessively noisy. These two patches are Reviewed-by: Juha-Pekka Heikkila On 4.9.2023 7.16, Ville Syrjala wrote: From: Ville Syrjälä The cursor hardware only does sync updates, and thus the hardware will be scanning

[Intel-gfx] [PATCH] drm/i915/display: add lock while printing frontbuffer tracking bits to debugfs

Add missing spin_lock/unlock Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/display/intel_display_debugfs.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index

[Intel-gfx] [PATCH] drm/i915/sdvo: ignore returned broken edid on intel_sdvo_tmds_sink_detect

If drm_edid_raw returned NULL on error don't try accessing anything behind that NULL Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/display/intel_sdvo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm

[Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add handling for MTL ccs modifiers

Add Tile4 ccs modifiers w/ auxbuffer handling Implement Wa_14017240301 Bspec: 49251, 49252, 49253 Signed-off-by: Juha-Pekka Heikkila Reviewed-by: Matt Atwood Reviewed-by: Mika Kahola --- drivers/gpu/drm/i915/display/intel_fb.c | 42 ++- .../drm/i915/display

[Intel-gfx] [PATCH 1/2] drm/fourcc: define Intel Meteorlake related ccs modifiers

Add Tile4 type ccs modifiers with aux buffer needed for MTL Bspec: 49251, 49252, 49253 Cc: dri-de...@lists.freedesktop.org Cc: Jani Nikula Signed-off-by: Juha-Pekka Heikkila Reviewed-by: Matt Atwood --- include/uapi/drm/drm_fourcc.h | 43 +++ 1 file changed, 43

Re: [Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add handling for MTL ccs modifiers

On 11.5.2023 23.13, Matt Atwood wrote: On Thu, May 11, 2023 at 01:37:14PM +0300, Juha-Pekka Heikkila wrote: Add Tile4 ccs modifiers w/ auxbuffer handling Commit message should include the workarounds implemented Wa_14017240301. Bspec: 49251, 49252, 49253 with white space revisions

[Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add handling for MTL ccs modifiers

Add Tile4 ccs modifiers w/ auxbuffer handling Signed-off-by: Juha-Pekka Heikkila Reviewed-by: Mika Kahola --- drivers/gpu/drm/i915/display/intel_fb.c | 42 ++- .../drm/i915/display/skl_universal_plane.c| 22 +- 2 files changed, 61 insertions(+), 3 deletions

[Intel-gfx] [PATCH 1/2] drm/fourcc: define Intel Meteorlake related ccs modifiers

Add Tile4 type ccs modifiers with aux buffer needed for MTL Cc: dri-de...@lists.freedesktop.org Cc: Jani Nikula Signed-off-by: Juha-Pekka Heikkila --- include/uapi/drm/drm_fourcc.h | 43 +++ 1 file changed, 43 insertions(+) diff --git a/include/uapi/drm

Re: [Intel-gfx] [PATCH 1/2] drm/fourcc: define Intel Meteorlake related ccs modifiers

On 10.5.2023 16.15, Jani Nikula wrote: On Tue, 09 May 2023, Juha-Pekka Heikkila wrote: Add Tile4 type ccs modifiers with aux buffer needed for MTL Please send this Cc: dri-devel too. Sure, I'll resend shortly. Here I just didn't want to spam dri-devel since from original set this patch

[Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add handling for MTL ccs modifiers

Add Tile4 ccs modifiers w/ auxbuffer handling Signed-off-by: Juha-Pekka Heikkila Reviewed-by: Mika Kahola --- drivers/gpu/drm/i915/display/intel_fb.c | 42 ++- .../drm/i915/display/skl_universal_plane.c| 22 +- 2 files changed, 61 insertions(+), 3 deletions

[Intel-gfx] [PATCH 1/2] drm/fourcc: define Intel Meteorlake related ccs modifiers

Add Tile4 type ccs modifiers with aux buffer needed for MTL Signed-off-by: Juha-Pekka Heikkila --- include/uapi/drm/drm_fourcc.h | 43 +++ 1 file changed, 43 insertions(+) diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index

Re: [Intel-gfx] [PATCH 4/4] drm/i915/mtl: Add handling for MTL ccs modifiers

On 8.5.2023 14.41, Kahola, Mika wrote: -Original Message- From: Intel-gfx On Behalf Of Juha-Pekka Heikkila Sent: Thursday, May 4, 2023 1:28 PM To: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 4/4] drm/i915/mtl: Add handling for MTL ccs modifiers Add Tile4 ccs modifiers

[Intel-gfx] [PATCH 4/4] drm/i915/mtl: Add handling for MTL ccs modifiers

Add Tile4 ccs modifiers w/ auxbuffer handling Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/display/intel_fb.c | 42 ++- .../drm/i915/display/skl_universal_plane.c| 22 +- 2 files changed, 61 insertions(+), 3 deletions(-) diff --git a/drivers/gpu

[Intel-gfx] [PATCH 3/4] drm/fourcc: define Intel Meteorlake related ccs modifiers

Add Tile4 type ccs modifiers with aux buffer needed for MTL Cc: dri-de...@lists.freedesktop.org Signed-off-by: Juha-Pekka Heikkila --- include/uapi/drm/drm_fourcc.h | 43 +++ 1 file changed, 43 insertions(+) diff --git a/include/uapi/drm/drm_fourcc.h b/include

[Intel-gfx] [PATCH 2/4] drm/i915/mtl: Add MTL for remapping CCS FBs

From: Clint Taylor Add support for remapping CCS FBs on MTL to remove the restriction of the power-of-two sized stride and the 2MB surface offset alignment for these FBs. Signed-off-by: Clint Taylor Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/display/intel_fb.c

[Intel-gfx] [PATCH 1/4] drm/i915/mtl: Drop FLAT CCS check

From: Pallavi Mishra Remove FLAT CCS check from XY_FAST_COLOR_BLT usage, thus enabling MTL to use it. Signed-off-by: Pallavi Mishra Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/gt/intel_migrate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers

Re: [Intel-gfx] [PATCH 0/6] drm/i915/dpt: Fix DPT+shmem combo and add i915.enable_dpt modparam

Set look all ok, Reviewed-by: Juha-Pekka Heikkila I guess should start to think about how to write igt tests which would target directly at dpt so this kind of issues wouldn't get missed. /Juha-Pekka On 20.3.2023 11.05, Ville Syrjala wrote: From: Ville Syrjälä Avoid the shrinker

Re: [Intel-gfx] [PATCH] drm/i915/mtl: X-Tile support changes to client blits

look ok to me. Reviewed-by: Juha-Pekka Heikkila On 23.2.2023 20.39, Jonathan Cavitt wrote: Refactor the supports_x_tiling and fast_blit_ok helper functions in the live client selftest to better reflect when XY_FAST_COPY_BLT supports X-tile and can be used. Signed-off-by: Jonathan Cavitt

Re: [Intel-gfx] [PATCH] drm/i915/display: Check source height is > 0

On 12.1.2023 20.28, Ville Syrjälä wrote: On Mon, Dec 26, 2022 at 10:53:24PM -0700, Drew Davenport wrote: The error message suggests that the height of the src rect must be at least 1. Reject source with height of 0. Signed-off-by: Drew Davenport --- I was investigating some divide-by-zero

Re: [Intel-gfx] [PATCH] drm/i915/display: assume some pixelrate for src smaller than 1

On 11.1.2023 22.09, Drew Davenport wrote: On Wed, Jan 11, 2023 at 09:39:26PM +0200, Ville Syrjälä wrote: On Wed, Jan 11, 2023 at 11:28:51AM -0700, Drew Davenport wrote: On Wed, Jan 11, 2023 at 04:19:00PM +0200, Ville Syrjälä wrote: On Wed, Jan 04, 2023 at 02:44:48PM +0200, Juha-Pekka Heikkila

[Intel-gfx] [PATCH v2] drm/i915/display: assume some pixelrate for src smaller than 1

intel_adjusted_rate() didn't take into account src rectangle can be less than 1 in with or height. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH] drm/i915/display: assume some pixelrate for src smaller than 1

intel_adjusted_rate() didn't take into account src rectangle can be less than 1 in width or height. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display

Re: [Intel-gfx] [PATCH] drm/i915/display: Check source height is > 0

Hi Drew, this is good find. I went looking where the problem is in and saw what you probably also saw earlier. I was wondering if diff below would be better fix? I assume this would end up with einval or erange in your case but code flow otherwise would stay as is while fixing all future

Re: [Intel-gfx] [PATCH] drm/i915: Enable XE_HP 4Tile support

const struct intel_device_info adl_p_info = { .has_3d_pipeline = 1, \ .has_64bit_reloc = 1, \ .has_flat_ccs = 1, \ + .has_4tile = 1, \ Order look wrong, should be between has_3d_pipeline and has_64bit_reloc. With that fixed: Reviewed-by: Juha-Pekka Heikkila

Re: [Intel-gfx] [PATCH] drm/i915/mtl: Add support of Tile4 to MTL

On 20.12.2022 18.29, Stanislav Lisovskiy wrote: We have some Tile4 tests now skipping, which were supposed to be working. So lets make them work, by adding display_ver 14 as supported. v2: - Remove "14" for Tile 4 CCS formats, as they seem to be not supported by DG2(Juha-Pekk

Re: [Intel-gfx] [PATCH] drm/i915/mtl: Add support of Tile4 to MTL

Hi Stan, On 19.12.2022 15.50, Stanislav Lisovskiy wrote: We have some Tile4 tests now skipping, which were supposed to be working. So lets make them work, by adding display_ver 14 as supported. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_fb.c | 8 1

Re: [Intel-gfx] [PATCH 5/5] drm/i915: Simplify modifier lookup in watermark code

On 30.9.2022 14.31, Ville Syrjälä wrote: On Fri, Sep 30, 2022 at 02:22:08PM +0300, Juha-Pekka Heikkila wrote: I had earlier this patch which look like it does mostly the same https://patchwork.freedesktop.org/patch/444010/?series=92491=4 With exception to mc ccs, earlier Imre said mc ccs must

Re: [Intel-gfx] [PATCH 5/5] drm/i915: Simplify modifier lookup in watermark code

I had earlier this patch which look like it does mostly the same https://patchwork.freedesktop.org/patch/444010/?series=92491=4 With exception to mc ccs, earlier Imre said mc ccs must not be considered here. /Juha-Pekka On 30.9.2022 13.43, Ville Syrjala wrote: From: Ville Syrjälä Replace

Re: [Intel-gfx] [PATCH i-g-t] Revert "lib/i915: request CPU_ACCESS for fb objects"

Reviewed-by: Juha-Pekka Heikkila On 7.7.2022 15.23, Matthew Auld wrote: This reverts commit 3cf110f8dcd1f4f02cf84339664b413abdaebf7d. This is too big of a hammer it seems, since we can't really support flat-CCS with lmem + smem objects, and here adding the flag means we also attach the smem

Re: [Intel-gfx] [PATCH i-g-t] tests/i915/kms_big_fb: trigger async flip with a dummy flip

Hi, On 5.7.2022 13.28, Murthy, Arun R wrote: On 5.7.2022 12.49, Karthik B S wrote: On 7/5/2022 3:08 PM, Murthy, Arun R wrote: On 6/28/2022 4:34 PM, Arun R Murthy wrote: In oder to trigger the async flip, a dummy flip is required after sync flip so as to update the watermarks for async in KMD

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Fix i915_vma_pin_iomap()

On 21.6.2022 13.53, Matthew Auld wrote: On Mon, 20 Jun 2022 at 10:38, Juha-Pekka Heikkila wrote: On 10.6.2022 20.43, Matthew Auld wrote: On Fri, 10 Jun 2022 at 15:53, Matthew Auld wrote: On Fri, 10 Jun 2022 at 13:12, Juha-Pekka Heikkila wrote: From: CQ Tang Display might allocate

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Fix i915_vma_pin_iomap()

On 10.6.2022 20.43, Matthew Auld wrote: On Fri, 10 Jun 2022 at 15:53, Matthew Auld wrote: On Fri, 10 Jun 2022 at 13:12, Juha-Pekka Heikkila wrote: From: CQ Tang Display might allocate a smem object and call i915_vma_pin_iomap(), the existing code will fail. This fix was suggested

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915/display: Add smem fallback allocation for dpt (rev5)

Hi Lakshmi, here would be another false positive from ci. My changes are not affecting this error with busyness on skl with igt@kms_flip@busy-flip@a-edp1 /Juha-Pekka On 17.6.2022 13.19, Patchwork wrote: *Patch Details* *Series:* series starting with [1/3] drm/i915/display: Add smem fallback

[Intel-gfx] [PATCH 3/3] drm/i915: don't leak lmem mapping in vma_evict

Don't leak lmem mapping in vma_evict, move __i915_vma_iounmap outside i915_vma_is_map_and_fenceable Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/i915_vma.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm

[Intel-gfx] [PATCH 1/3] drm/i915/display: Add smem fallback allocation for dpt

Add fallback smem allocation for dpt if stolen memory allocation failed. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/display/intel_dpt.c | 16 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers/gpu

[Intel-gfx] [PATCH 2/3] drm/i915: Fix i915_vma_pin_iomap()

to i915_gem_object_pin_map Signed-off-by: CQ Tang Signed-off-by: Juha-Pekka Heikkila Cc: Chris Wilson Cc: Jari Tahvanainen --- drivers/gpu/drm/i915/i915_vma.c | 33 ++--- 1 file changed, 22 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_vma.c b

[Intel-gfx] [PATCH 2/2] drm/i915: Fix i915_vma_pin_iomap()

From: CQ Tang Display might allocate a smem object and call i915_vma_pin_iomap(), the existing code will fail. This fix was suggested by Chris P Wilson, that we pin the smem with i915_gem_object_pin_map_unlocked(). Signed-off-by: CQ Tang Signed-off-by: Juha-Pekka Heikkila Cc: Chris Wilson

[Intel-gfx] [PATCH 1/2] drm/i915/display: Add smem fallback allocation for dpt

Add fallback smem allocation for dpt if stolen memory allocation failed. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/display/intel_dpt.c | 16 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers/gpu

Re: [Intel-gfx] [PATCH 3/4] drm/fourcc: Introduce format modifier for DG2 clear color

Reviewed-by: Juha-Pekka Heikkila On 4.4.2022 16.38, Imre Deak wrote: From: Mika Kahola DG2 clear color render compression uses Tile4 layout. Therefore, we need to define a new format modifier for uAPI to support clear color rendering. v2: Display version is fixed. [Imre] KDoc

Re: [Intel-gfx] [PATCH 2/4] drm/i915/dg2: Add support for DG2 render and media compression

Reviewed-by: Juha-Pekka Heikkila On 4.4.2022 16.38, Imre Deak wrote: From: Matt Roper Add support for DG2 render and media compression, for the description of buffer layouts see the previous patch adding the corresponding frame buffer modifiers. v2: Display version fix [Imre] v3

Re: [Intel-gfx] [PATCH] drm/i915/display: Add smem fallback allocation for dpt

On 22.3.2022 17.53, Matthew Auld wrote: On Tue, 22 Mar 2022 at 12:06, Juha-Pekka Heikkila wrote: On 22.3.2022 12.45, Matthew Auld wrote: On Mon, 21 Mar 2022 at 18:36, Juha-Pekka Heikkila wrote: On 21.3.2022 14.29, Matthew Auld wrote: On Fri, 18 Mar 2022 at 09:22, Juha-Pekka Heikkila

Re: [Intel-gfx] [PATCH] drm/i915/display: Add smem fallback allocation for dpt

On 22.3.2022 12.45, Matthew Auld wrote: On Mon, 21 Mar 2022 at 18:36, Juha-Pekka Heikkila wrote: On 21.3.2022 14.29, Matthew Auld wrote: On Fri, 18 Mar 2022 at 09:22, Juha-Pekka Heikkila wrote: On 17.3.2022 13.55, Matthew Auld wrote: On Wed, 16 Mar 2022 at 22:23, Juha-Pekka Heikkila

Re: [Intel-gfx] [PATCH] drm/i915/display: Add smem fallback allocation for dpt

On 21.3.2022 14.29, Matthew Auld wrote: On Fri, 18 Mar 2022 at 09:22, Juha-Pekka Heikkila wrote: On 17.3.2022 13.55, Matthew Auld wrote: On Wed, 16 Mar 2022 at 22:23, Juha-Pekka Heikkila wrote: Add fallback smem allocation for dpt if stolen memory allocation failed. Signed-off-by: Juha

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: Add smem fallback allocation for dpt

Hi Lakshmi, here would be again false positive on glk, glk doesn't use dpt which is changed on my patch. /Juha-Pekka On 17.3.2022 4.31, Patchwork wrote: *Patch Details* *Series:* drm/i915/display: Add smem fallback allocation for dpt *URL:*

Re: [Intel-gfx] [PATCH] drm/i915/display: Add smem fallback allocation for dpt

On 17.3.2022 13.55, Matthew Auld wrote: On Wed, 16 Mar 2022 at 22:23, Juha-Pekka Heikkila wrote: Add fallback smem allocation for dpt if stolen memory allocation failed. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/display/intel_dpt.c | 18 ++ 1 file

[Intel-gfx] [PATCH] drm/i915/display: Add smem fallback allocation for dpt

Add fallback smem allocation for dpt if stolen memory allocation failed. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/display/intel_dpt.c | 18 ++ 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Move PIPE_CHICKEN RMW out from the vblank evade critical section

This patch set look all ok. That failed cursor test in ci run seem to be flip flopping on other runs too on same icl box. Reviewed-by: Juha-Pekka Heikkila On 2.2.2022 13.16, Ville Syrjala wrote: From: Ville Syrjälä We don't want any RMWs in the part of the commit that happens under vblank

Re: [Intel-gfx] [PATCH v5 16/19] uapi/drm/dg2: Introduce format modifier for DG2 clear color

On 15.2.2022 20.24, Chery, Nanley G wrote: -Original Message- From: Juha-Pekka Heikkila Sent: Tuesday, February 15, 2022 9:32 AM To: Chery, Nanley G ; Nanley Chery ; C, Ramalingam Cc: intel-gfx ; Auld, Matthew ; dri-devel Subject: Re: [Intel-gfx] [PATCH v5 16/19] uapi/drm/dg2

Re: [Intel-gfx] [PATCH v5 16/19] uapi/drm/dg2: Introduce format modifier for DG2 clear color

On 15.2.2022 18.44, Chery, Nanley G wrote: -Original Message- From: Juha-Pekka Heikkila Sent: Tuesday, February 15, 2022 8:15 AM To: Chery, Nanley G ; Nanley Chery ; C, Ramalingam Cc: intel-gfx ; Auld, Matthew ; dri-devel Subject: Re: [Intel-gfx] [PATCH v5 16/19] uapi/drm/dg2

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