[Intel-gfx] XDC 2021: Registration & Call for Proposals now open!

Hello! Registration & Call for Proposals are now open for XDC 2021, which will take place on September 15-17, 2021. This year we will repeat as virtual event. https://indico.freedesktop.org/event/1/ As usual, the conference is free of charge and open to the general public. If you plan on

[Intel-gfx] XDC 2020: Registration & Call for Proposals now open!

Hello! Registration & Call for Proposals are now open for XDC 2020, which will take place at the Gdańsk University of Technology in Gdańsk, Poland on September 16-18, 2020. Thanks to LWN.net for hosting the website again this year! https://xdc2020.x.org As usual, the conference is

Re: [Intel-gfx] [PATCH igt v2] igt/pm_rps: Always allocate spin[0]

On Tue, 2017-12-19 at 12:34 +, Chris Wilson wrote: > Avoid having to test for spin[0] existing by starting the load-loop with > it allocated. > > v2: Preallocate the spin[1] as well for high load. > > References: https://bugs.freedesktop.org/show_bug.cgi?id=104060 > Signed-off-by: Chris

Re: [Intel-gfx] [PATCH i-g-t 1/2] igt: Remove Android support

On Fri, 2017-11-24 at 17:17 +0200, Arkadiusz Hiler wrote: > This patch gets rid of the Android support, deleting all the hacks and > moving code around to the places it belongs. > > Android build is not really maintained properly and rots rather fast. > With recent push for Meson here and Android

Re: [Intel-gfx] [PATCH igt] lib: Check and report if a subtest triggers a new kernel taint

On Wed, 2017-11-29 at 12:40 +, Chris Wilson wrote: > Quoting Chris Wilson (2017-11-29 12:30:23) > > Checking for a tainted kernel is a convenient way to see if the test > > generated a critical error such as a oops, or machine check. > > > > Signed-off-by: Chris Wilson

Re: [Intel-gfx] [PATCH i-g-t] tests/pm_rps: Move some test logic out of boost function

On Wed, 2017-10-18 at 11:10 +0530, Sagar Arun Kamble wrote: > > On 10/17/2017 6:13 PM, Radoslaw Szwichtenberg wrote: > > Moving code out of the boost function will allow its usage > > in other/new test scenarios. > > > > Signed-off-by: Radoslaw Szwichtenberg >

Re: [Intel-gfx] [PATCH i-g-t 1/2] tests: Clean up igt_skip_on_simulation() uses

On Fri, 2017-10-13 at 14:59 +0300, Arkadiusz Hiler wrote: > General update to reflect current state of things. > > Signed-off-by: Arkadiusz Hiler Acked-by: Radoslaw Szwichtenberg ___

Re: [Intel-gfx] [PATCH 08/31] drm/i915: Rename intel_enable_rc6 to intel_rc6_enabled

On Tue, 2017-09-19 at 23:11 +0530, Sagar Arun Kamble wrote: > This function gives the status of RC6, whether disabled or if > enabled then which state. intel_enable_rc6 will be used for > enabling RC6 in the next patch. > > Cc: Chris Wilson > Cc: Imre Deak

Re: [Intel-gfx] [PATCH 07/31] drm/i915: Name structure in dev_priv that contains RPS/RC6 state as "pm"

On Tue, 2017-09-19 at 23:11 +0530, Sagar Arun Kamble wrote: > Prepared substructure rps for RPS related state. autoenable_work and > pcu_lock are used for RC6 hence they are defined outside rps structure. > Renamed the RPS lock as pcu_lock. > > Cc: Chris Wilson > Cc:

Re: [Intel-gfx] [PATCH 06/31] drm/i915: Name i915_runtime_pm structure in dev_priv as "rpm"

On Tue, 2017-09-19 at 23:11 +0530, Sagar Arun Kamble wrote: > Will be using pm for state containing RPS/RC6 state in the next patch. > > Cc: Imre Deak > Cc: Chris Wilson > Signed-off-by: Sagar Arun Kamble Reviewed-by:

Re: [Intel-gfx] [PATCH 05/31] drm/i915: Separate RPS and RC6 handling for CHV

On Tue, 2017-09-19 at 23:11 +0530, Sagar Arun Kamble wrote: > This patch separates enable/disable of RC6 and RPS for CHV. > > Cc: Imre Deak > Cc: Chris Wilson > Signed-off-by: Sagar Arun Kamble Reviewed-by: Radoslaw

Re: [Intel-gfx] [PATCH 03/31] drm/i915: Separate RPS and RC6 handling for BDW

On Wed, 2017-09-20 at 11:14 +, Szwichtenberg, Radoslaw wrote: > On Tue, 2017-09-19 at 23:11 +0530, Sagar Arun Kamble wrote: > > This patch separates RC6 and RPS enabling for BDW. > > RC6/RPS Disabling are handled through gen6 functions. > > > > Cc: Imre Deak &

Re: [Intel-gfx] [PATCH 04/31] drm/i915: Separate RPS and RC6 handling for VLV

On Tue, 2017-09-19 at 23:11 +0530, Sagar Arun Kamble wrote: > This patch separates enable/disable of RC6 and RPS for VLV. > > Cc: Imre Deak > Cc: Chris Wilson > Signed-off-by: Sagar Arun Kamble Reviewed-by: Radoslaw

Re: [Intel-gfx] [PATCH 02/31] drm/i915: Separate RPS and RC6 handling for gen6+

On Tue, 2017-09-19 at 23:11 +0530, Sagar Arun Kamble wrote: > This patch separates enable/disable of RC6 and RPS for gen6+ > platforms prior to VLV. > > Cc: Imre Deak > Cc: Chris Wilson > Signed-off-by: Sagar Arun Kamble

Re: [Intel-gfx] [PATCH 03/31] drm/i915: Separate RPS and RC6 handling for BDW

On Tue, 2017-09-19 at 23:11 +0530, Sagar Arun Kamble wrote: > This patch separates RC6 and RPS enabling for BDW. > RC6/RPS Disabling are handled through gen6 functions. > > Cc: Imre Deak > Cc: Chris Wilson > Signed-off-by: Sagar Arun Kamble

Re: [Intel-gfx] [PATCH i-g-t v3] tests/gem_flink_basic: Add documentation for subtests

On Fri, 2017-09-15 at 07:34 +, Szwichtenberg, Radoslaw wrote: > On Thu, 2017-09-14 at 11:09 -0700, Vinay Belgaumkar wrote: > > Added the missing IGT_TEST_DESCRIPTION and some subtest > > descriptions. > > > > v2: Removed duplication, addressed comments, cc'd te

Re: [Intel-gfx] [PATCH i-g-t v3] tests/gem_flink_basic: Add documentation for subtests

On Thu, 2017-09-14 at 11:09 -0700, Vinay Belgaumkar wrote: > Added the missing IGT_TEST_DESCRIPTION and some subtest > descriptions. > > v2: Removed duplication, addressed comments, cc'd test author > > v3: Only comment abstract code, change some igt_info to igt_debug. > Changed description

Re: [Intel-gfx] [PATCH 00/20] Add support for GuC-based SLPC

On Fri, 2017-09-01 at 12:55 +0530, Sagar Arun Kamble wrote: > SLPC (Single Loop Power Controller) is a replacement for some host-based > power management features. The SLPC implementation runs in GuC firmware. > This series has been tested with SKL/APL/KBL GuC firmware v9 and v10 > which are yet

Re: [Intel-gfx] [PATCH igt 5/5] igt/gem_flink_race: Limit name subtest to 5s

On Mon, 2017-09-11 at 09:56 +0100, Chris Wilson wrote: > At present, we try to do 1,000,000 cycles, which may be a reasonable > estimate for detecting the race, takes 6 minutes in practice on bxt on a > good day (as it spends more time doing rpm suspend/resume than actual work, > and that accounts

Re: [Intel-gfx] [PATCH 02/20] drm/i915/gen9+: Separate RPS and RC6 handling

On Fri, 2017-09-01 at 12:55 +0530, Sagar Arun Kamble wrote: > With GuC based SLPC, frequency control will be moved to GuC and Host will > continue to control RC6 and Ring frequency setup. SLPC can be enabled in > the GuC setup path and can happen in parallel in GuC with other i915 setup. > Hence

Re: [Intel-gfx] [PATCH 01/20] drm/i915/debugfs: Create generic string tokenize function and update CRC control parsing

On Fri, 2017-09-01 at 12:55 +0530, Sagar Arun Kamble wrote: > Input string parsing used in CRC control parameter parsing is generic > and can be reused for other debugfs interfaces. Hence name it as > buffer_tokenize instead of tieing to display_crc. Also fix the function s/tieing/tying ? >

Re: [Intel-gfx] [PATCH i-g-t 00/22] RFC: meson build system support

On Tue, 2017-09-05 at 14:36 +0200, Daniel Vetter wrote: > Assuming we can get some consensus around this I'd like to merge it and > polish the meson support in-tree, it's kinda growing into a bigger series > already. And of course we need to keep autohell working for probably a > fairly long time,

Re: [Intel-gfx] [PATCH i-g-t] pm_rps: [RFC] RPS tests documentation update

On Thu, 2017-09-07 at 11:28 -0700, Belgaumkar, Vinay wrote: > > On 9/7/2017 5:15 AM, Katarzyna Dec wrote: > > Added comments in tricky places for better feature understanding. > > Added IGT_TEST_DESCRIPTION and short description for non-obvious > > subtests. > > Changed name of 'magic' checkit()

Re: [Intel-gfx] [PATCH i-g-t] pm_rps: [RFC] RPS tests documentation update

On Thu, 2017-09-07 at 14:15 +0200, Katarzyna Dec wrote: > Added comments in tricky places for better feature understanding. > Added IGT_TEST_DESCRIPTION and short description for non-obvious > subtests. > Changed name of 'magic' checkit() function to something meaningfull. > Changed junk struct

Re: [Intel-gfx] [PATCH i-g-t 02/12] build: Nuke #ifdef HAVE_CONFIG_H cargo-cult

On Mon, 2017-09-04 at 12:27 +0300, Arkadiusz Hiler wrote: > On Mon, Sep 04, 2017 at 10:45:19AM +0200, Daniel Vetter wrote: > > On Mon, Sep 04, 2017 at 11:28:09AM +0300, Arkadiusz Hiler wrote: > > > On Sat, Sep 02, 2017 at 07:03:56PM +0200, Daniel Vetter wrote: > > > > We have it. Daniel Stone said

Re: [Intel-gfx] [PATCH i-g-t 1/5] Add support for subtest-specific documentation

On Fri, 2017-08-11 at 10:20 +0200, Daniel Vetter wrote: > On Thu, Aug 10, 2017 at 01:26:47PM +0300, Petri Latvala wrote: > > The current documentation for tests is limited to a single string per > > test binary. This patch adds support for documenting individual > > subtests. > > > > The syntax

Re: [Intel-gfx] [PATCH i-g-t v2 2/3] docs: Add user and developer documentation about Chamelium support

On Mon, 2017-08-28 at 11:12 +0300, Paul Kocialkowski wrote: > This introduces plain-text documentation about the Chamelium aimed at > users who wish to deploy the platform, as well as developers who wish > to work on improving IGT support for it. > > Given the contents of this documentation, it

Re: [Intel-gfx] [PATCH i-g-t v4] pm_rps: Changes in waitboost scenario

On Mon, 2017-08-28 at 10:50 +0200, Katarzyna Dec wrote: > CI is observing sporadical failures in pm_rps subtests. > There are a couple of reasons. One of them is the fact that > on gen6, gen7 and gen7.5, max frequency (as in the HW limit) > is not set to RP0, but the value obtaind from PCODE

Re: [Intel-gfx] [PATCH i-g-t] pm_rps: Extended testcases with checking PMINTRMSK register value

On Tue, 2017-08-22 at 13:33 +0100, Chris Wilson wrote: > Quoting Szwichtenberg, Radoslaw (2017-08-22 12:56:00) > > On Tue, 2017-08-22 at 01:31 +0300, Arkadiusz Hiler wrote: > > > On Mon, Aug 21, 2017 at 09:39:24PM +0200, Daniel Vetter wrote: > > > > On Mon, Aug 21, 2

Re: [Intel-gfx] [PATCH i-g-t] pm_rps: Extended testcases with checking PMINTRMSK register value

On Tue, 2017-08-22 at 01:31 +0300, Arkadiusz Hiler wrote: > On Mon, Aug 21, 2017 at 09:39:24PM +0200, Daniel Vetter wrote: > > On Mon, Aug 21, 2017 at 11:21:49AM +0100, Chris Wilson wrote: > > > Quoting Chris Wilson (2017-08-21 10:53:36) > > > > Quoting Arkadiusz Hiler (2017-08-21 10:42:25) > > >

Re: [Intel-gfx] [PATCH] drm/i915: Boost GPU clocks if we miss the pageflip's vblank

On Fri, 2017-08-18 at 08:54 +0100, Chris Wilson wrote: > Quoting Chris Wilson (2017-08-17 13:37:06) > > If we miss the current vblank because the gpu was busy, that may cause a > > jitter as the frame rate temporarily drops. We try to limit the impact > > of this by then boosting the GPU clock to

Re: [Intel-gfx] [PATCH i-g-t 08/11] tests/perf: load gt_boost_freq_mhz as max gt frequency

On Fri, 2017-08-04 at 12:20 +0100, Lionel Landwerlin wrote: > We want the absolute max the hardware can do, not the max value > set by a previous application/user. > > Signed-off-by: Lionel Landwerlin > --- >  tests/perf.c | 2 +- >  1 file changed, 1 insertion(+),

Re: [Intel-gfx] [RFC i-g-t] tests/gem_exec_basic: Documentation for subtests

On Tue, 2017-08-08 at 15:09 -0700, Vinay Belgaumkar wrote: > This is an RFC for adding documentation to IGT subtests. Each subtest can have > something similar to a WHAT - explaining what the subtest actually does, > and a WHY - which explains a use case, if applicable. Additionally, > include

Re: [Intel-gfx] [PATCH i-g-t 1/2] igt: Move read_rc6_residency function to lib

On Tue, 2017-07-25 at 17:26 +0200, Ewelina Musial wrote: > Gem_mocs_settings and pm_rc6_residency tests are defining > the same functionality to read residency from sysfs. > Moving that function to lib/igt_aux and updating tests. > > Signed-off-by: Ewelina Musial

Re: [Intel-gfx] [PATCH i-g-t] lib/ioctl_wrappers: Fix some comments

On Wed, 2017-06-28 at 13:40 +0300, Arkadiusz Hiler wrote: > "This is a wraps" -> "This wraps" > "hw/hardware context" -> "context" > > gem_context_create does not use igt_require() but igt_skip_on() so make > the similarity note more vague and in result true. > > Cc: Daniel Vetter

Re: [Intel-gfx] [RFC i-g-t 1/4] igt: Remove default from the engine list

On Fri, 2017-06-23 at 15:35 +0100, Tvrtko Ursulin wrote: > On 23/06/2017 15:17, Szwichtenberg, Radoslaw wrote: > > On Fri, 2017-06-23 at 12:31 +0100, Tvrtko Ursulin wrote: > > > From: Tvrtko Ursulin <tvrtko.ursu...@intel.com> > > > > > > Default is not

Re: [Intel-gfx] [RFC i-g-t 1/4] igt: Remove default from the engine list

On Fri, 2017-06-23 at 12:31 +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > Default is not an engine but an ABI alias for RCS. Remove it > from the engine list to eliminate redundant subtests and test > passes. Does it mean that we will have an ABI part that we

Re: [Intel-gfx] [igt PATCH] igt/pm_rps: Remove remaining assert on CUR <= MAX

On Wed, 2017-06-14 at 12:44 -0700, jeff.mc...@intel.com wrote: > From: Jeff McGee > > This completes the change started by: > > commit 39cccab83b7c515a2b57abe679a8cb304c8933ef > Author: Chris Wilson > Date:   Fri May 19 09:41:40 2017 +0100 > >   

Re: [Intel-gfx] [PATCH] drm/i915/glk: RGB565 planes now allow 90/270 rotation

On Wed, 2017-06-07 at 10:45 -0700, clinton.a.tay...@intel.com wrote: > From: Clint Taylor > > RGB565 Pixel format planes can now be rotated at 90 and 270 degrees > > Signed-off-by: Clint Taylor > --- >  

Re: [Intel-gfx] [PATCH i-g-t] tests/pm_rc6_residency: Add subtest to check RC6 suspend handling

On Mon, 2017-04-24 at 14:55 +0200, Ewelina Musial wrote: > In some cases we observed that forcewake isn't kept after > resume and then RC6 residency is not constant. > > References: HSD#1804921797 > Cc: Arkadiusz Hiler > Cc: Michal Winiarski

Re: [Intel-gfx] [PATCH 6/7] drm/i915: Restart RPS using the same RP_CONTROL as from initialisation

On Mon, 2017-02-20 at 09:47 +, Chris Wilson wrote: > During initialisation, we set different flags for different > architectures - these should be preserved when we reload the RPS > thresholds. If we use a mmio read, it will first ensure that the > threshold registers are written before we

Re: [Intel-gfx] [PATCH 2/7] drm/i915: Store the requested frequency whilst RPS is disabled

On Mon, 2017-02-20 at 09:47 +, Chris Wilson wrote: > If intel_set_rps() is called whilst the hw is disabled, just store the > requested frequency (from the user) for application when we wake the hw > up. > > Signed-off-by: Chris Wilson Reviewed-by: Radoslaw

Re: [Intel-gfx] [PATCH 7/7] drm/i915: Stop RPS as we adjust thresholds

On Mon, 2017-02-20 at 09:47 +, Chris Wilson wrote: > Disable RPS by setting RP_CONTROL to 0, remembering its earlier value. > Then adjust the thresholds before re-enabling RP_CONTROL. > > Signed-off-by: Chris Wilson > Cc: Mika Kuoppala

Re: [Intel-gfx] [PATCH 3/7] drm/i915: Remove unrequired POSTING_READ from gen6_set_rps()

On Mon, 2017-02-20 at 09:47 +, Chris Wilson wrote: > The uncached mmio is sufficient to queue the mmio writes without raising > forcewake. The forced flush along with acquiring forcewake from the > posting read is not required for adjusting the RPS frequency. > > Signed-off-by: Chris Wilson

Re: [Intel-gfx] [PATCH] drm/i915: Prevent divide-by-zero in debugfs/i915_rps_boost_info

On Sat, 2017-02-18 at 11:27 +, Chris Wilson wrote: > Either by chance, or by misread, the current evaluation interval may be > zero. If that is the case, don't divide by it! > > Signed-off-by: Chris Wilson Reviewed-by: Radoslaw Szwichtenberg

Re: [Intel-gfx] [PATCH] drm/i915: Remove unneeded struct_mutex around rpm

On Sat, 2017-02-18 at 15:00 +, Chris Wilson wrote: > We don't need struct_mutex for acquiring an rpm wakeref, and do not need > to serialise those register read (it's the wrong mutex for those > registers in any case). Begone! > > Signed-off-by: Chris Wilson

Re: [Intel-gfx] [PATCH] drm/i915: Remove unrequired POSTING_READ from gen6_set_rps()

On Fri, 2017-02-17 at 08:31 +, Chris Wilson wrote: > The uncached mmio is sufficient to queue the mmio writes without raising > forcewake. The forced flush along with acquiring forcewake from the > posting read is not required for adjusting the RPS frequency. > > Signed-off-by: Chris Wilson

Re: [Intel-gfx] [PATCH] drm/i915: Move the common RPS warnings to intel_set_rps()

On Fri, 2017-02-17 at 08:37 +, Chris Wilson wrote: > Instead of having each back-end provide identical guards, just have a > singular set in intel_set_rps() to verify that the caller is obeying the > rules. > > Signed-off-by: Chris Wilson Reviewed-by: Radoslaw

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Only apply the jump to the "efficient RPS" frequency on startup

On Fri, 2017-02-10 at 15:03 +, Chris Wilson wrote: > Currently we apply the jump to rpe if we are below it and the GPU needs > more power. For some GPUs, the rpe is 75% of the maximum range causing > us to dramatically overshoot low power applications *and* unable to > reach the low frequency

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Enable fine-tuned RPS for cherryview

On Fri, 2017-02-10 at 15:03 +, Chris Wilson wrote: > When the RPS tuning was applied to Baytrail, in commit 8fb55197e64d > ("drm/i915: Agressive downclocking on Baytrail"), concern was given that > it might cause Cherryview excess wakeups of the common power well. > However, the static

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Don't accidentally increase the frequency in handling DOWN rps

On Fri, 2017-02-10 at 15:03 +, Chris Wilson wrote: > If we receive a DOWN_TIMEOUT rps interrupt, we respond by reducing the > GPU clocks significantly. Before we do, double check that the frequency > we pick is actually a decrease. > > Signed-off-by: Chris Wilson

Re: [Intel-gfx] Why idle_freq is set to RPn and not RPe

5 6:38 PM > To: Chris Wilson; Szwichtenberg, Radoslaw; S, Deepak; Intel Graphics > Development; Goel, Akash > Subject: Re: Why idle_freq is set to RPn and not RPe > > > > On 12/30/2015 4:20 PM, Chris Wilson wrote: > > On Wed, Dec 30, 2015 at 04:09:46PM +0530, Kamble, Sagar A w

Re: [Intel-gfx] Why idle_freq is set to RPn and not RPe

than that was not requested. Thanks! Radek > -Original Message- > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] > Sent: Wednesday, December 30, 2015 10:31 AM > To: Kamble, Sagar A > Cc: S, Deepak; Szwichtenberg, Radoslaw; Intel Graphics Development; Goel, > Akash > S