Re: [Intel-gfx] [PATCH] drm/i915/guc: limit forcewake to blitter domain in guc_send

2017-03-24 Thread Chris Wilson
On Fri, Mar 24, 2017 at 09:12:13PM +0530, Kamble, Sagar A wrote:
>Reviewed-by: Sagar Arun Kamble [1]

and pushed.

Sagar, you might want to turn off sending html email for intel-gfx@.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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Re: [Intel-gfx] [PATCH] drm/i915/guc: limit forcewake to blitter domain in guc_send

2017-03-24 Thread Kamble, Sagar A

Reviewed-by: Sagar Arun Kamble 

On 3/24/2017 8:18 PM, Daniele Ceraolo Spurio wrote:

The forcewake_get call in the guc_send_mmio function was added to
avoid getting and releasing forcewake on each register access.
While this makes sense, all GuC registers are in the blitter range
so no need to wake all the wells.

Signed-off-by: Daniele Ceraolo Spurio 
---
  drivers/gpu/drm/i915/intel_uc.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 4a872cd..e016227 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -245,7 +245,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 
*action, u32 len)
return -EINVAL;
  
  	mutex_lock(>send_mutex);

-   intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
+   intel_uncore_forcewake_get(dev_priv, FORCEWAKE_BLITTER);
  
  	dev_priv->guc.action_count += 1;

dev_priv->guc.action_cmd = action[0];
@@ -283,7 +283,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 
*action, u32 len)
}
dev_priv->guc.action_status = status;
  
-	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);

+   intel_uncore_forcewake_put(dev_priv, FORCEWAKE_BLITTER);
mutex_unlock(>send_mutex);
  
  	return ret;


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[Intel-gfx] [PATCH] drm/i915/guc: limit forcewake to blitter domain in guc_send

2017-03-24 Thread Daniele Ceraolo Spurio
The forcewake_get call in the guc_send_mmio function was added to
avoid getting and releasing forcewake on each register access.
While this makes sense, all GuC registers are in the blitter range
so no need to wake all the wells.

Signed-off-by: Daniele Ceraolo Spurio 
---
 drivers/gpu/drm/i915/intel_uc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 4a872cd..e016227 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -245,7 +245,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 
*action, u32 len)
return -EINVAL;
 
mutex_lock(>send_mutex);
-   intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
+   intel_uncore_forcewake_get(dev_priv, FORCEWAKE_BLITTER);
 
dev_priv->guc.action_count += 1;
dev_priv->guc.action_cmd = action[0];
@@ -283,7 +283,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 
*action, u32 len)
}
dev_priv->guc.action_status = status;
 
-   intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
+   intel_uncore_forcewake_put(dev_priv, FORCEWAKE_BLITTER);
mutex_unlock(>send_mutex);
 
return ret;
-- 
1.9.1

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