[PATCH] drm/i915/mtl: Fix expected reg value for
> Thunderbolt PLL disabling
>
> On Fri, May 12, 2023 at 03:00:03PM +0300, Mika Kahola wrote:
> > While disabling Thunderbolt PLL, we request PLL to be stopped and
> > wait for ACK bit to be cleared. The expected value should be
On Fri, May 12, 2023 at 03:00:03PM +0300, Mika Kahola wrote:
> While disabling Thunderbolt PLL, we request PLL to be stopped and
> wait for ACK bit to be cleared. The expected value should be '0'
> instead of '~XELPDP_TBT_CLOCK_ACK' or otherwise we incorrectly
> receive dmesg warn "PHY PLL not
While disabling Thunderbolt PLL, we request PLL to be stopped and
wait for ACK bit to be cleared. The expected value should be '0'
instead of '~XELPDP_TBT_CLOCK_ACK' or otherwise we incorrectly
receive dmesg warn "PHY PLL not unlocked in 10us".
Signed-off-by: Mika Kahola
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