Re: [Intel-gfx] [PATCH] drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_start

2018-08-06 Thread Chris Wilson
Quoting Matthew Auld (2018-08-06 19:53:47) > On 6 August 2018 at 15:46, Chris Wilson wrote: > > Experience teaches us over and over again that coherency on Baytrail > > requires the odd heavy hammer, and in particular clflush alone is not > > enough to guarrantee that writes from the CPU are

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_start

2018-08-06 Thread Matthew Auld
On 6 August 2018 at 15:46, Chris Wilson wrote: > Experience teaches us over and over again that coherency on Baytrail > requires the odd heavy hammer, and in particular clflush alone is not > enough to guarrantee that writes from the CPU are picked up by the CS. > Do as we do elsewhere and ensure

[Intel-gfx] [PATCH] drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_start

2018-08-06 Thread Chris Wilson
Experience teaches us over and over again that coherency on Baytrail requires the odd heavy hammer, and in particular clflush alone is not enough to guarrantee that writes from the CPU are picked up by the CS. Do as we do elsewhere and ensure we have an unconditional i915_gem_chipset_flush() after