Re: [Intel-gfx] [PATCH] drm/i915/tgl: Suspend pre-parser across GTT invalidations

2019-09-16 Thread Daniele Ceraolo Spurio
On 9/16/19 1:54 PM, Chris Wilson wrote: Quoting Daniele Ceraolo Spurio (2019-09-16 21:37:26) On 9/14/19 1:25 AM, Chris Wilson wrote: Before we execute a batch, we must first issue any and all TLB invalidations so that batch picks up the new page table entries. Tigerlake's preparser is weake

Re: [Intel-gfx] [PATCH] drm/i915/tgl: Suspend pre-parser across GTT invalidations

2019-09-16 Thread Chris Wilson
Quoting Daniele Ceraolo Spurio (2019-09-16 21:37:26) > > > On 9/14/19 1:25 AM, Chris Wilson wrote: > > Before we execute a batch, we must first issue any and all TLB > > invalidations so that batch picks up the new page table entries. > > Tigerlake's preparser is weakening our post-sync CS_STALL

Re: [Intel-gfx] [PATCH] drm/i915/tgl: Suspend pre-parser across GTT invalidations

2019-09-16 Thread Daniele Ceraolo Spurio
On 9/14/19 1:25 AM, Chris Wilson wrote: Before we execute a batch, we must first issue any and all TLB invalidations so that batch picks up the new page table entries. Tigerlake's preparser is weakening our post-sync CS_STALL inside the invalidate pipe-control and allowing the loading of the ba

[Intel-gfx] [PATCH] drm/i915/tgl: Suspend pre-parser across GTT invalidations

2019-09-14 Thread Chris Wilson
Before we execute a batch, we must first issue any and all TLB invalidations so that batch picks up the new page table entries. Tigerlake's preparser is weakening our post-sync CS_STALL inside the invalidate pipe-control and allowing the loading of the batch buffer before we have setup its page tab